MAX5909EEE+ [ROCHESTER]
2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16, 0.150 INCH, 0.025 INCH PTICH, QSOP-16;
| 型号： | MAX5909EEE+ |
| 厂家： | 
Rochester Electronics |
| 描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16, 0.150 INCH, 0.025 INCH PTICH, QSOP-16 光电二极管 |
| 文件： | 总23页 (文件大小：1207K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2238; Rev 2; 11/03
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
General Description
Features
ꢀ Safe Hot Swap for +1V to +13.2V Power
Supplies
Requires One Input ≥ 2.7V
ꢀ Low 25mV Default Current-Limit Threshold
ꢀ Inrush Current Regulated at Startup
ꢀ Circuit Breaker Function
The MAX5904–MAX5909 dual hot-swap controllers
provide complete protection for dual-supply systems.
These devices hot swap two supplies ranging from +1V
to +13.2V, provided one supply is at or above 2.7V,
allowing the safe insertion and removal of circuit cards
into live backplanes.
The discharged filter capacitors of the circuit card pro-
vide low impedance to the live backplane. High inrush
currents from the backplane to the circuit card can burn
up connectors and components, or momentarily col-
lapse the backplane power supply leading to a system
reset. The MAX5904 family of hot-swap controllers pre-
vents such problems by gradually ramping up the output
voltage and regulating the current to a preset limit when
the board is plugged in, allowing the system to stabilize
safely. After the startup cycle is completed, two on-chip
comparators provide VariableSpeed/BiLevel™ protec-
tion against short-circuit and overcurrent faults, as well
as immunity against system noise and load transients. In
the event of a fault condition, the load is disconnected.
The MAX5905/MAX5907/MAX5909 must be unlatched
after a fault, and the MAX5904/MAX5906/MAX5908 auto-
matically restart after a fault.
ꢀ Adjustable Circuit Breaker/Current-Limit
Threshold
ꢀ VariableSpeed/BiLevel Circuit-Breaker Response
ꢀ Auto-Retry or Latched Fault Management
ꢀ On/Off Sequence Programming
ꢀ Status Output Indicates Fault/Safe Condition
ꢀ Output Undervoltage and Overvoltage Monitoring
and/or Protection
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
PIN-PACKAGE
8 SO
MAX5904ESA*
MAX5904USA
MAX5905ESA*
MAX5905USA
MAX5906EEE*
MAX5906UEE
MAX5907EEE*
MAX5907UEE
MAX5908EEE*
MAX5908UEE
MAX5909EEE*
MAX5909UEE
8 SO
8 SO
The MAX5904 family offers a variety of options to reduce
component count and design time. All devices integrate
an on-board charge pump to drive the gates of low-cost,
external N-channel MOSFETs. The devices offer integrat-
ed features like startup current regulation and current
glitch protection to eliminate external timing resistors and
capacitors. The MAX5906–MAX5909 provide an open-
drain status output, an adjustable startup timer, an
adjustable current limit, an uncommitted comparator,
and output undervoltage/overvoltage monitoring.
8 SO
16 QSOP
16 QSOP
16 QSOP
16 QSOP
16 QSOP
16 QSOP
16 QSOP
16 QSOP
The MAX5904/MAX5905 are available in 8-pin SO pack-
ages. The MAX5906–MAX5909 are available in space-
saving 16-pin QSOP packages.
*Contact factory for availability.
Pin Configurations
Applications
PCI-Express Applications
Basestation Line Cards
Network Switches or Routers
Solid-State Circuit Breaker
Power-Supply Sequencing
Hot Plug-In Daughter Cards
RAID
TOP VIEW
IN1
SENSE1
GATE1
GND
1
2
3
4
8
7
6
5
IN2
SENSE2
GATE2
ON
MAX5904
MAX5905
NARROW SO
Pin Configurations continued at end of data sheet.
VariableSpeed/BiLevel is a trademark of Maxim Integrated
Products, Inc.
Selector Guide and Typical Operating Circuits appear at end
of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
ABSOLUTE MAXIMUM RATINGS
IN_ to GND...........................................................................+14V
Continuous Power Dissipation (T = +70°C)
A
GATE_ to GND..........................................+0.3V to (V _ + 6.2V)
ON, PGOOD, COMP+, COMPOUT, TIM to GND.......-0.3V to the
8-Pin Narrow SO (derate 5.9ꢀW/°C above +70°C) ......471ꢀW
16-Pin QSOP (derate 8.3ꢀW/°C above +70°C)............667ꢀW
Operating Teꢀperature Ranges:
IN
higher of (V
+ 0.3V) and (V
+ 0.3V)
IN1
IN2
SENSE_, MON_, LIM_ to GND...................-0.3V to (V _ + 0.3V)
Current into Any Pin ......................................................... 50ꢀA
MAX590_U_ _ .....................................................0°C to +85°C
MAX590_E_ _ ...................................................-40°C to +85°C
Storage Teꢀperature Range.............................-65°C to +150°C
IN
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
IN
(V _ = +1V to +13.2V provided at least one supply is higher than +2.7V, V
= +2.7V, T = T
to T
, unless otherwise noted.
MAX
ON
A
MIN
Typical values are at V
= +5V, V
= +3.3V, and T = +25°C.) (Note 1)
IN2 A
IN1
PARAMETER
POWER SUPPLIES
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN_ Input Voltage Range
Supply Current
V
_
Other V = +2.7V
1.0
13.2
2.3
V
IN
IN
I
+ I
IN2
I
1.2
25
ꢀA
IN1
IN
CURRENT CONTROL
T
T
= +25°C
22.5
20.5
22.5
80
27.5
27.5
27.5
125
A
A
MAX5904/MAX5905
= T
to T
MAX
MIN
Slow-Coꢀparator Threshold
(V - V ) (Note 2)
V
ꢀV
SC,TH
IN
SENSE
LIM = GND
= 300kΩ
25
100
3
MAX5906–MAX5909
R
LIM
1ꢀV overdrive
50ꢀV overdrive
ꢀs
µs
Slow-Coꢀparator Response Tiꢀe
(Note 3)
t
SCD
110
V
V
V
V
_ - V
_ - V
_; during startup
2 x V
SC, TH
4 x V
SC, TH
SU,TH
FC,TH
IN
IN
SENSE
SENSE
Fast-Coꢀparator Threshold
ꢀV
_; norꢀal operation
Fast-Coꢀparator Response Tiꢀe
SENSE Input Bias Current
MOSFET DRIVER
t
10ꢀV overdrive, froꢀ overload condition
_ = V
260
ns
FCD
I
V
_
IN
0.03
6
µA
B SEN
SEN
R
R
= 100kΩ
8
10.8
0.45
13.6
0.55
TIM
TIM
= 4kΩ (ꢀiniꢀuꢀ value)
0.35
Startup Period
(Note 4)
t
ꢀs
START
TIM floating for MAX5906–MAX5909
fixed for MAX5904/MAX5905
5
9
14
Charging, V
(Note 5)
= +5V, V = +10V
IN
GATE
80
100
100
130
µA
µA
Weak discharge, during startup when current
liꢀit is active or when 0.4V < V < 0.8V
Average Gate Current
I
GATE
ON
Strong discharge, triggered by a fault or
when V < 0.4V
3
ꢀA
V
ON
Gate Drive Voltage
V
V
_ - V _, I _ < 1µA
GATE
4.8
5.4
5.8
DRIVE
GATE
IN
ON COMPARATOR
Low to high
Hysteresis
0.375
0.4
25
0.425
V
Fast Pulldown ON Threshold
V
ONFP,TH
ꢀV
2
_______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
ELECTRICAL CHARACTERISTICS (continued)
IN
(V _ = +1V to +13.2V provided at least one supply is higher than +2.7V, V
= +2.7V, T = T
to T
, unless otherwise noted.
MAX
ON
A
MIN
Typical values are at V
= +5V, V
= +3.3V, and T = +25°C.) (Note 1)
IN2 A
IN1
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Low to high
Hysteresis
0.80
0.825
0.85
V
ꢀV
V
V
V
Channel 1 ON Threshold
ON1,TH
ON2,TH
25
Low to high
Hysteresis
1.95
2.025
2.07
Channel 2 ON Threshold
ON Propagation Delay
25
50
ꢀV
µs
t
10ꢀV overdrive
ON
V
V
V
< 4.5V
0.03
ON
ON
ON
ON Input Bias Current
I
V
= V = +13.2V
IN2
µA
µs
> 4.5V
= 4V
BON
IN1
100
0.03
1
t
ON Pulse Width Low
To unlatch after a latched fault
100
UNLATCH
DIGITAL OUTPUT (PGOOD)
Output Leakage Current
Output Voltage Low
V
= 13.2V
1
µA
V
PGOOD
V
I
= 1ꢀA
SINK
0.4
OL
t
PGOOD Delay
After t
, MON_ = V
0.75
ꢀs
PGDLY
START
IN_
OUTPUT VOLTAGE MONITORS (MON1, MON2)
Overvoltage
Undervoltage
657
513
687
543
20
707
563
MON_ Trip Threshold
V
_
ꢀV
MON
MON_ Glitch Filter
µs
MON_ Input Bias Current
V
_ = 600ꢀV
MON
0.03
µA
UNDERVOLTAGE LOCKOUT (UVLO)
Startup is initiated when this threshold is reached
2.1
2.4
2.67
60
V
by V or V , V > 0.8V, V increasing
IN_
IN1
IN2 ON
UVLO Threshold
V
UVLO
Hysteresis
100
ꢀV
µs
UVLO Glitch Filter Reset Tiꢀe
UVLO to Startup Delay
V
V
_ = 0V, to unlatch after a fault
100
20
IN
t
step froꢀ 0 to 2.8V
37.5
ꢀs
D,UVLO
IN_
SHUTDOWN RESTART
Delay tiꢀe to restart after a fault shutdown
MAX5904/MAX5906/MAX5908
Auto-Retry Delay
t
64 x t
ꢀs
RETRY
START
UNCOMMITTED COMPARATOR
INC+ Trip Threshold Voltage
Low to high
Hysteresis
1.206
1.236
10
1.266
V
ꢀV
µs
V
V
C,TH
Propagation Delay
OUTC Voltage Low
INC+ Bias Current
OUTC Leakage Current
10ꢀV overdrive
50
V
I
= 1ꢀA
SINK
0.4
1
OL
V
V
= 5V
0.02
0.02
µA
µA
INC+
I
= 13.2V
1
OUTC
OUTC
Note 1: Liꢀits are 100% tested at T = +25°C and +85°C. Liꢀits at 0°C and -40° are guaranteed by characterization and are not produc-
A
tion tested.
Note 2 The MAX5906–MAX5909 slow-coꢀparator threshold is adjustable. V
Characteristics).
= R
x 0.25µA + 25ꢀV (see Typical Operating
LIM
SC,TH
Note 3: The current-liꢀit slow-coꢀparator response tiꢀe is weighted against the aꢀount of overcurrent; the higher the overcurrent
condition, the faster the response tiꢀe. See Typical Operating Characteristics.
Note 4: The startup period (t
) is the tiꢀe during which the slow coꢀparator is ignored and the device acts as a current liꢀiter
START
by regulating the sense current with the fast coꢀparator. See the Startup Period section.
_______________________________________________________________________________________
3
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Typical Operating Characteristics
(Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, V
= +5V, V
= +3.3V, T = +25°C, unless otherwise noted. Channels
IN1
IN2 A
1 and 2 are identical in perforꢀance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
TOTAL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
= V
IN1
ON
V
= V = 2.7V
ON
INY
I
+ I
IN1 IN2
A
B
I
+ I
INX INY
C
I
INX
I
IN1
V
= 5.0V
INY
I
I
INY
IN2
A) V = 3.3V
ON
B) V = 1.5V
ON
C) V = 0V
ON
0
2
4
6
8
10
12
14
14
20
0
2
4
6
8
10
12
14
20
85
-40
-15
10
35
60
85
85
20
V
(V)
V
(V)
TEMPERATURE (°C)
INX
INX
GATE DRIVE VOLTAGE vs.
INPUT VOLTAGE
GATE CHARGE CURRENT
vs. GATE VOLTAGE
GATE CHARGE CURRENT
vs. TEMPERATURE
200
180
160
140
120
100
80
200
180
160
140
120
100
80
6
5
4
3
2
1
0
V
= V = 2.7V
INY
ON
V
= 13.2V
INX
V
= 5V
INX
V
= 13.2V
INX
V
= 5V
INX
V
= 1V
INX
V
= 1V
INX
60
60
40
40
V
= V = 2.7V
INY
ON
GATEX
20
20
V
= 2.7V
12
INY
V
= 0V
0
0
0
2
4
6
8
10
0
5
10
15
-40
-15
10
35
60
V
(V)
V
(V)
GATEX
TEMPERATURE (°C)
INX
GATE WEAK DISCHARGE CURRENT
vs. GATE VOLTAGE
GATE WEAK DISCHARGE CURRENT
vs. TEMPERATURE
GATE STRONG DISCHARGE CURRENT
vs. GATE VOLTAGE
200
180
160
140
120
100
80
200
180
160
140
120
100
80
6
5
4
3
2
1
0
V
= 0V
ON
V
= 0.6V
V
= 0.6V
ON
ON
V
= 13.2V
INX
V
= 5V
INX
V
= 5V
V
= 13.2V
V
= 13.2V
INX
INX
V
= 5V
INX
INX
V
= 1V
V
= 1V
INX
INX
60
60
V
= 1V
INX
40
40
V
= 2.7V
INY
V
= 2.7V
INY
20
20
V
= V + 6.2V
INX
GATEX
V
= V + 6.2V
GATEX
INX
V
= 2.7V
INY
0
0
0
5
10
15
-40
-15
10
35
60
0
5
10
15
V
(V)
TEMPERATURE (°C)
V
(V)
GATEX
GATEX
4
_______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, V
= +5V, V = +3.3V, T = +25°C, unless otherwise noted. Channels
IN2 A
IN1
1 and 2 are identical in perforꢀance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)
TURN-OFF TIME vs. SENSE VOLTAGE
(EXPANDED SCALE)
GATE STRONG DISCHARGE CURRENT
vs. TEMPERATURE
TURN-OFF TIME vs. SENSE VOLTAGE
10
6
5
4
3
2
1
0
10
1
SLOW-COMP. THRESHOLD
FAST-COMP. THRESHOLD
V
= 13.2V
INX
V
= 5V
INX
0.1
SLOW-COMP. THRESHOLD
1
V
INY
= 0V
ON
= 2.7V
V
0.01
0.001
0.0001
V
= V + 6.2V
INX
GATEX
V
= 1V
INX
0.1
20 25 30 35 40 45 50 55 60 65 70 75 80
-40
-15
10
35
60
85
0
25 50 75 100 125 150 175 200
V
- V
(mV)
SENSE
TEMPERATURE (°C)
V
- V
(mV)
SENSE
IN
IN
TURN-OFF TIME
SLOW-COMPARATOR FAULT
SLOW-COMPARATOR THRESHOLD
vs. R
STARTUP PERIOD vs. R
LIM
TIM
MAX5904 toc15
120
100
80
60
40
20
0
60
50
40
30
20
10
0
V
PGOOD
5V/div
t
0V
0V
SCD
26mV STEP
V
- V
IN
SENSE
100mV/div
V
GATE
5V/div
0V
0
100
200
(kΩ)
300
400
0
100
200
300
(kΩ)
400
500
600
1ms/div
IN
R
V
= 5.0V
R
LIM
TIM
TURN-OFF TIME
FAST-COMPARATOR FAULT
STARTUP WAVEFORMS
FAST TURN-ON
MAX5904 toc16
MAX5904 toc17
V
ON
2V/div
V
0V
0V
V
PGOOD
5V/div
PGOOD
2V/div
t
FCD
I
OUT
5A/div
125mV STEP
V
- V
IN
SENSE
100mV/div
V
OUT
5V/div
V
GATE
5V/div
V
GATE
5V/div
0V
400ns/div
= 5.0V
1ms/div
SENSE
V
V
TIM
= 5.0V, R
= 10mΩ,
IN
IN
R
= 27kΩ, C
= 1000µF
BOARD
_______________________________________________________________________________________
5
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Fairchild FDB7090L, V
= +5V, V = +3.3V, T = +25°C, unless otherwise noted. Channels
IN2 A
IN1
1 and 2 are identical in perforꢀance. Where characteristics are interchangeable, channels 1 and 2 are referred to as X and Y.)
STARTUP WAVEFORMS
SLOW TURN-ON
AUTO-RETRY DELAY
MAX5904 toc18
MAX5904 toc19
V
ON
2V/div
V
GATE
5V/div
V
PGOOD
2V/div
I
OUT
5A/div
V
OUT
5V/div
V
OUT
5V/div
I
OUT
5A/div
V
GATE
5V/div
1ms/div
SENSE TIM
= 1000µF, C
40ms/div
SENSE TIM
V
IN
= 5.0V, R
BOARD
= 10mΩ, R = 47kΩ,
V
IN
= 5.0V, R
BOARD
= 10mΩ, R = 47kΩ,
C
= 22nF
GATE
C
= 1000µF, R
= 1.4Ω
BOARD
Pin Description
PIN
NAME
FUNCTION
MAX5904/
MAX5905
MAX5906–
MAX5909
Open-Drain Status Output. High iꢀpedance when startup is coꢀplete and no faults
are detected. Actively held low during startup and when a fault is detected.
—
—
1
1
2
3
PGOOD
TIM
Startup Tiꢀer Setting. Connect a resistor froꢀ TIM to GND to set the startup period.
Leave TIM unconnected for the default startup period of 9ꢀs.
Channel 1 Supply Input. Connect to a supply voltage froꢀ 1V to 13.2V. Connect a
0.1µF ceraꢀic bypass capacitor froꢀ IN1 to GND to filter high-frequency noise.
IN1
2
3
4
4
5
6
SENSE1
GATE1
GND
Channel 1 Current-Sense Input. Connect R
froꢀ IN1 to SENSE1.
SENSE1
Channel 1 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
Ground
Channel 1 Current-Liꢀit Setting. Connect a resistor froꢀ LIM1 to GND to set
current-trip level. Connect to GND for the default 25ꢀV threshold.
—
7
LIM1
Channel 1 Output Voltage Monitor. Window coꢀparator input. Connect through a
resistive-divider froꢀ OUT1 to GND to set the channel 1 overvoltage and
undervoltage thresholds. Connect to IN1 to disable.
—
8
MON1
Channel 2 Output Voltage Monitor. Window coꢀparator input. Connect through a
resistive-divider froꢀ OUT2 to ground to set the channel 2 overvoltage and
undervoltage thresholds. Connect to IN2 to disable.
—
9
MON2
6
_______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Pin Description (continued)
PIN
NAME
FUNCTION
MAX5904/
MAX5905
MAX5906–
MAX5909
Channel 2 Current-Liꢀit Setting. Connect a resistor froꢀ LIM2 to GND to set
current-trip level. Connect to GND for the default 25ꢀV threshold.
—
10
LIM2
5
6
7
11
12
13
ON
On Coꢀparator Input
GATE2
SENSE2
Channel 2 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
Channel 2 Current-Sense Input. Connect R
froꢀ IN2 to SENSE2.
SENSE2
Channel 2 Supply Input. Connect to a supply voltage froꢀ 1V to 13.2V. Connect a
0.1µF ceraꢀic bypass capacitor froꢀ IN2 to GND to filter high-frequency noise.
8
14
15
16
IN2
—
—
INC+
OUTC
Uncoꢀꢀitted Coꢀparator Noninverting Input
Uncoꢀꢀitted Coꢀparator Open-Drain Output. Actively held low when V
than 1.236V.
is less
INC+
3) The device is not latched or in its auto-retry delay.
Detailed Description
(See Latched and Auto-Retry Fault Manageꢀent.)
The MAX5904–MAX5909 are circuit breaker ICs for hot-
swap applications where a line card is inserted into a
live backplane. These devices hot swap supplies rang-
ing froꢀ +1V to +13.3V, provided one supply is at or
above 2.7V. Norꢀally, when a line card is plugged into
a live backplane, the card’s discharged filter capacitors
provide low iꢀpedance that can ꢀoꢀentarily cause the
ꢀain power supply to collapse. The MAX5904–
MAX5909 reside either on the backplane or on the
reꢀovable card to provide inrush current liꢀiting and
short-circuit protection. This is achieved by using exter-
nal N-channel MOSFETs, external current-sense resis-
tors, and two on-chip coꢀparators. Figure 1 shows the
MAX5906–MAX5909 functional diagraꢀ.
The MAX5904–MAX5909 liꢀit the load current if an
overcurrent fault occurs during startup. The slow coꢀ-
parator is disabled during the startup period and the
load current can be liꢀited in two ways:
1) Slowly enhancing the MOSFETs by liꢀiting the
MOSFET gate charging current
2) Liꢀiting the voltage across the external current-
sense resistor.
During the startup period the gate drive current is typi-
cally 100µA and decreases with the increase of the
gate voltage (see Typical Operating Characteristics).
This allows the controller to slowly enhance the
MOSFETs. If the fast coꢀparator detects an overcur-
rent, the MAX5904–MAX5909 regulate the gate voltage
to ensure that the voltage across the sense resistor
The MAX5904/MAX5905 have a fixed startup period
and current-liꢀit threshold. The startup period and cur-
rent-liꢀit threshold of the MAX5906–MAX5909 can be
adjusted with external resistors.
does not exceed V . This effectively regulates the
SU,TH
inrush current during startup. Figure 2 shows the start-
up waveforꢀs. PGOOD goes high iꢀpedance 0.75ꢀs
after the startup period if no fault condition is present.
Startup Period
sets the duration of the startup period for the
R
TIM
MAX5906–MAX5909 froꢀ 0.4ꢀs to 50ꢀs (see the
Setting the Startup Period section). The duration of the
startup period is fixed at 9ꢀs for the MAX5904/
MAX5905. The startup period begins after the following
three conditions are ꢀet:
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates two
coꢀparators with different thresholds and response
tiꢀes to ꢀonitor the load current (Figure 9). During the
startup period, protection is provided by liꢀiting the
load current. Protection is provided in norꢀal operation
(after the startup period has expired) by discharging
both MOSFET gates with a strong 3ꢀA pulldown cur-
rent in response to a fault condition. After a fault,
1) V
or V
exceeds the UVLO threshold (2.4V) for
IN1
IN2
the UVLO to startup delay (37.5ꢀs).
2) V exceeds the channel 1 ON threshold (0.825V).
ON
_______________________________________________________________________________________
7
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Figure 1. MAX5906–MAX5909 Functional Diagram
8
_______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Fast Comparator Startup Period
During the startup period the fast coꢀparator regulates
ON
the gate voltage to ensure that the voltage across the
sense resistor does not exceed V
. The startup
SU,TH
PGOOD
fast-coꢀparator threshold voltage (V
) is scaled to
SU,TH
t
+ t
two tiꢀes the slow-coꢀparator threshold (V
).
START PGDLY
SC,TH
V
V
GATE
OUT
Fast Comparator Normal Operation
In norꢀal operation, if the load current reaches the fast-
coꢀparator threshold, a fault is generated, PGOOD is
pulled low, and the MOSFET gates are discharged with
a strong 3ꢀA pulldown current. This happens in the
event of a serious current overload or a dead short. The
4.8V TO 5.8V
V
TH
V
GATE
V
OUT
fast-coꢀparator threshold voltage (V
) is scaled to
FC,TH
four tiꢀes the slow-coꢀparator threshold (V
coꢀparator has a fast response tiꢀe of 260ns (Figure 9).
). This
SC,TH
V
C
= LARGE
= 0
SU,TH
BOARD
R
SENSE
C
BOARD
Undervoltage Lockout (UVLO)
The undervoltage lockout prevents the MAX5904–
MAX5909 froꢀ turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.4V)
I
LOAD
t
ON
for t
. The MAX5904–MAX5909 use power froꢀ
D,UVLO
Figure 2. Startup Waveforms
the higher input voltage rail for the charge puꢀps. This
allows for ꢀore efficient charge-puꢀp operation. The
UVLO protects the external MOSFETs froꢀ an insuffi-
PGOOD is pulled low, the MAX5905/MAX5907/
MAX5909 stay latched off and the MAX5904/MAX5906/
MAX5908 autoꢀatically restart.
cient gate drive voltage. t
ensures that the board
D,UVLO
is fully inserted into the backplane and that the input
voltages are stable. Any input voltage transient on both
supplies below the UVLO threshold will reinitiate the
Slow Comparator Startup Period
The slow coꢀparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow coꢀparator allows the device to
ignore the higher-than-norꢀal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
t
and the startup period.
D,UVLO
Latched and Auto-Retry Fault Management
The MAX5905/MAX5907/MAX5909 latch the external
MOSFETs off when a fault is detected. Toggling ON
below 0.4V or one of the supply voltages below the
UVLO threshold for at least 100µs clears the fault latch
and reinitiates the startup period. Siꢀilarly, the
MAX5904/MAX5906/MAX5908 turn the external
MOSFETs off when a fault is detected then autoꢀatical-
ly restart after the auto-retry delay that is internally set
Slow Comparator Normal Operation
After the startup period is coꢀplete the slow coꢀpara-
tor is enabled and the device enters norꢀal operation.
The coꢀparator threshold voltage (V
is fixed at
SC,TH)
to 64 tiꢀes t
. During the auto-retry delay, toggling
START
25ꢀV for the MAX5904/MAX5905 and is adjustable
froꢀ 25ꢀV to 100ꢀV for the MAX5906–MAX5909. The
slow coꢀparator response tiꢀe decreases to a ꢀini-
ꢀuꢀ of 110µs with a large overdrive voltage (Figure 9).
Response tiꢀe is 3ꢀs for a 1ꢀV overdrive. The variable
speed response tiꢀe allows the MAX5904–MAX5909 to
ignore low-aꢀplitude ꢀoꢀentary glitches, thus increas-
ing systeꢀ noise iꢀꢀunity. After an extended overcur-
rent condition, a fault is generated, PGOOD is pulled
low, and the MOSFET gates are discharged with a
strong 3ꢀA pulldown current.
ON below 0.4V does not clear the fault. The auto-retry
can be overridden causing the startup period to begin
iꢀꢀediately by toggling one of the supply voltages
below the UVLO threshold.
Output Voltage Monitor
The MAX5905–MAX5909 ꢀonitor the output voltages
with the MON1 and MON2 window coꢀparator inputs.
These voltage ꢀonitors are enabled after the startup
period. Once enabled, the voltage ꢀonitor detects a
fault if V
_ is less than 543ꢀV or greater than
MON
687ꢀV. If an output voltage fault is detected PGOOD
pulls low. When the MAX5906/MAX5907 detect an out-
_______________________________________________________________________________________
9
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams
V
ON
V
ON_,TH
V
GATE_
V
OUT_
INTERNAL SIGNAL
INTERNAL SIGNAL
t
START
t
PGDLY
PGOOD
Figure 3. Power-Up with ON Pin Control (At Least One V
is > V
)
IN_
UVLO
10 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
OVERCURRENT CONDITION
(V - V
IN_ SENSE_
≥ V
AND
IN_ SENSE_
SC_TH
V
- V
< V
)
FC_TH
t
SCD
I
OUT
V
V
GATE_
DISCHARGE RATE DEPENDS
ON OUTPUT LOADING
OUT_
PGOOD
Figure 4. Power-Down when an Overcurrent Fault Occurs
SHORT-CIRCUIT CONDITION
(V - V
IN_ SENSE_
≥ V
)
FC_TH
t
FCD
I
OUT
V
V
GATE_
OUT_
PGOOD
Figure 5. Power-Down when a Short-Circuit Fault Occurs
______________________________________________________________________________________ 11
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
UV/OV CONDITION
INTERNAL SIGNAL
MON_ GLITCH FILTER, 20µS
V
V
GATE_
DISCHARGE RATE DEPENDS
ON OUTPUT LOADING
OUT_
PGOOD
Figure 6. Power-Down when an Undervoltage/Overvoltage Fault Occurs (MAX5906/MAX5907)
UV/OV CONDITION
INTERNAL SIGNAL
MON_ GLITCH FILTER, 20µS
V
GATE_
V
AND V
STAY ON
OUT_
GATE_
V
OUT_
PGOOD
Figure 7. Fault Report when an Undervoltage/Overvoltage Fault Occurs (MAX5908/MAX5909)
12 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Timing Diagrams (continued)
V
IN_
V
UVLO
V
GATE_
V
OUT_
t
D,UVLO
INTERNAL SIGNAL
INTERNAL SIGNAL
t
START
t
PGDLY
PGOOD
Figure 8. Power-Up with Undervoltage Lockout Delay (V
= 2.7V, the Other V
is Below V
)
ON
IN_
UVLO
______________________________________________________________________________________ 13
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
put voltage fault on either MON1 or MON2, the fault is
latched and both external MOSFET gates are dis-
charged at 3ꢀA. When the MAX5908/MAX5909 detect
an output voltage fault the external MOSFET gates are
not affected. The MAX5908/MAX5909 PGOOD goes
high iꢀpedance when the output voltage fault is
reꢀoved. The voltage ꢀonitors do not react to output
glitches of less than 20µs. A capacitor froꢀ MON_ to
GND increases the effective glitch filter tiꢀe. Connect
MON1 to IN1 and MON2 to IN2 to disable the output
voltage ꢀonitors.
Using the MAX5905/MAX5907/MAX5909 in latched
ꢀode allows the use of MOSFETs with lower power rat-
ings. A MOSFET typically withstands single-shot pulses
with higher dissipation than the specified package rat-
ing. Table 3 lists soꢀe recoꢀꢀended ꢀanufacturers
and coꢀponents.
Sense Resistor
The slow-coꢀparator threshold voltage is set at 25ꢀV
for the MAX5904/MAX5905 and is adjustable froꢀ
25ꢀV to 100ꢀV for the MAX5906–MAX5909. Select a
sense resistor that causes a drop equal to the slow-
coꢀparator threshold voltage at a current level above
the ꢀaxiꢀuꢀ norꢀal operating current. Typically, set
the overload current at 1.2 to 1.5 tiꢀes the noꢀinal load
current. The fast-coꢀparator threshold is four tiꢀes the
slow-coꢀparator threshold in norꢀal operating ꢀode.
Choose the sense resistor power rating to be greater
Status Output (PGOOD)
The status output is an open-drain output that pulls low
in response to one of the following conditions:
• Forced off (ON < 0.8V)
• Overcurrent fault
• Output voltage fault
than (I
)2 x V
.
SC,TH
OVERLOAD
PGOOD goes high iꢀpedance 0.75ꢀs after the device
enters norꢀal operation and no faults are present
(Table 1).
Slow-Comparator Threshold, R
LIM
The slow-coꢀparator threshold voltage of the
MAX5904/MAX5905 is fixed at 25ꢀV and adjustable
froꢀ 25ꢀV to 100ꢀV for the MAX5906–MAX5909.
Applications Information
The adjustable slow-coꢀparator threshold of the
MAX5906–MAX5909 allows designers to fine-tune the
current-liꢀit threshold for use with standard value
sense resistors. Low slow-coꢀparator thresholds allow
for increased efficiency by reducing the power dissipat-
ed by the sense resistor. Furtherꢀore, the low 25ꢀV
slow-coꢀparator threshold is beneficial when operating
with supply rails down to 1V because it allows a sꢀall
percentage of the overall output voltage to be used for
current sensing. The VariableSpeed/BiLevel fault pro-
tection feature offers inherent systeꢀ iꢀꢀunity against
load transients and noise. This allows the slow-coꢀ-
parator threshold to be set close to the ꢀaxiꢀuꢀ nor-
ꢀal operating level without experiencing nuisance
Component Selection
N-Channel MOSFET
Select the external MOSFETs according to the applica-
tion’s current levels. Table 2 lists soꢀe recoꢀꢀended
coꢀponents. The MOSFET’s on-resistance (R
)
DS(ON)
should be chosen low enough to have a ꢀiniꢀuꢀ volt-
age drop at full load to liꢀit the MOSFET power dissipa-
tion. High R
causes output ripple if there is a
DS(ON)
pulsating load. Deterꢀine the device power rating to
accoꢀꢀodate a short-circuit condition on the board at
startup and when the device is in autoꢀatic-retry ꢀode
(see MOSFET Thermal Considerations).
Table 1. Status Output Truth Table
DEVICE IN
UVLO DELAY
PERIOD
DEVICE IN
STARTUP
PERIOD
OVER/UNDER-
VOLTAGE
FAULT
OVERCURRENT
FAULT
PART IN RETRY-TIMEOUT
PERIOD OR LATCHED OFF
ON
PGOOD
Yes
X
X
Yes
X
X
X
X
X
X
X
X
X
Low
Low
X
Low
X
X
X
X
Low
X
X
Yes
X
X
X
Low
X
X
X
Yes
X
X
Low
X
X
X
X
Yes
No
Low
No
No
High
No
No
High-Z
X = don’t care
14 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
There are two ways of coꢀpleting the startup
Table 2. Recommended N-Channel
MOSFETs
sequence. Case A describes a startup sequence that
slowly turns on the MOSFETs by liꢀiting the gate
charge. Case B uses the current-liꢀiting feature and
turns on the MOSFETs as fast as possible while still
preventing a high inrush current. The output voltage
PART NUMBER MANUFACTURER
DESCRIPTION
11ꢀΩ, 8 SO, 30V
22ꢀΩ, 8 SO, 20V
6ꢀΩ, D2PAK, 20V
20ꢀΩ, 8 SO, 30V
30ꢀΩ, 8 SO, 20V
14ꢀΩ, D2PAK, 50V
10ꢀΩ, 8SO, 30V
13.5ꢀΩ, 8 SO, 20V
4.5ꢀΩ, D2PAK, 30V
IRF7413
International
Rectifier
IRF7401
raꢀp-up tiꢀe (t ) is deterꢀined by the longer of the
ON
IRL3502S
two tiꢀings, case A and case B. Set the MAX5906–
MAX5909 startup tiꢀer t
to be longer than t
to
MMSF3300
START
ON
guarantee enough tiꢀe for the output voltage to settle.
Motorola
Fairchild
MMSF5N02H
MTB60N05H
FDS6670A
NDS8426A
FDB8030L
Case A: Slow Turn-ON (without current limit)
There are two ways to turn on the MOSFETs without
reaching the fast-coꢀparator current liꢀit:
If the board capacitance (C
inrush current is low.
) is sꢀall, the
BOARD
If the gate capacitance is high, the MOSFETs turn
on slowly.
faults. Typically, set the overload current at 1.2 to 1.5
tiꢀes the noꢀinal load current. To adjust the slow-coꢀ-
In both cases, the turn-on tiꢀe is deterꢀined only by the
charge required to enhance the MOSFET. The sꢀall
gate-charging current of 100µA effectively liꢀits the out-
put voltage dV/dt. Connecting an external capacitor
between GATE and GND extends turn-on tiꢀe. The tiꢀe
required to charge/discharge a MOSFET is as follows:
parator threshold calculate R
as follows:
LIM
V
− 25ꢀV
0.25µA
TH
R
=
LIM
where V
voltage.
is the desired slow-coꢀparator threshold
TH
C
× ∆V
+Q
GATE
GATE GATE
t =
Setting the Startup Period, R
START
TIM
I
GATE
The startup period (t
) of the MAX5904/MAX5905 is
fixed at 9ꢀs, and adjustable froꢀ 0.4ꢀs to 50ꢀs for the
MAX5906–MAX5909. The adjustable startup period of
the MAX5906–MAX5909 systeꢀs can be custoꢀized for
MOSFET gate capacitance and board capacitance
where:
C
is the external gate to ground capacitance
GATE
(Figure 4)
∆V is the change in gate voltage
GATE
(C
). The startup period is adjusted with the resis-
BOARD
tance connected froꢀ TIM to GND (R ). R
ꢀust be
TIM
TIM
Q
GATE
is the MOSFET total gate charge
between 4kΩ and 500kΩ. The MAX5906–MAX5909 start-
I
is the gate charging/discharging current
GATE
up period has a default value of 9ꢀs when TIM is left
In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (C ) plus any additional
capacitance froꢀ gate to GND (C
load current (I
floating. Calculate R
with the following equation:
TIM
rss
), and on any
GATE
t
START
R
=
) present during the startup period.
LOAD
TIM
128× 800pF
where t
is the desired startup period.
START
Table 3. Component Manufacturers
COMPONENT
MANUFACTURER
PHONE
WEBSITE
www.vishay.coꢀ
www.irctt.coꢀ
Dale-Vishay
IRC
402-564-3131
704-264-8861
310-233-3331
888-522-5372
602-244-3576
Sense Resistors
International Rectifier
Fairchild
www.irf.coꢀ
MOSFETs
www.fairchildseꢀi.coꢀ
www.ꢀot-sps.coꢀ/ppd
Motorola
______________________________________________________________________________________ 15
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
C
BOARD
C
× V ×R
IN SENSE
BOARD
I
=
×I
+I
INRUSH
GATE LOAD
t
=
ON
C
+C
rss
GATE
V
SU,TH
Example: Charging and Discharging times using the
Fairchild FDB7030L MOSFET
The ꢀaxiꢀuꢀ inrush current in this case is:
V
If V
DRIVE
= 5V then GATE1 charges up to 10.4V (V
+
IN1
IN1
SU,TH
I
=
INRUSH
V
), therefore ∆V
= 10.4V. The ꢀanufacturer’s
GATE
R
SENSE
data sheet specifies that the FDB7030L has approxi-
ꢀately 60nC of gate charge and C = 600pF. The
MAX5904–MAX5909 have a 100µA gate-charging cur-
rent and a 100µA weak discharging current or 3ꢀA
strong discharging current.
rss
Figures 2–8 show the waveforꢀs and tiꢀing diagraꢀs
for a startup transient with current regulation. (See
Typical Operating Characteristics.) When operating
under this condition, an external gate capacitor is not
required.
C
= 6µF and the load does not draw any current
BOARD
during the startup period.
ON Comparator
The ON coꢀparator controls the on/off function of the
MAX5904–MAX5909. ON is the input to a precision
three-level voltage coꢀparator that allows individual
control over channel 1 and channel 2. Drive ON high
(> 2.025V) to enable channel 1 and channel 2. Pull ON
low (<0.4V) to disable both channels. To enable chan-
With no gate capacitor the inrush current, charge, and
discharge tiꢀes are:
6µF
600pF + 0
I
=
×100µA + 0 =1A
INRUSH
nel 1 only, V
ꢀust be between the channel 1 ON
ON
0×10.4V + 60nC
100µA
t
t
t
=
= 0.6ꢀs
threshold (0.825V) and the channel 2 ON threshold
(2.025V). The device can be turned off slowly, reducing
inductive kickback, by forcing ON between 0.4V and
0.825V until the gates are discharged. The ON coꢀ-
parator is ideal for power sequencing (Figure 11).
CHARGE
0×10.4V + 60nC
100µA
=
= 0.6ꢀs
DISCHARGE_SLOW
0×10.4V + 60nC
=
= 0.02ꢀs
DISCHARGE_FAST
Uncommitted Comparator
The MAX5906–MAX5909 feature an uncoꢀꢀitted coꢀ-
parator that increases systeꢀ flexibility. This coꢀpara-
tor can be used for voltage ꢀonitoring, or for
generating a power-on reset signal for on-card ꢀicro-
processors (Figure 12).
3ꢀA
With a 22nF gate capacitor the inrush current, charge,
and discharge tiꢀes are:
6µF
600pF +22nF
I
=
×100µA + 0 = 26.5ꢀA
INRUSH
The uncoꢀꢀitted coꢀparator output (OUTC) is open
drain and is pulled low when the coꢀparator input volt-
) is below its threshold voltage (1.236V).
OUTC is high iꢀpedance when V
1.236V.
22nF ×10.4V + 60nC
100µA
t
t
t
=
= 2.89ꢀs
CHARGE
age (V
INC+
is greater than
INC+
22nF ×10.4V + 60nC
100µA
=
= 2.89ꢀs
DISCHARGE_SLOW
Using the MAX5904–MAX5909 on the
Backplane
22nF ×10.4V + 60nC
=
= 0.096ꢀs
DISCHARGE_FAST
3ꢀA
Using the MAX5904–MAX5909 on the backplane allows
ꢀultiple cards with different input capacitance to be
inserted into the saꢀe slot even if the card does not
have on-board hot-swap protection. The startup period
can be triggered if IN is connected to ON through a
trace on the card (Figure 13).
Case B: Fast Turn-On (with current limit)
In applications where the board capacitance (C
)
BOARD
is high, the inrush current causes a voltage drop across
that exceeds the startup fast-coꢀparator
R
SENSE
threshold. The fast coꢀparator regulates the voltage
across the sense resistor to V . This effectively
Input Transients
The voltage at IN1 or IN2 ꢀust be above the UVLO dur-
ing inrush and fault conditions. When a short-circuit
condition occurs on the board, the fast coꢀparator trips
SU,TH
regulates the inrush current during startup. In this case,
the current charging C can be considered con-
stant and the turn-on tiꢀe is:
BOARD
16 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
tiꢀe resulting in a high di/dt. The backplane delivering
the power to the external card ꢀust have low induc-
tance to ꢀiniꢀize voltage transients caused by this
high di/dt.
SLOW
COMPARATOR
MOSFET Thermal Considerations
During norꢀal operation, the external MOSFETs dissi-
3ms
pate little power. The MOSFET R
is low when the
DS(ON)
MOSFET is fully enhanced. The power dissipated in
2
norꢀal operation is P = I
x R
. The ꢀost
DS(ON)
D
LOAD
FAST
COMPARATOR
power dissipation occurs during the turn-on and turn-
off transients when the MOSFETs are in their linear
regions. Take into consideration the worst-case sce-
nario of a continuous short-circuit fault, consider these
two cases:
110µs
1) The single turn-on with the device latched after a
fault (MAX5905/MAX5907/MAX5909)
260ns
2) The continuous autoꢀatic retry after a fault
(MAX5904/MAX5906/MAX5908)
V
V
FC,TH
SC,TH
SC,TH
(4 x V
)
MOSFET ꢀanufacturers typically include the package
SENSE VOLTAGE (V - V
)
SENSE
IN
therꢀal resistance froꢀ junction to aꢀbient (R ) and
θJA
θJC
therꢀal resistance froꢀ junction to case (R
) which
Figure 9. VariableSpeed/BiLevel Response
deterꢀine the startup tiꢀe and the retry duty cycle (d =
/ t ). Calculate the required transient ther-
t
START
RETRY
ꢀal resistance with the following equation:
R
SENSE
V
OUT
V
T
V
− T
A
IN
JMAX
×I
Z
≤
θJA(MAX)
C
BOARD
IN START
/ R
SU,TH SENSE
R
PULLUP
where I
= V
START
C
GATE
IN
SENSE
GATE
Layout Considerations
To take full tracking advantage of the switch response
tiꢀe to an output fault condition, it is iꢀportant to keep
all traces as short as possible and to ꢀaxiꢀize the
high-current trace diꢀensions to reduce the effect of
undesirable parasitic inductance. Place the MAX5904–
MAX5909 close to the card’s connector. Use a ground
plane to ꢀiniꢀize iꢀpedance and inductance.
Miniꢀize the current-sense resistor trace length
(<10ꢀꢀ), and ensure accurate current sensing with
Kelvin connections (Figure 14).
MAX5906
PGOOD
ON
MAX5907
MAX5908
MAX5909
GND
Figure 10. Operating with an External Gate Capacitor
When the output is short circuited, the voltage drop
across the external MOSFET becoꢀes large. Hence,
the power dissipation across the switch increases, as
does the die teꢀperature. An efficient way to achieve
good power dissipation on a surface-ꢀount package is
to lay out two copper pads directly under the MOSFET
package on both sides of the board. Connect the two
pads to the ground plane through vias, and use
enlarged copper ꢀounting pads on the top side of the
board. See MAX5908 EV Kit.
causing the external MOSFET gates to be discharged
at 3ꢀA. The ꢀain systeꢀ power supply ꢀust be able to
sustain a teꢀporary fault current, without dropping
below the UVLO threshold of 2.4V, until the external
MOSFET is coꢀpletely off. If the ꢀain systeꢀ power
supply collapses below UVLO, the MAX5904–MAX5909
will force the device to restart once the supply has
recovered. The MOSFET is turned off in a very short
______________________________________________________________________________________ 17
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
R
SENSE1
Q1
V
1
OUT1
C
BOARD1
IN1
IN2
SENSE1
GATE1
R
1
ON
OFF
V
ON
EN
MAX5904
MAX5905
C
1
GND
GND
SENSE2
GATE2
Q2
OUT2
V
2
R
SENSE2
C
BOARD2
V
EN
V
V
- V
ON1, TH
EN
t = -R C ln
(
(
)
1
1 1
V
EN
V
ON2, TH
V
ON
V
ON1, TH
- V
EN
ON2, TH
V
t = -R C ln
)
1
2
2
1 1
V
EN
V
V
- V
- V
EN
EN
ON1, TH
ON2, TH
t
= -R C ln
(
)
DELAY
1 1
V
t
t
t
2
0
1
T
DELAY
Figure 11. Power Sequencing: Channel 2 Turns On t
After Channel 1
DELAY
Chip Information
TRANSISTOR COUNT: 3230
PROCESS: BiCMOS
18 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
HIGH-CURRENT PATH
V
IN
IN
SENSE RESISTOR
SENSE
GATE
INC+
µP
MAX5906–MAX5909
RESET
OUTC
MAX590_
Figure 12. Power-On Reset
Figure 14. Kelvin Connection for the Current-Sense Resistors
REMOVABLE CARD
WITH NO HOT-INSERTION
PROJECTION
BACKPLANE
Pin Configurations (continued)
V
OUT
V
IN
C
BOARD
TOP VIEW
PGOOD
TIM
1
2
3
4
5
6
7
8
16 OUTC
15 INC+
14 IN2
IN
SENSE GATE
MAX590_
IN1
SENSE1
GATE1
GND
MAX5906
MAX5907
MAX5908
MAX5909
13 SENSE2
12 GATE2
11 ON
ON
LIM1
10 LIM2
MON1
9
MON2
QSOP
Figure 13. Using the MAX5904–MAX5909 on a Backplane
Selector Guide
OUTPUT UNDERVOLTAGE/OVERVOLTAGE
PART
FAULT MANAGEMENT
PROTECTION/MONITOR
MAX5904ESA/MAX5904USA
MAX5905ESA/MAX5905USA
MAX5906EEE/MAX5906UEE
MAX5907EEE/MAX5907UEE
MAX5908EEE/MAX5908UEE
MAX5909EEE/MAX5909UEE
—
Auto-Retry
Latched
—
Protection
Protection
Monitor
Monitor
Auto-Retry
Latched
Auto-Retry
Latched
______________________________________________________________________________________ 19
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Typical Operating Circuits
BACKPLANE
REMOVABLE CARD
R
SENSE1
Q1
V
OUT1
1
0.1µF
C
BOARD1
IN1
IN2
SENSE1
GATE1
ON
ON
MAX5904
MAX5905
GND
GND
SENSE2
GATE2
Q2
0.1µF
OUT2
V
2
R
SENSE2
C
BOARD2
BACKPLANE
REMOVABLE CARD
R
SENSE1
Q1
V
OUT1
1
C
BOARD1
0.1µF
IN1
SENSE1
GATE1
MON1
ON
ON
PGOOD
TIM
STAT
*
*
*
OUTC
INC+
UNCOMMITTED
COMPARATOR
MAX5906
MAX5907
MAX5908
MAX5909
LIM1
LIM2
GND
MON2
GND
IN2
SENSE2
GATE2
0.1µF
OUT2
V
2
Q2
R
SENSE2
C
BOARD2
*OPTIONAL
20 ______________________________________________________________________________________
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Package Information
(The package drawing(s) in this data sheet ꢀay not reflect the ꢀost current specifications. For the latest package outline inforꢀation,
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
MAX
MAX
1.75
0.25
0.49
0.25
DIM
A
MIN
MIN
1.35
0.10
0.35
0.19
0.053
0.004
0.014
0.007
0.069
0.010
0.019
0.010
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
MAX
0.197
0.344
0.394
MAX
5.00
DIM
D
MIN
MIN
4.80
8.55
9.80
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0 -8
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
______________________________________________________________________________________ 21
Low-Voltage, Dual Hot-Swap Controllers/Power
Sequencers
Package Information (continued)
(The package drawing(s) in this data sheet ꢀay not reflect the ꢀost current specifications. For the latest package outline inforꢀation,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxiꢀ Integrated Products
Printed USA
is a registered tradeꢀark of Maxiꢀ Integrated Products.
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