MC74AC573M [ROCHESTER]
AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ, PLASTIC PACKAGE-20;
| 型号： | MC74AC573M |
| 厂家： | 
Rochester Electronics |
| 描述： | AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ, PLASTIC PACKAGE-20 驱动 光电二极管 输出元件 |
| 文件： | 总9页 (文件大小：788K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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The MC74AC573/74ACT573 is a high−speed octal latch with
buffered common Latch Enable (LE) and buffered common Output
Enable (OE) inputs.
The MC74AC573/74ACT573 is functionally identical to the
MC74AC373/74ACT373 but has inputs and outputs on opposite sides.
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PDIP−20
N SUFFIX
CASE 738
• Inputs and Outputs on Opposite Sides of Package Allowing Easy
Interface with Microprocessors
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• Useful as Input or Output Port for Microprocessors
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SO−20
DW SUFFIX
CASE 751
• Functionally Identical to MC74AC373/74ACT373
• 3−State Outputs for Bus Interfacing
• Outputs Source/Sink 24 mA
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• ′ACT573 Has TTL Compatible Inputs
TSSOP−20
DT SUFFIX
CASE 948E
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EIAJ−20
M SUFFIX
CASE 967
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ORDERING INFORMATION
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Device
Package
PDIP−20
PDIP−20
SOIC−20
Shipping
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MC74AC573N
18 Units/Rail
18 Units/Rail
38 Units/Rail
Figure 1. Pinout 20−Lead Packages Conductors
MC74ACT573N
MC74AC573DW
MC74AC573DWR2
MC74ACT573DW
(Top View)
SOIC−20 1000 Tape & Reel
SOIC−20 38 Units/Rail
PIN ASSIGNMENT
PIN
FUNCTION
D −D
Data Inputs
MC74ACT573DWR2 SOIC−20 1000 Tape & Reel
0
7
LE
Latch Enable Input
3−State Output Enable Input
3−State Latch Outputs
MC74AC573DT
MC74AC573DTR2
MC74ACT573DT
TSSOP−20
TSSOP−20 2500 Tape & Reel
TSSOP−20 75 Units/Rail
75 Units/Rail
OE
O −O
0
7
MC74ACT573DTR2 TSSOP−20 2500 Tape & Reel
MC74AC573M
EIAJ−20
EIAJ−20 2000 Tape & Reel
EIAJ−20 40 Units/Rail
EIAJ−20 2000 Tape & Reel
40 Units/Rail
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MC74AC573MEL
MC74ACT573M
MC74ACT573MEL
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DEVICE MARKING INFORMATION
See general marking information in the device marking
Figure 2. Logic Symbol
section on page 231 of this data sheet.
Semiconductor Components Industries, LLC, 2001
224
Publication Order Number:
May, 2001 − Rev. 5
MC74AC573/D
MC74AC573, MC74ACT573
FUNCTIONAL DESCRIPTION
TRUTH TABLE
The MC74AC573/74ACT574 contains eight D−type
latches with 3−state output buffers. When the Latch Enable
Inputs
Outputs
OE
LE
D
O
n
n
(LE) input is HIGH, data on the D inputs enters the latches.
n
L
L
L
H
H
L
H
H
H
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes. When
LE is LOW the latches store the information that was present
on the D inputs a setup time preceding the HIGH−to−LOW
transition of LE. The 3−state buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers are
enabled. When OE is HIGH the buffers are in the high
impedance mode but this does not interfere with entering
new data into the latches.
L
X
X
O
0
H
X
Z
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O
= Previous O before LOW−to−HIGH Transition of Clock
0
0
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NOTE: That this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
MAXIMUM RATINGS*
Symbol
Parameter
Value
−0.5 to +7.0
Unit
V
V
V
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
CC
−0.5 to V
+0.5
V
IN
CC
−0.5 to V
+0.5
V
OUT
CC
I
I
I
±20
mA
mA
mA
°C
IN
DC Output Sink/Source Current, per Pin
±50
±50
OUT
CC
DC V
or GND Current per Output Pin
Storage Temperature
CC
T
stg
−65 to +150
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
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225
MC74AC573, MC74ACT573
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
2.0
4.5
0
V
V
Supply Voltage
V
V
CC
′ACT
5.5
, V
IN OUT
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
r f
ns/V
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
OL
I
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
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226
MC74AC573, MC74ACT573
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
− 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V
CC
= 0.1 V
OUT
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
Maximum Low Level
Input Voltage
IL
or V
− 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL IH
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
I
24 mA
24 mA
OL
I
IN
Maximum Input
Leakage Current
5.5
5.5
−
−
±0.1
±0.5
±1.0
±5.0
µA
µA
V = V , GND
CC
I
I
V (OE) = V , V
IL IH
Maximum
3−State
Current
OZ
I
V = V , GND
I
CC
= V , GND
CC
V
O
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
−75
V
V
= 3.85 V Min
Maximum Quiescent
Supply Current
5.5
−
8.0
80
µA
= V or GND
CC
IN
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
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227
MC74AC573, MC74ACT573
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3)
74AC
74AC
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
to +85°C
C
Symbol
Parameter
Unit
= 50 pF
L
Min
Typ
Max
Min
Max
Propagation Delay
to O
3.3
5.0
2.5
2.5
−
−
13.0
10.0
2.0
2.0
15.0
11.5
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
3−5
3−5
3−6
3−6
3−7
3−8
3−7
3−8
PLH
D
n
n
Propagation Delay
to O
3.3
5.0
2.5
2.5
−
−
12.0
9.5
2.0
2.0
14.0
11.0
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
n
n
Propagation Delay
LE to O
3.3
5.0
2.5
2.5
−
−
13.0
9.5
2.0
2.0
15.0
11.0
n
Propagation Delay
LE to O
3.3
5.0
2.5
2.5
−
−
12.0
8.5
2.0
2.0
14.0
10.0
n
3.3
5.0
2.5
2.5
−
−
11.0
9.0
2.0
2.0
12.0
10.0
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
2.5
2.5
−
−
11.0
8.5
2.0
2.0
12.5
9.5
3.3
5.0
2.5
2.5
−
−
12.5
11.0
2.0
2.0
13.5
12.0
3.3
5.0
2.5
2.5
−
−
9.5
8.0
2.0
2.0
10.5
9.0
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
AC OPERATING REQUIREMENTS
74AC
74AC
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
CC
(V)
*
Fig.
No.
A
L
to +85°C
= 50 pF
Symbol
Parameter
Unit
C
L
Typ
Guaranteed Minimum
Setup Time, HIGH or LOW
to LE
3.3
5.0
−
−
3.5
3.0
4.0
3.5
t
t
t
ns
ns
ns
3−9
3−9
3−6
s
D
n
Hold Time, HIGH or LOW
to LE
3.3
5.0
−
−
2.0
2.0
2.0
2.0
h
D
n
3.3
5.0
−
−
6.0
4.0
7.0
5.0
LE Pulse Width, HIGH
w
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
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MC74AC573, MC74ACT573
DC CHARACTERISTICS
Symbol
74ACT
74ACT
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
− 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V
CC
= 0.1 V
OUT
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
Maximum Low Level
Input Voltage
IL
or V
− 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL IH
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
V
−24 mA
−24 mA
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
5.5
−
±0.1
±1.0
µA
V = V , GND
I
CC
∆I
CCT
Additional Max. I /Input
CC
0.6
−
1.5
mA
V = V
− 2.1 V
I
CC
I
V (OE) = V , V
IL IH
Maximum
3-State
Current
OZ
I
5.5
−
±0.5
±5.0
µA
V = V , GND
I
CC
= V , GND
CC
V
V
V
O
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
OHD
−75
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
8.0
80
µA
V
IN
= V
CC
or GND
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3)
74ACT
74ACT
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
to +85°C
= 50 pF
Symbol
Parameter
Unit
C
L
Min
Typ
Max
Min
Max
Propagation Delay
to O
t
t
t
t
5.0
5.0
5.0
5.0
2.5
−
10.5
2.0
12
ns
ns
ns
ns
3−5
3−5
3−6
3−6
PLH
D
n
n
Propagation Delay
to O
2.5
3.0
2.5
−
−
−
10.5
10.5
9.5
2.0
2.5
2.0
12
12
PHL
PLH
PHL
D
n
n
Propagation Delay
LE to O
n
Propagation Delay
LE to O
10.5
n
t
t
t
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
2.0
1.5
2.5
1.5
−
−
−
−
10
9.5
11
1.5
1.5
1.5
1.0
11
ns
ns
ns
ns
3−7
3−8
3−7
3−8
PZH
PZL
PHZ
PLZ
10.5
12.5
9.5
8.5
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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229
MC74AC573, MC74ACT573
AC OPERATING REQUIREMENTS
74ACT
74ACT
= −40°C
T
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
to +85°C
= 50 pF
Symbol
Parameter
Unit
L
C
L
Typ
Guaranteed Minimum
Setup Time, HIGH or LOW
to LE
t
s
5.0
−
3.0
3.5
ns
3−9
D
n
Hold Time, HIGH or LOW
to LE
t
t
5.0
5.0
−
−
0
0
ns
ns
3−9
3−6
h
D
n
LE Pulse Width, HIGH
3.5
4.0
w
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
Test Conditions
C
C
Input Capacitance
Power Dissipation Capacitance
5.0
25
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
PD
CC
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230
MC74AC573, MC74ACT573
MARKING DIAGRAMS
PDIP−20
SO−20
TSSOP−20
EIAJ−20
AC573
AWLYYWW
MC74AC573N
AWLYYWW
AC
573
74AC573
AWLYWW
ALYW
ACT573
AWLYYWW
MC74ACT573N
AWLYYWW
74ACT573
AWLYWW
ACT
573
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
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