MC74LVX32DR2G [ROCHESTER]
LV/LV-A/LVX/H SERIES, QUAD 2-INPUT OR GATE, PDSO14, LEAD FREE, SOIC-14;
| 型号： | MC74LVX32DR2G |
| 厂家： | 
Rochester Electronics |
| 描述： | LV/LV-A/LVX/H SERIES, QUAD 2-INPUT OR GATE, PDSO14, LEAD FREE, SOIC-14 栅 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总8页 (文件大小：823K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74LVX32
Quad 2-Input OR Gate
With 5 V−Tolerant Inputs
The MC74LVX32 is an advanced high speed CMOS 2−input OR
gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of
5.0 V systems to 3.0 V systems.
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MARKING
Features
DIAGRAMS
• High Speed: t = 4.4 ns (Typ) at V = 3.3 V
PD
CC
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C
CC
A
14
• Power Down Protection Provided on Inputs
SOIC−14
D SUFFIX
CASE 751A
LVX32G
AWLYWW
14
14
• Balanced Propagation Delays
1
• Low Noise: V
= 0.5 V (Max)
OLP
1
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
14
LVX
32
• ESD Performance:
TSSOP−14
DT SUFFIX
CASE 948G
Human Body Model > 2000 V;
Machine Model > 200 V
ALYWG
1
G
1
• These Devices are Pb−Free and are RoHS Compliant
14
LVX32
ALYWG
SOEIAJ−14
M SUFFIX
CASE 965
14
1
1
LVX32 = Specific Device Code
= Assembly Location
WL, L = Wafer Lot
= Year
A
Y
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
May, 2011 − Rev. 3
MC74LVX32/D
MC74LVX32
V
A2
13
B2
12
O2
11
A3
10
B3
9
O3
8
CC
14
PIN NAMES
Pins
Function
1
2
3
4
5
6
7
A0
B0
O0
A1
B1
O1 GND
An, Bn
On
Data Inputs
Outputs
Figure 1. 14−Lead Pinout (Top View)
1
A0
FUNCTION TABLE
INPUTS
3
6
O0
O1
O2
O3
2
4
OUTPUTS
On
B0
A1
An
Bn
5
L
L
H
H
L
H
L
L
H
H
H
B1
A2
13
11
8
12
10
9
H
B2
A3
B3
Figure 2. Logic Diagram
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LVX32DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LVX32DTR2G
MC74LVX32MG
TSSOP−14*
2500 Tape & Reel
50 Units / Rail
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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2
MC74LVX32
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
–0.5 to +7.0
–0.5 to +7.0
V
in
V
V
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
–0.5 to V +0.5
V
out
IK
CC
I
−20
mA
mA
mA
mA
mW
_C
I
20
25
OK
I
out
CC
I
DC Supply Current, V and GND Pins
50
CC
P
Power Dissipation
180
D
T
stg
Storage Temperature
–65 to +150
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
3.6
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
in
5.5
V
V
out
0
V
CC
V
T
Operating Temperature, All Package Types
Input Rise and Fall Time
−40
0
+85
100
_C
ns/V
A
Dt/DV
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T = − 40 to 85°C
A
V
CC
Min
Typ
Max
Min
Max
V
Symbol
Parameter
Test Conditions
Unit
V
IH
High−Level Input Voltage
2.0
3.0
3.6
1.5
2.0
2.4
1.5
2.0
2.4
V
V
Low−Level Input Voltage
2.0
3.0
3.6
0.5
0.8
0.8
0.5
0.8
0.8
V
V
V
IL
V
OH
High−Level Output Voltage
I
I
I
= −50mA
= −50mA
= −4mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0
1.9
2.9
2.48
OH
OH
OH
(V = V or V )
in
IH
IL
V
OL
Low−Level Output Voltage
I
OL
I
OL
I
OL
= 50mA
= 50mA
= 4mA
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.44
(V = V or V )
in
IH
IL
I
Input Leakage Current
V
V
= 5.5V or GND
3.6
3.6
0.1
2.0
1.0
mA
mA
in
in
I
Quiescent Supply Current
= V or GND
20.0
CC
in
CC
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3
MC74LVX32
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= 25°C
T = − 40 to 85°C
A
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
t
,
Propagation Delay, Input to
Output
V
V
= 2.7V
C = 15pF
C = 50pF
L
5.8
8.3
10.7
14.2
1.0
1.0
13.5
17.0
ns
PLH
CC
L
t
PHL
= 3.3 0.3V
C = 15pF
4.4
6.9
6.6
10.1
1.0
1.0
8.0
11.5
CC
L
C = 50pF
L
t
t
Output−to−Output Skew
(Note 1)
V
CC
V
CC
= 2.7V
= 3.3 0.3V
C = 50pF
C = 50pF
L
1.5
1.5
1.5
1.5
ns
OSHL
OSLH
L
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
Typ
4
T = − 40 to 85°C
A
Min
Max
Min
Max
Symbol
Parameter
Unit
pF
Cin
Input Capacitance
Power Dissipation Capacitance (Note 2)
10
10
C
14
pF
PD
2. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I /4 (per gate). C is used to determine the
CC
CC(OPR
CC
PD CC in CC PD
2
no−load dynamic power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V = 3.3V, Measured in SOIC Package)
r
f
L
CC
T
A
= 25°C
Typ
0.3
Max
Symbol
Characteristic
Unit
V
V
Quiet Output Maximum Dynamic V
0.5
−0.5
2.0
OLP
OLV
OL
V
Quiet Output Minimum Dynamic V
−0.3
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
0.8
V
TEST POINT
V
CC
A or B
OUTPUT
50%
DEVICE
UNDER
TEST
GND
t
t
PHL
PLH
C *
L
O
50% V
CC
*Includes all probe and jig capacitance
Figure 3. Switching Waveforms
Figure 4. Test Circuit
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4
MC74LVX32
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
−T−
J
M
K
SEATING
G
J
K
M
P
R
1.27 BSC
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
_
D 14 PL
PLANE
0.19
0.10
0
M
S
S
0.25 (0.010)
T B
A
7
0
7
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
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5
MC74LVX32
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE B
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
−V−
K1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
J1
K
K1 0.19
0.10 (0.004)
L
M
6.40 BSC
0.252 BSC
SEATING
PLANE
−T−
H
G
0
8
0
8
DETAIL E
_
_
_
_
D
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
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6
MC74LVX32
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE B
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
L
14
8
E
Q
1
H
E
_
E
M
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
L
7
1
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
A
e
c
MILLIMETERS
INCHES
MIN
---
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.008
0.413
0.215
A
---
0.05
0.35
0.10
9.90
5.10
2.05
A
b
A
1
1
b
c
0.20 0.002
0.50 0.014
0.20 0.004
M
0.13 (0.005)
0.10 (0.004)
D
E
e
10.50 0.390
5.45 0.201
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
0
10
0.90 0.028
10
_
0.035
0.056
0
_
_
_
Q
0.70
---
1
Z
1.42
---
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MC74LVX32/D
相关型号：
MC74LVX32DTR2
OR Gate, LV/LV-A/LVX/H Series, 4-Func, 2-Input, CMOS, PDSO14, PLASTIC, TSSOP-14
MOTOROLA
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