SFU9130TU [ROCHESTER]

9.8A, 100V, 0.3ohm, P-CHANNEL, Si, POWER, MOSFET, TO-251, IPAK-3;


型号：	SFU9130TU
厂家：	Rochester Electronics
描述：	9.8A, 100V, 0.3ohm, P-CHANNEL, Si, POWER, MOSFET, TO-251, IPAK-3 开关脉冲晶体管
文件：	总10页 (文件大小：992K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SFR/U9130

Advanced Power MOSFET

FEATURES

BV_DSS= -100 V

R_DS(on)= 0.3 W

I_D= -9.8 A

Avalanche Rugged Technology

Rugged Gate Oxide Technology

Lower Input Capacitance

Improved Gate Charge

Extended Safe Operating Area

Lower Leakage Current : 10 mA (Max.) @ V_DS= -100V

Lower R_DS(ON): 0.225 W (Typ.)

D-PAK

I-PAK

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol

Characteristic

Drain-to-Source Voltage

Continuous Drain Current (T_C=25^oC)

Continuous Drain Current (T_C=100^oC)

Drain Current-Pulsed

Value

-100

-9.8

-6.9

Units

V_DSS

I_D

I_DM

V_GS

E_AS

I_AR

Gate-to-Source Voltage

Single Pulsed Avalanche Energy

Avalanche Current

320

-9.8

5.7

E_AR

dv/dt

Repetitive Avalanche Energy

V/ns

Peak Diode Recovery dv/dt

-6.5

2.5

Total Power Dissipation (T_A=25 C)

Total Power Dissipation (T_C=25^oC)

Linear Derating Factor

P_D

W/^oC

0.46

Operating Junction and

T_J, T_STG

- 55 to +150

300

Storage Temperature Range

^oC

Maximum Lead Temp. for Soldering

Purposes, 1/8” from case for 5-seconds

T_L

Thermal Resistance

Symbol

R_qJC

Characteristic

Typ.

Max.

Units

Junction-to-Case

2.19

^oC/W

R_qJA

Junction-to-Ambient

R_qJA

110

When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

P-CHANNEL

POWER MOSFET

SFR/U9130

Electrical Characteristics (T_C=25^oC unless otherwise specified)

Symbol

BV_DSS

Characteristic

Min. Typ. Max. Units

Test Condition

V_GS=0V,I_D=-250mA

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coeff.

Gate Threshold Voltage

V/^oC

-100 --

-- -0.1

-2.0 --

DBV/DT_J

V_GS(th)

I_D=-250mA

_DS=-5V,I_D=-250mA

V_GS=-20V

_GS=20V

V_DS=-100V

_DS=-80V,T_C=125^oC

See Fig 7

-4.0

Gate-Source Leakage , Forward

Gate-Source Leakage , Reverse

-- -100

I_GSS

100

-10

I_DSS

Drain-to-Source Leakage Current

-- -100

Static Drain-Source

On-State Resistance

Forward Transconductance

Input Capacitance

R_DS(on)

V_GS=-10V,I_D=-4.9A

V_DS=-40V,I_D=-4.9A

0.3

g_fs

C_iss

C_oss

C_rss

t_d(on)

t_r

5.2

800 1035

V_GS=0V,V_DS=-25V,f =1MHz

Output Capacitance

Reverse Transfer Capacitance

Turn-On Delay Time

Rise Time

240

100

160

See Fig 5

V_DD=-50V,I_D=-10.5A,

R_G=12

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

See Fig 13

Q_g

Total Gate Charge

Gate-Source Charge

Gate-Drain(“ Miller” ) Charge

_DS=-80V,V_GS=-10V,

Q_gs

Q_gd

5.4

12.2

I_D=-10.5A

^{See Fig 6 & Fig 12}OO

Source-Drain Diode Ratings and Characteristics

Symbol

Characteristic

Continuous Source Current

Pulsed-Source Current

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Min. Typ. Max. Units

Test Condition

Integral reverse pn-diode

in the MOSFET

T_J=25^oC,I_S=-9.8A,V_GS=0V

T_J=25^oC,I_F=-10.5A

I_S

I_SM

V_SD

t_rr

-- -9.8

-- -39

-- -4.0

120 --

Q_rr

-- 0.53 --

di_F/dt=100A/ms

Notes ;

1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature

L=5.0mH, I_AS=-9.8A, V_DD=-25V, R_G=27W*, Starting T_J=25^oC

-10.5A, di/dt 400A/ms, V_DDBV_DSS, Starting T_J=25^oC

Pulse Test : Pulse Width = 250 ms, Duty Cycle 2%

Essentially Independent of Operating Temperature

P-CHANNEL

POWER MOSFET

SFR/U9130

Fig 1. Output Characteristics

Fig 2. Transfer Characteristics

V_GS

Top :

- 15 V

- 10 V

- 8.0 V

- 7.0 V

- 6.0 V

- 5.5 V

- 5.0 V

Bottom : - 4.5 V

150 ^oC

25^oC

@ Notes :

1. V = 0 V

2. V = -40 V

@ Notes :

1. 250 s Pulse Test

3. 250 s Pulse Test

- 55 ^oC

2. T = 25^oC

-1

-V , Gate-Source Voltage [V]

-V , Drain-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current

Fig 4. Source-Drain Diode Forward Voltage

1.0

0.8

0.6

0.4

0.2

0.0

V = -10 V

150 ^oC

@ Notes :

1. V = 0 V

25 ^oC

2. 250 s Pulse Test

@ Note : T = 25^oC

V = -20 V

-1

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

-I , Drain Current [A]

-V , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage

Fig 6. Gate Charge vs. Gate-Source Voltage

1500

1000

500

C = C + C ( C = shorted)

iss gs

V = -20 V

C = C + C

oss ds

V = -50 V

C = C

rss gd

V = -80 V

C _iss

C _oss

@ Notes :

1. V = 0 V

2. f = 1 MHz

C _rss

@ Notes : I =-10.5 A

Q , Total Gate Charge [nC]

-V_DS, Drain-Source Voltage [V]

P-CHANNEL

POWER MOSFET

SFR/U9130

Fig 7. Breakdown Voltage vs. Temperature

Fig 8. On-Resistance vs. Temperature

1.2

2.5

2.0

1.5

1.0

0.5

0.0

1.1

1.0

@ Notes :

0.9

@ Notes :

1. V = -10 V

1. V = 0 V

2. I = -5.3 A

2. I = -250 A

0.8

-75

-50

-25

100

125

150

175

-75

-50

-25

100

125

150

175

T_J, Junction Temperature [^oC]

Fig 9. Max. Safe Operating Area

Fig 10. Max. Drain Current vs. Case Temperature

Operation in This Area

is Limited by R_DS(on)

0.1 ms

1 ms

10 ms

@ Notes :

1. T = 25^oC

2. T = 150^oC

3. Single Pulse

-1

100

125

150

T_c, Case Temperature [^oC]

-V , Drain-Source Voltage [V]

Fig 11. Thermal Response

D=0.5

10⁰

@ Notes :

1. Z_q_JC(t)=2.19 ^oC/W Max.

0.2

0.1

2. Duty Factor, D=t /t₂

3. T_JM-T_C=P_DM*Z_q_JC(t)

P_.DM

0.05

10^-1

0.02

t_1.

t_2.

0.01

single pulse

10^-5

10^-4

10^-3

10^-2

10^-1

10⁰

10¹

t₁, Square Wave Pulse Duration [sec]

P-CHANNEL

POWER MOSFET

SFR/U9130

Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”

V_GS

Same Type

as DUT

50K

Q_g

12V

200nF

-10V

300nF

V_DS

Q_gs

Q_gd

V_GS

DUT

R₂

-3mA

R₁

Charge

Current Sampling (I_G) Current Sampling (I_D)

Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

R_L

t _on

t _off

V_out

V_in

t_f

t_d(on)

t_r

t_d(off)

V_DD

( 0.5 rated V_DS

)

V_in

10%

R_G

DUT

-10V

90%

V_out

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BV_DSS

L_L

I_D

----

--------------------

E_AS

L_LI_AS

BV_DSS-- V_DD

V_DS

t _p

Time

Vary t_pto obtain

required peak I_D

V_DD

V_DS(t)

R_G

V_DD

I_D(t)

DUT

-10V

I_AS

BV_DSS

t _p

P-CHANNEL

POWER MOSFET

SFR/U9130

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

V_DS

DUT

I _S

Driver

V_GS

Compliment of DUT

(N-Channel)

R_G

V_DD

V_GS

• dv/dt controlled by “R_G”

• I_Scontrolled by Duty Factor “D”

Gate Pulse Width

--------------------------

V_GS

D =

Gate Pulse Period

10V

( Driver )

Body Diode Reverse Current

I_RM

I _S

( DUT )

di/dt

I_FM, Body Diode Forward Current

V_f

V_DS

( DUT )

Body Diode

V_DD

Forward Voltage Drop

Body Diode Recovery dv/dt

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

UHC™

VCX™

CROSSVOLT™

E²CMOS^TM

FACT™

FACT Quiet Series™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

FAST^®

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Product Folder - Fairchild P/N SFR9130 - 100V P-Channel A-FET

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SFR9130

SFU9130TU [ROCHESTER]

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