SN74CBT6800DBQR [ROCHESTER]

CBT/FST/QS/5C/B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, SSOP-24;
SN74CBT6800DBQR
型号: SN74CBT6800DBQR
厂家: Rochester Electronics    Rochester Electronics
描述:

CBT/FST/QS/5C/B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, SSOP-24

驱动 光电二极管 输出元件
文件: 总8页 (文件大小:795K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74CBT6800  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS FOR LIVE INSERTION  
SCDS005J – MARCH 1993 – REVISED DECEMBER 1998  
DB, DBQ, DW, OR PW PACKAGE  
5-Switch Connection Between Two Ports  
(TOP VIEW)  
TTL-Compatible Input Levels  
Outputs Are Precharged by Bias Voltage to  
Minimize Signal Distortion During Live  
Insertion  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
ON  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
B1  
2
3
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B9  
4
Package Options Include Plastic Shrink  
Small-Outline (DB, DBQ), Small-Outline  
(DW), and Thin Shrink Small-Outline (PW)  
Packages  
5
6
7
8
description  
9
10  
11  
12  
A9  
A10  
GND  
The SN74CBT6800 provides ten bits of  
high-speed TTL-compatible bus switching. The  
low on-state resistance of the switch allows  
bidirectional connections to be made while adding  
near-zero propagation delay. The device also  
precharges the B port to a user-selectable bias  
voltage (BIASV) to minimize live-insertion noise.  
B10  
BIASV  
The SN74CBT6800 is organized as one 10-bit switch with a single enable (ON) input. When ON is low, the  
switch is on and port A is connected to port B. When ON is high, the switch between port A and port B is open  
and the B port is precharged to BIASV through the equivalent of a 10-kresistor.  
The SN74CBT6800 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
ON  
L
B1–B10  
A1–A10  
BIASV  
FUNCTION  
Connect  
H
Precharge  
logic diagram (positive logic)  
13  
23  
BIASV  
B1  
2
A1  
11  
14  
A10  
ON  
B10  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT6800  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS FOR LIVE INSERTION  
SCDS005J – MARCH 1993 – REVISED DECEMBER 1998  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Bias voltage range, BIASV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK  
I
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W  
JA  
DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
recommended operating conditions (see Note 3)  
MIN  
4
MAX  
UNIT  
V
V
CC  
Supply voltage  
5.5  
BIASV Supply voltage  
1.3  
2
V
V
CC  
V
V
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
V
IH  
0.8  
85  
V
IL  
T
A
–40  
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
I = –18 mA  
MIN TYP  
MAX  
–1.2  
±5  
UNIT  
V
V
V
V
V
V
V
= 4.5 V,  
= 5.5 V,  
= 4.5 V,  
= 5.5 V,  
= 3.6 V,  
IK  
CC  
CC  
CC  
CC  
CC  
I
I
I
I
V = 5.5 V or GND  
I
µA  
mA  
µA  
mA  
pF  
I
BIASV = 2.4 V,  
V
O
= 0  
0.25  
O
I
O
= 0,  
V = V  
I
or GND  
50  
CC  
CC  
§
I  
CC  
Control inputs  
One input at 2.7 V,  
Other inputs at V  
or GND  
2.5  
CC  
C
C
Control inputs V = 3 V or 0  
3.5  
4.5  
i
I
V
O
= 3 V or 0,  
Switch off  
pF  
o(OFF)  
V
= 4 V,  
CC  
V
I
= 2.4 V,  
I = 15 mA  
I
14  
20  
TYP at V  
= 4 V  
CC  
I = 64 mA  
I
5
5
7
7
r
on  
V = 0  
I
V
CC  
= 4.5 V  
I = 30 mA  
I
V = 2.4 V,  
I
I = 15 mA  
I
10  
15  
§
All typical values are at V  
= 5 V (unless otherwise noted), T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by  
the lower of the voltages of the two (A or B) terminals.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT6800  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS FOR LIVE INSERTION  
SCDS005J – MARCH 1993 – REVISED DECEMBER 1998  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
V
= 5 V  
CC  
± 0.5 V  
V
= 4 V  
TEST  
CONDITIONS  
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
0.25  
8.1  
t
t
t
t
t
A or B  
ON  
B or A  
A or B  
0.35  
9.1  
9.6  
5.9  
6.4  
ns  
ns  
pd  
3.1  
3.6  
2.7  
3
BIASV = GND  
BIASV = 3 V  
BIASV = GND  
BIASV = 3 V  
PZH  
PZL  
PHZ  
PLZ  
8.6  
6.1  
ON  
A or B  
ns  
7.3  
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when  
driven by an ideal voltage source (zero output impedance).  
PARAMETER MEASUREMENT INFORMATION  
7 V  
TEST  
S1  
S1  
Open  
GND  
500 Ω  
t
Open  
7 V  
From Output  
Under Test  
pd  
/t  
t
PLZ PZL  
t
/t  
Open  
C
= 50 pF  
PHZ PZH  
L
500 Ω  
(see Note A)  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
PZL  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
Input  
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
V
OL  
(see Note B)  
t
PHZ  
t
PZH  
t
t
PHL  
PLH  
V
OH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
V
OH  
V
OH  
– 0.3 V  
1.5 V  
Output  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
are the same as t  
are the same as t  
.
dis  
en  
.
pd  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
.
Figure 1. Load Circuit and Voltage Waveforms  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
Customers are responsible for their applications using TI components.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 2000, Texas Instruments Incorporated  
Product Folder:SN74CBT6800, 10-Bit FET Bus Switch With Precharged Outputs For Live Insertion  
All Semiconductors  
>> Semiconductor Home > Products > Digital Logic > Bus Switches > Standard Bus Switches >  
SN74CBT6800, 10-Bit FET Bus Switch With Precharged Outputs For Live Insertion  
Device Status: Active  
> Description  
> Features  
> Datasheets  
Parameter Name SN74CBT6800  
Voltage Nodes (V) 5  
Vcc range (V)  
No. of Bits  
4.0 to 5.5  
> Pricing/Samples/Availability  
> Application Notes  
> Related Documents  
> Training  
10  
7
ron(max) (ohms)  
tpd(max) (ns)  
0.25  
Description  
The SN74CBT6800 provides ten bits of high-speed TTL-compatible bus switching. The low on-state  
resistance of the switch allows bidirectional connections to be made while adding near-zero propagation  
delay. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize  
live-insertion noise.  
The SN74CBT6800 is organized as one 10-bit switch with a single enable (ON\) input. When ON\ is low,  
the switch is on and port A is connected to port B. When ON\ is high, the switch between port A and port  
B is open and the B port is precharged to BIASV through the equivalent of a 10-k  
The SN74CBT6800 is characterized for operation from -40°C to 85°C.  
resistor.  
Features  
5-  
Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
Outputs Are Precharged by Bias Voltage to Minimize Signal Distortion During Live Insertion  
Package Options Include Plastic Shrink Small-Outline (DB, DBQ), Small-Outline (DW), and Thin  
Shrink Small-Outline (PW) Packages  
file:////roarer/root/export/projects/bitting2/imagi.../20000914/08312000_1/TXII/08312000/sn74cbt6800.html (1 of 3) [9/16/2000 12:27:01 PM]  
Product Folder:SN74CBT6800, 10-Bit FET Bus Switch With Precharged Outputs For Live Insertion  
To view the following documents, Acrobat Reader 3.x is required.  
To download a document to your hard drive, right-click on the link and choose 'Save'.  
Datasheets  
Full datasheet in Acrobat PDF: scds005j.pdf (61 KB)  
Full datasheet in Zipped PostScript: scds005j.psz (61 KB)  
Pricing/Samples/Availability  
Price/unit  
USD (100-999)  
Orderable Device Package Pins Temp (ºC)  
Status  
Pack Qty Availability / Samples  
DB  
SN74CBT6800DBLE  
SN74CBT6800DBQR  
SN74CBT6800DBR  
SN74CBT6800DGVR  
SN74CBT6800DW  
SN74CBT6800DWR  
SN74CBT6800PWLE  
SN74CBT6800PWR  
24 -40 TO 85 OBSOLETE  
24 -40 TO 85 ACTIVE  
24 -40 TO 85 ACTIVE  
24 -40 TO 85 ACTIVE  
24 -40 TO 85 ACTIVE  
24 -40 TO 85 ACTIVE  
24 -40 TO 85 OBSOLETE  
24 -40 TO 85 ACTIVE  
DBQ  
DB  
Check stock or order  
Check stock or order  
Check stock or order  
Check stock or order  
Check stock or order  
1.09  
1.09  
1.25  
1.30  
1.15  
2500  
2000  
2000  
25  
DGV  
DW  
DW  
PW  
2000  
PW  
Check stock or order  
1.09  
2000  
Application Reports  
View Application Reports for Digital Logic  
5-V To 3.3-V Translation With The SN74CBTD3384 (SCDA003B - Updated: 03/01/1997)  
Flexible Voltage-Level Translation With CBT Family Devices (SCDA006 - Updated: 07/20/1999)  
Implications Of Slow Or Floating CMOS Inputs (SCBA004C - Updated: 02/01/1998)  
Low-Voltage Bus-Switch Technology And Applications (SCDA005 - Updated: 12/01/1997)  
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices (SCEA005 - Updated: 12/01/1997)  
SN74CBTS3384 Bus Switches Provide Fast Connection And Ensure Isolation (SCDA002A - Updated: 08/01/1996)  
TI Logic Solutions for Memory Interleaving With the Intel440BX Chipset (SCCA001 - Updated: 04/08/1999)  
Texas Instruments Crossbar Switches (SCDA001A - Updated: 06/01/1995)  
Texas Instruments Solution for Undershoot Protection for Bus Switches (SCDA007 - Updated: 04/13/2000)  
Understanding Advanced Bus-Interface Products Design Guide (SCAA029, 253 KB - Updated: 05/01/1996)  
Related Documents  
Documentation Rules (SAP) And Ordering Information (SZZU001B, 4 KB - Updated: 05/06/1999)  
Logic Selection Guide Second Half 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000)  
file:////roarer/root/export/projects/bitting2/imagi.../20000914/08312000_1/TXII/08312000/sn74cbt6800.html (2 of 3) [9/16/2000 12:27:01 PM]  
Product Folder:SN74CBT6800, 10-Bit FET Bus Switch With Precharged Outputs For Live Insertion  
MicroStar Junior BGA Design Summary (SCET004, 284 KB - Updated: 07/28/2000)  
More Power In Less Space - Technical Article (SCAU001A, 850 KB - Updated: 03/01/1996)  
Table Data Updated on: 8/31/2000  
© Copyright 2000 Texas Instruments Incorporated. All rights reserved. Trademarks | Privacy Policy  
Texas Instruments  
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