SN74F125DE4 [ROCHESTER]
Bus Driver, F/FAST Series, 4-Func, 1-Bit, True Output, TTL, PDSO14, GREEN, PLASTIC, SOIC-14;
| 型号： | SN74F125DE4 |
| 厂家： | 
Rochester Electronics |
| 描述： | Bus Driver, F/FAST Series, 4-Func, 1-Bit, True Output, TTL, PDSO14, GREEN, PLASTIC, SOIC-14 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总13页 (文件大小：633K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74F125
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SDFS016B – JANUARY 1989 – REVISED JULY 2002
D, DB, N, OR NS PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
1OE
1A
V
CC
13 4OE
12 4A
1
2
3
4
5
6
7
14
1Y
description/ordering information
11
10
9
2OE
2A
4Y
3OE
3A
The SN74F125 features independent line drivers
with3-stateoutputs. Eachoutputisdisabledwhen
the associated output-enable (OE) input is high.
2Y
8
GND
3Y
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
SOIC – D
Tube
SN74F125N
SN74F125N
Tube
SN74F125D
F125
0°C to 70°C
Tape and reel
Tape and reel
Tape and reel
SN74F125DR
SN74F125NSR
SN74F125DBR
SOP – NS
74F125
F125
SSOP – DB
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F125
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SDFS016B – JANUARY 1989 – REVISED JULY 2002
logic diagram (positive logic)
1
2
4
5
1OE
3
6
1A
1Y
2Y
2OE
2A
10
9
3OE
3A
8
3Y
4Y
13
12
4OE
4A
11
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input voltage ratings may be exceeded provided the input current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
V
0.8
–18
– 15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
0
70
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F125
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SDFS016B – JANUARY 1989 – REVISED JULY 2002
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
UNIT
V
V
V
V
V
= 4.5 V,
= 4.5 V
–1.2
V
IK
CC
I
I
I
I
I
= – 3 mA
= – 15 mA
= – 3 mA
= 64 mA
2.4
2
3.3
3.1
OH
OH
OH
OL
CC
V
OH
OL
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.75 V,
= 4.5 V,
= 0,
2.7
0.4
0.55
0.1
20
V
I
I
I
I
I
I
I
I
I
V = 7 V
I
mA
µA
µA
µA
µA
mA
mA
mA
mA
I
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 2.7 V
I
IH
V = 0.5 V
I
–20
50
IL
V
O
V
O
V
O
= 2.7 V
= 0.5 V
= 0
OZH
–50
–225
24
OZL
‡
–100
OS
Outputs open
Outputs open
Outputs open
17
28
25
CCH
CCL
CCZ
40
35
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics (see Figure 1)
V
C
R
= 5 V,
= 50 pF,
= 500 Ω,
= 25°C
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
CC
L
L
FROM
PARAMETER
TO
(OUTPUT)
= 500 Ω,
= MIN to MAX
UNIT
(INPUT)
§
T
A
T
A
MIN
1.2
2.2
2.7
3.2
1
TYP
3.6
5.1
5.1
5.6
3.1
3.1
MAX
6
MIN
1.2
2.2
2.7
3.2
1
MAX
6.5
8
t
t
PLH
PHL
PZH
A
ns
ns
ns
Y
Y
Y
7.5
7.5
8
t
8.5
9
OE
OE
t
PZL
t
5
6
PHZ
t
1
5.5
1
6
PLZ
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F125
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SDFS016B – JANUARY 1989 – REVISED JULY 2002
PARAMETER MEASUREMENT INFORMATION
7 V
Open
S1
500 Ω
TEST
S1
From Output
Under Test
C
Test
Point
From Output
Under Test
t
t
/t
Open
7 V
PLH PHL
/t
C
t
L
L
PLZ PZL
/t
500 Ω
500 Ω
(see Note A)
(see Note A)
Open
7 V
PHZ PZH
Open Collector
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
3 V
Timing Input
1.5 V
0 V
t
w
t
h
t
3 V
su
3 V
0 V
1.5 V
1.5 V
Input
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
Input
3 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
0 V
t
PZL
t
t
t
PHL
PLH
t
PLZ
Output
Waveform 1
S1 at 7 V
V
V
≈3.5 V
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
OL
+ 0.3 V
V
OL
OL
(see Note B)
t
PHZ
t
PHL
PLH
t
PZH
Output
Waveform 2
S1 at GND
V
V
V
OH
OH
Out-of-Phase
Output
V
OH
– 0.3 V
1.5 V
1.5 V
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns,
O
r
f
duty cycle = 50%.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74F125D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74F125DE4
SN74F125DG4
SN74F125DR
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74F125DRE4
SN74F125DRG4
SN74F125N
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74F125NE4
SN74F125NSR
SN74F125NSRE4
SN74F125NSRG4
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74F125DR
SOIC
SO
D
14
14
2500
2000
330.0
330.0
16.4
16.4
6.5
8.2
9.0
2.1
2.5
8.0
16.0
16.0
Q1
Q1
SN74F125NSR
NS
10.5
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74F125DR
SOIC
SO
D
14
14
2500
2000
367.0
367.0
367.0
367.0
38.0
38.0
SN74F125NSR
NS
Pack Materials-Page 2
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相关型号：
SN74F125NSRE4
Bus Driver, F/FAST Series, 4-Func, 1-Bit, True Output, TTL, PDSO14, GREEN, PLASTIC, SOP-14
ROCHESTER
SN74F125NSRG4
Bus Driver, F/FAST Series, 4-Func, 1-Bit, True Output, TTL, PDSO14, GREEN, PLASTIC, SOP-14
ROCHESTER
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