THS6092IDDA [ROCHESTER]
DUAL LINE DRIVER, PDSO8, GREEN, PLASTIC, SOP-8;![THS6092IDDA](http://pdffile.icpdf.com/pdf2/p00243/img/icpdf/THS6092IDDA_1472320_icpdf.jpg)
型号: | THS6092IDDA |
厂家: | ![]() |
描述: | DUAL LINE DRIVER, PDSO8, GREEN, PLASTIC, SOP-8 驱动 光电二极管 接口集成电路 驱动器 |
文件: | 总21页 (文件大小:1490K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢀꢁ ꢂ ꢃꢄ ꢅꢈ
ꢆ ꢉ ꢊ ꢋꢌꢇ ꢍꢎ ꢆ ꢏ ꢌꢐꢂ ꢑ ꢒꢓꢔ ꢑ ꢕꢖꢔ ꢐ ꢗꢕ ꢏ ꢔꢗ ꢂ
SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
D
Remote Terminal ADSL Line Driver
− Ideal for Both Full Rate ADSL and G.Lite
− Compatible With 1:2 Transformer Ratio
D
D
High Speed
− 100 MHz (−3 dB, G=1, 12-V Single
Supply)
− 600 V/µs Slew Rate (G = 4, 12-V Single
D
D
Wide Supply Voltage Range +5 V to +14 V
− Ideal for Single Supply +12-V Operation
Supply)
Low Distortion, Single-Ended, G = 4
− −72 dBc (250 kHz, 2 Vpp, 25 Ω load)
− −78 dBc (250 kHz, 2 Vpp, 100 Ω load)
Low 2.1 pA/√Hz Noninverting Current Noise
− Reduces Noise Feedback Through
Hybrid Into Downstream Channel
D
D
D
D
Low Power Shutdown (THS6093)
− 300 µA Total Standby Current
Thermal Shutdown and Short Circuit
Protection
D
D
Wide Output Swing
− 18.4 Vpp Differential Output Voltage,
R = 50 Ω, 12-V Single Supply
L
High Output Current
− 275 mA (typ)
Standard SOIC, SOIC PowerPAD, and
TSSOP PowerPAD Package
Evaluation Module Available
THS6092
SOIC (D) AND
THS6093
SOIC (D) AND
SOIC PowerPAD (DDA) PACKAGE
TSSOP PowerPAD (PWP) PACKAGE
(TOP VIEW)
(TOP VIEW)
D1 OUT
D1 IN−
D1 IN+
V
CC+
D1 OUT
D1 IN−
D1 IN+
V
1
2
3
4
5
6
7
14
1
2
3
4
8
7
6
5
CC+
13 D2 OUT
12 D2 IN−
11 D2 IN+
D2 OUT
D2 IN−
D2 IN+
V
V
CC−
CC−
10
9
N/C
GND
N/C
N/C
SHUTDOWN
N/C
8
description
The THS6092/3 is a high-speed line driver ideal for driving signals from the remote terminal to the central office
in asymmetrical digital subscriber line (ADSL) applications. It can operate from a single +12-V supply voltage
while drawing only 7.3 mA of supply current per channel. It offers low –72 dBc total harmonic distortion driving
a 25-Ω load (2 Vpp). The THS6092/3 offers a high 18.4-Vpp differential output swing across a 50-Ω load from
a single +12-V supply. The THS6093 features a low-power shutdown mode, consuming only 300 µA quiescent
current per channel. The THS6092/3 is packaged in a standard SOIC, SOIC PowerPAD, and TSSOP
PowerPAD package.
+12 V
THS6092
RELATED PRODUCTS
Driver 1
12.5 Ω
+
_
V +
I
1:2
DEVICE
DESCRIPTION
750 Ω
350-mA, 12 ADSL CPE line driver
THS6042/3
THS6052/3
OPA2677
THS6062
14.1 dBm
Delivered
to Telephone
Line
175-mA, 12 V ADSL CPE line driver
100 Ω
THS6092
Driver 2
380-mA, +12 V ADSL CPE line driver
Low noise ADSL receiver
499 Ω
12.5 Ω
+
_
V −
I
0.33 µF
750 Ω
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
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Copyright 2002, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢆꢉ ꢊ ꢋ ꢌ ꢇ ꢍ ꢎꢆ ꢏ ꢌꢐ ꢂꢑ ꢒꢓ ꢔ ꢑꢕ ꢖ ꢔ ꢐꢗ ꢕ ꢏꢔ ꢗꢂ
SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
AVAILABLE OPTIONS
PACKAGED DEVICE
†
†
TSSOP-14
PowerPAD
(PWP)
EVALUATION
MODULES
SOIC-8
†
†
T
A
SOIC-8
(D)
SOIC-14
(D)
PowerPAD
(DDA)
THS6092EVM
THS6093EVM
0°C to 70°C
THS6092CD
THS6092ID
THS6092CDDA
THS6092IDDA
THS6093CD
THS6093ID
THS6093CPWP
THS6093IPWP
−40°C to 85°C
—
†
All packages are available taped and reeled. Add an R-suffix to the device type (i.e., THS6092IDR).
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7 V
CC+
CC−
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
CC
Output current (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mA
Differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . See Dissipation Ratings Table
Operating free-air temperature, T : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Storage temperature, T : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
stg
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS6092 and THS6093 may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be
connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the
PowerPAD thermally enhanced package.
DISSIPATION RATING TABLE
§
§
§
T
= 25°C
T
= 70°C
T = 85°C
A
A
A
PACKAGE
θ
JA
θ
JC
POWER RATING
POWER RATING
POWER RATING
‡
‡
D-8
DDA
D-14
PWP
95°C/W
38.3°C/W
1.1 W
0.63 W
0.47 W
45.8°C/W
9.2°C/W
2.3 W
1.31 W
0.98 W
‡
‡
66.6°C/W
26.9°C/W
1.6 W
0.90 W
0.68 W
37.5°C/W
1.4°C/W
2.8 W
1.60 W
1.20 W
‡
§
This data was taken using the JEDEC proposed high-K test PCB. For the JEDEC low-K test PCB, the Θ is168°C/W for the D−8 package and
122.3°C/W for the D−14 package.
Power rating is determined with a junction temperature of 130°C. This is the point where distortion starts to substantially increase. Thermal
management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance.
JA
recommended operating conditions
MIN NOM
MAX
7
UNIT
Dual supply
Single supply
C-suffix
2.5
+5
Supply voltage, V
CC+
to V
CC−
V
+14
70
0
Operating free-air temperature, T
°C
A
I-suffix
−40
85
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 12 V, V
= GND, R
= 750 Ω, R = 25 Ω (unless otherwise noted)
FEEDBACK L
CC+
CC−
dynamic performance
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
= 12 V
= 5 V
100
CC
BW
SR
Small-signal bandwidth (−3 dB) G=1
Slew rate (see Note 2)
MHz
90
CC
V
CC
V
CC
= 12 V
= 5 V
600
400
V/µs
NOTE 2: Slew rate is defined from the 25% to the 75% output levels.
noise/distortion performance
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
Gain = 4,
= 5 V,
R = 25 Ω,
L
f = 250 kHz
V
O(pp)
= 2 V
−70
V
CC
Total harmonic distortion
THD
dBc
(single-ended configuration)
V
V
= 2 V
= 7 V
−72
−68
O(pp)
Gain = 4,
R
= 25 Ω,
L
V
V
= 12 V, f = 250 kHz
CC
O(pp)
V
I
Input voltage noise
= 12 V, 5 V, f = 10 kHz
2.1
2.1
nV/√Hz
pA/√Hz
n
CC
+Input
Input current noise
−Input
V
CC
= 12 V, 5 V, f = 10 kHz
n
10.9
f = 250 kHz ,
G = 4,
V
= 2 Vpp
O
L
V
V
= 5 V
−65
−63
CC
R = 25 Ω
X
T
Crosstalk
dBc
= 12 V
CC
dc performance
PARAMETER
TEST CONDITIONS
= 25°C
MIN
TYP
MAX
16
21
6
UNIT
mV
T
A
6
Input offset voltage
T
= full range
= 25°C
A
T
A
1
V
V
V
= 12 V, 5 V
OS
CC
Differential offset voltage
Offset drift
T
= full range
= full range
= 25°C
8
A
T
A
T
A
20
3
µV/°C
10
12
6
− Input bias current
T
= full range
= 25°C
A
T
A
1
3
I
IB
+ Input bias current
= 12 V, 5 V
µA
CC
T
= full range
= 25°C
7
A
T
A
10
12
Differential input bias current
Open loop transimpedance
T
A
= full range
Z
OL
R
= 1 kΩ
V = 12 V, 5 V
CC
0.9
MΩ
L
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 12 V, V
= GND, R
= 750 Ω, R = 25 Ω (unless otherwise noted) (continued)
CC+
CC−
FEEDBACK L
input characteristics
PARAMETER
TEST CONDITIONS
MIN
1.5 to 3.5
1.6 to 3.4
TYP
MAX
UNIT
T
A
= 25°C
1.1 to 3.9
V
CC
V
CC
V
CC
V
CC
= 5 V
T
= full range
= 25°C
A
V
ICR
Input common-mode voltage range
V
T
A
2.3 to 9.7 1.8 to 10.2
2.4 to 9.6
= 12 V
= 5 V
T
= full range
= 25°C
A
T
A
T
A
T
A
T
A
56
54
50
48
63
= full range
= 25°C
CMRR Common-mode rejection ratio
dB
56
= 12 V
= full range
+ Input
−Input
1
15
2
MΩ
Ω
R
C
Input resistance
I
I
Input capacitance
pF
output characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
1.1 to 3.9
1.4 to 10.6
MAX
UNIT
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5 V
1.4 to 3.6
R
R
= 25 Ω
L
L
= 12 V
= 5 V
1.9 to 10.1
Single ended
100 mV overdrive
V
O
Output voltage swing
V
1.3 to 3.7 1.05 to 3.95
= 100 Ω
= 12 V
= 5 V
1.5 to 10.5
240
1.1 to 10.9
240
R
R
R
= 3.6 Ω,
= 10 Ω,
= 0 Ω,
L
L
L
I
I
Output current
mA
O
= 12 V
= 12 V
275
Short-circuit current
Output resistance
325
mA
SC
Open loop
15
Ω
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
7
UNIT
Dual supply
Single supply
2.25
4.5
V
CC
Operating range
V
14
T
= 25°C
6.7
7.3
8.8
10
A
V
CC
V
CC
V
CC
V
CC
= 5 V
mA
mA
T
A
= full range
= 25°C
Quiescent current (each driver)
Power supply rejection ratio
I
CC
T
A
9.5
10.5
= 12 V
= 5 V
T
A
= full range
= 25°C
T
A
-54
-46
-58
-50
−58
−
T
A
= full range
= 25°C
PSRR
dB
T
A
−70
= 12 V
T
A
= full range
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢀꢁ ꢂ ꢃꢄ ꢅꢈ
ꢆ ꢉ ꢊ ꢋꢌꢇ ꢍꢎ ꢆ ꢏ ꢌꢐꢂ ꢑ ꢒꢓꢔ ꢑ ꢕꢖꢔ ꢐ ꢗꢕ ꢏ ꢔꢗ ꢂ
SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
electrical characteristics over recommended operating free-air temperature range, T = 25°C,
A
V
= 12 V, V
= GND, R
= 750 Ω, R = 25 Ω (unless otherwise noted) (continued)
CC+
CC−
FEEDBACK L
shutdown characteristics (THS6093 only)
PARAMETER
TEST CONDITIONS
= 12 V, GND = 6 V
(GND Pin as Reference)
= 12 V, GND = 6 V
(GND Pin as Reference)
MIN
TYP
MAX
UNIT
V
CC
V
V
Shutdown pin voltage for power up
0.8
V
IL(SHDN)
IH(SHDN)
CC(SHDN)
V
CC
Shutdown pin voltage for power down
Total quiescent current when in shutdown state
2
V
V
V
= 8 V,
= 12 V
V
GND
= 6 V,
SHDN
I
0.3
0.7
mA
CC
CC
CC
t
t
Disable time (see Note 3)
Enable time (see Note 3)
V
V
= 12 V
= 12 V
0.2
0.5
µs
µs
DIS
EN
V
V
= 6 V,
= 12 V
V
V
= 6 V,
= 6 V,
SHDN
CC
GND
GND
I
Shutdown pin input bias current for power up
40
50
100
100
µA
µA
IL(SHDN)
Shutdown pin input bias current for power
down
V
V
= 9.3 V,
= 12 V
SHDN
CC
I
IH(SHDN)
NOTE 3: Disable/enable time is defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has
reached half of its final value.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS345C − JANUARY 2001 − REVISED OCTOBER 2002
APPLICATION INFORMATION
+12 V
+
THS6092
Driver 1
0.1 µF
6.8 µF
12.5 Ω
+
_
V +
I
1:2
750 Ω
Telephone Line
100 Ω
499 Ω
499 Ω
+12 V
0.33 µF
1 kΩ
THS6092
Driver 2
0.1 µF
12.5 Ω
499 Ω
+
_
V −
I
−
+
V
O
+
THS6062
Receiver 1
V
CC
2
750 Ω
499 Ω
1 kΩ
499 Ω
−
+
V
O
−
THS6062
Receiver 2
V
CC
2
Figure 1. THS6092 ADSL Application With 1:2 Transformer Ratio
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
PACKAGING INFORMATION
Orderable Device
THS6092ID
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS6092IDDAR
SO
Power
PAD
DDA
DDA
8
2500 Green (RoHS &
no Sb/Br)
CU SN
Level-1-260C-UNLIM
THS6092IDDARG3
ACTIVE
SO
Power
PAD
8
2500 Green (RoHS &
no Sb/Br)
CU SN
Level-1-260C-UNLIM
THS6092IDG4
THS6093CPWP
THS6093CPWPG4
THS6093CPWPR
THS6093CPWPRG4
THS6093ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
14
14
14
14
14
14
14
14
14
14
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS6093IDG4
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
THS6093IPWP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
PWP
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
THS6093IPWPG4
THS6093IPWPR
THS6093IPWPRG4
90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
THS6092IDDAR
SO
Power
PAD
DDA
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
THS6093CPWPR
THS6093IPWPR
HTSSOP PWP
HTSSOP PWP
14
14
2000
2000
330.0
330.0
12.4
12.4
6.9
6.9
5.6
5.6
1.6
1.6
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
THS6092IDDAR
THS6093CPWPR
THS6093IPWPR
SO PowerPAD
HTSSOP
DDA
PWP
PWP
8
2500
2000
2000
346.0
346.0
346.0
346.0
346.0
346.0
29.0
29.0
29.0
14
14
HTSSOP
Pack Materials-Page 2
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