TLC27L4BCDRG4 [ROCHESTER]
Operational Amplifier, 4 Func, 3000uV Offset-Max, CMOS, PDSO14, GREEN, SOIC-14;
| 型号： | TLC27L4BCDRG4 |
| 厂家： | 
Rochester Electronics |
| 描述： | Operational Amplifier, 4 Func, 3000uV Offset-Max, CMOS, PDSO14, GREEN, SOIC-14 放大器 光电二极管 |
| 文件： | 总44页 (文件大小：1172K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
D, J, N, OR PW PACKAGE
(TOP VIEW)
Trimmed Offset Voltage:
TLC27L9 . . . 900 µV Max at 25°C,
= 5 V
V
DD
1OUT
1IN–
1IN+
4OUT
4IN–
4IN+
GND
3IN+
3IN–
3OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
Input Offset Voltage Drift . . . Typically
0.1 µV/Month, Including the First 30 Days
Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C . . . 3 V to 16 V
V
DD
2IN+
2IN–
–40°C to 85°C . . . 4 V to 16 V
–55°C to 125°C . . . 4 V to 16 V
2OUT
8
Single-Supply Operation
FK PACKAGE
(TOP VIEW)
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix Types)
Ultra-Low Power . . . Typically 195 µW
at 25°C, V
= 5 V
DD
3
2
1
20 19
18
4IN+
1IN+
NC
4
5
6
7
8
Output Voltage Range includes Negative
Rail
NC
17
16
15
14
GND
NC
V
DD
12
High Input Impedance . . . 10 Ω Typ
NC
ESD-Protection Circuitry
3IN+
2IN+
9 10 11 12 13
Small-Outline Package Option Also
Available in Tape and Reel
Designed-In Latch-Up Immunity
description
NC – No internal connection
The TLC27L4 and TLC27L9 quad operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high
input impedance, extremely low power, and high
gain.
DISTRIBUTION OF TLC27L9
INPUT OFFSET VOLTAGE
40
35
30
25
20
15
10
5
299 Units Tested From 2 Wafer Lots
V
= 5 V
DD
= 25°C
T
A
These devices use Texas instrumentssilicon-gate
LinCMOS technology, which provides offset
voltage stability far exceeding the stability
available with conventional metal-gate pro-
cesses.
N Package
The extremely high input impedance, low bias
currents, and low-power consumption make
these cost-effective devices ideal for high-gain,
low- frequency, low-power applications. Four
offset voltage grades are available (C-suffix and
I-suffix types), ranging from the low-cost TLC27L4
(10 mV) to the high-precision TLC27L9 (900 µV).
These advantages, in combination with good
common-mode rejection and supply voltage
rejection, make these devices a good choice for
new state-of-the-art designs as well as for
upgrading existing designs.
0
–1200
–600
0
600
1200
V
IO
– Input Offset Voltage – µV
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
description (continued)
In general, many features associated with bipolar technology are available on LinCMOS operational
amplifiers, without the power penalties of bipolar technology. General applications such as transducer
interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the
TLC27L4 and TLC27L9. The devices also exhibit low voltage single-supply operation and ultra-low power
consumption, making them ideally suited for remote and inaccessible battery-powered applications. The
common-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC27L4 and TLC27L9 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in
handling these devices, as exposure to ESD may result in the degradation of the device parametric
performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
V
max
IO
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
PLASTIC
DIP
T
A
FORM
(Y)
TSSOP
(PW)
AT 25°C
(J)
(N)
900 µV
2 mV
TLC27L9CD
TLC27L4BCD
TLC27L4ACD
TLC27L4CD
TLC27L9ID
—
—
TLC27L9CN
TLC27L4BCN
TLC27L4ACN
TLC27L4CN
TLC27L9IN
—
—
—
—
—
—
0°C to 70°C
5 mV
—
—
—
—
10 mV
900 µV
2 mV
—
—
TLC27L4CPW
TLC27L4Y
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TLC27L4BID
TLC27L4AID
TLC27L4ID
—
—
—
—
TLC27L4BIN
TLC27L4AIN
TLC27L4IN
–40°C to 85°C
–55°C to 125°C
5 mV
10 mV
900 µV
10 mV
—
—
TLC27L9MD
TLC27L4MD
TLC27L9MFK
TLC27L4MFK
TLC27L9MJ
TLC27L4MJ
TLC27L9MN
TLC27L4MN
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC27L9CDR).
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
equivalent schematic (each amplifier)
V
DD
P3
P4
R6
R1
R2
N5
C1
IN–
IN+
P5
P6
P1
P2
R5
OUT
N3
D2
N1
R3
N2
D1
N4
N6
R7
N7
R4
GND
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
TLC27L4Y chip information
These chips, when properly assembled, display characteristics similar to the TLC27L4C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
DD
(4)
(14)
(11)
(8)
(13)
(12)
(10)
(9)
(3)
(2)
+
–
1IN+
1IN–
(1)
1OUT
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
–
(10)
(9)
68
+
–
3IN+
3IN–
(8)
3OUT
(12)
(13)
+
–
4IN+
4IN–
(14)
4OUT
(11)
GND
(2)
(3)
(6)
(1)
(5)
(4)
108
(7)
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
DD
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
ID
DD
DD
I
Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA
I
Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA
DD
Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
494 mW
715 mW
715 mW
819 mW
—
POWER RATING
A
D
FK
J
950 mW
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
12.6 mW/°C
5.6 mW/°C
608 mW
—
275 mW
275 mW
—
1375 mW
1375 mW
1575 mW
700 mW
880 mW
880 mW
N
1008 mW
448 mW
PW
—
recommended operating conditions
C SUFFIX
MIN MAX
I SUFFIX
M SUFFIX
UNIT
MIN MAX
MIN MAX
Supply voltage, V
3
–0.2
–0.2
0
16
3.5
8.5
70
4
–0.2
–0.2
–40
16
3.5
8.5
85
4
0
16
3.5
8.5
125
V
V
DD
V
V
= 5 V
DD
Common-mode input voltage, V
IC
Operating free-air temperature, T
= 10 V
0
DD
–55
°C
A
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC27L4C
TLC27L4AC
†
TLC27L4BC
TLC27L9C
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
25°C
Full range
25°C
1.1
10
12
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C
mV
0.9
240
200
5
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
25°C
6.5
S
L
V
IO
Input offset voltage
2000
3000
900
1500
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
25°C
S
L
µV
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
S
L
Average temperature coefficient of input
offset voltage
25°C to
70°C
α
1.1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
300
600
0.6
40
I
IB
pA
V
O
IC
–0.2
to
–0.3
to
25°C
4
4.2
Common mode input voltage range
(see Note 5)
V
ICR
–0.2
to
Full range
V
V
3.5
25°C
0°C
3.2
3
4.1
4.1
4.2
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
3
50
50
50
= –100 mV,
= 2.5 V to 2 V,
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
50
50
50
65
60
60
70
60
60
520
680
380
94
95
95
97
97
98
40
48
31
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
IC
70°C
25°C
0°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
dB
SVR
DD
O
(∆V
DD
/∆V )
IO
70°C
25°C
0°C
68
84
56
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (four amplifiers)
µA
DD
No load
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC27L4C
TLC27L4AC
†
TLC27L4BC
TLC27L9C
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
25°C
Full range
25°C
1.1
10
12
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C
mV
0.9
260
210
5
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
25°C
6.5
V
IO
Input offset voltage
2000
3000
1200
1900
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
25°C
µV
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
Average temperature coefficient of
input offset voltage
25°C to
70°C
α
1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 5 V,
= 5 V,
V
V
= 5 V
= 5 V
pA
IO
O
IC
300
600
0.7
50
I
IB
pA
V
O
IC
–0.2
to
–0.3
to
25°C
9
9.2
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
Full range
V
V
8.5
25°C
0°C
8
7.8
7.8
8.9
8.9
8.9
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
50
50
50
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
50
50
50
65
60
60
70
60
60
870
1020
660
97
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
97
IC
70°C
25°C
0°C
97
97
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
97
dB
SVR
DD
O
(∆V
DD
/∆V )
IO
70°C
25°C
0°C
98
57
92
132
80
= 5 V,
= 5 V,
O
IC
I
Supply current (four amplifiers)
72
µA
DD
No load
70°C
44
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC27L4I
TLC27L4AI
†
TLC27L4BI
TLC27L9I
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
10
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I
13
mV
0.9
240
200
5
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
25°C
7
S
L
V
IO
Input offset voltage
2000
3500
900
2000
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
25°C
S
L
µV
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
S
L
Average temperature coefficient of input
offset voltage
25°C to
85°C
α
1.1
µV/°C
VIO
25°C
85°C
25°C
85°C
0.1
24
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
1000
2000
0.6
200
I
IB
pA
V
O
IC
–0.2
to
–0.3
to
25°C
4
4.2
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
Full range
V
V
3.5
25°C
–40°C
85°C
3.2
3
4.1
4.1
4.2
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
3
25°C
50
50
50
= –100 mV,
= 0.25 V to 2 V,
I
–40°C
85°C
0
mV
V/mV
dB
OL
OL
0
25°C
50
50
50
65
60
60
70
60
60
480
900
330
94
95
95
97
97
98
39
62
29
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
–40°C
85°C
L
25°C
CMRR Common-mode rejection ratio
= V
min
ICR
–40°C
85°C
IC
25°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
–40°C
85°C
dB
SVR
DD
O
(∆V
DD
/∆V )
IO
25°C
68
108
52
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (four amplifiers)
–40°C
85°C
µA
DD
No load
†
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC27L4I
TLC27L4AI
†
TLC27L4BI
TLC27L9I
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
10
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I
13
mV
0.9
260
210
5
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
25°C
7
V
IO
Input offset voltage
2000
3500
1200
2900
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
25°C
µV
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
S
L
Full range
Average temperature coefficient of input
offset voltage
25°C to
85°C
α
1
µV/°C
VIO
25°C
85°C
25°C
85°C
0.1
26
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 5 V,
= 5 V,
V
V
= 5 V
=.5 V
pA
IO
O
IC
1000
2000
0.7
220
I
IB
pA
V
O
IC
–0.2
to
–0.3
to
25°C
9
9.2
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
Full range
V
V
8.5
25°C
–40°C
85°C
8
7.8
7.8
8.9
8.9
8.9
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
25°C
50
50
50
I
–40°C
85°C
0
mV
V/mV
dB
OL
OL
0
25°C
50
50
50
65
60
60
70
60
60
800
1550
585
97
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
–40°C
85°C
L
25°C
CMRR Common-mode rejection ratio
= V
min
ICR
–40°C
85°C
97
IC
98
25°C
97
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
–40°C
85°C
97
dB
SVR
DD
O
(∆V /∆V
DD IO
)
98
25°C
57
92
172
72
= 5 V,
= 5 V,
O
IC
I
Supply current (four amplifiers)
–40°C
85°C
98
µA
DD
No load
40
†
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC27L4M
TLC27L9M
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
10
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4M
TLC27L9M
mV
12
V
IO
Input offset voltage
200
900
3750
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
µV
S
L
Full range
Average temperature coefficient of input
offset voltage
25°C to
125°C
α
1.4
µV/°C
VIO
25°C
125°C
25°C
0.1
1.4
0.6
9
pA
nA
pA
nA
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
IO
O
IC
15
35
I
IB
O
IC
125°C
–0.2
to
–0.3
to
4.2
25°C
V
V
4
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
Full range
3.5
25°C
–55°C
125°C
25°C
3.2
3
4.1
4.1
4.2
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 1 MΩ
= 0
V
mV
V/mV
dB
OH
ID
ID
O
L
3
50
50
50
= –100 mV,
= 0.25 V to 2 V,
I
–55°C
125°C
25°C
0
OL
OL
0
50
25
25
65
60
60
70
60
60
480
950
200
94
95
85
97
97
98
39
69
27
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
–55°C
125°C
25°C
L
CMRR Common-mode rejection ratio
= V
min
ICR
–55°C
125°C
25°C
IC
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
–55°C
125°C
25°C
dB
SVR
DD
O
(∆V
DD
/∆V )
IO
68
120
48
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (four amplifiers)
–55°C
125°C
µA
DD
No load
†
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC27L4M
TLC27L9M
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
10
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC27L4M
TLC27L9M
mV
12
V
IO
Input offset voltage
210
1200
4300
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
µV
S
L
Full range
Average temperature coefficient of
input offset voltage
25°C to
125°C
α
1.4
µV/°C
VIO
25°C
125°C
25°C
0.1
1.8
0.7
10
pA
nA
pA
nA
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 5 V,
= 5 V,
V
V
= 5 V
= 5 V
IO
O
IC
15
35
I
IB
O
IC
125°C
0
to
9
–0.3
to
9.2
25°C
V
V
Common-mode input voltage range
(see Note 5)
V
ICR
0
to
Full range
8.5
25°C
–55°C
125°C
25°C
8
7.8
7.8
8.9
8.8
9
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 1 MΩ
= 0
V
mV
V/mV
dB
OH
ID
ID
O
L
0
50
50
50
I
–55°C
125°C
25°C
0
OL
OL
0
50
25
25
65
60
60
70
60
60
800
1750
380
97
97
91
97
97
98
57
111
35
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
–55°C
125°C
25°C
L
CMRR Common-mode rejection ratio
= V
min
ICR
–55°C
125°C
25°C
IC
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
–55°C
125°C
25°C
dB
SVR
DD
O
(∆V
DD
/∆V )
IO
92
192
60
= 5 V,
= 5 V,
O
IC
I
Supply current (four amplifiers)
–55°C
125°C
µA
DD
No load
†
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and Input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, V
noted)
= 5 V, T = 25°C (unless otherwise
DD
A
TLC27L4Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
V
IO
Input offset voltage
1.1
10
mV
α
Average temperature coefficient of input offset voltage
Input offset current (see Note 4)
T
= 25°C to 70°C
= 2.5 V,
1.1
0.1
0.6
µV/°C
pA
VIO
A
I
IO
I
IB
V
V
V
= 2.5 V
= 2.5 V
O
O
IC
Input bias current (see Note 4)
V
= 2.5 V,
pA
IC
–0.2
to
–0.3
to
4.2
V
ICR
Common-mode input voltage range (see Note 5)
V
4
V
V
High-level output voltage
V
V
V
V
V
V
= 100 mV,
R
= 1 MΩ
= 0
3.2
4.1
0
V
mV
V/mV
dB
OH
ID
ID
O
L
Low-level output voltage
= –100 mV,
= 0.25 V to 2 V,
I
50
68
OL
OL
A
VD
Large-signal differential voltage amplification
R
= 1 MΩ
50
65
70
520
94
97
L
CMRR Common-mode rejection ratio
= V
min
IC
ICR
= 5 V to 10 V,
k
Supply-voltage rejection ratio (∆V
/∆V
IO
)
V
V
= 1.4 V
dB
SVR
DD
DD
O
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (four amplifiers)
40
µA
DD
No load
electrical characteristics at specified free-air temperature, V = 10 V, T = 25°C (unless otherwise
DD
A
noted)
TLC27L4Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
V
IO
Input offset voltage
1.1
10
mV
α
Average temperature coefficient of input offset voltage
Input offset current (see Note 4)
T
= 25°C to 70°C
= 5 V,
1
0.1
0.7
µV/°C
pA
VIO
A
I
I
V
V
V
= 5 V
= 5 V
IO
O
O
IC
Input bias current (see Note 4)
V
= 5 V,
pA
IB
IC
–0.2
to
–0.3
to
9.2
V
ICR
Common-mode input voltage range (see Note 5)
V
9
V
V
High-level output voltage
V
V
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 1 MΩ
= 0
8
8.9
0
V
mV
V/mV
dB
OH
ID
ID
O
L
Low-level output voltage
I
50
92
OL
OL
A
VD
Large-signal differential voltage amplification
R
= 1 MΩ
50
65
70
870
97
97
L
CMRR Common-mode rejection ratio
= V
min
IC
DD
ICR
= 5 V to 10 V,
k
Supply-voltage rejection ratio (∆V
/∆V
IO
)
V
V
= 1.4 V
dB
SVR
DD
O
= 5 V,
= 5 V,
O
IC
I
Supply current (four amplifiers)
57
µA
DD
No load
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.03
0.03
0.03
0.02
MAX
25°C
0°C
V
V
= 1 V
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
See Figure 1
= 2.5 V
IPP
70°C
f = 1 kHZ,
See Figure 2
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
0°C
5
6
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 1
70°C
25°C
0°C
4.5
85
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
100
65
kHz
70°C
25°C
0°C
34°
36°
30°
V = 10 mV,
f = B ,
1
See Figure 3
I
L
φ
m
C
= 20 pF,
70°C
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.05
0.04
0.04
0.05
0.04
MAX
25°C
0°C
V
V
= 1 V
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
See Figure 1
= 5.5 V
IPP
70°C
f = 1 kHz
See Figure 2
R
= 20 Ω,
,
S
L
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
0°C
1
1.3
0.9
110
125
90
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 1
70°C
25°C
0°C
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
Unity-gain bandwidth
Phase margin
kHz
1
70°C
25°C
0°C
38°
40°
34°
V = 10 mV,
f = B ,
1
See Figure 3
I
L
φ
m
C
= 20 pF,
70°C
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.03
0.03
0.04
0.02
MAX
25°C
–40°C
85°C
V
V
= 1 V
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
25°C
See Figure 1
= 2.5 V
–40°C
85°C
IPP
f = 1 HZ,
See Figure 2
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
–40°C
85°C
5
7
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 1
4
25°C
85
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
–40°C
85°C
130
55
kHz
25°C
34°
38°
28°
V = 10 mV,
f = B ,
1
See Figure 3
I
L
φ
m
–40°C
85°C
C
= 20 pF,
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.06
0.03
0.04
0.05
0.03
MAX
25°C
–40°C
85°C
V
V
= 1 V
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
25°C
See Figure 1
= 2.5 V
–40°C
85°C
IPP
f = 1 HZ,
See Figure 2
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
–40°C
85°C
1
1.4
0.8
110
155
80
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 1
25°C
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
Unity-gain bandwidth
Phase margin
–40°C
85°C
kHz
1
25°C
38°
42°
32°
V = 10 mV,
f = B ,
1
See Figure 3
I
L
φ
m
–40°C
85°C
C
= 20 pF,
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L4M
TLC27L9M
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.02
0.03
0.04
0.02
MAX
25°C
–55°C
125°C
25°C
V
= 1 V
IPP
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
V
= 2.5 V
–55°C
125°C
f = 1 kHz,
See Figure 2
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
–55°C
125°C
25°C
5
8
V
R
= V
,
C
= 20 pF,
O
L
OH
= 1 MΩ,
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 1
3
85
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
Unity-gain bandwidth
Phase margin
–55°C
125°C
25°C
140
45
kHz
1
34°
39°
25°
V = 10 mV,
f = B ,
1
See Figure 3
I
φ
m
–55°C
125°C
C
= 20 pF,
L
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L4M
TLC27L9M
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.06
0.03
0.04
0.06
0.03
MAX
25°C
–55°C
125°C
25°C
V
= 1 V
IPP
IPP
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
V
= 5.5 V
–55°C
125°C
f = 1 kHz,
See Figure 2
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
25°C
70
nV/√Hz
25°C
–55°C
125°C
25°C
1
1.5
0.7
110
165
70
V
R
= V
,
C
= 20 pF,
O
L
OH
= 1 MΩ,
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 1
V = 10 mV,
I
See Figure 3
C = 20 pF,
L
Unity-gain bandwidth
Phase margin
–55°C
125°C
25°C
kHz
1
38°
43°
29°
V = 10 mV,
f = B ,
1
See Figure 3
I
φ
m
–55°C
125°C
C
= 20 F,
L
P
15
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TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
operating characteristics, V
= 5 V, T = 25°C
A
DD
TLC27L4Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
R
C
= 1 MΩ,
= 20 pF,
V
V
= 1 V
0.03
L
L
IPP
SR
Slew rate at unity gain
V/µs
= 2.5 V
0.03
70
See Figure 1
IPP
f = 1 kHz,
See Figure 2
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
nV/√Hz
kHz
V
R
= V
,
C
= 20 pF,
O
OH
= 1 MΩ,
B
B
5
85
OM
See Figure 1
C = 20 pF,
L
L
V = 10 mV,
I
See Figure 3
kHz
1
V = 10 mV,
f = B ,
1
See Figure 3
I
φ
m
Phase margin
34°
C
= 20 pF,
L
operating characteristics, V
= 10 V, T = 25°C
A
DD
TLC27L4Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
R
C
= 1 MΩ,
= 20 pF,
V
V
= 1 V
0.05
L
L
IPP
SR
Slew rate at unity gain
V/µs
= 5.5 V
0.04
70
See Figure 1
IPP
f = 1 kHz,
See Figure 2
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
nV/√Hz
kHz
V
R
= V
,
C
= 20 pF,
O
OH
= 1 MΩ,
B
OM
B
1
1
110
38°
See Figure 1
C = 20 pF,
L
L
V = 10 mV,
I
See Figure 3
kHz
V = 10 mV,
f = B ,
1
See Figure 3
I
φ
m
Phase margin
C
= 20 pF,
L
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L4 and TLC27L9 are optimized for single-supply operation, circuit configurations used for
the various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
thenegativerail. Acomparisonofsingle-supplyversussplit-supplytestcircuitsisshownbelow. Theuseofeither
circuit gives the same result.
V
DD
V
DD+
–
+
–
V
O
V
O
+
V
I
V
I
C
R
C
R
L
L
L
L
V
DD–
(b) SPLIT SUPPLY
(a) SINGLE SUPPLY
Figure 1. Unity-Gain Amplifier
2 kΩ
2 kΩ
V
–
DD
V
DD+
20 Ω
20 Ω
–
1/2 V
V
O
V
O
DD
+
+
20 Ω
20 Ω
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 2. Noise-Test Circuit
10 kΩ
10 kΩ
V
DD+
V
DD
100 Ω
–
100 Ω
V
I
–
V
I
V
L
O
V
O
+
+
1/2 V
DD
C
C
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
input bias current
Becauseof the high input impedance of the TLC27L4 and TLC27L9 operational amplifiers, attempts to measure
the input bias current can result in erroneous readings. The bias current at normal room ambient temperature
is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are
offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using
a picoammeter) with no device in the test socket. The actual input bias current can then be calculated
by subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires that a
device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not
feasible using this method.
7
1
V = V
IC
8
14
Figure 4. Isolation Metal Around Device Inputs (J and N packages)
low-level output voltage
To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. If conditions other than these are to
be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generallymeasuredbymonitoringthedistortionleveloftheoutputwhileincreasingthefrequencyofasinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency, without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. Thefrequencyisthenincreaseduntilthemaximumpeak-to-peakoutputcannolongerbemaintained
(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(a) f = 100 Hz
(b) B
OM
> f > 100 Hz
(c) f = B
OM
(d) f > B
OM
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
6, 7
V
Input offset voltage
Distribution
Distribution
IO
α
Temperature coefficient
8, 9
VIO
vs High-level output current
vs Supply voltage
vs Free-air temperature
10, 11
12
13
V
High-level output voltage
Low-level output voltage
OH
vs Common-mode input voltage
vs Differential input voltage
vs Free-air temperature
14, 15
16
17
V
OL
vs Low-level output current
18, 19
vs Supply voltage
vs Free-air temperature
vs Frequency
20
21
32, 33
A
VD
Differential voltage amplification
I
/I
Input bias and input offset current
Common-mode input voltage
vs Free-air temperature
vs Supply voltage
22
23
IB IO
V
IC
vs Supply voltage
vs Free-air temperature
24
25
I
Supply current
Slew rate
DD
vs Supply voltage
vs Free-air temperature
26
27
SR
Normalized slew rate
vs Free-air temperature
vs Frequency
28
29
V
Maximum peak-to-peak output voltage
O(PP)
vs Free-air temperature
vs Supply voltage
30
31
B
1
Unity-gain bandwidth
vs Supply voltage
vs Free-air temperature
vs Capacitive loads
34
35
36
φ
Phase margin
m
V
Equivalent input noise voltage
Phase shift
vs Frequency
vs Frequency
37
n
φ
32, 33
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC27L4
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27L4
INPUT OFFSET VOLTAGE
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
905 Amplifiers Tested From 6 Wafer Lots
905 Amplifiers Tested From 6 Wafer Lots
V
= 5 V
V
T
= 10 V
DD
= 25°C
DD
= 25°C
T
A
A
N Package
N Package
–5 –4 –3 –2 –1
0
1
2
3
4
5
–5 –4 –3 –2 –1
0
1
2
3
4
5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 6
Figure 7
DISTRIBUTION OF TLC27L4 AND TLC27L9
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27L4 AND TLC27L9
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
356 Amplifiers Tested From 6 Wafer Lots
356 Amplifiers Tested From 8 Wafer Lots
V
= 10 V
V
= 5 V
DD
= 25°C to 125°C
A
DD
= 25°C to 125°C
T
T
A
N Package
Outliers:
N Package
Outliers:
(1) 18.7 µV/°C
(1) 11.6 µV/°C
(1) 19.2 µV/°C
(1) 12.1 µV/°C
–10 –8 –6 –4 –2
0
2
4
6
8
10
–10 –8 –6 –4 –2
0
2
4
6
8
10
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 8
Figure 9
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4
3
2
1
0
16
14
12
10
8
V
T
A
= 100 mV
ID
= 25°C
V
= 100 mV
ID
= 25°C
T
A
V
= 16 V
DD
V
DD
= 5 V
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
6
4
2
0
0
–2
–4
–6
–8
–10
0
–5 –10 –15
–20 –25
–30 –35 –40
– High-Level Output Current – mA
I
– High-Level Output Current – mA
OH
I
OH
Figure 10
Figure 11
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
16
14
12
10
8
V
V
V
V
–1.6
–1.7
–1.8
–1.9
DD
DD
DD
DD
V
R
T
A
= 100 mV
= 1 MΩ
= 25°C
ID
L
I
V
= –5 mA
= 100 mV
OH
ID
V
DD
= 5 V
V
–2
DD
V
= 10 V
DD
6
V
DD
V
DD
V
DD
V
DD
–2.1
–2.2
–2.3
–2.4
4
2
0
0
2
4
V
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
– Supply Voltage – V
DD
T
A
– Free-Air Temperature – °C
Figure 12
Figure 13
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
500
450
400
350
300
250
700
650
V
I
= 5 V
= 5 mA
DD
OL
V
I
= 10 V
= 5 mA
DD
OL
T
A
= 25°C
T
A
= 25°C
600
550
V
= –100 mV
ID
V
V
V
= –100 mV
= –1 V
ID
ID
ID
500
450
= –2.5 V
400
350
V
= –1 V
ID
300
0
1
2
3
4
5
6
7
8
9
10
0
0.5
V
1
1.5
2
2.5
3
3.5
4
V
IC
– Common-Mode Input Voltage – V
– Common-Mode Input Voltage – V
IC
Figure 14
Figure 15
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
800
700
600
500
400
300
200
100
0
900
800
700
600
500
400
300
200
100
0
I
OL
= 5 mA
= –1 V
= 0.5 V
I
= 5 mA
OL
V
V
V
= |V /2|
ID
= 25°C
ID
IC
IC
T
A
V
= 5 V
DD
V
= 5 V
DD
V
DD
= 10 V
V
= 10 V
DD
–75 –50 –25
0
25
50
75
100 125
0
–2
–4
–6
–8
–10
T
A
– Free-Air Temperature – °C
V
ID
– Differential Input Voltage – V
Figure 16
Figure 17
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
vs
LOW-LEVEL OUTPUT CURRENT
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3
2.5
2
V
V
T
= –1 V
= 0.5 V
= 25°C
ID
IC
A
V
V
T
= –1 V
= 0.5 V
ID
IC
= 25°C
V
DD
= 16 V
A
V
= 5 V
DD
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
1.5
1
0.5
0
0
1
2
3
4
5
6
7
8
0
5
10
15
20
25
30
I
– Low-Level Output Current – mA
I
– Low-Level Output Current – mA
OL
OL
Figure 18
Figure 19
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
2000
1800
1600
1400
1200
1000
800
2000
1800
1600
1400
1200
1000
800
T
A
= –55°C
R
= 1 MΩ
R
= 1 MΩ
L
L
T
= –40°C
= 0°C
A
T
A
V
DD
= 10 V
T
= 25°C
= 70°C
A
T
A
T
A
= 85°C
600
600
V
DD
= 5 V
400
400
T
A
= 125°C
200
200
0
0
–75 –50 –25
0
25
50
75
100 125
0
2
4
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 20
Figure 21
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
10000
1000
100
10
V
V
= 10 V
DD
= 5 V
16
14
12
10
8
IC
T
A
= 25°C
See Note A
I
IB
I
IO
6
1
4
2
0.1
25
45
65
85
105
125
0
T
A
– Free-Air Temperature – °C
0
2
4
6
8
10
12
14
16
V
DD
– Supply Voltage – V
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 22
Figure 23
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
180
120
100
V
= V /2
DD
T = –55°C
A
V
O
= V /2
DD
O
160
140
120
100
80
No Load
No Load
T
= –40°C
A
80
60
40
20
0
T
= 0°C
= 25°C
= 70°C
A
T
T
T
A
A
A
V
DD
= 10 V
= 125°C
60
V
DD
= 5 V
40
20
0
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
– Free-Air Temperature – °C
A
Figure 24
Figure 25
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
SLEW RATE
vs
FREE-AIR TEMPERATURE
SLEW RATE
vs
SUPPLY VOLTAGE
0.07
0.07
R
C
= 1 MΩ
= 20 pF
= 1
L
L
A
= 1
= 1 V
= 1 mΩ
= 20 pF
= 25°C
V
V
= 10 V
= 5.5 V
V
DD
V
R
C
0.06
0.05
0.04
0.03
0.02
0.01
0.00
IPP
IPP
0.06
0.05
0.04
0.03
0.02
0.01
0.00
A
V
L
L
See Figure 1
T
A
See Figure 1
V
V
= 10 V
= 1 V
DD
IPP
V
V
= 5 V
= 1 V
DD
IPP
V
V
= 5 V
= 2.5 V
DD
IPP
–75 –50 –25
0
25
50
75
100 125
0
2
4
V
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
– Supply Voltage – V
DD
Figure 26
Figure 27
NORMALIZED SLEW RATE
vs
FREE-AIR TEMPERATURE
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
1.4
1.3
1.2
1.1
1
10
A
= 1
V
9
8
7
6
5
4
3
2
1
0
V
IPP
= 1 V
= 1 MΩ
= 20 pF
V
= 10 V
DD
R
L
L
T
= 125°C
= 25°C
A
C
V
= 10 V
= 5 V
DD
T
A
T
A
V
DD
= 5 V
= –55°C
V
DD
0.9
0.8
0.7
0.6
0.5
R
= 1 MΩ
L
See Figure 1
–75 –50 –25
0
25
50
75
100 125
0.1
1
10
100
T
A
– Free-Air Temperature – °C
f – Frequency – kHz
Figure 28
Figure 29
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
140
130
120
110
100
90
150
130
110
90
V = 10 mV
V
= 5 V
I
DD
V = 10 mV
C
= 20 pF
L
I
C
= 20 pF
T
= 25°C
L
A
See Figure 3
See Figure 3
80
70
70
50
60
50
30
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 30
Figure 31
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
V
= 5 V
= 1 MΩ
= 25°C
DD
R
L
T
A
0°
30°
A
VD
60°
90°
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
Figure 32
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
†
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
V
R
= 10 V
= 1 MΩ
= 25°C
DD
L
T
A
0°
30°
A
VD
60°
90°
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
Figure 33
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
40°
42°
40°
38°
36°
34°
32°
30°
V
= 5 mV
V = 10 mV
DD
V = 10 mV
I
38°
36°
34°
32°
30°
28°
26°
24°
22°
20°
C
= 20 pF
I
L
C
= 20 pF
T
A
= 25°C
L
See Figure 3
See Figure 3
–75 –50 –25
0
25
50
75
100 125
0
2
4
6
8
10
12
14
16
T
– Free-Air Temperature – °C
V
– Supply Voltage – V
A
DD
Figure 34
Figure 35
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
CAPACITIVE LOAD
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
37°
35°
33°
31°
29°
27°
25°
200
V
= 5 mV
V
R
= 5 V
= 20 Ω
DD
DD
S
V = 10 mV
I
T
A
175
150
125
100
75
= 25°C
T
A
= 25°C
See Figure 2
See Figure 3
50
25
0
0
20
40
60
80
100
1
10
100
1000
C
– Capacitive Load – pF
f – Frequency – Hz
L
Figure 36
Figure 37
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
single-supply operation
While the TLC27L4 and TLC27L9 perform well using dual power supplies (also called balanced or split
supplies), the design is optimized for single-supply operation. This design includes an input common-mode
voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The
supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly
available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is
recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC27L4 and TLC27L9 permits the use of very large resistive values to
implement the voltage divider, thus minimizing power consumption.
The TLC27L4 and TLC27L9 work well in conjunction with digital logic; however, when powering both linear
devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.
V
DD
R4
R1
R2
R3
R3
R1 + R3
–
V
= V
DD
REF
V
I
V
O
+
R4
R2
+ V
V
O
= (V
– V )
REF I
REF
V
REF
C
0.01 µF
Figure 38. Inverting Amplifier With Voltage Reference
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
single-supply operation (continued)
–
+
Power
Supply
Logic
Logic
Logic
Output
(a) COMMON SUPPLY RAILS
–
+
Power
Supply
Output
Logic
Logic
Logic
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Figure 39. Common Versus Separate Supply Rails
input characteristics
The TLC27L4 and TLC27L9 are specified with a minimum and a maximum input voltage that, if exceeded at
either input, could cause the device to malfunction. Exceeding this specified range is a common problem,
especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper
range limit is specified at V
– 1 V at T = 25°C and at V
– 1.5 V at all other temperatures.
DD
A
DD
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L4 and TLC27L9
very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage
drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27L4 and
TLC27L9 are well suited for low-level signal processing; however, leakage currents on printed circuit boards
and sockets can easily exceed bias current requirements and cause a degradation in device performance. It
is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TLC27L4 and TLC27L9 result in a very low
noise current, which is insignificant in most applications. This feature makes the devices especially favorable
over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit
greater noise currents.
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
noise performance (continued)
–
–
+
–
V
I
V
O
V
O
V
O
+
+
V
I
V
I
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27L4 and TLC27L9 is designed to sink and source relatively high amounts of current
(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can
cause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC27L4 and TLC27L9 were measured using a 20-pF load. The devices
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole
occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many
cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
(a) C = 20 pF, R = NO LOAD
(b) C = 260 pF, R = NO LOAD
L
L
L
L
2.5 V
–
+
V
O
V
I
C
T = 25°C
A
L
f = 1 kHz
= 1 V
V
IPP
–2.5 V
(d) TEST CIRCUIT
(c) C = 310 pF, R = NO LOAD
L
L
Figure 41. Effect of Capacitive Loads and Test Circuit
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
output characteristics (continued)
Although the TLC27L4 and TLC27L9 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (Rb) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of R , a voltage offset from 0 V at the output occurs. Second, pullup resistor R acts as a drain
P
P
load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying
the output current.
C
V
DD
V
I
R
P
+
I
P
V
– V
O
–
DD
+ I + I
P
Rp =
I
F
V
O
L
–
V
O
I
= Pullup current
+
P
I
F
required by the
operational amplifier
(typically 500 µA)
R2
I
L
R
R1
L
Figure 43. Compensation for
Input Capacitance
Figure 42. Resistive Pullup to Increase V
OH
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.
electrostatic discharge protection
The TLC27L4 and TLC27L9 incorporate an internal electrostatic discharge (ESD) protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L4 and
TLC27L9 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
latch-up (continued)
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
1/4
TLC27L4
+
–
V
O1
500 kΩ
5 V
500 kΩ
–
+
V
O2
1/4
TLC27L4
0.1 µF
500 kΩ
500 kΩ
Figure 44. Multivibrator
100 kΩ
V
DD
100 kΩ
100 kΩ
Set
+
–
V
O
1/4
TLC27L4
Reset
33 kΩ
NOTE: V
= 5 V to 16 V
DD
Figure 45. Set/Reset Flip-Flop
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
V
DD
1/4
TLC27L9
V
I
+
–
V
O
90 kΩ
V
DD
C
S
S
X1
1
B
B
1
2
TLC4066
SELECT
S
S
2
100
A
C
1
1
A
V
10
9 kΩ
1 kΩ
X2
2
Analog
Switch
A
2
NOTE: V
= 5 V to 12 V
DD
Figure 46. Amplifier With Digital Gain Selection
10 kΩ
V
DD
20 kΩ
–
+
V
I
V
O
1/4
TLC27L4
100 kΩ
NOTE: V
= 5 V to 16 V
DD
Figure 47. Full-Wave Rectifier
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
APPLICATION INFORMATION
0.016 µF
5 V
10 kΩ
10 kΩ
V
I
+
–
V
O
0.016 µF
1/4
TLC27L4
NOTE: Normalized to F = 1 kHz and R = 10 kΩ
C
L
Figure 48. Two-Pole Low-Pass Butterworth Filter
R2
100 kΩ
V
DD
R1
10 kΩ
V
V
IA
+
–
V
O
1/4
TLC27L9
IB
R1
10 kΩ
R2
100 kΩ
NOTE: V
DD
= 5 V to 16 V
R2
R1
V
V
V
O
IB
IA
Figure 49. Difference Amplifier
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
TLC27L4ACD
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
27L4AC
TLC27L4ACDG4
TLC27L4ACDR
TLC27L4ACDRG4
TLC27L4ACN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
D
N
N
D
D
D
D
N
N
D
D
D
D
N
50
2500
2500
25
Green (RoHS
& no Sb/Br)
0 to 70
27L4AC
Green (RoHS
& no Sb/Br)
0 to 70
27L4AC
Green (RoHS
& no Sb/Br)
0 to 70
27L4AC
Pb-Free
(RoHS)
0 to 70
TLC27L4ACN
TLC27L4ACN
27L4AI
TLC27L4ACNE4
TLC27L4AID
25
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 70
50
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
TLC27L4AIDG4
TLC27L4AIDR
TLC27L4AIDRG4
TLC27L4AIN
50
Green (RoHS
& no Sb/Br)
27L4AI
2500
2500
25
Green (RoHS
& no Sb/Br)
27L4AI
Green (RoHS
& no Sb/Br)
27L4AI
Pb-Free
(RoHS)
TLC27L4AIN
TLC27L4AIN
27L4BC
TLC27L4AINE4
TLC27L4BCD
25
Pb-Free
(RoHS)
N / A for Pkg Type
50
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
TLC27L4BCDG4
TLC27L4BCDR
TLC27L4BCDRG4
TLC27L4BCN
50
Green (RoHS
& no Sb/Br)
0 to 70
27L4BC
2500
2500
25
Green (RoHS
& no Sb/Br)
0 to 70
27L4BC
Green (RoHS
& no Sb/Br)
0 to 70
27L4BC
Pb-Free
(RoHS)
0 to 70
TLC27L4BCN
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TLC27L4BCNE4
TLC27L4BID
ACTIVE
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
N
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
TLC27L4BCN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
D
D
50
50
Green (RoHS
& no Sb/Br)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
27L4BI
TLC27L4BIDG4
TLC27L4BIDR
TLC27L4BIDRG4
TLC27L4BIN
Green (RoHS
& no Sb/Br)
27L4BI
D
2500
2500
25
Green (RoHS
& no Sb/Br)
27L4BI
D
Green (RoHS
& no Sb/Br)
27L4BI
N
Pb-Free
(RoHS)
TLC27L4BIN
TLC27L4BIN
TLC27L4C
TLC27L4C
TLC27L4C
TLC27L4C
TLC27L4CN
TLC27L4CN
TLC27L4
TLC27L4
P27L4C
TLC27L4BINE4
TLC27L4CD
N
25
Pb-Free
(RoHS)
D
50
Green (RoHS
& no Sb/Br)
TLC27L4CDG4
TLC27L4CDR
TLC27L4CDRG4
TLC27L4CN
D
50
Green (RoHS
& no Sb/Br)
0 to 70
D
2500
2500
25
Green (RoHS
& no Sb/Br)
0 to 70
D
Green (RoHS
& no Sb/Br)
0 to 70
N
Pb-Free
(RoHS)
0 to 70
TLC27L4CNE4
TLC27L4CNSR
TLC27L4CNSRG4
TLC27L4CPW
TLC27L4CPWG4
TLC27L4CPWLE
N
25
Pb-Free
(RoHS)
0 to 70
NS
NS
PW
PW
PW
2000
2000
90
Green (RoHS
& no Sb/Br)
0 to 70
SO
Green (RoHS
& no Sb/Br)
0 to 70
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
0 to 70
90
Green (RoHS
& no Sb/Br)
0 to 70
P27L4C
TBD
0 to 70
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TLC27L4CPWR
TLC27L4CPWRG4
TLC27L4ID
ACTIVE
TSSOP
TSSOP
SOIC
PW
14
14
14
14
14
14
14
14
14
14
14
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
P27L4C
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PW
D
2000
50
Green (RoHS
& no Sb/Br)
0 to 70
P27L4C
Green (RoHS
& no Sb/Br)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
TLC27L4I
TLC27L4I
TLC27L4I
TLC27L4I
TLC27L4IN
TLC27L4IN
P27L4I
TLC27L4IDG4
TLC27L4IDR
SOIC
D
50
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
25
Green (RoHS
& no Sb/Br)
TLC27L4IDRG4
TLC27L4IN
SOIC
D
Green (RoHS
& no Sb/Br)
PDIP
N
Pb-Free
(RoHS)
TLC27L4INE4
TLC27L4IPW
PDIP
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
90
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLC27L4IPWG4
TLC27L4IPWR
TLC27L4IPWRG4
90
Green (RoHS
& no Sb/Br)
P27L4I
2000
2000
Green (RoHS
& no Sb/Br)
P27L4I
Green (RoHS
& no Sb/Br)
P27L4I
TLC27L4MFKB
TLC27L4MJ
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
FK
J
20
14
14
14
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-55 to 125
-55 to 125
-55 to 125
0 to 70
TLC27L4MJB
TLC27L9CD
J
Call TI
Call TI
D
50
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC27L9C
TLC27L9C
TLC27L9C
TLC27L9C
TLC27L9CDG4
TLC27L9CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
14
14
14
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
0 to 70
0 to 70
0 to 70
2500
2500
Green (RoHS
& no Sb/Br)
TLC27L9CDRG4
Green (RoHS
& no Sb/Br)
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TLC27L9CN
TLC27L9CNE4
TLC27L9CNSR
TLC27L9CNSRG4
TLC27L9ID
ACTIVE
PDIP
PDIP
SO
N
14
14
14
14
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
TLC27L9CN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
N
NS
NS
D
25
2000
2000
50
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 70
TLC27L9CN
TLC27L9
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
SO
Green (RoHS
& no Sb/Br)
0 to 70
TLC27L9
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
Green (RoHS
& no Sb/Br)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
TLC27L9I
TLC27L9I
TLC27L9I
TLC27L9I
TLC27L9IN
TLC27L9IN
TLC27L9IDG4
TLC27L9IDR
D
50
Green (RoHS
& no Sb/Br)
D
2500
2500
25
Green (RoHS
& no Sb/Br)
TLC27L9IDRG4
TLC27L9IN
D
Green (RoHS
& no Sb/Br)
N
Pb-Free
(RoHS)
TLC27L9INE4
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
TLC27L9MFKB
TLC27L9MJ
OBSOLETE
OBSOLETE
OBSOLETE
LCCC
CDIP
CDIP
FK
J
20
14
14
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
-55 to 125
-55 to 125
-55 to 125
TLC27L9MJB
J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC27L4ACDR
TLC27L4ACDR
TLC27L4AIDR
TLC27L4BCDR
TLC27L4BIDR
TLC27L4CDR
TLC27L4CDR
TLC27L4CNSR
TLC27L4CPWR
TLC27L4IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SO
D
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
2500
2500
2500
2500
2500
2500
2500
2000
2000
2500
2000
2500
2000
2500
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
16.4
16.4
16.4
16.4
12.4
16.4
12.4
16.4
16.4
16.4
6.5
6.5
6.5
6.5
6.5
6.5
6.5
8.2
6.9
6.5
6.9
6.5
8.2
6.5
9.0
9.0
9.0
9.0
9.0
9.0
9.0
10.5
5.6
9.0
5.6
9.0
10.5
9.0
2.1
2.1
2.1
2.1
2.1
2.1
2.1
2.5
1.6
2.1
1.6
2.1
2.5
2.1
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
8.0
8.0
8.0
8.0
12.0
8.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
12.0
16.0
12.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
D
D
D
D
D
NS
PW
D
TSSOP
SOIC
TSSOP
SOIC
SO
TLC27L4IPWR
TLC27L9CDR
TLC27L9CNSR
TLC27L9IDR
PW
D
NS
D
SOIC
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jul-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC27L4ACDR
TLC27L4ACDR
TLC27L4AIDR
TLC27L4BCDR
TLC27L4BIDR
TLC27L4CDR
TLC27L4CDR
TLC27L4CNSR
TLC27L4CPWR
TLC27L4IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SO
D
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
2500
2500
2500
2500
2500
2500
2500
2000
2000
2500
2000
2500
2000
2500
367.0
333.2
367.0
367.0
367.0
367.0
333.2
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
345.9
367.0
367.0
367.0
367.0
345.9
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
28.6
38.0
38.0
38.0
38.0
28.6
38.0
35.0
38.0
35.0
38.0
38.0
38.0
D
D
D
D
D
NS
PW
D
TSSOP
SOIC
TSSOP
SOIC
SO
TLC27L4IPWR
TLC27L9CDR
TLC27L9CNSR
TLC27L9IDR
PW
D
NS
D
SOIC
Pack Materials-Page 2
IMPORTANT NOTICE
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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