BD30FC0WEFJ [ROHM]
BD30FC0WEFJ是可提供最大1A电流的低饱和型稳压器。BDxxFC0WEFJ系列有可通过外部电阻设定输出电压的可变型和固定型产品。封装组件采用HTSOP-J8。本系列内置防止因输出短路等发生IC破坏的过电流保护、以及防止因过负荷状态等使IC发生热破坏的过热保护电路。;型号: | BD30FC0WEFJ |
厂家: | ROHM |
描述: | BD30FC0WEFJ是可提供最大1A电流的低饱和型稳压器。BDxxFC0WEFJ系列有可通过外部电阻设定输出电压的可变型和固定型产品。封装组件采用HTSOP-J8。本系列内置防止因输出短路等发生IC破坏的过电流保护、以及防止因过负荷状态等使IC发生热破坏的过热保护电路。 过电流保护 稳压器 |
文件: | 总12页 (文件大小:416K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Secondary LDO Regulators
Secondary
Variable Output LDO Regulator
No.10026EAT10
BD00IA5WEFJ
●Description
BD00IA5WEFJ is a LDO regulator with output current 0.5A. The output accuracy is ±1% of output voltage. With external
resistance, it is available to set the output voltage at random (from 0.8V to 5.5V) and also provides output voltage fixed type
without external resistance. It is used for the wide applications of digital appliances. It has package type: HTSOP-J8.
Over current protection (for protecting the IC destruction by output short circuit), circuit current ON/OFF switch (for setting
the circuit 0µA at shutdown mode), and thermal shutdown circuit (for protecting IC from heat destruction by over load
condition) are all built in. It is usable for ceramic capacitor and enables to improve smaller set and long-life.
●Features
1) Output current 0.5A
2) High accuracy reference voltage circuit
3) Built-in Over Current Protection circuit (OCP)
4) Built-in Thermal Shut Down circuit (TSD)
5) With shut down switch
6) Output voltage variable type (0.8V to 4.5V)
7) Package: HTSOP-J8
●Output voltage differential Line up
Product name
BD00IA5WEFJ
Variable
Package
○
HTSOP-J8
Product name : B D 0 0 I C 0 W E F J
a
b
c
d
e
Signal
a
Description
Output voltage (V)
00
Variable
Voltage resistance(V)
E
F
24V
H
I
10V
7V
b
c
20V
15V
G
Output current (A)
A1
A3
A5
0.1A
0.3A
0.5A
C0
C5
D0
1.0A
1.5A
2.0A
Shutdown switch
d
e
“W”
Shutdown switch is built in
“
”
Shutdown switch is not built in
Package
EFJ
HTSOP-J8
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2010.10 - Rev.A
1/11
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD00IA5WEFJ
●Absolute maximum ratings (Ta=25℃)
Parameter
Symbol
Ratings
Unit
Power supply voltage
EN voltage
Vcc
VEN
7.0 *1
7.0
V
V
Output voltage
VOUT
7.0
V
Feedback voltage
VFB
7.0
V
Power dissipation
HTSOP-J8
Pd*2
Topr
Tstg
Tjmax
2110 *2
-25~+85
-55~+150
+150
mW
℃
℃
℃
Operating Temperature Range
Storage Temperature Range
Junction Temperature
*1
*2
Not to exceed Pd
Reduced by 16.9mW/℃ for each increase in Ta of 1℃ over 25℃. (when mounted on a board 70mm×70mm×1.6mm glass-epoxy board, two layer)
●Operating conditions (Ta=25℃)
Ratings
Parameter
Symbol
Unit
Min.
2.4
0.0
0.8
0.0
Max.
5.5
Input power supply voltage
EN voltage
Vcc
VEN
Vo
V
V
V
A
5.5
Output voltage setting range
4.5
Output current
Io
0.5
This product should not be used in a radioactive environment.
●Electrical characteristics (Unless otherwise noted, Ta=25℃, EN=3V, Vcc=3.3V, R1=16kΩ, R2=7.5kΩ)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
0
Max.
5
Circuit current at shutdown mode
Bias current
Isd
Icc
-
µA
µA
mV
mV
V
EN=0V, OFF mode
-
250
25
25
0.4
0.800
-
500
50
Line regulation
Reg.I
Reg Io
Vco
-
Vcc=( Vo+0.6V )→5.5V
Io=0→0.5A
Load regulation
-
75
Minimun dropout Voltage
Output reference voltage
EN Low voltage
-
0.792
0
0.6
0.808
0.8
5.5
9
Vcc=3.3V,Io=0.5A
Io=0mA
VFB
V
VEN (Low)
VEN (High)
IEN
V
EN High voltage
2.4
1
-
V
EN Bias current
3
µA
●I/O Equivalent circuits
8pin(VCC) / 1pin(VO)
2pin(FB)
5pin(EN)
2pin(FB)
8pin(Vcc)
5pin(EN)
Vcc
1pin(Vo)
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2010.10 - Rev.A
2/11
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD00IA5WEFJ
●Reference Data (Unless otherwise noted, Ta=25℃, EN=3V, Vcc=3.3V, R1=16kΩ, R2=7.5kΩ)
EN
1V/div
Vo
Vo
0.1V/div
0.1V/div
Vcc
2V/div
Io
Io
0.2A/div
0.2A/div
Vo
2V/div
10µsec / div
10usec / div
1msec/div
Fig.2 Transient Response (1.0→0A)
Fig.1 Transient Response(0→1.0A)
Fig.3 Input sequence 1
Co=1µF
Co=1µF
Co=1µF
EN
EN
EN
1V/div
1V/div
1V/div
Vcc
Vcc
Vcc
2V/div
2V/div
2V/div
Vo
Vo
Vo
2V/div
2V/div
2V/div
40msec/div
500µsec / div
20msec / div
Fig.4 OFF sequence 1
Fig.5 Inpurt sequence 2
Co=1µF
Fig.6 OFF sequence 2
Co=1µF
Co=1µF
450
350
250
150
50
5.0
4.0
3.0
2.0
1.0
0.0
2.7
2.6
2.5
2.4
2.3
-25
0
25
Ta
50
75 85
-25
0
25
50
75 85
-25
0
25
50
75 85
[℃]
Ta
[℃]
Ta
[℃]
Fig.7 Ta-Vo (Io=0mA)
Fig.8 Ta-Icc
Fig.9 Ta-Isd
(VEN=0V)
8.0
6.0
4.0
2.0
0.0
2.7
2.6
2.5
2.4
2.3
5.0
4.0
3.0
2.0
1.0
0.0
-25
0
25
Ta
50
75 85
0
0.2
0.4
0.6
Io [A]
0.8
1
0
1
2
3
4
5 5.5
[℃]
Vcc [V]
Fig.10 Ta-IEN
Fig.11 Io-Vo
Fig.12 Vcc-Isd
(VEN=0V)
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
3/11
Technical Note
BD00IA5WEFJ
●Reference Data
3.0
2.0
1.0
0.0
3
2
1
0
4
3
2
1
0
100
120
140
160
[℃]
180
200
0
0.2
0.4
0.6
Io [A]
0.8
1
0
1
2
3
4
5 5.5
Ta
Vcc [V]
Fig.13 Vcc-Vo (Io=0mA)
Fig.14 TSD (Io=0mA)
Fig.15 OCP
400
300
200
100
0
10.00
1.00
0.10
0.01
0.6
0.5
0.4
0.3
Safety area
0
0.2
0.4
Io [A]
0.6
0.8
1
0
0.1
0.2
0.3
Io [A]
0.4
0.5
-25
0
25
Ta
50
75 85
[℃]
Fig.18 Io-Icc
Fig.16 Minimum dropout Voltage 1
(Vcc=3.3V, Io=-0.5A)
Fig.17 ESR Condencer
100
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.6
0.5
0.4
0.3
0.2
0.1
0.0
80
60
40
20
0
0.1
1
10
100
0
0.1
0.2
0.3
Io [A]
0.4
0.5
0
0.1
0.2
0.3
Io [A]
0.4
0.5
Frequency [kHz]
Fig.19 PSRR(Io=0mA)
Fig.20 Minimum dropout Voltage 2
Fig.21 Minimum dropout Voltage 3
(Vcc=2.4V, Ta=25℃)
(Vcc=3.3V, Ta=25℃)
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
0.1
0.2
0.3
Io [A]
0.4
0.5
Fig.22 Minimum dropout Voltage 4
(Vcc=5.0V, Ta=25℃)
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
4/11
Technical Note
BD00IA5WEFJ
●Heat Dissipation Characteristics
◎HTSOP-J8
4.0
Measure condition: mounted on a ROHM board, and IC
Substrate size: 70mm × 70mm × 1.6mm
⑤3.76W
(Substrate with thermal via)
・Solder the substrate and package reverse exposure heat radiation part
3.0
① IC only
θj-a=249.5℃/W
② 1-layer(copper foil are :0mm×0mm)
θj-a=153.2℃/W
③ 2-layer(copper foil are :15mm×15mm)
θj-a=113.6℃/W
④2.11W
2.0
④ 2-layer(copper foil are :70mm×70mm)
θj-a=59.2℃/W
⑤ 4-layer(copper foil are :70mm×70mm)
θj-a=33.3℃/W
③1.10W
1.0
②0.82W
①0.50W
0.0
0
25
50
75
100
125
150
Ambient Temperature: Ta [℃]
●About Input-to-output capacitor
It is recommended that a capacitor is placed nearby pin between Input pin and GND, output pin and GND.
A capacitor, between input pin and GND, is valid when the power supply impedance is high or drawing is long. Also as for a
capacitor, between output pin and GND, the greater the capacity, more sustainable the line regulation and it makes
improvement of characteristics by load change. However, please check by mounted on a board for the actual application.
Ceramic capacitor usually has difference, thermal characteristics and series bias characteristics, and moreover capacity
decreases gradually by using conditions.
For more detail, please be sure to inquire the manufacturer, and select the best ceramic capacitor.
Ceramic capacitor capacity- DC bias characteristics
(Characteristics example)
10 Voltage resistance
B1 characteristics
GRM188B11A105KA61D
10
0
-10
10 Voltage resistance
-20
B characteristics
-30
B characteristics
-40
6.3 Voltage resistance
10 Voltage resistance
-50
F characteristics
-60
4 Voltage resistance
10 Voltage Resistance
X6S characteristics
F characteristics
-70
-80
-90
-100
0
1
2
3
4
DC Bias Voltage [V]
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
5/11
Technical Note
BD00IA5WEFJ
●Heat Loss
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
1. Ambient temperature Ta can be no higher than 85℃.
2. Chip junction temperature (Tj) can be no higher than 150℃.
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj=Ta+θj-a×W
<Reference values>
1-layer substrate (copper foil density 0mm×0mm)
2-layer substrate (copper foil density 15mm×15mm)
2-layer substrate (copper foil density 70mm×70mm)
4-layer substrate (copper foil density 70mm×70mm)
θj-a:HTSOP-J8 153.2℃/W
113.6℃/W
59.2℃/W
33.3℃/W
Substrate size: 70×70×1.6mm3 (substrate with thermal via)
Most of the heat loss that occurs in the BD00IA5WEFJ is generated from the output Pch FET. Power loss is determined by
the total Vcc-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD00IA5WEFJ make certain to factor conditions such as substrate size into the thermal design.
Power consumption (W) = Input voltage (VCC)- Output voltage (Vo) ×Io(Ave)
Example) Where VCC=3.3V, VO=2.5V, Io(Ave) = 0.1A,
Power consumption (W)
=
3.3(V)-2.5(V) ×0.1(A)
=0.08(W)
●About equivalent series resistance ESR (ceramic capacitor etc.)
Capacity-Bias characteristics
100
10
Capacitor usually has ESR(Equivalent Series Resistance), and
operates stable in ESR-OUT range, showed right. Generally, ESR of
ceramic, tantalum and electronic capacitor etc. is different for each,
so please be sure to check a capacitor which is going to use, and
use it inside the stable range, showed right. Then, please evaluate
for the actual application
1
0.1
0.01
0
50
100
150
200
IOUT [mA]
Stable area characteristics
(Characteristics example)
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2010.10 - Rev.A
6/11
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD00IA5WEFJ
●Block Diagram
BD00IA5WEFJ
(VO+0.6)~5.5V
GND
VCC
Ceramic
Capacitor
≧ 1µF
OCP
SOFT
0.8V~4.5V
VO
FB
R1
Ceramic
Capacitor
≧ 1µF
EN
R2
TSD
●Pin number, Pin name
Pin No.
Pin name
VOUT
FB
Pin Function
1
Output voltage pin
Feedback pin
2
3
GND
N.C.
EN
GND pin
4
Non Connection
Enable pin
5
6
N.C.
N.C.
VCC
FIN
Non Connection
Non Connection
Input voltage pin
Substrate(GND pin)
7
8
Reverse
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2010.10 - Rev.A
7/11
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD00IA5WEFJ
●Evaluation board circuit
C7
C3
8
1
VCC
N.C
VOUT
C6
C5
R1
R2
C2
C1
C9
2
3
7
FB
C4
C10
U1
R5
U2
6
5
N.C
EN
GND
N.C.
GND
R6
SW1
4
EN
C8
R4
VOUT
R3
Gate
●Evaluation board parts list
Designation Value
Part No.
Company Designation Value
Part No.
Company
R1
R2
R3
R4
R5
R6
C1
C2
C3
16kΩ MCR01PZPZF1602
7.5kΩ MCR01PZPZF7501
ROHM
C4
C5
C6
C7
C8
C9
C10
U1
U2
‐
1uF
‐
‐
‐
ROHM
CM105B105K16A
KYOCERA
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
1uF
‐
CM105B105K16A
KYOCERA
‐
‐
BD00IA5WEFJ
‐
‐
‐
‐
‐
ROHM
‐
‐
‐
●About Board Layout
EN
GND
Cin
VCC (Vi n)
R2
R1
Co
VO
・Input capacitor Cin of VCC (Vin) should be placed very close to VCC(Vin) pin as possible, and used broad wiring pattern.
Output capacitor Co also should be placed close to IC pin as possible. In case connected to inner layer GND plane, please
use several through hole.
・VFB pin has comparatively high impedance, and is apt to be effected by noise, so floating capacity should be minimum as
possible. Please be careful in wiring drawing
・Please take GND pattern space widely, and design layout to be able to increase radiation efficiency.
・For output voltage setting
Output voltage can be set by FB pin voltage(0.800V typ.)and external resistance R1, R2.
R1+R2
VO = VFB×
R2
(The use of resistors with R1+R2=5k to 90k is recommended)
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
8/11
Technical Note
BD00IA5WEFJ
●Notes for use
(1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
(2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
(3) Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, not that capacitance characteristic values are reduced at low temperatures.
(4) GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
(5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
(6) Off leak in high temperature.
Off-leak in high temperature may increase because of manufacturing of IC diviation.
Design in cousideration with graph of typ, worst is shown below.
BD00IA5WEFJ Ta-Ileak
0.5
0.4
0.3
0.2
worst
0.1
ttyp
0
25
50
75
100
125
150
Temperature (℃)
(7) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
(8) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
(9) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
(10) Thermal shutdown circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is
designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation.
Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit
is assumed.
TSD ON Temperature[℃] (typ.)
Hysteresis Temperature [℃] (typ.)
BD00IA5WEFJ
175
15
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.10 - Rev.A
9/11
Technical Note
BD00IA5WEFJ
(11) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
A lways discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
(12) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
C
E
Pin A
N
B
C
E
P+
N
P
N
P+
P+
P
P+
N
N
N
Parasitic
element
P substrate
P substrate
Parasitic
element
GND
GND
GND
GND
Parasitic element
Parasitic element
Other adjacent elements
(13) Ground Wiring Pattern.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring pattern of any external components, either.
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2010.10 - Rev.A
10/11
Technical Note
BD00IA5WEFJ
●Ordering part number
B D
0 0
I
A 5
W
E F J
-
E 2
ROHM
Output voltage Voltage
Output cuurent Shutdown switch Package
Packaging specifications
E2: Emboss tape reel
Part Number 00 : Variable
resistance A1:0.1A
“W”:Built in
”:None
EFJ :HTSOP-J8
E :24V
F :20V
G :15V
H :10V
A3:0.3A
A5:0.5A
C0:1.0A
C5:1.5A
D0:2.0A
“
I
:7V
HTSOP-J8
<Tape and Reel information>
4.9 0.1
(MAX 5.25 include BURR)
Tape
Embossed carrier tape
2500pcs
(3.2)
+
Quantity
6
°
°
4°
−4
8
7
2
6
3
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
4
1PIN MARK
+0.05
-0.03
0.545
0.17
S
1.27
+0.05
0.42
0.08
-
0.04
M
0.08
S
Direction of feed
1pin
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
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2010.10 - Rev.A
11/11
Notice
N o t e s
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
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R1010
A
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BD30FC0WFP
BD30FC0WFP是可提供最大1A电流的低饱和型稳压器。输出电压固定型。封装是TO252-5。BD30FC0WFP内置防止因输出短路等发生IC破坏的过电流保护、以及防止因过负荷状态等使IC发生热破坏的过热保护电路。
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BD30FD0WFP2
BDxxFD0系列是可提供最大2A电流的低饱和型稳压器。输出电压有可通过外部电阻设定的可变型和固定型。本系列内置防止因输出短路等发生IC破坏的过流保护电路、以及防止因过负荷状态等使IC发生热破坏的过热保护电路。
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BD30FD0WHFP
BDxxFD0系列是可提供最大2A电流的低饱和型稳压器。输出电压有可通过外部电阻设定的可变型和固定型。本系列内置防止因输出短路等发生IC破坏的过流保护电路、以及防止因过负荷状态等使IC发生热破坏的过热保护电路。
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BD30GA3MEFJ-M
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