BD3381EKV-C [ROHM]
BD3381EKV-C是33通道的开关输入监测LSI。其作用是监测各通道所连接的机械开关的状态变化、使MCU产生中断。使用串行接口读取中断因素并写入内部寄存器。33通道的开关输入分为VPUB、VPUA两种电源系统，可按电池系统和电源控制系统分类使用。动作模式备有常规模式和睡眠模式两种。各模式可通过设定寄存器，使用开关端子连续监测设定和间歇监测设定。使用间歇监测设定时是以固定周期监测开关状态变化，可降低功耗。而且，通过使用各种电源系统时序动作和全部开关统一时序动作设定，还能实现低噪声动作。;
| 型号： | BD3381EKV-C |
| 厂家： | 
ROHM |
| 描述： | BD3381EKV-C是33通道的开关输入监测LSI。其作用是监测各通道所连接的机械开关的状态变化、使MCU产生中断。使用串行接口读取中断因素并写入内部寄存器。33通道的开关输入分为VPUB、VPUA两种电源系统，可按电池系统和电源控制系统分类使用。动作模式备有常规模式和睡眠模式两种。各模式可通过设定寄存器，使用开关端子连续监测设定和间歇监测设定。使用间歇监测设定时是以固定周期监测开关状态变化，可降低功耗。而且，通过使用各种电源系统时序动作和全部开关统一时序动作设定，还能实现低噪声动作。 机械 电池 开关 |
| 文件： | 总81页 (文件大小：3867K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Multiple Input Switch Monitor LSI for
Automotive
BD3381EKV-C
General Description
Features
BD3381EKV-C is a 33-channel Multiple Input Switch
Monitor IC that detects the opening and closing of
mechanical switches. Once it senses a change in the
status of a switch, it sends an interrupt signal to the MCU
via a serial peripheral interface (SPI).
AEC-Q100 Qualified (Note 1)
Uses 3.3 V/5.0 V SPI Protocol in Communicating with
the MCU
Serial Communication Error Checking through 8-bit
CRC
The 33 switch inputs have two types of power supply,
VPUB and VPUA. The VPUB and the VPUA power
supplies can either be from a battery or from another
power supply system. VPUB is the supply for the INB
inputs while VPUA is for the INZ and INA inputs.
BD3381EKV-C has two modes of operation, Normal and
Sleep. In both modes, the internal registers can be set to
make the device perform either intermittent or continuous
monitoring of the switches.
In intermittent monitoring, the switch status is monitored
at regular time intervals, allowing the IC to operate with
low power consumption. Also, operation with reduced
noise can be achieved by enabling uniform sequential
monitoring of all switches or sequential monitoring by
power supply system.
Thermal Shutdown Protection (TSD)
Power on Reset (POR)
Selectable Source/Sink Current Levels through Register
Settings
Wetting Current Timer Capability
12 Source or Sink Input Pins (VPUA)
21 Source Input Pins
Separable Power Supply
VPUA: 22-channel (INA&INZ), VPUB: 11-channel (INB)
Interrupt Notification upon Switch Status Change
1 Time to 10 Times Matched LPF that Eliminates Input
Pin Noise
Low Current Consumption (Intermittent Monitoring)
Status Display of Selected Pin at DOUT Pin
(Note 1) Grade 1
Package
HTQFP64BV
(64 pin QFP)
W(Typ) x D(Typ) x H(Max)
12.00 mm x 12.00 mm x 1.00 mm
Application
Engine Control Module
Key Specifications
Low-voltage Operating Range:
Fully Operational Voltage Range:
Input Voltage on Switch Pin:
3.9 V to 6.0 V
6 V to 28 V
-14 V to +40 V
Selectable Wetting Current (Min):
1 mA, 3 mA, 5 mA, 10 mA, 15 mA
Typical Application Circuit
DCDC
VOUT1
+B
VPUA/VPUB
VIN
BD3381EKV-C
+B'
INZ0
VPUB
VPUA/+B'
VPUA
VPUA/VPUB
VPUA
INZ11
VOUT2
MCU
WATCHDOG
RESET
INA0
INA9
INTB
INTB
SI
SI
SCLK
CSB
VIN
SCLK
CS
INB0
SO
IO
SO
INB10
DOUT
REF5
VDDL
VDDI
TEST
GND
Figure 1. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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Pin Configuration
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
GND
GND
N.C.
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
N.C.
N.C.
N.C.
INZ0
INZ1
INZ2
INZ3
INZ4
INZ5
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
INB10
INB9
INB8
INB7
INB6
INB5
INB4
INB3
INB2
INB1
EXP-PAD
INZ6
INZ7
INZ8
INZ9
INB0
N.C.
N.C.
INZ10
INZ11
N.C.
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
Figure 2. Pin Configuration (Top View)
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Pin Description
Table 1. Pin Description (1/2)
I/O
Equivalence
Pin
No.
Pin
Name
Function
Description
Circuit
Diagram
(Note 2)
1
2
VDDI
VDDI
Input
Input
Power supply pin for CSB, SI, SCLK, SO, INTB and DOUT
Power supply pin for CSB, SI, SCLK, SO, INTB and DOUT
Open-drain interrupt output pin to the MCU
(with an internal pull-down resistor)
SPI data output pin to the MCU
SPI control data input pin from the MCU
(with an internal pull-down resistor)
--
--
3
4
5
INTB
SO
SI
Output
Output
Input
C
G
A
SPI control clock input pin from the MCU
(with an internal pull-down resistor)
SPI control chip select input pin from the MCU
(with internal pull-up current source)
6
7
SCLK
CSB
Input
Input
A
B
8
9
GND
GND
DOUT
TEST
VDDL
REF5
N.C.
VPUB
VPUB
N.C.
Ground
Ground
Output
Input
Input
Output
-
Input
Input
-
Ground pin
Ground pin
--
--
F
I
--
H
--
--
--
--
--
10
11
12
13
14
15
16
17
18
General purpose output for digital functions
Test mode control pin(Note 3) (with an internal pull-down resistor)
Power supply input pin for the analog and logic block(Note 4)
5 V power supply output pin for internal use(Note 4)
No Connection(Note 5)
Power supply input pin for the main system and INB switches
Power supply input pin for the main system and INB switches
No Connection(Note 5)
N.C.
-
No Connection(Note 5)
Switch input pin 0 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 1 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 2 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 3 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 4 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 5 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 6 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 7 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 8 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 9 under VPUB power supply system
(with an internal pull-up current source)
Switch input pin 10 under VPUB power supply system
(with an internal pull-up current source)
No Connection(Note 5)
19
20
21
22
23
24
25
26
27
28
29
INB0
INB1
INB2
INB3
INB4
INB5
INB6
INB7
INB8
INB9
INB10
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
E
E
E
E
E
E
E
E
E
E
E
30
31
32
N.C.
GND
GND
-
--
--
--
Ground
Ground
Ground pin
Ground pin
(Note 2) Ref. Page 72 and Page 73 I/O Equivalence Circuit.
(Note 3) Short TEST pin to ground when mounted.
(Note 4) Short REF5 pin to VDDL pin, and connect a 4.7 µF (Min) capacitor between it and ground. Do not use it as voltage source to another IC.
(Note 5) Keep N.C. pins electrically opened.
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Pin Description - continued
Table 2. Pin Description (2/2)
I/O
Equivalence
Pin
No.
Pin
Name
Function
Description
Circuit
Diagram
(Note 2)
33
34
N.C.
N.C.
-
-
No Connection(Note 5)
--
--
No Connection(Note 5)
Switch input pin 0 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 1 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 2 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 3 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 4 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 5 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 6 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 7 under VPUA power supply system
(with an internal pull-up current source)
35
36
37
38
39
40
41
42
43
44
INA0
INA1
INA2
INA3
INA4
INA5
INA6
INA7
INA8
INA9
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
E
E
E
E
E
E
E
E
E
E
Switch input pin 8 under VPUA power supply system
(with an internal pull-up current source)
Switch input pin 9 under VPUA power supply system
(with an internal pull-up current source)
45
46
47
48
49
50
51
VPUA
VPUA
N.C.
GND
N.C.
Input
Input
-
Power supply input pin for INA and INZ switches
Power supply input pin for INA and INZ switches
No Connection(Note 5)
--
--
--
--
--
--
--
Ground
Ground pin
-
-
-
No Connection(Note 5)
N.C.
N.C.
No Connection(Note 5)
No Connection(Note 5)
Switch input pin 0 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 1 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 2under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 3 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 4 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 5 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 6 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 7 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 8 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 9 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 10 under VPUA power supply system
(with an internal pull-up/down current source)
Switch input pin 11 under VPUA power supply system
(with an internal pull-up/down current source)
No Connection(Note 5)
52
53
54
55
56
57
58
59
60
61
62
63
INZ0
INZ1
INZ2
INZ3
INZ4
INZ5
INZ6
INZ7
INZ8
INZ9
INZ10
INZ11
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
D
D
D
D
D
D
D
D
D
D
D
D
64
-
N.C.
EXP-PAD
-
--
--
Exposed PAD
Short EXP-PAD on the product to ground.
(Note 2) Ref. Page 72 and Page 73 I/O Equivalence Circuit.
(Note 5) Keep N.C. pins electrically opened.
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BD3381EKV-C
Block Diagram
VPUA
VPUB
VPUA
AVDD
VPUA
AVDD
1 mA/3 mA/5 mA/
10 mA/15 mA(Min)
Internal
Supply
VREF5
Oscillator
AVDD
INZ0
to
INZ11
+
-
AVDD
REF5
VDDL
To Logic
3 V/4 V
Comparator
LVDD
AVDD
Thermal
Shutdown
Power On
Reset
1 mA/3 mA/5 mA/
10 mA/15 mA(Min)
VDDI
x12
LVDD
Logic Block
VDDI
VPUA
AVDD
VPUA
DOUT
INTB
DOUT Control
1 mA/3 mA/5 mA/
10 mA/15 mA(Min)
VDDI
AVDD
INA0
to
INA9
INTB Control
AVDD
+
-
To Logic
3 V/4 V
Comparator
Input
Digital Filter
x10
VDDI
40 μA(Typ)
Interval
Timer
VPUB
AVDD
VPUB
CSB
SCLK
SI
1 mA/3 mA/5 mA/
10 mA/15 mA(Min)
Serial Interface
and
AVDD
VDDI
INB0
to
INB10
Registers
+
AVDD
SO
To Logic
Comparator
-
3 V/4 V
TEST
x11
GND
Figure 3. Block Diagram
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Absolute Maximum Ratings
Table 3. Absolute Maximum Ratings
Symbol
Parameter
Ratings
-0.3 to +40.0
-0.3 to +7.0
-14 to +40
-0.3 to +7.0
-0.3 to +7.0
150
Unit
V
VVPUA, VVPUB
VVDDI, VVDDL
Supply Voltage
(Note 6)
VINX
Input Voltage
V
VCSB, VSCLK, VSI, VTEST
VDOUT, VINTB, VREF5, VSO
Tjmax
Output Voltage
V
Maximum Junction Temperature
°C
Storage Temperature
Tstg
-55 to +150
°C
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
(Note 6) INx = INB0 to INB10, INA0 to INA9, INZ0 to INZ11
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Thermal Resistance(Note 7)
Table 4. Thermal Resistance
Symbol
Thermal Resistance (Typ)
Parameter
Unit
1s(Note 9)
2s2p(Note 10)
HTQFP64BV
Junction to Ambient
Junction to Top Characterization Parameter (Note 8)
θJA
64.5
3
16.1
2
°C/W
°C/W
ΨJT
(Note 7) Based on JESD51-2A(Still-Air)
(Note 8) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 9) Using a PCB board based on JESD51-3 (Table 5).
(Note 10) Using a PCB board based on JESD51-5, 7 (Table 6).
Table 5. 1s
Layer Number of
Measurement Board
Material
Board Size
Single
FR-4 114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Table 6. 2s2p
Thermal Via(Note 11)
Layer Number of
Measurement Board
Material
FR-4
Board Size
114.3 mm x 76.2 mm x 1.6 mmt
2 Internal Layers
Pitch
Diameter
4 Layers
1.20 mm
Φ0.30 mm
Top
Copper Pattern
Bottom
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 11) This thermal via connects with the copper pattern of all layers.
Recommended Operating Conditions
Table 7. Recommended Operating Conditions
Ratings
Parameter
Symbol
Min
Unit
Max
Operating Temperature
Topr
VVPUX
VVDDI
CREF
-40
6.0
3.1
4.7
+125
°C
V
VPUA/VPUB Supply Voltage
VDDI Supply Voltage
28.0
5.25
-
V
Capacitance for REF5(Note 12)
µF
(Note 12) Recommend a ceramic capacitance. Consider variation, temperature characteristics, DC bias characteristics and change over time of capacitance in
order not to become lower than minimum rating.
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Electrical Characteristics
Spec conditions: 6.0 V≤VPUA/VPUB≤28 V, 3.1 V≤VDDI≤5.25 V, -40 °C≤Topr≤+125 °C
VPUA/VPUB/INZ/INA/INB pin: resistors and capacitors are not connected
REF5 pin: 4.7 µF
Unless otherwise specified, the typical condition is VPUA/VPUB=13 V, VDDI=5.00 V, Topr=25 °C.
Table 8. Electrical Characteristics
Min
Typ
Max
Parameter
Symbol
Unit
V
VPUA/VPUB Supply Voltage
Low-voltage Operating Range(Note 13)
Fully Operational Voltage Range
VVPUX(QFL)
VVPUX(FO)
VVPUX(QFH)
VPOR(LOW)
VPOR(HIGH)
3.9
6.0
28.0
3.9
-
-
-
6.0
28.0
40.0
4.5
High-voltage Operating Range(Note 14)
POR(Power on Reset) Activation Voltage(Note 15)
4.2
4.3
V
V
POR(Power on Reset) Deactivation Voltage(Note 15)
VPUA/VPUB Operating Current
Continuous Monitoring
4.0
4.6
IVPUX(OFF)
-
-
-
720
110
µA
Current source is disabled, “Hi-Z” Status
VPUA/VPUB Average Operating Current
Intermittent Monitoring
IVPUX(SS)
80
µA
Monitoring Period=50 ms, Strobe Time=125 µs
Source/Sink Current Setting=1 mA
VDDI Operating Current
INTB=“H”, CSB=“H”
IVDDI
-
5
10
µA
V
REF5 Output Voltage
VREF5
4.75
5.00
5.25
(Note 13) Electrical characteristics are not guaranteed though functions are operating. POR is active between 3.9 V and 4.5 V.
(Note 14) Electrical characteristics are not guaranteed though functions are operating.
(Note 15) The POR circuit monitors the REF5 voltage.
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Electrical Characteristics - continued
Table 9. Electrical Characteristics (Switch Input)
Min
1.0
1.0
3.0
3.0
5.0
5.0
Typ
1.4
1.4
4.2
4.2
7.0
7.0
Max
1.8
1.8
5.4
5.4
9.0
9.0
Parameter
Symbol
ISOURCE1
ISINK1
Unit
mA
mA
mA
mA
mA
mA
Source Current 1 (internal pull-up current source)
0 V external supply, VPUA/VPUB system
(1 mA setting)
Sink Current 1 (internal pull-down current source)
8 V external supply, VPUA system (1 mA setting)
Source Current 2 (internal pull-up current source)
0 V external supply, VPUA/VPUB system
ISOURCE3
ISINK3
ISOURCE5
ISINK5
(3 mA setting)
Sink Current 2 (internal pull-down current source)
8 V external supply, VPUA system (3 mA setting)
Source Current 3 (internal pull-up current source)
0 V external supply, VPUA/VPUB system
(5 mA setting)
Sink Current 3 (internal pull-down current source)
8 V external supply, VPUA system (5 mA setting)
Source Current 4 (internal pull-up current source)
0 V external supply, VPUA/VPUB system
(10 mA setting)
VPUA/VPUB=6.0 V to 8.0 V
VPUA/VPUB=8.0 V to 28.0 V
ISOURCE10
mA
mA
mA
5.0
10.0
14.0
14.0
18.0
18.0
Sink Current 4 (internal pull-down current source)
ISINK10
10.0
14.0
18.0
8 V external supply, VPUA system (10 mA setting)
Source Current 5 (internal pull-up current source)
0 V external supply, VPUA/VPUB system
(15 mA setting)
VPUA/VPUB=6.0 V to 8.0 V
VPUA/VPUB=8.0 V to 28.0 V
ISOURCE15
5.0
15.0
21.0
21.0
27.0
27.0
Sink Current 5 (internal pull-down current source)
8 V external supply, VPUA system (15 mA setting)
Low to High Switch Detection Threshold Voltage
(3.0 V setting)
High to Low Switch Detection Threshold Voltage
(3.0 V setting)
Low to High Switch Detection Threshold Voltage
(4.0 V setting)
ISINK15
15.0
2.7
21.0
3.0
27.0
3.3
mA
V
VTH3(HIGH)
VTH3(LOW)
VTH4(HIGH)
2.6
2.9
3.2
V
3.7
3.6
4.0
3.9
4.3
4.2
V
V
VPUA/VPUB= 7.0 V to 28.0 V(Note 16)
High to Low Switch Detection Threshold Voltage
(4.0 V setting)
VTH4(LOW)
VPUA/VPUB=7.0 V to 28.0 V(Note 16)
(Note 16) Electrical characteristics are not guaranteed between 6.0 V≤VVPUX<7.0 V.
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Electrical Characteristics - continued
Table 10. Electrical Characteristics (Static Electrical Characteristics)
Parameter
Symbol
VINLOGIC
ICSB(HIGH)
Min
0.8
-10
Typ
Max
2.2
Unit
V
Serial Interface Threshold Voltage(Note 17)
CSB Input Current
-
-
+10
µA
CSB=VDDI
CSB Pull-up Current
CSB=0 V
SI, SCLK Pull-down Resistor
SI, SCLK Input Current
SI, SCLK=0 V
ICSB(LOW)
RSI,RSCLK
30
50
40
100
-
85
µA
kΩ
μA
150
+10
ISI(LOW),ISCLK(LOW)
-10
SO “H” Level Output Voltage
ISOURCE=200 µA
SO “L” Level Output Voltage
ISINK=1.6 mA
SO (Set to “Hi-Z”) Input Current
0 V to VDDI
DOUT “H” Level Output Voltage
ISOURCE=200 µA
VSO(HIGH)
VSO(LOW)
ISO(TRI)
VVDDI-0.8
-
-
-
-
VVDDI
0.4
V
V
-
-10
+10
µA
V
VDOUT(HIGH)
VVDDI-0.8
VVDDI
DOUT “L” Level Output Voltage
ISINK=1.6 mA
INTB Internal Pull-up Current
INTB “H” Level Output Voltage
INTB=OPEN
VDOUT(LOW)
IINTB(PU)
-
-
53
-
0.4
85
V
µA
V
15
VINTB(HIGH)
VVDDI-0.5
VVDDI
INTB “L” Level Output Voltage
ISINK=1.0 mA
VINTB(LOW)
-
0.2
0.4
V
(Note 17) Applicable to SCLK, SI, CSB.
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Electrical Characteristics - continued
Table 11. Electrical Characteristics (Dynamic Electrical Characteristics)
Parameter
Wetting Current Timer
Counting starts after n-times detection of
matched LPF
Symbol
Min
Typ
Max
22
Unit
ms
tWCT
13
-
Interrupt Delay Time 1
Time from switch status change to INTB output
change in continuous monitoring
Interrupt Delay Time 2
Time from switch status change to INTB output
change in intermittent monitoring
n: Setting time of LPF matched n times
Interrupt Clear Time
tINTB_DLY1
tINTB_DLY2
tINTB_CLR
-
-
-
-
-
-
1
ms
ms
µs
[Monitor
cycle] x
n+1
Time from CSB rising edge to INTB output
change
150
Command Set Time
tREG_EN
-
-
-
-
-
-
150
1
µs
ms
ms
Time from CSB rising edge to setting of register
Transition Time to Normal mode
Time from CSB rising edge to bit-30 of SO output
Transition Time to Sleep mode
Time from CSB rising edge to bit-30 of SO output
Switch Strobe Time (93.75 µs setting)(Note 18)
Switch Strobe Time (125 µs setting)(Note 18)
Switch Strobe Time (187.5 µs setting)(Note 18)
Switch Strobe Time (250 µs setting)(Note 18)
Source/Sink Current Rise Time
tMODE_DLY1
tMODE_DLY2
1
tSCAN_94
tSCAN_125
tSCAN_188
tSCAN_250
84.375
112.5
168.75
225
93.750
125.0
187.50
250
103.125
137.5
206.25
275
µs
µs
µs
µs
tSR_R
-
20(Note 19)
-
µs
FSQ=“0”, FSQZ/A/B=“0”, 10 mA setting
Load resistance 100 Ω
Source/Sink Current Fall Time
FSQ=“0”, FSQZ/A/B=“0”, 10 mA setting
Load resistance 100 Ω
tSR_F
-
15(Note 19)
-
-
µs
%
Internal Clock Accuracy
tTIMER
-10
+10
(Note 18) “H” width of internal signal which decides the timing of switch strobe. (Ref. Page 13 Figure 6).
(Note 19) Reference value.
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Electrical Characteristics - continued
Table 12. Electrical Characteristics (Digital Interface Characteristics)
Parameter
Symbol
Min
Typ
Max
Unit
SCLK Frequency
fSCLK
tLEAD
tLAG
tSI(SU)
tSI(HOLD)
tR(SI)
-
100
50
16
20
-
-
-
-
75
75
-
-
-
-
4.4
1000
500
-
-
-
-
55
55
-
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Setup Time from CSB Fall to SCLK Rise
Setup Time from SCLK Fall to CSB Rise
Setup Time from SI to SCLK Fall
Hold Time from SCLK Fall to SI
SI, CSB, SCLK Rise Time
-
5.0(Note 20)
SI, CSB, SCLK Fall Time
tF(SI)
5.0(Note 20)
Time from CSB Fall to SO Output Low Impedance
Time from CSB Rise to SO Output High Impedance
SCLK “H” Level Width
tSO(EN)
tSO(DIS)
tSCLKH
tSCLKL
-
-
-
-
SCLK “L” Level Width
-
Time from SCLK Rise to Stable SO Data Output
SO CL=20 pF
CSB “H” Level Time
tVALID
tCSBH
-
25
-
55
-
ns
µs
150
(Note 20) Reference value.
Timing Chart
·Serial Access Timing
Figure 4. Serial Access Timing
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Timing Chart - continued
·Power Supply Rising/Falling Sequence
POR Clear
POR
6 V
VPUB
VPOR(HIGH)
VPOR(LOW)
REF5
0 V
VDDL
(Supplied REF5)
VDDI
CSB
0 V
Current Source
Activation Command
Null Command
L
tINTB_CLR
tREG_EN
tINTB_CLR
tREG_EN
Switch-OFF
External Switch
Switch-ON
Internal Reference
CurrentSource
0 mA
L
ISOURCE/ISINK
INTB
Undefined
tINTB_DLY1
Figure 5. Power Supply Rising/Falling Sequence
·Source/Sink Current Rise and Fall Time
(Internal signal)
Strobing time
tSCAN_94,tSCAN_125,tSCAN_188,tSCAN_250
OFF
ON
Output Current
80 %
tSR_R
80 %
tSR_F
(External signal)
ISOURCE/ISINK
20 %
INB,INA,INZ
20 %
Current waveform
Scan point
Figure 6. Intermittent Monitoring Enabled (FSQ=0, FSQZ/A/B=0), Source/Sink Current Rise and Fall Time
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Basic Operation
[Basic Operation 1] Detection of Switch Status Change (Continuous Monitoring)
Upon detection of a change in switch status, interrupt (INTB=“H”→“L”) occurs and the IC requests serial communication with
the MCU.
< Example of Recommended Operation Sequence >
Normal mode
1 ms or less
1 ms or less
Interrupt occurs
Initial interrupt status (INTB=L)
Interrupt occurs
Interrupt occurs
INTB
Current Source
Activation Command
(Enabled setting)
Null
Command
Null
Command
Null
Command
CSB
SO
Sw itch status output
Sw itch status output
Switch-ON
Sw itch status output
Switch-OFF
Indefinite
External switch
Switch-OFF
Internal reference
current source
Switch
pin current
(1)
(2)
(3)
(4)
(5)
(6)
(7)(8)
(9)
(10)
(11)
(12)(13) (14)
(15)
(16)
(17)
Figure 7. Basic Operation 1
(1) After power is turned on, interrupt (INTB=“L”) occurs.
(2) By serial communication, the switch status is obtained by the MCU at CSB falling edge.
(3) Since the current source is OFF, the switch pin is “Hi-Z”, and the output of SO is undefined.
(4) Internal reference current source is activated.
(5) Switch status is output by SO.
(6) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(7) Switch change occurs (OFF→ON) and IC detects switch status change.
(8) Interrupt (INTB=“H”→“L”) is notified to MCU, and serial communication is requested.
(9) By serial communication, switch status is obtained by the MCU at CSB falling edge.
(10) Switch status is output by SO.
(11) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(12) Switch change occurs (ON→OFF) and IC detects switch status change.
(13) Interrupt (INTB=“H”→“L”) is notified to MCU, and serial communication is requested.
(14) By serial communication, the switch status is obtained by the MCU at CSB falling edge.
(15) Switch status is output by SO.
(16) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(17) Power is turned off
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Basic Operation - continued
[Basic Operation 2] Detection of Switch Status Change (Intermittent Monitoring)
When Intermittent Monitoring is enabled, switch status is monitored by periodically turning the current source on and off.
Intermittent monitoring allows low power consumption.
< Example of Recommended Operation Sequence >
Normal mode
1 ms or less
1 ms or less
Initial interrupt status (INTB=L)
Interrupt occurs
INTB
Interrupt occurs
Interrupt occurs
Null Command
Sw itch status output
Switch-OFF
Interrupt occurs
Normal Mode
Current Source
Activation Command
(Enabled setting)
Null Command
Sw itch status output
Switch-ON
Null Command
Setting Command
(Intermittent monitor setting)
CSB
SO
Sw itch status output
Indefinite
Indefinite
External switch
Switch-OFF
Internal reference
current source
Switch
pin current
(1)
(2)
(3)
(4)
(5)
(6)
(7)(8) (9)
(10)
(11)(12)(13)(14)(15)
(16)
(17)
(18)
Figure 8. Basic Operation 2
(1) After power is turned on, interrupt (INTB=“L”) occurs.
(2) By serial communication, the switch status is obtained by the MCU at CSB falling edge.
(3) Since the current source is OFF, the switch pin is “Hi-Z”, and the output of SO is undefined.
(4) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(5) By serial communication, switch status is obtained by the MCU at CSB falling edge.
(6) Since the current source is OFF, the switch pin is “Hi-Z”, and the output of SO is undefined.
(7) IC gets the switch status when the current source is ON.
(8) Interrupt (INTB=“H”→“L”) is notified to MCU, and serial communication is requested.
(9) By serial communication, switch status is obtained by the MCU at CSB falling edge.
(10) Switch status is output by SO.
(11) Switch change occurs (OFF→ON).
(12) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(13) IC detects switch status change.
(14) Interrupt (INTB=“H”→“L”) is notified to MCU, and serial communication is requested.
(15) By serial communication, switch status is obtained by the MCU at CSB falling edge.
(16) Switch status is output by SO.
(17) Interrupt is cleared (INTB=“L”→“H”) by CSB rising edge and prepares for switch change.
(18) Power is turned off.
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Basic Operation - continued
[Basic Operation 3] Sleep Mode Operation (Manual Transition)
When MDC register of Monitor Mode Transition Command is set to “1”, mode is changed to sleep.
When MDC register of Monitor Mode Transition Command is set to “0”, mode is changed to normal.
< Example of Recommended Operation Sequence >
Normal mode
Sleep mode
Normal mode
Interrupt occurs
INTB
1 ms or less
1 ms or less
Sleep mode
MODE
Monitor Mode
Monitor Mode
Transition Command
Transition Command
(Sleep setting)
(Normal setting)
CSB
SO
Switch status output
Switch status output
Switch-OFF
Switch-ON
External switch
Internal reference
current source
Switch
pin current
(1)
(2)
(3)
(4) (5)
(6)
(7)
Figure 9. Basic Operation 3
(1) Monitor mode transition command (sleep mode setting) is received from MCU.
(2) Transition to sleep mode.
(3) Switch change occurs (OFF→ON).
(4) IC detects switch status change.
(5) IC informs MCU the interrupt (INTB=“H”→“L”) and serial communication is requested.
(6) Monitor mode transition command (normal mode setting) is received from MCU.
(7) Transition to normal mode.
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Basic Operation - continued
[Basic Operation 4] Sleep Mode Operation (Automatic Transition to Normal Mode)
Automatic transition from sleep mode to normal mode when a switch status changes is possible when the automatic mode
transition setting is enabled.
< Example of Recommended Operation Sequence >
Normal mode
Sleep mode
Normal mode
Interrupt occurs
INTB
1 ms or less
1 ms or less
Sleep mode
MODE
Automatic Mode
Transition Command
Monitor Mode
Transition Command
(Enabled setting)
(Sleep setting)
CSB
SO
Switch status output
Switch status output
Switch-OFF
Switch-ON
External switch
Internal reference
current source
Switch
pin current
(1)
(2)
(3)
(4)
(5)(6)
Figure 10. Basic Operation 4
(1) Automatic transition of mode is enable.
(2) Monitor mode transition command (sleep mode setting) is received from MCU.
(3) Transition to sleep mode.
(4) Switch change occurs (OFF→ON).
(5) IC detects switch status change.
(6) IC informs the interrupt to MCU with INTB(“H”→“L”) and changes to normal mode automatically.
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BD3381EKV-C
Description of Functions
1. Power on Reset (POR)
Upon the application of an external voltage to VPUB, REF5 output is generated by the LDO(VREF5) inside the IC.
When REF5 ≤ 4.2 V(Typ), POR is activated.
When REF5 ≥ 4.3 V(Typ), POR is deactivated.
2. Serial Interface
Communication between IC and the MCU uses pins chip select bar input (CSB), serial clock input (SCLK), serial data input
(SI), and serial data output (SO).
CSB is internally pulled-up to VDDI. When CSB status is “0”, SCLK and SI inputs are valid, and it is possible to read data
from SO. When CSB status is “1”, SCLK and SI inputs are invalid, and SO status is “Hi-Z”.
·Communication Frame
The transmitted frame by the MCU is a bit-56 structure composed of the fixed transmission and reception discrimination “01”
(bit-55 to bit-54), the address (bit-53 to bit-48), the setting data (bit-47 to bit-8), and the CRC (bit-7 to bit-0). The fixed
transmission and reception discrimination ”01” (bit-55 to bit-54) is intended to differentiate between the transmitted and the
received frame. The command (bit-53 to bit-8) sets various settings such as the “Interrupt Notification of Switch Change
Setting Command”. The CRC (bit-7 to bit-0) outputs the result of a bit-55 to bit-8 CRC calculation. If a CRC error occurs,
either when the structure of the frame is not bit-56 or when the transmission and reception discrimination bit is an error,
communication error (the bit-49 of the SO frame is “H”) is output and data is not recognized. As for writing, SI data is latched
by internal shift register at timing of SCLK falling.
Table 13. Serial Data Input (SI)
Communication frame
SI Input Bit
55
54
53
52
Register Address
Address
51
50
49
48
47
46
45
44
43
42
41
40
Setting Data
0
1
39
38
37
21
36
35
34
33
17
32
31
30
14
29
13
28
12
27
11
26
10
25
9
24
8
Setting Data
23
22
20
19
18
16
15
7 to 0
CRC
Setting Data
The received frame by the MCU has two types of bit alignment, “switch status output” and “register value output”.
The switch status output bit alignment is a bit-56 structure composed of fixed transmission and reception discrimination “10”
(bit-52 to bit-48), fixed value “0” (bit-47), interrupt factor output (bit-52 to bit-48), fixed value “0” (bit-47), mode status output
(bit-46), fixed value “0” (bit-45 to bit-41), switch status output (bit-40 to bit-8), and CRC (bit-7 to bit-0).
Fixed transmission and reception discrimination “10” (bit-52 to bit-48) is intended to discriminate transmit and receive frame.
Interrupt factor (bit-52 to bit-48) is discussed on Page 20. When an interrupt factor occurs, the corresponding bit becomes “1”.
Mode status (bit-46) is “0” when set to normal mode, and it is “1” when set to sleep mode. Switch status output (bit-40 to
bit-8) is “1” when external switch is ON, and it is “0” when external switch is OFF. The CRC (bit-7 to bit-0) outputs the result of
a bit-55 to bit-8 CRC calculation.
The switch status is latched to the timing of CSB falling edge. Then, in order of interrupt factor output, mode status and
switch status output are output from SO by SCLK rising.
Table 14. Serial Data Output (SO-Switch Status Output)
Output frame
SO Output Bit
55
54
53
52
51
50
49
48
47
46
45
44
0
43
0
42
0
41
0
40
Switch INB10
1
0
0
Interrupt Factor Output
0
Mode
0
Status Output
39
23
38
22
37
36
35
34
33
32
31
15
30
29
28
27
26
25
24
Switch INB9 to INB0 Status Output
Switch INA9 to INA4 Status Output
21
20
19
18
17
16
14
13 12 11 10
9
8
7 to 0
CRC
Switch INA3 to INA0
Switch INZ11 to INZ0 Status Output
Status Output
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Description of Functions - continued
The register value output bit alignment is a bit-56 structure composed of fixed transmission and reception discrimination “10”
(bit-55 to bit-54), fixed value “0” (bit-53), interrupt factor output (bit-52 to bit-48), register value output (bit-47 to bit-8), and
CRC (bit-7 to bit-0).
The data is output by SO at SCLK's rising edge after the CSB falling edge of the command following the register value output
command.
The bit alignment of the register value output is shown on Table 38. The sequence of register value output is shown in Figure
11 and Figure 12.
Table 15. Serial Data Output (SO-Register Value Output)
Output frame
55
54
53
52
36
20
51
50
49
48
47
46
45
44
43
42
41
25
9
40
24
8
SO Output Bit (Register Value)
1
0
0
Interrupt Factor Output
Register Value Output
39
23
38
22
37
21
35
19
34
18
33
32
31
30
29
13
28
12
27
11
26
10
Register Value Output
17
16
15
14
7 to 0
CRC
Register Value Output
The register value output command (Table 36 RIER to RMDR) is used to read-back the register value written by register
write command (Table 36 IER to MDR).
Figure 11 describes the single read-back sequence. Figure 12 describes the continuous read-back sequence.
<Single Read-back Sequence – Recommended Sequence>
CSB
(2)
(1)
SI
Read Command
Null Command
Switch Status
Output
Register Value
Output
SO
Figure 11. Single Read-back Sequence
(1) Send the register value output command.
The switch status is output by SO.
(2) Read the register value by sending the Null command.
The result of the register value output command (1) is output by SO.
<Continuous Sequential Read-back Sequence – Recommended Sequence>
CSB
SI
(1)
(2)
(3)
(4)
Read Command
Read Command
Read Command
Null Command
Switch Status
Output
Register Value
Output
Register Value
Output
Register Value
Output
SO
Figure 12. Continuous Read-back Sequence
(1) Send the register value output command.
The switch status is output by SO.
(2) Send the register value output command following (1). (The address of the register value output command does
not need to be the next address.)
(3) Send the register value output command repeatedly as needed.
The SO output at each command is the result of the previous register value output command.
(4) Send the Null command in the end.
The register value of the previous register output command is output by SO.
3. Switch Status Output
Switch status can be sent through SO output.
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BD3381EKV-C
Description of Functions - continued
4. Interrupt (INTB operation)
There are five interrupt factors that cause the INTB pin to output “L”. The type of interrupt factor that occurred can be
checked in the SO output when CSB is “L”.
INTB output will return to “H” once the interrupt factor is cleared by the rising edge of CSB. The INTB pin is an open-drain
output that is internally pulled-up to VDDI.
·Interrupt Factors
The interrupt factors are shown below:
Interrupt Factor
Interrupt flag (SO output)
SO output bit [52]:
SO output bit [51]:
SO output bit [50]:
SO output bit [49]:
Flag name
“test_flg”
“them_flg”
“rst_flg”
(1) Test Detection
(2) Thermal Shutdown Detection
(3) Reset Detection
(4) Communication Error Detection
“err_flg”
(CRC error, 56-bit frame error, or transmission and reception discrimination error)
(5) Switch Status Change Detection
SO output bit [48]:
“sw_flg”
(1) Test Detection
The IC generates an interrupt after a transition to test mode. The TEST pin should always be connected to
ground.
(2) Thermal Shutdown Detection
Interrupt occurs when the thermal shutdown circuit detects a temperature higher than the allowable junction
temperature inside IC.
(3) Reset Detection
Interrupt occurs after the activation of Power on Reset (POR) or the transmission of the reset command. Upon
POR activation, the SO output interrupt flag “rst_flg” is reflected instantly. With reset command transmission,
“rst_flg” is reflected on the next command transmission.
(4) Communication Error Detection
Interrupt occurs due to either a CRC error, a 56-bit frame error, or a command transmission error. The
interrupt flag “err_flg” is triggered by the following:
CRC error
56-bit frame error
:when there is a Cyclic Redundancy Check error
:when the command received is not 56-bit
Transmit and receive determination error :when the first two bits of the command received is not
[55:54]=“01”
(5) Switch Status Change Detection
Interrupt occurs when switch status changes (switch-ON→OFF or switch-OFF→ON).
·Clearing of INTB Output and Interrupt Factor
The INTB “L” output and the interrupt factor are both cleared by the CSB rising edge during command transmission. In case
a new interrupt factor occurs during command transmission, the interrupt factor is not cleared. The new interrupt factor is
reflected on the next command transmission.
The interrupt factor is not cleared by the register readout that follows the register value output command.
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Description of Functions - continued
5. Operating Modes
IC has two types of operating mode, the normal and the sleep mode. Transition between the two modes can be done by
sending the correct “Monitor Mode Transition Command”. The current mode of operation can be checked through the SO pin
outputs.
Monitor Mode Transition register address (0x4F):Bit [47]: 0=Normal mode, 1=Sleep mode
·Normal Mode
Normal mode operation can be set to continuous monitoring, wherein the switch status is checked by a continuously ON
current source, or to intermittent monitoring, wherein the switch status is checked by a regularly ON/OFF current source.
The period of intermittent monitoring(Note 21) can be set according to power supply system while strobe time(Note 22) is common
for all switch pins.
At normal mode, the bit-46 of the SO output is “0”.
·Sleep Mode
Sleep mode operation, like in normal mode, can be set to continuous monitoring or intermittent monitoring.
The monitoring period(Note 21) of intermittent monitoring can be set according to power supply system.
The strobe time(Note 22) is common for all switch pins and both modes.
The difference with normal mode is that, from sleep mode, it is possible to change to normal mode automatically when
interrupt occurs. (Automatic mode transition function)
At sleep mode, the bit-46 of SO output is “1” at sleep mode.
(Note 21) Ref. Monitor period (Figure 13).
(Note 22) Ref. Strobe time (Figure 13).
Current
Monitor Period
Strobe time
Curernt
Source
ON
Curernt
Source
ON
Current
source
OFF
Current
Source
OFF
Time
Figure 13. Intermittent Monitoring
6. Automatic Mode Transition Function
By sending the “Automatic Mode Transition Command” through setting the MIR register (0x4E) to “1”, automatic transition
from sleep to normal mode is possible. The conditions for a change in mode from sleep to normal to occur for both enabled
and disabled “Automatic Mode Transition Function” are shown below:
·Conditions for Sleep to Normal Mode Transition (“Automatic Mode Transition Function” is enabled):
1. Normal mode transition command is sent
2. POR occurs or reset command sent (Initialization)
3. A switch status changes (The “Switch Change Interrupt Setting” should be enabled)
·Conditions for Sleep to Normal Mode Transition (“Automatic Mode Transition Function” is disabled):
1. Normal mode transition command is sent
2. POR occurs or reset command sent (Initialization)
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Description of Functions - continued
[Extension Function1: Intermittent Monitoring at the Same Time (with Current Slope)]
In intermittent monitoring, it is possible to detect the status of the all switches at the same time. When all inputs are set to
detect the switch status by intermittent monitoring, the wetting current has a rising and falling slope.
(only when all comparators are enabled with “Comparator Operation Control Command”).
Normal Mode Setting Register (0x4B)
Sleep Mode Setting Register (0x4C)
: bit-47 to bit-44 is “0000” and intermittent monitoring setting
: bit-47 to bit-44 is “0000” and intermittent monitoring setting
Strobe time [μs]
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
Internal reference
currentsource
OFF
2.5 ms
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
INZ0-INZ11
INA0-INA9
2.5 ms
5 ms
INB0-INB10
10 ms
Monitor period：Set to FITZ=2.5 ms, FITA=5 ms, FITB=10 ms
Figure 14. Intermittent Monitoring at the Same Time Example
[Extension Function 2: Sequential Monitoring by Power Supply System]
In this type of sequential monitoring, the status of the switches within a power supply system is monitored one at a time. This
type has no slope. Since no two or more current sources in a power supply system are ON at the same time, radiation noise
is reduced.
Strobe time[μs] x 12
Internal reference
currentsource
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
INZ0
INZ1
INZ2
: _
ON
ON
ON
ON
ON
OFF
ON
OFF
ON
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
INZ11
2.5 ms
ON
OFF
OFF
OFF
INA0
INA1
INA2
: _
ON
ON
ON
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
ON
INA9
5 ms
OFF
OFF
INB0
INB1
INB2
: _
ON
ON
OFF
ON
OFF
ON
OFF
ON
INB10
10 ms
Monitor period：Set to FITZ=2.5 ms, FITA=5 ms, FITB=10 ms
Figure 15. Sequential Monitoring by Power Supply System Example
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Description of Functions - continued
[Extension Function 3: Sequential Monitoring of All Switch Pins]
In this type of sequential monitoring, the status of all switches is monitored one at a time.
Since no two or more current sources are ON at the same time, radiation noise is reduced. This type has no slope.
The monitoring period for all switches increases by four times the monitoring period set for the INZ channels as shown in
Figure 16. Uniform sequential monitoring and sequential monitoring by power supply should not be enabled at the same time.
In case the two sequential monitoring methods are activated simultaneously, the method which prevails is uniform sequential
monitoring.
Strobe time[μs] x 12
Internal reference
current source
ON
ON
ON
OFF
ON
OFF
INZ0
INZ1
INZ2
: _
OFF
ON
OFF
ON
OFF
OFF
ON
ON
OFF
OFF
INZ11
FITZ setting value x 4
ON
ON
OFF
INA0
INA1
INA2
: _
OFF
ON
OFF
ON
OFF
INA9
ON
OFF
INB0
INB1
INB2
: _
ON
OFF
ON
OFF
ON
OFF
INB10
Monitor period：Set to FITZ=2.5 ms, FITA=5 ms, FITB=10 ms
Figure 16. Sequential Monitoring of All Switches Pins Example
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Description of Functions - continued
7. Source/Sink Current Source for Switch Pin
There are three types of switch pin inputs with internal current source: INZ, INA, and INB. The current level can be set for
each switch pin.
·Current Source of INZ System (INZ0 to INZ11)
This current source is used to source or sink current to the external switch. The wetting current can be interchanged between
pull-up and pull-down. VPUA is the power supply for the pull-up current source.
·Current Source of INA System (INA0 to INA9)
This current source is used to source current to the external switch. VPUA is the power supply.
·Current Source of INB System (INB0 to INB10)
This current source is used to source current to the external switch. VPUB is the power supply.
The current source settings can be fixed by INZ current source/sink selection command, the current source setting command,
and the holding current/wetting current value setting command.
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Description of Functions - continued
8. Wetting Current Timer
The wetting current timer is 13 ms to 22 ms. This function can be enabled individually for each switch pin. The timer starts
after the switch has been detected as ON. After the 13 ms to 22 ms timer is finished, the wetting current (10 mA/15 mA) is
switched to holding current (1 mA/3 mA/5 mA). The timer is reset after the switch is turned OFF.
[Function operation1] Wetting Current Timer (Continuous Operation)
Interrupt occurs
Interrupt occurs
Command
Interrupt occurs
INTB
Command
CSB
SO
Switch status output
Switch status output
External switch
Switch-OFF
Switch-ON
Switch-OFF
Switch-ON
Current
Status
Holding
current
Holding
current
Wetting current
Wetting current
Current
Switch
pin current
tWCT (13 ms to 22 ms)
tWCT (13 ms to 22 ms)
(1)
(2)
(3)
(4)
(5)
Figure 17. Wetting Current Timer (Continuous Operation)
(1) Switch change occurs (OFF→ON), IC detects switch status change.
(2) When ON state of the switch continues for more than 13 ms to 22 ms, the holding current is output.
(3) Switch change occurs (ON→OFF).
(4) Switch change occurs (OFF→ON), IC detects switch status change.
(5) When ON state of the switch continues for more than 13 ms to 22 ms, the holding current is output.
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Description of Functions - continued
[Function operation2] Wetting Current Timer (Intermittent Monitoring)
Interrupt occurs
Command
Interrupt occurs
Command
Interrupt occurs
INTB
CSB
SO
Switch status output
Switch status output
Switch-ON
Switch-OFF
Switch-ON
External switch
Current
Status
Holding
current
Holding
current
Wetting current
Wetting current
Current
Switch
pin current
tWCT (13 ms to 22 ms)
tWCT (13 ms to 22 ms)
(Note 23)
(Note 23)
(1) (2)
(3)
(4) (5)
(6) (7)
(8)
Figure 18. Wetting Current Timer (Intermittent Monitoring)
(1) Switch change occurs (OFF→ON).
(2) IC detects switch status change.
(3) When ON state of the switch continues for more than 13 ms to 22 ms, the holding current is output.
(4) Switch change occurs (ON→OFF).
(5) IC detects switch status change, switch current is switched from holding current to wetting current.
(6) Switch change occurs (OFF→ON).
(7) IC detects switch status change.
(8) When ON state of the switch continues for more than 13 ms to 22 ms, the holding current is output.
(Note 23) At switch-OFF situation. IC doesn’t apply current.
This waveform indicates the timing of monitoring period.
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Description of Functions - continued
9. n-Times Matched Filter
All switch inputs have built-in “1 time to 10 times matched filters”. This function can filter the ON/OFF switch status judgment
made by the internal comparator. The filter function can be enabled for each power supply system. If the register has been
updated during the counting of the filter, the counting is not reset.
If the monitoring method is continuous monitoring, the switch state is filtered n times (n: 1 to 10) multiplied by the period of
the internal oscillator (32 kHz).
If the monitoring method is intermittent monitoring, the switch state is filtered n times (n: 1 to 10) multiplied by the monitoring
period.
・Set to full-time monitor : Sampling period is internal oscillator period：31.25 μs (Typ)
External
switch
OFF
ON
1st
2nd
3rd
Current
source
ON
ON/OFF
Internal Oscillator period
Sampling
clock
Internal
OSC
Filter
matched
3 times output
OFF
1st
ON
Status
transition
2nd
3rd
Reflected
Time from Monitoring to End of Filtering:
{Monitoring Period x (Filter Number of Times -1) + Period of Internal Oscillator}
to {Monitoring Period x (Filter Number of Times) + Period of Internal Oscillator}
Figure 19. 3 Times Matched Filter Operation on Continuous Monitoring
・Set to intermittent monitor : Sampling monitor period is common with monitor period.
External
switch
OFF
ON
1st
2nd
3rd
Current
source
ON/OFF
Monitor period
Sampling
clock
Internal
OSC
Filter
matched
3 times output
Internal OSC1clock
ON
OFF
1st
3rd
Reflected
Status
transition
2nd
Time from Monitoring to End of Filtering:
{Monitoring Period x (Filter Number of Times -1) + Period of Internal Oscillator}
to {Monitoring Period x (Filter Number of Times) + Period of Internal Oscillator}
Figure 20. 3 Times Matched Filter Operation on Intermittent Monitoring
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Description of Functions - continued
10. Digital Multiplexer Output
The status of the selected switch input is reflected by the DOUT pin. DOUT takes the output of the comparator on a timing
determined by the monitoring method. When no switch is selected, the output of DOUT is “L”.
Only one switch pin at a time can be selected to be reflected by DOUT. The output signal can be inverted by setting.
11. Current Source Enable Signal Output
The Pull-up/Pull-down Current Source Enable Signal of the selected switch pin is output by the DOUT pin. It can be used to
control external current source when the wetting current is generated by the external circuit. The polarity of this enable signal
can be selected through command settings.
BD3381EKV-C
VBAT
External Pull-up Resistor
( to generate Wetting Current)
DOUT
e.g.) Digital
Transistor
INZ/INA/INB
Figure 21. Example of Current Source Enable Signal Usage
12. Input Threshold Voltage of Switch Pin
The switch input threshold voltage is a fraction of the REF5 voltage. It can be set to 3.0 V or to 4.0 V.
·3.0 V Setting: VTH3(HIGH)=VDDL(Note 24)x0.6 (6.0 V≤VVPUX≤28.0 V)
·4.0 V Setting: VTH4(HIGH)=VDDL(Note 24)x0.8 (7.0 V≤VVPUX≤28.0 V)
Table 16. Relationship between the Switch Input Threshold Voltage and the SO Output
Input type
INZ
Source or Sink
Source
Source
Sink
Input Voltage
INZ<Threshold
INZ>Threshold
INZ<Threshold
INZ>Threshold
INA,INB<Threshold
INA,INB>Threshold
Comparator Output
SO Serial Interface Bit
0
1
0
1
0
1
H
L
L
Sink
H
H
L
N/A
INA,INB
N/A
(Note 24) As shown at Typical Application Circuit, short REF5 pin and VDDL pin externally. (Page 1, Figure 1)
13. Over-temperature Protection Circuit
When the junction temperature of the IC becomes higher than the thermal limit 160 °C (Typ), interrupt (INTB=“L”) occurs and
the source/sink current through the switch pins is switched to 1 mA (Min). The MCU is notified by the SO over-temperature
detection flag (them_flg) changing to “1” that an irregularity in temperature has occurred. When the junction temperature of
the IC has fallen below 140 °C (Typ), interrupt is cleared on the next command transmission and the wetting current level
returns to what was set on the registers.
Notice: The over-temperature detection value, 155 °C (Typ) to 175 °C (Typ), and the hysteresis temperature, 10 °C (Typ) to
30 °C (Typ), were not tested in shipment test. Also, the over-temperature protection circuit operates beyond the absolute
maximum temperature ratings so the IC should not be used in a system where activation of the said protection function is
expected.
14. Cyclic Redundancy Check (CRC)
The bit-7 to bit-0 of both the transmitted and received communication frame of the IC is the cyclic redundancy check (CRC),
which is responsible for the detection of a data communication error.
If the IC received a CRC error, asserts interrupt (INTB=“L”) and error flag (“err_flg”) to SO output. SO output becomes “H” on
the next communication to notify the MCU of the error. A command that has a CRC error is not a valid command.
The CRC generation polynomial is
푋8 + 푋5 + 푋4 + 1
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Command Description
Each Command has two types of functions. One is to write a value to a register. The other is to read back the register value
which was written by the write command. The function to be used is set by the bit-53 of each command. (The Null and Reset
commands don’t include the register value output command because they don’t write in the registers.)
In the command descriptions below, the write command is for writing a value to a register and the read command is for
reading back a register value.
1. Null Command
This command is a read only command that allows the user to monitor interrupt and switch status.
Table 17. Null Command (Read Only)
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
0
52
0
51
0
50
0
49
0
48
0
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
x
Null Command (Read Only)
IRC
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
2. Interrupt Notification of Switch Change Setting Command
This command allows the user to configure interrupt sources for the INTB pin.
Specifically, this command allows the user to individually configure which switches trigger an interrupt on INTB by enabling
or disabling the IEBn, IEAn, and IEZn setting bits shown below.
The SO output will return the switch status depending on the settings stored at the next CSB falling edge.
Table 18. Interrupt Notification of Switch Change Setting Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
0
49
0
48
1
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
Interrupt Notification of Switch Change Setting
IER
W/R
IEB10
Setting Data
32 31
39
38
37
36
35
34
33
30
29
28
27
26
25
24
IEB9 IEB8 IEB7 IEB6 IEB5 IEB4 IEB3 IEB2 IEB1 IEB0 IEA9 IEA8 IEA7 IEA6 IEA5 IEA4
Setting Data
CRC
7 to 0
CRC
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
IEA3 IEA2 IEA1 IEA0 IEZ11 IEZ10 IEZ9 IEZ8 IEZ7 IEZ6 IEZ5 IEZ4 IEZ3 IEZ2 IEZ1 IEZ0
IEB [10:0] [Default: 1]
IEA [9:0] [Default: 1]
IEZ [11:0] [Default: 1]
W/R
Interrupt Notification of Switch Status Change for INB System
0: Disabled
Interrupt Notification of Switch Status Change for INA System
0: Disabled 1: Enabled
Interrupt Notification of Switch Status Change for INZ System
0: Disabled 1: Enabled
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
1: Enabled
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Command Description - continued
3. Comparator Operation Control Command
This command allows the user to individually enable or disable the switch pin comparator for each switch input.
When a switch input’s comparator is disabled through this register, both the corresponding settings available for that switch
input within the “Interrupt Notification of Switch Change Setting Command” and the “Current Source Activation Command”
are disabled.
When the comparator is active, the switch status output does not depend on whether the wetting current is set to source or
sink. The switch status output is “1” when the switch is ON and “0” when the switch is OFF.
When the comparator is set to disabled, the switch status is undefined.
Table 19. Comparator Operation Control Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
0
49
1
48
0
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
CMB10
Comparator Operation Control
CMR
W/R
Setting Data
32 31
39
38
37
36
35
34
33
30
29
28
27
26
25
24
CMB9 CMB8 CMB7 CMB6 CMB5 CMB4 CMB3 CMB2 CMB1 CMB0 CMA9 CMA8 CMA7 CMA6 CMA5 CMA4
Setting Data
CRC
7 to 0
CRC
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
CMZ11 CMZ10
CMA3 CMA2 CMA1 CMA0
CMZ9 CMZ8 CMZ7 CMZ6 CMZ5 CMZ4 CMZ3 CMZ2 CMZ1 CMZ0
CMB [10:0] [Default: 1]
Comparator Operation for INB System
0: Disabled 1: Enabled
Comparator Operation for INA System
0: Disabled 1: Enabled
Comparator Operation for INZ System
0: Disabled 1: Enabled
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
CMA [9:0] [Default: 1]
CMZ [11:0] [Default: 1]
W/R
4. Comparator Threshold Selection Command
This command allows the user to set the comparator threshold of the switch pins.
Switch detection threshold selection is available for each power supply system (See CTB, CTA, CTZ settings shown below).
Table 20. Comparator Threshold Selection Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
0
49
1
48
1
47
46
45
44
x
43
x
42
x
41
x
40
x
Comparator Threshold Selection
CTR
W/R
CTB CTA CTZ
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
CTB [Default: 0]
CTA [Default: 0]
CTZ [Default: 0]
W/R
Comparator Threshold for INB System
0: 3.0 V 1: 4.0 V
Comparator Threshold for INA System
0: 3.0 V 1: 4.0 V
Comparator Threshold for INZ System
0: 3.0 V 1: 4.0 V
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
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Command Description - continued
5. INZ Current Source/Sink Selection Command
This command allows the user to select the current configuration, whether source (internal pull-up current source) or sink
(internal pull-down current source), through the INZ input switch pins.
Table 21. INZ Current Source/Sink Selection Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
1
49
0
48
0
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
x
INZ Current Source/Sink Selection
PUDR
W/R
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
16 15
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
18
17
14
13
12
11
10
9
8
PUD11 PUD10
PUD9 PUD8 PUD7 PUD6 PUD5 PUD4 PUD3 PUD2 PUD1 PUD0
PUD [11:0] [Default: 0]
Source or Sink Selection for INZ System
0: Source (internal pull-up current source)
1: Sink (internal pull-down current source)
Register Write/Read Setting
W/R
0: Write 1: Read (“Setting data” is disabled)
6. Current Source Activation Command
This command allows the user to enable or disable the wetting current sources at the switch input pins. The current sources
can be set to ON or OFF per power supply system.
The output current level is determined by the “Holding Current / Wetting Current Value Setting Command” discussed in
section 7 below.
If an external current source is used, the comparator should be enabled (see section 3 above) and the internal current
source should be disabled using this register.
Table 22. Current Source Activation Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
1
49
0
48
1
47
46
45
44
x
43
x
42
x
41
x
40
x
Current Source Activation
CER
W/R
CEB CEA CEZ
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
CEB [Default: 0]
CEA [Default: 0]
CEZ [Default: 0]
W/R
Current Sources of INB System
0: Disabled 1: Enabled
Current Sources of INA System
0: Disabled 1: Enabled
Current Source of INZ System
0: Disabled 1: Enabled
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
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Command Description - continued
7. Holding Current / Wetting Current Level Selection Command
This command allows the user to select the output level of each current source. This command also has arguments to set
both the holding and the wetting current.
The holding current can be set to 1 mA, 3 mA, or 5 mA.
The wetting current can be set to OFF (“Hi-Z”), 1 mA, 3 mA, 5 mA (set to holding current), 10 mA, or 15 mA.
Unlike holding current, wetting current output levels can be set individually for each switch pin.
Table 23. Holding Current / Wetting Current Level Selection Command (LSB)
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
1
49
1
48
0
47
46
45
x
44
x
43
x
42
x
41
x
40
Holding Current / Wetting Current Level Selection (LSB)
CRH1 CRH0
LCB10
LCR
W/R
Setting Data
32 31
39
38
37
36
35
34
33
30
29
28
27
26
25
24
LCB9 LCB8 LCB7 LCB6 LCB5 LCB4 LCB3 LCB2 LCB1 LCB0 LCA9 LCA8 LCA7 LCA6 LCA5 LCA4
Setting Data
CRC
7 to 0
CRC
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
LCZ11 LCZ10
LCA3 LCA2 LCA1 LCA0
LCZ9 LCZ8 LCZ7 LCZ6 LCZ5 LCZ4 LCZ3 LCZ2 LCZ1 LCZ0
Table 24. Holding Current / Wetting Current Level Selection Command (MSB)
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
0
50
1
49
1
48
1
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
Holding Current / Wetting Current Level Selection (MSB)
MCB10
MCR
W/R
Setting Data
32 31
39
38
37
36
35
34
33
30
29
28
27
26
25
24
MCB9 MCB8 MCB7 MCB6 MCB5 MCB4 MCB3 MCB2 MCB1 MCB0 MCA9 MCA8 MCA7 MCA6 MCA5 MCA4
Setting Data
CRC
7 to 0
CRC
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
MCZ11 MCZ10
MCA3 MCA2 MCA1 MCA0
MCZ9 MCZ8 MCZ7 MCZ6 MCZ5 MCZ4 MCZ3 MCZ2 MCZ1 MCZ0
CRH [1:0] [Default: 00]
Holding Current Value
00: 1 mA
10: 5 mA
01: 3 mA
11: 1 mA
{MCB[10:0], LCB[10:0]} [Default: 01]
{MCA[9:0], LCA[9:0]} [Default: 01]
{MCZ[11:0], LCZ[11:0]} [Default: 01]
W/R
Wetting Current Value for INB System
00: Disabled(Hi-Z) 01: 1 mA/3 mA/5 mA(Holding Current Value)
10: 10 mA
11: 15 mA
Wetting Current Value for INA System
00: Disabled(Hi-Z) 01: 1m A/3 mA/5 mA(Holding Current Value)
10: 10 mA
11: 15 mA
Wetting Current Value for INZ System
00: Disabled(Hi-Z) 01: 1m A/3 mA/5 mA(Holding Current Value)
10: 10 mA
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
11: 15 mA
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Command Description - continued
8. Wetting Current Operation Control Command
This command allows the user to enable or disable the “wetting current timer”.
This “wetting current timer” counts 13 ms to 22 ms after the switch has been closed and the wetting current changes to
holding current (1 mA/3 mA/5 mA). The timer is reset when the switch is turned off.
If the wetting current level is the same as the holding current level, the timer does not operate.
The wetting current timer can be enabled or disabled individually for each switch pin.
Table 25. Wetting Current Operation Control Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
0
49
0
48
0
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
WTB10
Wetting Current Operation Control
WTR
W/R
Setting Data
32 31
39
38
37
36
35
34
33
30
29
28
27
26
25
24
WTB9 WTB8 WTB7 WTB6 WTB5 WTB4 WTB3 WTB2 WTB1 WTB0 WTA9 WTA8 WTA7 WTA6 WTA5 WTA4
Setting Data
CRC
7 to 0
CRC
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
WTZ11 WTZ10
WTA3 WTA2 WTA1 WTA0
WTZ9 WTZ8 WTZ7 WTZ6 WTZ5 WTZ4 WTZ3 WTZ2 WTZ1 WTZ0
WTB [10:0] [Default: 0]
Wetting Current Timer for INB System
0: Disabled 1: Enabled
Wetting Current Timer for INA System
0: Disabled 1: Enabled
Wetting Current Timer for INZ System
0: Disabled 1: Enabled
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
WTA [9:0] [Default: 0]
WTZ [11:0] [Default: 0]
W/R
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Command Description - continued
9. n-Times Matched Filter Activation Control Command
This command allows the user to enable or disable the n-times matched LPF.
If this function is enabled, the switch output is updated only after the comparator output has been sampled “n” times (where n
= 1 to 10) and if all sampled comparator outputs match.
This command allows for each switch pin groups to be enabled or disabled.
Table 26. n-Times Matched Filter Activation Control Command
Register Address
Setting Data
44 43
DFB3 DFB2 DFB1 DFB0 DFA3 DFA2 DFA1 DFA0
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
0
49
0
48
1
47
46
45
42
41
40
n-Times Matched Filter Activation Control DFR
W/R
Setting Data
39
38
37
36
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
DFZ3 DFZ2 DFZ1 DFZ0
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
DFB [3:0] [Default: 0000]
n-Times Matched LPF Settings for INB System
0000
0010
0100
0110
1000
1010
1100
1110
: Disabled (1 time)
: 3 times
: 5 times
: Disabled (1 time)
: Disabled (1 time)
: 8 times
0001
0011
0101
0111
1001
1011
1101
1111
: 2 times
: 4 times
: 6 times
: Disabled (1 time)
: 7 times
: 9 times
: Disabled (1 time)
: Disabled (1 time)
: 10 times
: Disabled (1 time)
DFA [3:0] [Default: 0000]
DFZ [3:0] [Default: 0000]
W/R
n-Times Matched LPF Settings for INA System
0000
0010
0100
0110
1000
1010
1100
1110
: Disabled (1 time)
: 3 times
: 5 times
: Disabled (1 time)
: Disabled (1 time)
: 8 times
0001
0011
0101
0111
1001
1011
1101
1111
: 2 times
: 4 times
: 6 times
: Disabled (1 time)
: 7 times
: 9 times
: Disabled (1 time)
: Disabled (1 time)
: 10 times
: Disabled (1 time)
n-Times Matched LPF Settings for INZ System
0000
0010
0100
0110
1000
1010
1100
1110
: Disabled (1 time)
: 3 times
: 5 times
: Disabled (1 time)
: Disabled (1 time)
: 8 times
0001
0011
0101
0111
1001
1011
1101
1111
: 2 times
: 4 times
: 6 times
: Disabled (1 time)
: 7 times
: 9 times
: Disabled (1 time)
: Disabled (1 time)
: 10 times
: Disabled (1 time)
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
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Command Description - continued
10. DOUT Setting Command
This command allows the user to configure how the DOUT pin will function. There are two available functions for the DOUT
pin. One is to output the result of the digital multiplexer, and the other is to output the state of a current enable signal.
For the first function, the DOUT Setting Command can be used to enable or disable the digital multiplexer. If the digital
multiplexer is enabled, the result of the selected switch pin's comparator is output to the DOUT pin at a timing that depends
on the monitoring method used. The switch pin selection is made through the CSL0 to CSL5 bits of the command. Also, the
output signal can be inverted through the POL bit.
For the second function, DOUT can be configured so that it will indicate whether the internal pull-up/pull-down current is
enabled or disabled for the selected switch input. The POL bit can also be used to invert the output for this function. If the
Positive Polarity Setting is chosen, "H" output means the signal is enabled, and "L" output means the signal is disabled. If the
Negative Polarity Setting is chosen, the result is the opposite.
Table 27. DOUT Setting Command
Register Address
Setting Data
44 43
CSL5 CSL4 CSL3 CSL2 CSL1 CSL0
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
0
49
1
48
0
47
46
45
42
41
x
40
x
DOUT Setting
DOT
W/R
Setting Data
39
38
x
37
x
36
x
35
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
FSL
POL
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
Table 28. DOUT Channel Selection
Selected Channel
bit-47 to bit-42
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
001010
001011
001100
001101
001110
001111
010000
010001
bit-47 to bit-42
010010
010011
010100
010101
010110
010111
011000
011001
011010
011011
011100
011101
011110
011111
100000
100001
Selected Channel
INA5
Disabled (Output is “L”)
INZ0
INZ1
INZ2
INZ3
INZ4
INZ5
INZ6
INZ7
INZ8
INZ9
INZ10
INZ11
INA0
INA1
INA2
INA3
INA4
INA6
INA7
INA8
INA9
INB0
INB1
INB2
INB3
INB4
INB5
INB6
INB7
INB8
INB9
INB10
100010 to 111111
Disabled (Output is “L”)
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Command Description - continued
CSL [5:0] [Default:000000]
Switch Channel Selection Setting
000000
: Disable (DOUT is “L”)
000001 to 001100 : INZ Channel Selection
001101 to 010110 : INA Channel Selection
010111 to 100001 : INB Channel Selection
100010 to 111111
: Disable (DOUT is “L”)
FSL [Default:0]
POL [Default:0]
W/R
DOUT Function Setting
0: Digital Multiplexer Signal Output
1: Current Source Enable Signal Output
Polarity Setting
0: Positive
1: Negative
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
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Command Description - continued
11. Normal Mode Setting Command
This command allows the user to set the monitoring period, strobe time, and monitoring method of normal mode.
The normal mode is set after power on reset or by “Monitor Mode Transition Command”.
The monitoring period can be set individually per power supply system but the strobe time is common to all switch pins.
The monitoring method can be set continuous monitoring, intermittent monitoring at the same time, sequential monitoring by
power supply system and sequential monitoring of all switch pins.
The monitoring period of the normal mode and strobe time setting have some restrictions as follows.
· 1 ms monitoring period with sequential monitoring by power supply system is prohibited.
· 1 ms monitoring period with sequential monitoring of all switch pins is prohibited.
· At 2.5 ms monitoring period setting with sequential monitoring by power supply system, only 93.75 µs and 125 µs strobe
time are allowed. Other strobe time settings are prohibited.
· At 2.5 ms monitoring period setting and sequential monitoring of all switch pins, only 93.75 µs and 125 µs strobe time are
allowed. Other strobe time settings are prohibited.
·Continuous Monitoring:
IC monitors switch status continuously.
Refer to the “[Basic Operation 1] Detection of switch status change (Continuous Monitoring)” section for additional details.
·Intermittent Monitoring at the Same Time:
IC monitors switch status per power supply system at the same time.
Refer to the “[Extension Function1: Intermittent Monitoring at the Same Time (with Current Slope)]” section for additional
details.
·Sequential Monitoring by Power Supply System:
IC monitors switch status per switch by turns on power supply system.
Refer to the “[Extension Function 2: Sequential Monitoring by Power Supply System]” section for additional details.
·Sequential Monitoring of All Switch Pins:
IC monitors switch status per switch by turns.
Refer to the “[Extension Function 3: Sequential Monitoring of All Switch Pins]” section for additional details.
If both sequential and continuous monitoring are enabled at the same time, continuous monitoring will be the one
implemented.
If both sequential monitoring by power supply system and sequential monitoring of all switch pins are enabled at the same
time, sequential monitoring of all switch pins will be the one implemented.
Table 29. Normal Mode Setting Command
Register Address
Setting Data
44 43
FSQ FSQB FSQA FSQZ FITB3 FITB2 FITB1 FITB0
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
0
49
1
48
1
47
46
45
42
41
40
Normal Mode Setting
FMR
W/R
Setting Data
32 31
39
38
37
36
35
34
33
30
29
x
28
x
27
x
26
x
25
x
24
x
FITA3 FITA2 FITA1 FITA0 FITZ3 FITZ2 FITZ1 FITZ0 SVW1 SVW0
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
FSQ [Default: 0]
Sequential Monitoring of All Switch Terminals
0: Disabled 1: Enabled
FSQB [Default: 0]
FSQA [Default: 0]
FSQZ [Default: 0]
Sequential Monitoring by Power Supply System for INB System
0: Disabled 1: Enabled
Sequential Monitoring by Power Supply System for INA System
0: Disabled 1: Enabled
Sequential Monitoring by Power Supply System for INZ System
0: Disabled 1: Enabled
FIT*[3:0] (*: B, A, Z) [Default: 0000]
Monitoring Period for Normal Mode
0000: Continuous Monitoring 0001: 2.5 ms
0010: 5 ms
0100: 20 ms
0110: 40 ms
1000:100 ms
0011: 10 ms
0101: 30 ms
0111: 50 ms
1001: 1 ms
1010 to 1111: Setting prohibited
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Command Description - continued
SVW [1:0] [Default: 01]
Strobe Time
00: 93.75 µs
01: 125 µs
10: 187.5 µs
11: 250 µs
W/R
Register Write/Read Setting
0: Write
1: Read (“Setting data” is disabled)
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Command Description - continued
12. Sleep Mode Setting Command
This command allows the user to set the monitoring period and monitoring method of sleep mode.
The sleep mode is set by “Monitor Mode Transition Command”.
The strobe time of sleep mode is the same as the normal mode.
About the monitoring period and monitoring method, refer to the “Normal Mode Setting Command” discussed in section 11
below.
The monitoring period of the sleep mode and strobe time setting have some restrictions as follows.
· 1ms monitoring period with sequential monitoring by power supply system is prohibited.
· 1ms monitoring period with sequential monitoring of all switch pins is prohibited.
· At 2.5 ms monitoring period setting with sequential monitoring by power supply system, only 93.75 µs and 125 µs strobe
time are allowed. Other strobe time settings are prohibited.
· At 2.5 ms monitoring period setting and sequential monitoring of all switch pins, only 93.75 µs and 125 µs strobe time are
allowed. Other strobe time settings are prohibited.
Table 30. Sleep Mode Setting Command
Register Address
Setting Data
44 43
SSQ SSQB SSQA SSQZ SITB3 SITB2 SITB1 SITB0
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
1
49
0
48
0
47
46
45
42
41
40
Sleep Mode Setting
SMR
W/R
Setting Data
39
38
37
36
35
34
33
32
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
SITA3 SITA2 SITA1 SITA0 SITZ3 SITZ2 SITZ1 SITZ0
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
SSQ [Default: 0]
SSQB [Default: 0]
SSQA [Default: 0]
SSQZ [Default: 0]
Sequential Monitoring of All Switch Terminals
0: Disabled 1: Enabled
Sequential Monitoring by Power Supply System for INB System
0: Disabled 1: Enabled
Sequential Monitoring by Power Supply System for INA System
0: Disabled 1: Enabled
Sequential Monitoring by Power Supply System for INZ System
0: Disabled 1: Enable
SIT*[3:0] (*: B, A, Z) [Default: 0111]
Monitoring Period for Sleep Mode
0000: Continuous Monitoring 0001: 2.5 ms
0010: 5 ms
0100: 20 ms
0110: 40 ms
1000:100 ms
0011: 10 ms
0101: 30 ms
0111: 50 ms
1001: 1 ms
1010 to 1111: Setting prohibited
W/R
Register Write/Read Setting
0: Write
1: Read (“Setting data” is disabled)
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Command Description - continued
13. Detection Edge Selection Command
This command allows the user to configure interrupt trigger of switches for the INTB pin.
The interrupt trigger can be set to only the falling edge(Note 25) or both the rising and falling edges of the switch input voltage
per power supply system.
If only the falling edge is selected, the INTB pin not changes by the rising edges of switch input voltage.
(Note 25) If the INZ current “Source Setting” is enabled, the falling edge of the switch input pin is seen when the external switch is turned on. If the INZ current
“Sink Setting” is enabled, the falling edge is seen when the external switch is turned off.
Table 31. Detection Edge Selection Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
1
49
0
48
1
47
46
45
44
x
43
x
42
x
41
x
40
x
Detection Edge Selection
ISR
W/R
ISB
ISA
ISZ
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
ISB [Default: 1]
ISA [Default: 1]
ISZ [Default: 1]
W/R
Switch Edge where Interrupt Occurs for INB System
0: Only Falling Edge 1: Both Edges
Switch Edge where Interrupt Occurs for INA System
0: Only Falling Edge 1: Both Edges
Switch Edge where Interrupt Occurs for INZ System
0: Only Falling Edge 1: Both Edges
Register Write/Read Setting
0: Write
1: Read (“Setting data” is disabled)
14. Automatic Mode Transition Command
This command allows the user to configure the mode to automatically change from sleep mode to normal mode by a change
in switch status.
If the automatic transition is enabled, the monitoring period and monitoring method are changed to normal mode settings
when it detects a change in switch status on sleep.
Refer to the “[Basic Operation 4] Sleep Mode Operation Automatic Transition to Normal Mode” section for additional details
on how sleep mode operations works for this IC.
Table 32. Automatic Mode Transition Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
1
49
1
48
0
47
46
x
45
x
44
x
43
x
42
x
41
x
40
x
MR_IER
Automatic Mode Transition
MIR
W/R
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
MR_IER [Default: 1]
W/R
Automatic Mode Transition
0: Disabled
1: Enabled (Automatically mode transition, depend on the
switch status changing)
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
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Command Description - continued
15. Monitor Mode Transition Command
This command allows the user to change the mode of operation between normal and sleep.
Refer to the “[Basic Operation 3] Sleep Mode Operation (Manual Transition)” section for additional details on how sleep
mode operations works for this IC.
Table 33. Monitor Mode Transition Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
52
0
51
1
50
1
49
1
48
1
47
46
x
45
x
44
x
43
x
42
x
41
x
40
x
Monitor Mode Transition
MDR
W/R
MDC
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
MDC [Default: 0]
W/R
Monitoring Mode
0: Normal Mode
Register Write/Read Setting
0: Write 1: Read (“Setting data” is disabled)
1: Sleep Mode
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BD3381EKV-C
Command Description - continued
16. Reset Command
This command allows the user to reset the registers to their initial settings. After the reset command has been sent, the
physical interrupt pin goes to low (INTB=“L”).
Table 34. Reset Command
Register Address
Setting Data
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
0
52
1
51
1
50
1
49
1
48
1
47
x
46
x
45
x
44
x
43
x
42
x
41
x
40
x
Reset
RST
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
17. TEST Command
This command is used to enter test mode, which is only possible when the TEST pin is “H”.
Short TEST pin to ground and don’t enter to test mode.
Table 35. TEST Command
Register Address
Setting Data
44 43
Command
0:“L”, 1:“H”, x: don't care
55
0
54
1
53
1
52
1
51
1
50
0
49
0
48
1
47
46
45
42
41
40
TEST
TSR
TSS7 TSS6 TSS5 TSS4 TSS3 TSS2 TSS1 TSS0
Setting Data
39
x
38
x
37
x
36
x
35
x
34
x
33
x
32
x
31
x
30
x
29
x
28
x
27
x
26
x
25
x
24
x
Setting Data
CRC
7 to 0
CRC
23
x
22
x
21
x
20
x
19
x
18
x
17
x
16
x
15
x
14
x
13
x
12
x
11
x
10
x
9
x
8
x
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BD3381EKV-C
Command Description - continued
18. Register Map
Table 36. Register Map (1/2)
Register
Address
Setting Data Name (def*: Default Setting)
CRC
7:0
Register Name
Symbol
IRC
55:48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
Null Command
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
Interrupt Notification of
Switch Change Setting
Command
IER
CMR
CTR
PUDR
CER
LCR
MCR
WTR
DFR
DOT
FMR
SMR
ISR
[Default: Enabled]
Comparator Operation
Control Command
[Default: Enabled]
Comparator Threshold
Selection Command
[Default: 3.0 V]
INZ Current Source/Sink
Selection Command
[Default: Source]
Current Source Activation
Command
[Default: OFF (Disabled)]
Holding Current / Wetting
Current Level Selection
Command (LSB)
[Default: Wetting current=1
mA (Holding current)]
Holding Current / Wetting
Current Level Selection
Command (MSB)
[Default: Wetting current
=1 mA (Holding current)]
Wetting Current Operation
Control Command
[Default: Disabled]
n-Times Matched Filter
Activation Control
Command
[Default: Disabled]
DOUT Setting Command
[Default: Disabled]
Normal Mode Setting
Command
[Default: Full-time
monitor,Strobe time:125
us,Sequential monitor is
disabled]
Sleep Mode Setting
Command
[Default: Monitor period:50
ms,Sequential monitor is
disabled]
Detection Edge Selection
Command
[Default: Both edges]
Automatic Mode Transition
Command
[Default: Automatic
transition is enabled]
MIR
Monitor Mode Ttransition
Command
MDR
[Default: Normal mode]
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BD3381EKV-C
Command Description - continued
Table 37. Register Map (2/2)
Register
Address
Setting Data Name (def*: Default Setting)
CRC
7:0
Register Name
Symbol
RST
55:48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
Reset Command
0x5F
0x61
Interrupt Notification of
Switch Change Setting
Command Read
RIER
Comparator Operation
Control Command Read
RCMR 0x62
Comparator Threshold
Selection Command Read
RCTR
0x63
INZ Current Source/Sink
Selection Command Read
RPUDR 0x64
Current Source Activation
Command Read
RCER
RLCR
0x65
0x66
Holding Current / Wetting
Current Level Selection
Command (LSB) Read
Holding Current / Wetting
Current Level Selection
Command (MSB) Read
RMCR 0x67
RWTR 0x68
Wetting Current Operation
Control Command Read
n-Times Matched Filter
Activation Control
Command Read
RDFR
0x69
DOUT Setting Command
Read
RDOT 0x6A
RFMR 0x6B
RSMR 0x6C
Normal Mode Setting
Command Read
Sleep Mode Setting
Command Read
Detection Edge Selection
Command Read
RISR
RMIR
0x6D
0x6E
Automatic Mode Transition
Command Read
Monitor Mode Ttransition
Command Read
RMDR 0x6F
TEST Command
[Default: Disabled]
TSR
0x79
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BD3381EKV-C
Command Description - continued
Table 38. Register Map (SO Bit Alignment)
-
Read Data Name
CRC
7:0
Register Name
Symbol
RIER
55:48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
Interrupt Notification of
Switch Change Setting
Command Read
Comparator Operation
Control Command Read
RCMR
RCTR
RPUDR
RCER
RLCR
RMCR
RWTR
RDFR
RDOT
RFMR
RSMR
RISR
Comparator Threshold
Selection Command Read
INZ Current Source/Sink
Selection Command Read
Wetting Current Operation
Control Command Read
Holding Current / Wetting
Current Level Selection
Command (LSB) Read
Holding Current / Wetting
Current Level Selection
Command (MSB) Read
Wetting Current Operation
Control Command Read
n-Times Matched Filter
Activation Control
Command Read
DOUT Setting Command
Read
Normal Mode Setting
Command Read
Sleep Mode Setting
Command Read
Detection Edge Selection
Command Read
Automatic Mode Transition
Command Read
RMIR
Monitor Mode Ttransition
Command Read
RMDR
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BD3381EKV-C
Typical Performance Curves
Unless otherwise specified, VPUA=VPUB=13 V, VDDI=5 V, VDDL=REF5.
Series products (BD3380MUV-M/BD3381EKV-C) use the same data.
4.6
4.5
4.4
4.3
4.2
4.1
4
4.5
4.4
4.3
4.2
4.1
4
VPUB=13 V
VPUB=13 V
3.9
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
Ambient Temperature : Ta[˚C]
Ambient Temperature : Ta[˚C]
Figure 22. POR (Power on Reset) Activation Voltage
vs Ambient Temperature
Figure 23. POR (Power on Reset) Deactivation Voltage
vs Ambient Temperature
500
500
450
400
350
300
250
200
150
100
50
450
VPUB=26 V
VPUB=13 V
Ta=+125 ˚C
400
VPUB=8 V
350
300
250
200
150
100
50
Ta=-40 ˚C
Ta=+25 ˚C
0
0
-50 -25
0
25
50
75 100 125 150
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 24. VPUA/VPUB Operating Current
vs Ambient Temperature
(Continuous monitor setting, Current source is disabled,
Figure 25. VPUA/VPUB Operating Current
vs Supply Voltage
(Continuous monitor setting, Current source is
disabled, “Hi-Z” Status)
“Hi-Z” Status)
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BD3381EKV-C
Typical Performance Curves - continued
100
90
80
70
60
50
40
30
20
10
0
100
90
VPUB=26 V
Ta=+125 ˚C
Ta=+25 ˚C
80
70
60
50
40
30
20
10
0
VPUB=13 V
Ta=-40 ˚C
VPUB=8 V
-50 -25
0
25
50
75 100 125 150
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 26. VPUA/VPUB Average Operating Current at
Intermittent Monitoring vs Ambient Temperature
(Monitoring Period: 50 ms, Strobe Time: 125 µs,
Figure 27. VPUA/VPUB Average Operating Current at
Intermittent Monitoring vs Supply Voltage
(Monitoring Period: 50 ms, Strobe Time: 125 µs,
Source/Sink Current Setting: 1 mA)
Source/Sink Current Setting: 1 mA)
10
9
10
9
8
8
7
7
VDDI=5.25 V
VDDI=5 V
6
5
4
3
2
1
0
6
Ta=+25 ˚C
5
4
VDDI=3.1 V
Ta=-40 ˚C
Ta=+125 ˚C
3
2
1
0
3.0
3.5
4.0
4.5
5.0
5.5
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDI[V]
Ambient Temperature : Ta[˚C]
Figure 29. VDDI Operating Current vs Supply Voltage
Figure 28. VDDI Operating Current vs Ambient Temperature
(INTB=“H”, CSB=“H”)
(INTB=“H”, CSB=“H”)
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BD3381EKV-C
Typical Performance Curves - continued
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
4.75
5.25
5.20
5.15
5.10
Ta=-40 ˚C
Ta=+25 ˚C
5.05
VPUB=26 V
5.00
4.95
VPUB=13 V
VPUB=8 V
Ta=+125 ˚C
4.90
4.85
4.80
4.75
-50 -25
0
25
50
75 100 125 150
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 30. REF5 Output Voltage vs Ambient Temperature
Figure 31. REF5 Output Voltage vs Supply Voltage
1.8
1.7
1.6
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.5
VPUB=26 V
Ta=+25 ˚C
1.4
VPUB=8 V
VPUB=13 V
1.3
Ta=-40 ˚C
Ta=+125 ˚C
1.2
1.1
1.0
-50 -25
0
25
50
75 100 125 150
0
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 32. Source Current 1 vs Ambient Temperature
(1 mA Setting, 0 V external supply)
Figure 33. Source Current 1 vs Supply Voltage
(1 mA Setting, 0 V external supply)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
3.0
2.5
2.0
Ta=+25 ˚C
Ta=+125 ˚C
INZ0=0 V
INZ0=4 V
1.5
1.0
Ta=-40 ˚C
INZ0=8 V
0.5
0.0
-0.5
-1.0
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 34. Source Current 1 vs Ambient Temperature
(1 mA Setting)
Figure 35. Source Current 1 vs Supply Voltage
(1 mA Setting)
1.8
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
Ta=+25 ˚C
VDDL=5 V
VDDL=5.25 V
VDDL=4.75 V
Ta=+125 ˚C
Ta=-40 ˚C
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 36. Sink Current 1 vs Ambient Temperature
(1 mA Setting, 8 V external supply)
Figure 37. Sink Current 1 vs Supply Voltage
(1 mA Setting, 8 V external supply)
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49/78
BD3381EKV-C
Typical Performance Curves - continued
3.0
2.5
2.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
INZ0=26 V
Ta=-40 ˚C
Ta=+25 ˚C
1.5
1.0
INZ0=13 V
INZ0=8 V
Ta=+125 ˚C
0.5
0.0
-0.5
-1.0
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 38. Sink Current 1 vs Ambient Temperature
(1 mA Setting)
Figure 39. Sink Current 1 vs Supply Voltage
(1 mA Setting)
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
Ta=+25 ˚C
VPUB=26 V
VPUB=8 V
Ta=-40 ˚C
Ta=+125 ˚C
VPUB=13 V
-50 -25
0
25
50
75 100 125 150
0
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 41. Source Current 2 vs Supply Voltage
(3 mA Setting, 0 V external supply)
Figure 40. Source Current 2 vs Ambient Temperature
(3 mA Setting, 0 V external supply)
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BD3381EKV-C
Typical Performance Curves - continued
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
7.0
6.0
5.0
Ta=+25 ˚C
INZ0=0 V
INZ0=4 V
Ta=-40 ˚C
4.0
3.0
2.0
1.0
0.0
-1.0
INZ0=8 V
Ta=+125 ˚C
-20
-10
0
10
20
30
40
50
-50 -25
0
25
50
75 100 125 150
Supply Voltage : INZ0[V]
Ambient Temperature : Ta[˚C]
Figure 42. Source Current 2 vs Ambient Temperature
(3 mA Setting)
Figure 43. Source Current 2 vs Supply Voltage
(3 mA Setting)
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
Ta=-40 ˚C
VDDL=5.25 V
VDDL=5 V
Ta=+25 ˚C
VDDL=4.75 V
Ta=+125 ˚C
4.7
4.8
4.9
5
5.1
5.2
5.3
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDL[V]
Ambient Temperature : Ta[˚C]
Figure 44. Sink Current 2 vs Ambient Temperature
(3 mA Setting, 8 V external supply)
Figure 45. Sink Current 2 vs Supply Voltage
(3 mA Setting, 8 V external supply)
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BD3381EKV-C
Typical Performance Curves - continued
7.0
6.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
INZ0=26 V
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
Ta=+25 ˚C
INZ0=13 V
INZ0=8 V
Ta=+125 ˚C
Ta=-40 ˚C
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 46. Sink Current 2 vs Ambient Temperature
(3 mA Setting)
Figure 47. Sink Current 2 vs Supply Voltage
(3 mA Setting)
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
VPUB=26 V
VPUB=8 V
Ta=+25 ˚C
VPUB=13 V
Ta=-40 ˚C
Ta=+125 ˚C
-50 -25
0
25
50
75 100 125 150
0
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 48. Source Current 3 vs Ambient Temperature
(5 mA Setting, 0 V external supply)
Figure 49. Source Current 3 vs Supply Voltage
(5 mA Setting, 0 V external supply)
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BD3381EKV-C
Typical Performance Curves - continued
10.0
9.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
8.0
INZ0=0 V
INZ0=4 V
Ta=+25 ˚C
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
Ta=-40 ˚C
INZ0=8 V
Ta=+125 ˚C
-20
-10
0
10
20
30
40
50
-50 -25
0
25
50
75 100 125 150
Supply Voltage : INZ0[V]
Ambient Temperature : Ta[˚C]
Figure 50. Source Current 3 vs Ambient Temperature
(5 mA Setting)
Figure 51. Source Current 3 vs Supply Voltage
(5 mA Setting)
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
VDDL=5.25 V
VDDL=5 V
Ta=+25 ˚C
Ta=-40 ˚C
Ta=+125 ˚C
VDDL=4.75 V
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 52. Sink Current 3 vs Ambient Temperature
(5 mA Setting, 8 V external supply)
Figure 53. Sink Current 3 vs Supply Voltage
(5 mA Setting, 8 V external supply)
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BD3381EKV-C
Typical Performance Curves - continued
10.0
9.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
8.0
Ta=+25 ˚C
Ta=-40 ˚C
INZ0=13 V
INZ0=26 V
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
-1.0
Ta=+125 ˚C
INZ0=8 V
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 54. Sink Current 3 vs Ambient Temperature
(5 mA Setting)
Figure 55. Sink Current 3 vs Supply Voltage
(5 mA Setting)
18
17
16
15
14
13
12
11
10
18
17
16
15
14
13
12
11
10
VPUB=26 V
VPUB=13 V
VPUB=8 V
Ta=+25 ˚C
Ta=+125 ˚C
Ta=-40 ˚C
0
5
10
15
20
25
30
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VPUB[V]
Ambient Temperature : Ta[˚C]
Figure 56. Source Current 4 vs Ambient Temperature
(10 mA Setting, 0 V external supply)
Figure 57. Source Current 4 vs Supply Voltage
(10 mA Setting, 0 V external supply)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
20
18
16
14
12
10
8
20
18
16
INZ0=0 V
INZ0=4 V
Ta=+25 ˚C
14
12
10
8
Ta=-40 ˚C
INZ0=8 V
Ta=+125 ˚C
6
6
4
4
2
2
0
0
-2
-2
-20
-10
0
10
20
30
40
50
-50 -25
0
25
50
75 100 125 150
Supply Voltage : INZ0[V]
Ambient Temperature : Ta[˚C]
Figure 58. Source Current 4 vs Ambient Temperature
(10 mA Setting)
Figure 59. Source Current 4 vs Supply Voltage
(10 mA Setting)
18
18
17
16
15
14
13
12
11
10
17
16
15
14
13
12
11
10
VDDL=5.25 V
VDDL=5 V
Ta=+25 ˚C
Ta=-40 ˚C
Ta=+125 ˚C
VDDL=4.75 V
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 60. Sink Current 4 vs Ambient Temperature
(10 mA Setting, 8 V external supply)
Figure 61. Sink Current 4 vs Supply Voltage
(10 mA Setting, 8 V external supply)
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BD3381EKV-C
Typical Performance Curves - continued
20
18
16
20
18
16
14
12
10
8
Ta=-40 ˚C
Ta=+25 ˚C
INZ0=26 V
INZ0=13 V
INZ0=8 V
14
12
10
8
Ta=+125 ˚C
6
6
4
4
2
2
0
0
-2
-2
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 62. Sink Current 4 vs Ambient Temperature
(10 mA Setting)
Figure 63. Sink Current 4 vs Supply Voltage
(10 mA Setting)
27
27
25
23
21
19
17
15
25
23
21
19
17
15
Ta=+25 ˚C
VPUB=26 V
VPUB=13 V
VPUB=8 V
Ta=-40 ˚C
Ta=+125 ˚C
-50 -25
0
25
50
75 100 125 150
0
5
10
15
20
25
30
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 64. Source Current 5 vs Ambient Temperature
(15 mA Setting, 0 V external supply)
Figure 65. Source Current 5 vs Supply Voltage
(15 mA Setting, 0 V external supply)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
30
25
20
15
10
5
30
25
Ta=+25 ˚C
INZ0=0 V
Ta=-40 ˚C
20
INZ0=4 V
INZ0=8 V
Ta=+125 ˚C
15
10
5
0
0
-5
-5
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 66. Source Current 5 vs Ambient Temperature
(15 mA Setting)
Figure 67. Source Current 5 vs Supply Voltage
(15 mA Setting)
27
25
27
25
23
21
19
17
15
23
VDDL=5 V
Ta=+25 ˚C
VDDL=5.25 V
21
Ta=-40 ˚C
VDDL=4.75 V
19
Ta=+125 ˚C
17
15
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 69. Sink Current 5 vs Supply Voltage
(15 mA Setting, 8 V external supply)
Figure 68. Sink Current 5 vs Ambient Temperature
(15 mA Setting, 8 V external supply)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
30
25
20
15
10
5
30
25
Ta=+25 ˚C
INZ0=26 V
20
Ta=+125 ˚C
Ta=-40 ˚C
INZ0=13 V
INZ0=8 V
15
10
5
0
0
-5
-5
-50 -25
0
25
50
75 100 125 150
-20
-10
0
10
20
30
40
50
Ambient Temperature : Ta[˚C]
Supply Voltage : INZ0[V]
Figure 70. Sink Current 5 vs Ambient Temperature
(15 mA Setting)
Figure 71. Sink Current 5 vs Supply Voltage
(15 mA Setting)
3.3
3.2
3.1
3.0
2.9
2.8
2.7
3.3
3.2
3.1
3.0
2.9
2.8
2.7
Ta=-40 ˚C
VPUB=26 V
VPUB=13 V
Ta=+25 ˚C
VPUB=8 V
Ta=+125 ˚C
5
15
25
35
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VPUB[V]
Ambient Temperature : Ta[˚C]
Figure 72. Low to High Switch Detection Threshold Voltage
vs Ambient Temperature (3.0 V Setting)
Figure 73. Low to High Switch Detection Threshold Voltage
vs Supply Voltage (3.0 V Setting)
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09.Aug.2018 Rev.001
BD3381EKV-C
Typical Performance Curves - continued
3.2
3.1
3.2
3.1
3.0
2.9
2.8
2.7
2.6
3.0
Ta=-40 ˚C
Ta=+25 ˚C
VPUB=13 V
VPUB=8 V
2.9
2.8
2.7
2.6
VPUB=26 V
Ta=+125 ˚C
-50 -25
0
25
50
75 100 125 150
5
15
25
35
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 74. High to Low Switch Detection Threshold Voltage
vs Ambient Temperature (3.0 V Setting)
Figure 75. High to Low Switch Detection Threshold Voltage
vs Supply Voltage (3.0 V Setting)
4.3
4.2
4.3
4.2
4.1
Ta=-40 ˚C
4.1
VPUB=26 V
VPUB=13 V
Ta=+25 ˚C
4.0
4.0
Ta=+125 ˚C
3.9
3.9
VPUB=8 V
3.8
3.7
3.8
3.7
-50 -25
0
25
50
75 100 125 150
5
15
25
35
Ambient Temperature : Ta[˚C]
Supply Voltage : VPUB[V]
Figure 76. Low to High Switch Detection Threshold Voltage
vs Ambient Temperature (4.0 V Setting)
Figure 77. Low to High Switch Detection Threshold Voltage
vs Supply Voltage (4.0 V Setting)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
4.2
4.1
4.0
4.2
4.1
4.0
3.9
3.8
3.7
3.6
Ta=-40 ˚C
Ta=+25 ˚C
VPUB=26 V
VPUB=13 V
3.9
3.8
3.7
3.6
VPUB=7 V
Ta=+125 ˚C
5
15
25
35
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VPUB[V]
Ambient Temperature : Ta[˚C]
Figure 78. High to Low Switch Detection Threshold Voltage
vs Ambient Temperature (4.0 V Setting)
Figure 79. High to Low Switch Detection Threshold Voltage
vs Supply Voltage (4.0 V Setting)
2.2
2.0
2.2
2.0
1.8
1.8
VDDI=5.25 V
1.6
1.6
1.4
1.2
1.0
0.8
Ta=-40 ˚C
VDDI=5 V
1.4
Ta=+25 ˚C
Ta=+125 ˚C
VDDI=3.1 V
1.2
1.0
0.8
-50 -25
0
25
50
75 100 125 150
3
3.5
4
4.5
5
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 80. Serial Interface Threshold Voltage
vs Ambient Temperature
Figure 81. Serial Interface Threshold Voltage
vs Supply Voltage
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
10
8
10
8
6
6
4
4
2
0
VDDI=3.1 V
VDDI=5 V
2
Ta=-40 ˚C
Ta=+25 ˚C
VDDI=5.25 V
Ta=+125 ˚C
0
-2
-2
-4
-6
-8
-10
-4
-6
-8
-10
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 83. CSB Input Current vs Supply Voltage
(CSB=VDDI)
Figure 82. CSB Input Current vs Ambient Temperature
(CSB=VDDI)
85
80
75
70
65
60
55
50
85
80
75
70
65
60
55
50
45
40
35
30
Ta=+125 ˚C
Ta=-40 ˚C
VDDI=5.25 V
VDDI=3.1 V
VDDI=5 V
45
40
35
30
Ta=+25 ˚C
3.0
3.5
4.0
4.5
5.0
5.5
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDI[V]
Ambient Temperature : Ta[˚C]
Figure 84. CSB Pull-up Current vs Ambient Temperature
(CSB=0 V)
Figure 85. CSB Pull-up Current vs Supply Voltage
(CSB=0 V)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
150
140
130
120
110
100
150
140
130
120
110
100
90
Ta=-40 ˚C
VDDI=3.1 V
Ta=+25 ˚C
90
VDDI=5 V
80
70
60
50
80
Ta=+125 ˚C
VDDI=5.25 V
70
60
50
3.0
3.5
4.0
4.5
5.0
5.5
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDI[V]
Ambient Temperature : Ta[˚C]
Figure 87. SI, SCLK Pull-down Resistor vs Supply Voltage
Figure 86. SI, SCLK Pull-down Resistor vs Ambient
Temperature
10
8
10
8
6
6
4
4
2
2
Ta=+125 ˚C
Ta=+25 ˚C
Ta=-40 ˚C
VDDI=3.1 V
VDDI=5 V
VDDI=5.25 V
0
-2
0
-2
-4
-4
-6
-6
-8
-8
-10
-10
3.0
3.5
4.0
4.5
5.0
5.5
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDI[V]
Ambient Temperature : Ta[˚C]
Figure 89. SI, SCLK Input Current vs Supply Voltage
(SI, SCLK=0 V)
Figure 88. SI, SCLK Input Current vs Ambient Temperature
(SI, SCLK=0 V)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
7
7
6
5
4
3
2
1
0
6
VDDI=5.25 V
Ta=+25 ˚C
5
Ta=-40 ˚C
VDDI=5 V
4
VDDI=3.1 V
3
2
1
0
Ta=+125 ˚C
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 91. SO “H” Level Output Voltage vs Supply Voltage
Figure 90. SO “H” Level Output Voltage vs Ambient
(ISOURCE=200 µA)
Temperature (ISOURCE=200 µA)
400
350
300
250
200
150
400
350
300
250
200
150
100
50
Ta=+125 ˚C
VDDI=3.1 V
100
50
0
Ta=+25 ˚C
VDDI=5.25 V
VDDI=5 V
Ta=-40 ˚C
0
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 92. SO “L” Level Output Voltage vs Ambient
Figure 93. SO “L” Level Output Voltage vs Supply Voltage
Temperature (ISINK=1.6 mA)
(ISINK =1.6 mA)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
10
8
10
8
6
6
4
4
2
2
Ta=+125 ˚C
Ta=+25 ˚C
VDDI=3.1 V
VDDI=5 V
Ta=-40 ˚C
VDDI=5.25 V
0
-2
0
-2
-4
-6
-8
-10
-4
-6
-8
-10
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 94. SO (Set to “Hi-Z”) Input Current vs Ambient
Figure 95. SO (Set to “Hi-Z”) Input Current vs Supply
Temperature
Voltage
7
7
6
6
VDDI=5.25 V
Ta=+125 ˚C
5
5
Ta=+25 ˚C
VDDI=5 V
4
4
Ta=-40 ˚C
3
3
2
1
0
VDDI=3.1 V
2
1
0
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 97. DOUT “H” Level Output Voltage vs Supply
Figure 96. DOUT “H” Level Output Voltage vs Ambient
Voltage (ISOURCE=200 µA)
Temperature (ISOURCE=200 µA)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
400
350
300
250
200
150
100
50
400
350
300
250
200
150
Ta=+125 ˚C
Ta=+25 ˚C
VDDI=5 V
100
50
0
VDDI=3.1 V
VDDI=5.25 V
Ta=-40 ˚C
0
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 98. DOUT “L” Level Output Voltage vs Ambient
Figure 99. DOUT “L” Level Output Voltage vs Supply
Temperature (ISINK=1.6 mA)
Voltage (ISINK=1.6 mA)
85
80
75
70
65
85
80
75
70
65
60
55
60
55
50
45
40
35
30
25
20
15
VDDI=5.25 V
VDDI=5 V
50
Ta=+125 ˚C
45
40
Ta=+25 ˚C
35
30
Ta=-40 ˚C
VDDI=3.1 V
25
20
15
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 101. INTB Internal Pull-up Current vs Supply
Voltage
Figure 100. INTB Internal Pull-up Current vs Ambient
Temperature
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BD3381EKV-C
Typical Performance Curves - continued
7
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
VDDI=5.25 V
Ta=+125 ˚C
VDDI=5 V
Ta=+25 ˚C
VDDI=3.1 V
Ta=-40 ˚C
-50 -25
0
25
50
75 100 125 150
3.0
3.5
4.0
4.5
5.0
5.5
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDI[V]
Figure 102. INTB “H” Level Output Voltage vs Ambient
Figure 103. INTB “H” Level Output Voltage vs Supply
Temperature Characteristic (INTB=OPEN)
Voltage (INTB=OPEN)
400
400
350
300
250
200
350
300
250
200
150
100
50
VDDL=4.75 V
VDDL=5 V
Ta=+125 ˚C
150
100
50
Ta=+25 ˚C
VDDL=5.25 V
Ta=-40 ˚C
0
0
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5.0
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 105. INTB “L” Level Output Voltage vs Supply
Figure 104. INTB “L” Level Output Voltage vs Ambient
Voltage (ISINK=1.0 mA)
Temperature (ISINK=1.0 mA)
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BD3381EKV-C
Typical Performance Curves - continued
110
105
110
105
100
95
Ta=+125 ˚C
100
95
90
VDDL=5.25 V
VDDL=5 V
Ta=+25 ˚C
Ta=-40 ˚C
90
VDDL=4.75 V
85
85
80
80
4.7
4.8
4.9
5.0
5.1
5.2
5.3
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDL[V]
Ambient Temperature : Ta[˚C]
Figure 107. Switch Strobe Time vs Supply Voltage
(93.75 µs Setting)
Figure 106. Switch Strobe Time vs Ambient Temperature
(93.75 µs Setting)
140
135
140
Ta=+125 ˚C
135
VDDL=5.25 V
130
130
125
VDDL=5 V
125
Ta=+25 ˚C
120
120
VDDL=4.75 V
Ta=-40 ˚C
115
110
115
110
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5.0
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 108. Switch Strobe Time vs Ambient Temperature
(125 µs Setting)
Figure 109. Switch Strobe Time vs Supply Voltage
(125 µs Setting)
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BD3381EKV-C
Typical Performance Curves - continued
210
205
210
205
200
195
190
185
180
175
170
165
160
Ta=+125 ˚C
200
195
190
185
180
175
170
165
160
VDDL=5.25 V
Ta=+25 ˚C
Ta=-40 ˚C
VDDL=5 V
VDDL=4.75 V
4.7
4.8
4.9
5.0
5.1
5.2
5.3
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VDDL[V]
Ambient Temperature : Ta[˚C]
Figure 110. Switch Strobe Time vs Ambient Temperature
(187.5 µs Setting)
Figure 111. Switch Strobe Time vs Supply Voltage
(187.5 µs Setting)
280
275
270
280
275
270
265
260
255
250
245
240
235
230
225
220
265
VDDL=5.25 V
Ta=+125 ˚C
Ta=+25 ˚C
260
255
250
VDDL=5 V
245
240
235
230
225
220
Ta=-40 ˚C
VDDL=4.75 V
-50 -25
0
25
50
75 100 125 150
4.7
4.8
4.9
5.0
5.1
5.2
5.3
Ambient Temperature : Ta[˚C]
Supply Voltage : VDDL[V]
Figure 112. Switch Strobe Time vs Ambient Temperature
(250 µs Setting)
Figure 113. Switch Strobe Time vs Supply Voltage
(250 µs Setting)
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TSZ22111 • 15 • 001
BD3381EKV-C
Typical Performance Curves - continued
50
45
40
35
30
50
45
40
35
30
25
20
15
10
5
Ta=-40 ˚C
Ta=+25 ˚C
VPUB=8 V
25
20
15
10
5
VPUB=13 V
VPUB=26 V
Ta=+125 ˚C
0
0
5.0
10.0
15.0
20.0
25.0
30.0
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VPUB[V]
Ambient Temperature : Ta[˚C]
Figure 114. Source/Sink Current Rise Time
vs Ambient Temperature
Figure 115. Source/Sink Current Rise Time
vs Supply Voltage
(FSQ=“0”, FSQZ/A/B=“0”, 10 mA Setting,
(FSQ=“0”, FSQZ/A/B=“0”, 10 mA Setting,
Load Resistance=100 Ω)
Load Resistance=100 Ω)
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
Ta=-40 ˚C
VPUB=13 V
VPUB=8 V
VPUB=26 V
Ta=+25 ˚C
Ta=+125 ˚C
0
0
5.0
10.0
15.0
20.0
25.0
30.0
-50 -25
0
25
50
75 100 125 150
Supply Voltage : VPUB[V]
Ambient Temperature : Ta[˚C]
Figure 117. Source/Sink Current Fall Time
vs Supply Voltage
Figure 116. Source/Sink Current Fall Time
vs Ambient Temperature
(FSQ=“0”, FSQZ/A/B=“0”, 10 mA Setting,
Load Resistance=100 Ω)
(FSQ=“0”, FSQZ/A/B=“0”, 10 mA Setting,
Load Resistance=100 Ω)
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BD3381EKV-C
Application Examples
1. Example of Application Circuit and its External Components
VBAT
VBAT
BD3381EKV-C
R0
VPUB
INZ0
C0
C34
VPUA
VBAT
C35
R11
C11
R12
C12
R21
C21
R22
C22
R32
C32
INZ11
INA0
INA9
SCLK
SI
MCU
CSB
SO
INTB
DOUT
VDDI
TEST
INB0
VDDI
INB10
C36
REF5
VDDL
C33
GND
Figure 118. Example of Application Circuit and its External Components
·Capacitor (C34, C35, C36) at Power Supply Pins (VPUA, VPUB, VDDI)
Insert a 0.1 µF capacitor between each power supply pin (VPUA, VPUB, and VDDI) and ground. Make sure to design the
external components with sufficient margin for the intended application. It is recommended to use capacitors with excellent
voltage and temperature characteristics.
·Capacitor (C33) at REF5
In order to prevent oscillation, a capacitor needs to be placed between the REF5 output pin and ground. It is recommended
to use a capacitor (electrolytic, tantalum, or ceramic of at least 4.7 µF). Make sure that capacitance of 4.7 µF or higher is
maintained at the intended operating supply voltage and temperature range. Temperature change can cause fluctuation in
capacitance, which may lead to oscillation. If a ceramic capacitor is chosen, it is recommended to use X5R, X7R, or any
others with better temperature and DC biasing characteristics and higher voltage tolerance.
·Capacitor (C0 to C32) at Switch Pin (INZ, INA, INB)
It is recommended to use at least 0.1 µF capacitors as protection against ESD. Make sure to design the external circuit with
sufficient margin for the intended application. Use capacitors with application specific voltage and temperature
characteristics.
·Resistor (R0 to R32) at Switch Pin (INZ, INA, INB)
Choose the appropriate resistor to reduce EMI noise. Design the circuit so the pin voltage does not fall below the threshold
voltage defined by ground float of [Load Resistance] x [Wetting Current] (when wetting current is set to source) or voltage
drop (when wetting current is set to sink) may occur.
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BD3381EKV-C
Application Examples - continued
2. Example of Parallel Connection Circuit
MCU
BD3381EKV-C
MOSI
MISO
SCLK
SI
SO
SCLK
CSB
CSB1
CSB2
INTB
INTB
BD3381EKV-C
SI
SO
SCLK
CSB
INTB
Figure 119. Example of Parallel Connection Circuit
·Parallel Connection
Prepare CSB pins respectively.
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BD3381EKV-C
I / O Equivalence Circuit
Type
Equivalence circuit
Type
Equivalence circuit
VDDI
VDDI
VDDI
VDDI
A
B
Input: SI, SCLK
(with an internal pull-down resistor)
Input: CSB
(with an internal pull-up current source)
VDDI
VDDI
VPUA
C
E
G
D
Open-drain Interrupt Output: INTB
(with an internal pull-up resistor)
Switch Input: INZ0 to INZ11
(with an internal pull-up/pull-down current source)
VPUA/VPUB
VDDI
VDDI
F
Switch Input: INA0 to INA9, INB0 to INB10
(with an internal pull-up current source)
Output: DOUT
VDDI
VDDI
H
Output: SO
Output: REF5
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BD3381EKV-C
I / O Equivalence Circuit - continued
Type
Equivalence circuit
I
Input: TES
(with an internal pull-down resistor)
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BD3381EKV-C
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a
voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
9. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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BD3381EKV-C
Operational Notes - continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 120. Example of monolithic IC structure
12. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD3381EKV-C
Ordering Information
B D 3
3
8
1 E K V -
CE 2
Part
Number
Package
EKV: HTQFP64BV
Rank
C: Automotive
Packaging and Forming Specification
E2: Embossed Tape and Reel
Marking Diagrams
HTQFP64BV (TOP VIEW)
Part Number Marking
LOT Number
B D 3 3 8 1
Pin 1 Mark
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BD3381EKV-C
Physical Dimension, Tape and Reel information
Package Name
HTQFP64BV
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BD3381EKV-C
Revision History
Date
Revision
001
Changes
09.Aug.2018
New release.
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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