BD35615HFV [ROHM]

Fixed Positive LDO Regulator, PDSO6, ROHS COMPLIANT, HVSOF-6;
BD35615HFV
型号: BD35615HFV
厂家: ROHM    ROHM
描述:

Fixed Positive LDO Regulator, PDSO6, ROHS COMPLIANT, HVSOF-6

光电二极管 输出元件 调节器
文件: 总12页 (文件大小:773K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TECHNICAL NOTE  
High-performance Regulator IC Series for PCs  
300mA Linear Regulators  
for Desktop PC  
BD35613HFV/EFJ/HFN, BD35615HFV/EFJ/HFN, BD35618HFV/EFJ/HFN  
Description  
BD3561series is a LDO regulator with output current 300mA. The output accuracy is±1% of output voltage. BD3561  
series has some kinds of output voltage line-up and package line-up. Thus, it is used for the wide applications of  
digital appliances. Over current protection (for protecting the IC destruction by output short circuit), shutdown ON/OFF  
switch (for setting the circuit current 0μA at shutdown mode), and thermal shutdown circuit (for protecting ICs from heat  
destruction by over load condition) are all built in.  
Features  
1) Output current 300mA  
2) Output voltage accuracy : ±1%  
3) Built-in Over Current Protection circuit (OCP)  
4) Built-in Thermal Shut Down circuit (TSD)  
5) With shut down switch  
6) Rich package line-up : HSON8, HTSOP-J8, HVSOF6  
Line-up  
Product name  
BD3561HFN  
BD3561EFJ  
BD3561HFV  
8.0V  
5.0V  
3.3V  
Package  
HSON8  
HTSOP-J8  
HVSOF6  
Product name : BD3561□ □□□  
b
a
Symbol  
Output Voltage (V)  
a
b
1□  
18  
15  
13  
□□□  
HFN  
EFJ  
Package  
HSON8  
8.0V typ.  
5.0V typ.  
3.3V typ.  
HTSOP-J8  
HVSOF6  
HFV  
Oct. 2008  
Absolute maximum ratings (Ta=25)  
Parameter  
Symbol  
Vcc  
Limits  
15.0 *1  
Unit  
V
Power Supply Voltage  
EN Voltage  
VEN  
15.0  
V
HSON8  
1350 *2  
2110 *3  
850.0 *4  
-10+100  
-55+150  
+150  
Power Dissipation  
HTSOP-J8  
HVSOF6  
Pd  
mW  
Operating Temperature Range  
Storage Temperature Range  
Topr  
Tstg  
Junction Temperature  
Tjmax  
*1 Not to exceed Pd  
*2 Reduced by 10.8mW for each increase in Ta of 1over 25.  
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB. (copper foil area:100mm2))  
*3 Reduced by 16.9mW for each increase in Ta of 1over 25.  
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB, 2 layer)  
*4 Reduced by 6.8mW for each increase in Ta of 1over 25.  
(when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB. (copper foil area:100mm2))  
Operating Conditions (Ta=25)  
Parameter  
Input Power Supply Voltage  
EN Voltage  
Symbol  
VCC  
VEN  
Io  
Min.  
Max.  
14.0  
14.0  
300  
Unit  
V
Vo+1.8  
-
-
V
Output Current  
mA  
This product should not be used in a radioactive environment.  
ELECTRICAL CHARACTERISTICS  
BD3561HFN/EFJ/HFV (Unless otherwise noted, Ta=25, EN=3V, Vcc=12V)  
Parameter  
Symbol  
Min.  
Vo(T)×  
0.99  
Vo(T)×  
0.985  
-
Typ.  
Max.  
Vo(T)×  
1.01  
Vo(T)×  
1.015  
5
Unit  
V
Conditions  
Io=0mA  
Output Voltage 1  
Vo1  
Vo(T)  
Tj=0 to 100℃  
Output Voltage 2  
Vo2  
Vo(T)  
V
Io=0mA300mA  
EN=0V, @OFF mode  
Circuit Current at shutdown mode  
Bias Current  
Isd  
Icc  
Io  
0
200  
-
μA  
μA  
mA  
-
300  
Output Current Ability  
300  
-
Vcc=(Vo+1.8V)14.0V,  
Line Regulation  
Reg.I  
-
25  
50  
MV  
Io=300mA  
EN Low Voltage  
EN High Voltage  
EN Bias Current  
VEN (Low)  
VEN (High)  
IEN  
0
-
-
0.8  
14.0  
5.0  
V
V
2.4  
0.5  
1.0  
μA  
2/12  
Reference Data  
BD35618HFV (Unless otherwise specified, Ta=25, EN=3V, Vcc=12V)  
Vo  
Vo  
100mV/div  
100mV/div  
EN  
5V/div  
Io  
Io  
Vo  
200mA/di  
200mA/di  
5V/div  
(20m sec/div)  
(10μsec/div)  
(0.2msec/div)  
Fig.3 Waveform at output start  
Co=1μF  
Fig.2 Transient Response  
Fig.1 Transient Response  
(050mA)  
Co=1μF  
(500mA)  
Co=1μF  
EN  
EN  
5V/div  
5V/div  
EN  
5V/div  
VCC  
VCC  
5V/div  
5V/div  
VCC  
5V/div  
Vo  
Vo  
Vo  
5V/div  
5V/div  
5V/div  
(1msec/div)  
Fig.6 Input sequence 2  
Co=1μF  
(1sec/div)  
(1msec/div)  
Fig.5 Input sequence 1  
Fig.4 Waveform at output OFF  
Co=1μF  
Co=1μF  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
8.5  
8.3  
8.1  
7.9  
7.7  
7.5  
230  
220  
210  
200  
190  
180  
-10  
15  
40  
65  
90  
100  
-10  
10  
30  
50  
70  
90  
100  
90  
-10  
10  
30  
50  
70  
Ta [ ]  
Ta []  
Ta [ ]  
Fig.7 Ta-Vo (Io=0mA)  
Fig.8 Ta-Icc  
(VEN=12V)  
Fig.9 Ta-Icc  
(Vcc=12V, VEN=0V)  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
10  
8
8.20  
8.10  
8.00  
7.90  
7.80  
7.70  
6
4
2
0
100  
-10  
10  
30  
50  
70  
90  
0
100  
200  
300  
0
5
10  
15  
20  
25  
Ta []  
Io [mA]  
Vcc [V]  
Fig.12 Vcc-ISTB  
(Vcc=12V, VEN=3V)  
Fig.11 Io-Vo  
Fig.10 Ta-IEN  
(Vcc=12V, VEN=3V)  
3/12  
Reference Data  
BD35618HFV (Unless otherwise specified, Ta=25, EN=3V, Vcc=12V)  
10  
8
6
4
2
0
0
5
10  
15  
20  
25  
Vcc [V]  
Fig.13 Vcc-Vo  
Heat Dissipation Characteristics  
HSON8  
HTSOP-J8  
[W]  
[W]  
2.0  
4.0  
3.76W  
PCB size70mm×70mm×1.6mmt  
1.75W  
1.35W  
Board①:1 layer (copper foil area: less than 0.2%)  
Board②:1 layer (copper foil area:7)  
Board③:1 layer (copper foil area:65)  
Board①:θja=153.2/W  
Board②:θja=113.6/W  
Board③:θja=59.2/W  
Board④:θja=33.3/W  
1.5  
3.0  
①:θja=198.4/W  
②:θja=92.4/W  
③:θja=71.4/W  
2.11W  
1.0  
0.5  
2.0  
1.0  
0.63W  
1.10W  
0.82W  
0
25  
50  
75  
100  
125  
150  
[]  
0
25  
50  
75  
100  
125  
150  
[]  
Ambient Temperature [Ta]  
Ambient Temperature [Ta]  
HVSOF6  
[W]  
3.0  
2.5  
2.0  
PCB size70mm×70mm×1.6mm  
Board①:1 layer (copper foil area:100mm2).  
Board②:1 layer (copper foil area:900 mm2)  
Board③:1 layer (copper foil area: 2500mm2)  
1.70W  
1.40W  
1.5  
1.0  
①:θja=147.1/W  
②:θja=89.3/W  
③:θja=73.5/W  
0.85W  
0.5  
0
0
25  
50  
75  
100  
125  
150  
[]  
Ambient Temperature [Ta]  
4/12  
Block Diagram  
(HSON8, HTSOP-J8)  
(Vo+1.8)14V  
GND  
Vcc  
1
5
6
OCP  
GND_S  
SOFT  
Vo  
3
Vo  
Ceramic  
Capacitor  
1uF  
VFB  
EN  
TSD  
8
(HVSOF6)  
(Vo+1.8)14V  
Vcc  
GND  
6
2
3
OCP  
GND_S  
SOFT  
Vo  
1
Vo  
Ceramic  
Capacitor  
1uF  
VFB  
EN  
TSD  
4
5/12  
Pin Function Table (HSON8, HTSOP-J8)  
(HVSOF6)  
Pin No.  
Pin name  
Vcc  
Pin Function  
Input Voltage Pin  
Open  
Pin No.  
Pin name  
Vo  
Pin Function  
Output Voltage Pin  
GND Pin  
1
2
3
4
5
6
7
8
1
2
3
4
5
6
N.C.  
GND  
GND_S  
EN  
Vo  
Output Voltage Pin  
Open  
GND Sense Pin  
Enable Pin  
N.C.  
GND  
GND_S  
N.C.  
GND Pin  
N.C  
Open  
GND Sense Pin  
Open  
Vcc  
Input Voltage Pin  
EN  
Enable Pin  
Pin Layout (HSON8, HTSOP-J8)  
(HVSOF6)  
Vcc  
N.C  
Vo  
EN  
Vo  
GND  
Vcc  
N.C  
EN  
1
2
3
4
8
7
6
5
1
2
3
6
5
4
N.C  
GND_S  
GND_S  
N.C  
GND  
6/12  
Evaluation Board Circuit (Vo=8.0V)  
C1  
C2  
SW1  
8
7
1
2
Vcc  
N.C  
EN  
EN  
N.C  
C3  
Vcc  
C7  
C6  
3
4
6
5
GND_S  
GND  
GND_S  
GND  
Vo  
N.C  
C5  
U2  
R1  
C4  
U2  
R2  
C8  
R4  
R3  
Vo  
Gate  
Evaluation Board Parts List  
Designation  
R1  
Value  
Part No.  
Company  
-
-
-
-
-
-
-
-
-
-
-
R2  
-
R3  
-
R4  
-
C1  
-
C2  
1uF  
CM105B105K10A  
KYOCERA  
C3  
-
-
-
C4  
-
-
-
C5  
-
-
-
C6  
1uF  
CM105B105K16A  
KYOCERA  
C7  
-
-
-
-
-
-
C8  
-
-
U1  
BD3561XHFV  
-
ROHM  
-
U2  
7/12  
Reference landing pattern  
HSON8  
MIE  
E3  
(Unit : mm)  
L2  
Lead pitch  
landing pitch  
landing length  
l2  
landing pitc  
e
MIE  
b2  
0.65  
2.50  
central pad pitch  
E3  
0.40  
0.35  
central pad length  
D3  
2.90  
1.90  
*It is recommended to design suitable for the actual application.  
HVSOF6  
MIE  
E3  
L2  
(Unit:mm)  
Lead pitch  
landing pitch  
MIE  
landing length  
landing pitch  
e
l2  
b2  
0.50  
3.00  
0.55  
0.25  
central pad length  
central pad pitch  
D3  
E3  
1.60  
2.60  
*It is recommended to design suitable for the actual application.  
8/12  
Operation Notes  
1. Absolute maximum ratings  
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can  
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any  
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as  
fuses.  
2. Connecting the power supply connector backward  
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply  
lines. An external direction diode can be added.  
3. Power supply lines  
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,  
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to  
ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the  
circuit, not that capacitance characteristic values are reduced at low temperatures.  
4. GND voltage  
The potential of GND pin must be minimum potential in all operating conditions.  
5. Thermal design  
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.  
6. Inter-pin shorts and mounting errors  
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any  
connection error or if pins are shorted together.  
7. Actions in strong electromagnetic field  
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to  
malfunction.  
8. ASO  
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.  
9. Thermal shutdown circuit  
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed  
only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not  
continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is  
assumed.  
TSD on temperature [°C] (typ.)  
175  
Hysteresis temperature [°C] (typ.)  
15  
BD3561XHFN/EFJ/HFV  
10. Testing on application boards  
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.  
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or  
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic  
measure. Use similar precaution when transporting or storing the IC.  
9/12  
11. Regarding input pin of the IC  
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.  
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or  
transistor. For example, the relation between each potential is as follows:  
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.  
When GND > Pin B, the P-N junction operates as a parasitic transistor.  
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual  
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes  
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be  
used.  
Resistor  
Transistor (NPN)  
B
Pin A  
Pin B  
Pin B  
C
E
Pin A  
B
C
E
N
N
N
P+  
P+  
P+  
P+  
N
P
P
Parasitic  
element  
N
N
Parasitic  
element  
P substrate  
P substrate  
GND  
GND  
GND  
GND  
Parasitic element  
Parasitic element  
Other adjacent elements  
12. Ground Wiring Pattern.  
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing  
a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations  
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND  
wiring pattern of any external components, either.  
10/12  
Type Designations (Ordering Information)  
B
D
3
5
6
1
X
H
F
N
E
2
Package Type  
Product Name  
BD35618  
BD35615  
E2 Emboss tape reel opposite draw-out side: 1 pin  
TR Emboss tape reel opposite draw-out side: 1 pin  
HFN : HSON8  
EFJ : HTSOP-J8  
HFV : HVSOF6  
BD35613  
HSON8  
<Dimension>  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
Quantity  
3000pcs  
2.90 0.2  
0.475  
(2.2) (0.05)  
Direction  
of feed  
TR  
(The direction is the 1pin of product is at the upper light when you hold  
reel on the left hand and you pull out the tape on the right hand)  
8
7
6
5
5
6
7
8
+0.1  
0.13  
0.05  
1
2
3
4
4
3
2
1
0.32 0.10  
X X  
X
X X  
X
X X  
X
X X  
X
X X  
X
0.65  
X
X
X
X
X
X X  
X
X X  
X
X X  
X
X X  
X
X X  
X
Direction of feed  
1Pin  
Reel  
(Unit:mm)  
When you order , please order in times the amount of package quantity.  
HVSOF6  
<Dimension>  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
(MAX 1.8 include BURR)  
1.6 0.1  
Quantity  
3000pcs  
6
5
4
TR  
Direction  
of feed  
(The direction is the 1pin of product is at the upper light when you hold  
reel on the left hand and you pull out the tape on the right hand)  
(1.2)  
(1.4)  
1
2
3
0.145 0.05  
S
0.1 S  
0.22 0.05  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0.5  
Direction of feed  
1Pin  
Reel  
(Unit:mm)  
When you order , please order in times the amount of package quantity.  
HTSOP-J8  
<Tape and Reel information>  
4.9 0.1  
<Dimension>  
Max5.25(include.BURR)  
+6  
-4  
(3.2)  
4
Tape  
Embossed carrier tape  
2500pcs  
8
7
6
5
Quantity  
Direction  
of feed  
E2  
(The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand)  
1
2
3
4
+0.05  
-0.03  
0.17  
M
0.545  
S
+0.05  
0.42  
-0.04  
0.08  
1.27  
0.08 S  
Direction of feed  
1Pin  
Reel  
When you order , please order in times the amount of package quantity.  
(Unit:mm)  
11/12  
Catalog No.08T419A '08.10 ROHM ©  

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