BD49101AEFS-M_技术文档

Datasheet

Multi-Channel Power Supply LSI Series for Car Electronics

Multi-channel Power Supply IC

for Car Audio Systems

BD49101AEFS-M

General Description

Key Specifications

 Input Voltage Range:

 DCDC1(controller):

The BD49101AEFS-M LSI is a multi-channel power

supply IC that can provide all necessary supply voltages

for automobile audio systems. The IC has two Switching

Power Supplies (DCDC), five Regulators (REG) and a

High Side switch. This single power supply system can

provide the required voltages to all systems including the

MCU, CD, tuner, USB, illumination, audio circuits and

others.

The IC system is based on switching regulator which

has high efficiency then you can suppress heat of IC

than before. And it has low power mode operation or

voltage control function so that you can get ①High

Efficiency ②Low IQ and ③easiness of power supply

design.

5.5V to 25V(VIN0=BCAP)

 DCDC2(with low power mode for MCU):

 REG1(output voltage variable):

 REG2(output voltage variable):

 REG3(output voltage variable):

 REG4(output voltage variable for USB):

 REG5(output voltage variable):

 High side SW:

 Standby Current:

 REG4 Over Current Detect Accuracy:

 Operating Temperature Range:

 DCDC Switching Frequency:

1A

500mA

100mA

300mA

1.5A

50mA

500mA

100µA(Typ)

±20%

-40°C to +85°C

200kHz to 500kHz

Package

HTSSOP-A44

W(Typ) x D(Typ) x H(Max)

18.50mm x 9.50mm x 1.00mm

Features

 AEC-Q100 Qualified^(Note1)

 Integrated 7 channels of Power Supply for Car Audio

・2 DCDC (Integrated 1 Controller )

・5 REG

 1 High Side Switch channel

 Integrated Low Power Standby REG for MCU Power

Supply

 REG4 Cable Impedance Compensation

 I²C Interface

 Selectable Oscillator Frequency using External

Resistance

 External Clock Synchronization

 Power Supply Control Function (Power on/off

Sequencer).

 Low Voltage, Over Voltage and REG4 Over Current

Detect Flag

HTSSOP-A44

 Integrated Protection Circuitry:

・Over Voltage Input Protection

・Over Current Protection

・Thermal Shutdown

(Note1:Grade3)

Applications

 Car Audio and Infotainment

○Product structure:Silicon monolithic integrated circuit ○This product is not designed for protection against radioactive rays

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Pin Configuration

VOUT5

VIN0

ADJ5

EN

BCAP

VINSW

N.C.

REG4EN

ECO

BSENS

REG4OCB

SDA

HSW

GND4

SW2

SCL

FB2

SYNC

GND1

RT

INV2

VOUT0

VIN1

GND2

VOUT3

ADJ3

ADJ1

VOUT1

ADJ2

VOUT2

GND3

N.C.

VIN3

VIN4

CLCAL

VOCAL

ADJ4

VIN2

SNSH

SNSL

GATE1

VOUT4

INV1

FB1

Figure 1. Pin Configuration(s)

Pin Description

NO

23

Symbol

NO

Function

REG5 voltage output

Symbol

Function

1

2

3

4

VOUT5

VIN0

FB1

INV1

DCDC1 Error Amp output

DCDC1 Error Amp Input

REG4 voltage output

Battery power supply connection pin

Back-up capacity connection pin

Power supply for high side switch

24

25

26

BCAP

VINSW

VOUT4

ADJ4

REG4 output voltage adjustment

REG4 output USB cable impedance

calibration setting

5

N.C.

－

27

VOCAL

6

HSW

GND4

SW2

High side switch output

Ground

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

CLCAL

VIN4

REG4 over current protection setting

Power supply for built-in FET REG4

Power supply for built-in FET REG3

REG3output voltage adjustment

REG3 voltage output

7

8

DCDC2 switching output

DCDC2 Error Amp output

DCDC2 Error Amp Input

STBREG voltage output

Power supply for built-in FET REG1

REG1 output voltage adjustment

REG1 voltage output

VIN3

9

FB2

ADJ3

VOUT3

GND2

RT

10

11

12

13

14

15

16

17

18

19

20

21

22

INV2

VOUT0

VIN1

Ground

Oscillator frequency setting

Ground

ADJ1

VOUT1

ADJ2

VOUT2

GND3

N.C.

GND1

SYNC

SCL

External synchronization signal input

I²C-bus clock input

I²C-bus data input

REG2 output voltage adjustment

REG2 voltage output

SDA

Ground

REG4OCB Error flag output

－

BSENS

ECO

Error flag output

VIN2

Power supply for built-in FET REG2

DCDC1 current detection

DCDC1 outside FET gate drive

Low power mode switch

REG4 Enable

SNSH

SNSL

GATE1

REG4EN

EN

Enable

ADJ5

REG5 output voltage adjustment

“N.C” pins are not connected into internal circuits.

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Block Diagram

SNSH

20

TSD

21

SNSL

SYNC

RT

36

34

Ext CLK

22

GATE1

DCDC1

output

DCDC1

(Controller)

OSC

FB1

23

24

8

INTERNAL

REGULATOR

INV1

SW2

VIN0

2

DCDC2

output

BCAP

FB2

3

9

DCDC2

BCLDET

/BCOVP

10

11

INV2

VIN2

19

16

VOUT0

STB_REG

REG2

output

VOUT2

LDET/OVP

REG2

REG5

ADJ2

15

VIN1

12

REG1

output

REG5

output

VOUT5

VOUT1

ADJ1

14

13

1

REG1

REG3

ADJ5

44

VINSW

VIN3

30

4

Hi-side SW

output

REG3

output

Hside

SW

6

VOUT3

ADJ3

32

31

HSW

BSENS

40

VIN4

29

REG4OCB

REG4

output

39

41

43

42

VOUT4

ADJ4

25

26

ECO

E N

REG4EN

REG4

(calibrate)

VOCAL

27

28

SDA

SCL

38

37

I²C I/F

・Each ch on/off

・LDET setting

CLCAL

35

GND1

33

GND2

17

7

GND3 GND4

Figure 2. Block Diagram

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Description of Blocks

・DCDC2 – STBREG Switch Function

The ECO input is used to switch between operating mode and low power standby mode.

(This function is for a 3.3V I/O microcomputer because of the 3.3V fixed STBREG output)

The function of the ECO input is as follows:

.

ECO = H

ECO = L

– Normal Operating Mode

– Low Power Standby Mode

(DCDC2 operating).

(STBREG operating).

・Sequence of VIN0 start up, Low Power Standby mode

8.3V

VIN0

①

BCAP

4.7V

Soft start

Max 5ms

DCDC2/

STBREG

=VIN1

STBREG

DCDC2

STBREG

DCDC2

1.25V

REG1

②

ECO

BSENS

EN

ACK

SCL

SDA

Slave Address

A

Figure 3. Timing Chart of VIN0 start up, Low Power Standby Mode

①

②

③

When BD49101AEFS starts up, it starts in the normal operation mode (DCDC2 operation), independent of ECO

setting. An internal regulator, the reference voltage circuit, and the OSC circuit start up when the voltage of the

BCAP pin exceeds low voltage protection release voltage (4.7V).

Following the first access to the I²C interface, the ECO input is able to control the operating mode (normal or low

power standby). ECO must be set to the desired operating mode prior to accessing the I²C interface for the first

time.

The conditions of independent of ECO setting is shown below.

.

Input power supply for VIN0 at the first time

BCAP voltage becomes under 4.5V

DCDC2 detects over current and DCDC2 restarts

At each condition ECO setting become effective after you send I²C command and receive ACK.

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・Relations of BCAP Voltage and Operating Mode

When the voltage of the BCAP pin decreases under BCAP low voltage detection voltage (4.5V),

the registers are initialized and the ECO pin setting becomes invalid and forcibly changed to low power mode.

Afterwards, when BCAP voltage increases over BCAP low detection release voltage (4.7V)

without under POWER ON reset voltage (3.1V), the mode change to DCDC2 mode. (ECO pin setting is invalid.)

If BCAP voltage increases with under POWER ON reset voltage, the operation is same as VIN0 start up.

BCAP voltage

BCLDET release

4.7V

BCLDET detect

4.5V

POWER_ON reset voltage

3.1V

0V

µ-con 3.3V supply

DCDC2

STBREG

DCDC2

STBREG

DCDC2

OFF

voltage

Figure 4. Relation of BCAP Voltage and Operating Mode

・Mode Changing (Normal Operation Mode ⇔ Low Power Mode)

When the ECO pin is changed from 0V to 3.3V, it changes from the low power mode to the normal operation mode.

When it changes from the low power mode to the normal operation mode, the output voltage drops according to the

load current. (Figure 5)

(ex.) ：Supply Voltage 14.4V, Output Capacitor 100µF, Load Current 200mA: Output Drop Voltage= -80mV(Typ)

We recommend that you save consumption current of the microcomputer in 200mA within 1ms when the mode is

changed to normal operation mode (Figure 6).

3.3V

ECO

0V

3.3V

VOUT0

～80mV

（Output Capa=100µF,Load Current 200mA）

Figure 5. Timing Chart of Mode Changing (Normal Operation Mode ⇔ Low Power Mode)

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more than 1ms

μ-con

consumption

200mA

0mA

3.3V

ECOꢀvoltage

0V

Low power mode

normal operation mode

Figure 6. Image of Increasing Consumption Current when Switching

from Low Power Mode to Normal Operation Mode

USB Supply Calibration (REG4).

The VOCAL input is used to adjust for cable impedance between the supply and USB connector. This

adjustment will correct for voltage drop across the cable as a function of the current flow thus maintaining a

constant voltage at the connector. Compensation of up to 0.5Ω of cable impedance can be achieved.

The CLCAL input is used to set the over current threshold, up to a maximum of 1.5A.Please refer 2-(3)-②

Setting of cable impedance calibration

Over Current Protection (OCP)

All regulators and high side switch have over current protection. When OCP is detected, the following

conditions will apply:

.

DCDC1: After disabled for a certain period, it will attempt to restart automatically.

DCDC2 : After disabled for a certain period, it will attempt to restart automatically

and the register will be initialized.

.

REG4 – Current limit circuit will operate and REG4OCB is activated (Low).

Other regulators and a high side switch – Current limit circuit will operate.

REG1 to 5, STBREG

High side switch

Current at

shorted

Current at

shorted

IOUT

Figure 7. REG, High Side Switch Example of the Characteristics about Output Voltage vs Output Current

Battery Voltage Monitoring Function and BSENS Output

The BSENS output is active (High) when over voltage protection(OVP) is active. OVP becomes active when

VIN0 exceeds 20.2V(Typ) OVP is cleared when VIN0 falls below 18.2V(Typ).

BSENS is also active (High) when VIN0 falls below 7.8V(Typ, initial register condition), afterwards BSENS is

cleared when VIN0 exceeds 8.3V (Typ, initial register condition).

This low detection (LDET) voltage can change from 5.7V to 6.4V, and from 7.7V to 8.4V with writing register

(Initial setting is 7.8V).

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VIN0 Voltage

20.2V

18.2V

Variable in 15 steps

by I2C register setting

8.3V

7.8V

LDET detect→H

OVP detect→H

3.3

BSENS

0

Figure 8. Timing Chart of OVP/LDET Detection

REG4OCB Output

3.3V

REG4EN

0V

5.2V

0V

VOUT4

T_SS4

short output

OCP threshold

short output

3ms(typ)

Soft start time

short output

I_OCP(variable)

IOUT4

1.5A

(Load current =1.5A)

short current

(100mA typ)

short current

(100mA typ)

0 A

OCP delay time

T_DELAY4

13.7ms(typ)

3.3V

REG4OCB

0V

Figure 9. Timing Chart of REG4OCB Output

REG4 starts by a soft start in 3ms(Typ). And when detecting over current detection the REG4OCB output is

active (Low) after 13.7ms continuous over current condition.

External Synchronization

The SYNC input is used to synchronize the switching frequency of DCDC1 and DCDC2. A signal in the

range of 200kHz – 500kHz can be input. The input signal must be at a higher frequency than that set by the

resistor on RT input and should be configured between 0.6 to 1.5 times the set frequencies.(when SYNC

Duty=45 to 55%)

When it changes from internal oscillation mode to external synchronization mode, it changes after it is inputted

continuously 3 pulses.

When it changes from external synchronization mode to internal oscillation mode, it changes within a period of

internal oscillator frequency after SYNC input sets L. When SYNC input sets H, it doesn’t change to internal

oscillation mode. The high pulse within 50ns(like unexpected noise etc.) input could stop DCDC operation. In

that case you can take measure by inserting damping resister etc. to reduce the pulse.

At first applying of power on VIN0(BCAP), SYNC pin must be under “input L level” max value until VODC2

rises up. If it is not so, the IC could not start normally.

It can adjust to the phase of switching pulse between DCDC1 and DCDC2 by the duty of SYNC input.

The switching positive edge timing of DCDC1,2 is below.

.

DCDC1: synchronized the negative edge of SYNC input.

DCDC2: synchronized the positive edge of SYNC input

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The EN and the REG4EN pins

When the EN pin is set to H, I2C register setting is available, and when set to L, all register reset.

This function enable all REG and HSW channel expect DCDC2/STBREG and REG1 to OFF.

REG4EN is the enable pin of REG4 and can control REG4 through REG4_EN register or REG4EN.

When the EN pin is set to L, REG4 becomes OFF even if the REG4EN pin is set to H.

Output Conditions

Input Pin

Register

STBREG

DCDC2

REG1

DCDC1

REG2,3,5

REG4

HSW

L=OFF

Reset

(input"L")

EN

REG4EN

ECO

－

need resetting when turning ON

L=OFF

－

H=ON(Note 1)

L=STBREG

H=DCDC2

－

(Note 1) When the EN pin input H.

Figure 10. Table of EN control

I²C Interface

The I²C interface allows access to the internal registers. The internal registers are used for the following

functions:

.

Enable the high side switch and power supplies except for DCDC2-STBREG.

Setting LDET – VIN0 low voltage detection threshold.

Detecting high side switch over current condition (address 0x04)

For Protect and Detect Functions and Enable Function

Output Conditions

Error Flag

Register

STBREG

DCDC2

REG1

－

DCDC1

REG2,3,5

REG4

HSW

BSENS REG4OCB

fold back

limit

－

STBREG

DCDC2

REG1

restart

(Note 1)

OFF^{(Note 2)}

－

Reset

fold back

limit

－

over

restart

(Note 1)

－

current

detection

DCDC1

REG2,3,5

REG4

fold back

limit

－

fold back

limit

－

○

fold back

limit

－

HSW

OFF^{(Note 3)}

－

TSD

tharmal

power

－

LDET

－

○

－

supply

OVP

voltage

detection

ON

(Note 4)

OFF

(Note 4)

OFF^{(Note 2)}

OFF^{(Note 3)}

－

BCLDET

BCOVP

Reset

－

(Note 1) When detecting each output is limited in minimum duty and dropping output and INV voltage then restarts after 1024clk.

(Note 2) When detecting each output doesn’t restart.

(Note 3) When detecting each output restarts.

(Note 4) When detecting BCAP low voltage the operation mode switches to standby mode without depending on the ECO setting.

Figure 11. Table of EN Protect and Detect Functions

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Absolute Maximum Ratings(Ta=25°C)

Parameter

Symbol

V_CC

Limits

-0.3 to +42

-0.3 to +7

-0.3 to +42

VIN0 – 7 to VIN0

-0.3 to +7

-40 to +85

-55 to +150

6.19^{(Note 1)}

150

Unit

V

Power Supply Voltage (PIN2,4,19)

Input Voltage (PIN37,38,41-43)

Pin Voltage 1(PIN1,3,6,8,16,22)

Pin Voltage 2(PIN20,21)

Vin

V

V_PIN1

V_PIN2

V_PIN3

Topr

Tstg

V

Pin Voltage 3(PIN9-15,23-32,34,36,39,40,44)

Operating Temperature Range

Storage Temperature Range

Power Dissipation

V

°C

W

°C

Pd

Maximum Junction Temperature

Tjmax

(Note 1) Reduce by 49.5mW/°C, when mounted on 4-layer PCB of 70x70x16mm³(Copper foil area on the reverse side of PCB: 70x70mm²).

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated

over the absolute maximum ratings.

Recommended Operating Ratings

Parameter

Symbol

V_INopr

Limits

Unit

V

Operating Power Supply Voltage1(VIN0,BCAP)

Output Voltage Range 1(DCDC1/2)

5.5 to 25

0.8 to V_INopr

V_OUTopr1

V

0.8 to 2.4

(REG1)

Output Voltage Range 2(REG1/3/4)

V_OUTopr2

0.8 to VIN3,4 - VSAT_RG3,4

V

(REG3.4)

0.8 to 10.5 (REG2)

Output Voltage Range 3(REG2/5)

V_OUTopr3

f_SW

V

kHz

kΩ

kHz

%

0.8 to 8.5

(REG5)

DCDC Switching Frequency

200 to 500

Oscillator Frequency Setting Resistance

External Sync Frequency

R_T

27 to 82

200 to 500

20 to 80

5 to 50

f_CLK

External Synchronization Pulse Duty

REG4 Over Current Detection Set Resistance

REG4 Cable Impedance Compensation Set Resistance

D_CLK

R_CLCAL

R_VOCAL

kΩ

Ω

0 to 230

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Electrical Characteristics

(Unless otherwise specified, Ta= 25°C, VIN0=BCAP=14.4V, EN=3.3V, VOUT1=1.25V, VOUT2=5.78V, VOUT3=3.3V,

VOUT4=5.2V, VOUT5=5.0V)

Spec Values

Typ

Parameter

Symbol

Unit

Conditions

Min

Max

【Consumption Current】

Standby Current

I_STB

I_Q

－

100

5.0

150

7.5

μA

ECO=0V, EN=0V

ECO=3.3V, EN=3.3V, Io=0A

ENABLE=0x7F

Circuit Current

mA

【Over Voltage Detection】

Detection Threshold Voltage

Release Threshold Voltage

【Low Voltage Detection】

Detection Threshold Voltage

Release Threshold Voltage

【OSC】

V_OVPON

18.2

16.2

20.2

18.2

22.2

20.2

V

V_OVPOFF

V_LDETON

7.5

8.0

7.8

8.3

8.1

8.6

V

LDET_SETTING=0x09

V_LDETOFF

Oscillator Frequency

【DCDC1】

F_OSC

285

300

315

kHz

RT=51kΩ

Reference Voltage

V_{REF1_DC1}

V_{OCP_TH_DC1}

V_FB1H

0.784

0.800

0.1

3.0

0.8

-400

100

-

0.816

V

Over Current Detection

Threshold Voltage

-

SNSH-SNSL

INV1=0V

Maximum FB1 Voltage

Minimum FB1 Voltage

FB1 Sink Current

-

V

V_FB1L

-

V

INV1=2V

I_FB1SINK

I_FB1SOURCE

V_GT1H

-800

50

-

-200

200

µA

V

FB1=1V, INV1=1V

FB1=1V, INV1=0.6V

INV1=2V

FB1 Source Current

Maximum GATE1 Voltage

Minimum GATE1 Voltage

Soft Start

VIN

+0.3V

V_GT1L

8.1

-

V

INV1=0V

TSS1

-

5

ms

【DCDC2】

Reference Voltage

Output Current Capacity

Maximum FB2 Voltage

Minimum FB2 Voltage

FB2 Sink Current

V_{REF1_DC2}

IO_DC2

0.784

0.800

-

0.816

V

A

1

-

V_FB2H

3.0

0.8

-400

100

-

V

INV2=0V

V_FB2L

-

V

INV2=2V

I_FB2SINK

I_FB2SOURCE

TSS2

-800

50

-

-200

200

5

µA

ms

mΩ

FB2=1V, INV2=1V

FB2=1V, INV2=0.6V

FB2 Source Current

Soft Start

Power MOS FET ON

Resistance

R_ON

125

250

500

IO=800mA

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Spec Values

Typ

Parameter

Symbol

Unit

Conditions

Min

Max

【STBREG】

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_STLD}

IO_STLD

3.234

3.300

3.366

-

V

200

-

mA

mV

dB

V

⊿VI_STLD

⊿VL_STLD

RR_STLD

-

15

30

-

VIN0=7 to 18V, Io=5mA

IO=5m to 200mA

Load Regulation

Ripple Rejection

I/O Voltage Difference

【REG1】

-

70

-

Frp=100Hz, VIN0rp=1Vpp

IO=100mA

VSAT_STLD

0.6

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_LD1}

IO_LD1

0.588

0.600

0.612

-

V

500

-

mA

mV

dB

V

VIN1=3.3V

⊿VI_LD1

⊿VL_LD1

RR_LD1

-

10

20

-

VIN1=3 to 6V, Io=5mA

IO=5m to 500mA

Frp=100Hz, VIN1rp=1Vpp

IO=250mA

Load Regulation

Ripple Rejection

I/O Voltage Difference

【REG2】

-

70

-

VSAT_LD1

1.0

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_LD2}

IO_LD2

0.777

0.793

0.809

-

V

100

-

mA

mV

dB

V

⊿VI_LD2

⊿VL_LD2

RR_LD2

-

25

VIN2=9 to 18V, Io=5mA

IO=5mA to 100mA

Frp=100Hz, VIN2rp=1Vpp

IO=50mA

Load Regulation

Ripple Rejection

I/O Voltage Difference

【REG3】

-

50

70

-

VSAT_LD2

0.65

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_LD3}

IO_LD3

0.784

0.800

0.816

-

V

300

-

mA

mV

dB

V

VIN3=6V

⊿VI_LD3

⊿VL_LD3

RR_LD3

-

20

40

-

VIN3=4.0 to 6.5V, Io=5mA

IO=5m to 300mA

Frp=100Hz, VIN3rp=1Vpp

IO=150mA

Load Regulation

Ripple Rejection

I/O Voltage Difference

-

70

-

VSAT_LD3

0.6

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BD49101AEFS-M

Spec Values

Typ

Parameter

Symbol

Unit

Conditions

Min

Max

【REG4】

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_RG4}

IO_RG4

0.784

1.5

－

0.800

－

0.816

－

V

A

VIN4=6V,VOCAL=0Ω

VIN4=5.6 to 6.5V, Io=5mA

Io=5m to 1.5A

⊿VI_RG4

⊿VL_RG4

RR_RG4

VSAT_RG4

I_OCP1

－

50

mV

dB

V

Load Regulation

Ripple Rejection

I/O Voltage Difference

－

40

－

55

－

Frp=100Hz, VIN4rp=1Vpp

Io=1.5A

－

0.4

1.76

800

5.60

－

Over Current Detection

Threshold 1

Over Current Detection

Threshold 2

Voltage Adjusted For Cable

Impedance(0.26Ω)

VIN4=6V, CLCAL= 6.8kΩ,

VOCAL=0Ω

VIN4=6V, CLCAL= 15kΩ,

VOCAL=0Ω

VIN4=6.5V,Io=1.0A,

VOCAL=120Ω

1.18

534

5.32

－

1.47

667

5.46

3

A

I_OCP2

mA

V

V_cal

Soft Start Time

T_SS4

ms

OCP Delay Time

【REG5】

T_DELAY4

8.7

13.7

18.7

f_sw= 300kHz

Reference Voltage

Load Current Capacity

Line Regulation

V_{REF_RG5}

IO_RG5

0.784

50

0.800

－

0.816

－

V

mA

mV

dB

V

⊿VI_RG5

⊿VL_RG5

RR_RG5

－

25

VIN0=9 to 18V, Io=5mA

Io=5mA to 50mA

Load Regulation

Ripple Rejection

I/O Voltage Difference

【High Side SW】

Output Current Capacity

－

50

－

70

－

Frp=100Hz, VIN5rp=1Vpp

Io=25mA

VSAT_RG5

－

0.65

IO_SW1

500

-

mA

ON Resistance

R_{ON_SW1}

－

3

Ω

IO=500mA

【Digital IO】

(EN,REG4EN,ECO,SYNC,BSENS,REG4OCB)

For pin EN, REG4EN,

ECO,SYNC

For pin EN, REG4EN,

ECO,SYNC

Input H level

V_IH

V_IL

2.6

-

V

Ω

V

Input L level

-

0.8

－

-

Input Pulldown Resistance1

Input Pulldown Resistance2

Output H level

R_IND1

R_IND2

V_OH

V_OL

－

2.6

-

100k

For pin REG4EN, ECO,SYNC

For pin EN

660k

For pin BSENS,REG4OCB

IO=1mA

For pin BSENS,REG4OCB

IO= -1mA

-

Output L level

0.8

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Typical Performance Curves(reference)

200

150

100

50

150

100

50

0

-40

-20

0

20

40

60

80

0

5

10

15

20

25

Input Voltage:V [V]

Ambient Temperature:Ta[°C]

IN

Figure 12. Standby Current vs Temperature

Figure 13. Standby Current vs Input Voltage

8

7

6

5

4

3

2

1

0

8

7

6

5

4

3

2

1

0

-40

-20

0

20

40

60

80

0

5

10

15

20

25

Ambient Temperature:Ta[°C]

Input Voltage:V [V]

IN

Figure 14. Circuit Current vs Temperature

Figure 15. Circuit Current vs Input Voltage

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315

312

309

306

303

300

297

294

291

288

285

0.816

0.812

0.808

0.804

0.8

0.796

0.792

0.788

0.784

RT=51kΩ

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Ambient Temperature:Ta[℃]

Ambient Temperature:Ta[°C]

Figure 16. Oscillator Frequency vs Temperature

Figure 17. DCDC1 Reference Voltage vs Temperature

100

90

80

70

60

50

40

30

20

10

0

6.09

6.06

6.03

6.00

5.97

5.94

5.91

VIN0 =14.4V

VO=6.0V

f=300kHz

VIN0 =14.4V

VO=6V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

Output Current:lo[A]

Figure 18. DCDC1 Efficiency vs Output Current

Figure 19. DCDC1 Output Voltage vs Output Current

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BD49101AEFS-M

0.816

0.812

0.808

0.804

0.800

0.796

0.792

0.788

0.784

100

90

80

70

60

50

40

30

20

10

0

VIN0=14.4V

VO=3.3V

f=300kHz

-40

-20

0

20

40

60

80

0.0

0.2

0.4

0.6

0.8

1.0

Ambient Temperature:Ta[°C]

Output Current:lo[A]

Figure 20. DCDC2 Reference Voltage vs Temperature

Figure 21. DCDC2 Conversion Efficiency vs Output Current

3.42

3.40

3.38

3.36

525

475

425

375

325

275

225

3.34

VIN0=14.4V

f=300kHz

175

Io=800mA

3.32

125

0.0

0.2

0.4

0.6

0.8

1.0

-40

-20

0

20

40

60

80

Output Current:lo[A]

Ambient Temperature:Ta[°C]

Figure 22. DCDC2 Output Voltage vs Output Current

Figure 23. DCDC2 FET ON Resistance vs Temperature

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525

475

425

375

325

275

225

175

125

3.366

3.344

3.322

3.300

3.278

3.256

3.234

Io=800mA

20

-40

-20

0

20

40

60

80

0

5

10

15

25

Ambient Temperature:Ta[°C]

Input Voltage:V [V]

IN

Figure 24. DCDC2 FET ON Resistance vs Input Voltage

Figure 25. STBREG Reference Voltage vs Temperature

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0.00

90

80

70

60

50

40

30

20

10

0

Io=5mA

Io=20mA

Io=200mA

VIN0 =14.4V

Vrp=1Vpp

0.0

0.1

0.2

0.3

0.4

0.5

0.6

100

1k

10k

100k

Output Current:lo[A]

Frequency:f[Hz]

Figure 26. STBREG Output Voltage vs Output Current

Figure 27. STBREG Ripple Rejection vs Frequency

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3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0.612

0.608

0.604

0.600

0.596

0.592

0.588

Io=100mA

20

0

5

10

15

25

-40

-20

0

20

40

60

80

Input Voltage:V [V]

IN

Ambient Temperature:Ta[°C]

Figure 28. STBREG Output Voltage vs Input Voltage

Figure 29. REG1 Reference Voltage vs Temperature

90

1.4

VIN1 =3.3V

Vrp=1Vpp

80

70

60

50

40

30

20

10

0

1.2

1.0

0.8

0.6

0.4

0.2

0.0

Io=5mA

Io=100mA

VIN1=3.3V

VO=1.25V

Io=1000mA

10k

100

1k

100k

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Output Current:lo[A]

Frequency:f[Hz]

Figure 30. REG1 Output Voltage vs Output Current

Figure 31. REG1 Ripple Rejection vs Frequency

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2.0

0.816

0.812

0.808

0.804

0.800

0.796

0.792

0.788

0.784

1.5

1.0

0.5

0.0

VO=1.25V

Io=250mA

0

1

2

3

4

5

6

7

-40

-20

0

20

40

60

80

Input Voltage:V [V]

Ambient Temperature:Ta[°C]

IN

Figure 32. REG1 Output Voltage vs Input Voltage

Figure 33. REG2 Reference Voltage vs Temperature

90

80

70

60

50

40

30

20

10

0

10

9

8

7

6

5

4

3

2

1

0

Io=5mA

Io=10mA

Io=100mA

VIN2 =14.4V

Vrp=1Vpp

VIN2=14.4V

VO=8.8V

100

1k

10k

100k

0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35

Output Current:lo[A]

Frequency:f[Hz]

Figure 34. REG2 Output Voltage vs Output Current

Figure 35. REG2 Ripple Rejection vs Frequency

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BD49101AEFS-M

0.816

0.812

0.808

0.804

0.800

0.796

0.792

0.788

0.784

10

8

6

4

2

VO=8.8V

Io=50mA

0

-40

-20

0

20

40

60

80

0

5

10

15

20

25

Ambient Temperature:Ta[°C]

Input Voltage:V [V]

IN

Figure 36. REG2 Output Voltage vs Input Voltage

Figure 37. REG3 Reference Voltage vs Temperature

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

90

80

70

60

50

40

30

20

10

0

Io=5mA

Io=30mA

Io=300mA

VIN3=6V

VO=3.3V

VIN3 =6V

Vrp=1Vpp

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

100

1k

10k

100k

Output Current:lo[A]

Frequency:f[Hz]

Figure 38. REG3 Output Voltage vs Output Current

Figure 39. REG3 Ripple Rejection vs Frequency

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6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0.816

0.812

0.808

0.804

0.800

0.796

0.792

0.788

0.784

VO=3.3V

Io=150mA

0

1

2

3

4

5

6

7

-40

-20

0

20

40

60

80

Input Voltage:VIN[V]

Ambient Temperature:Ta[°C]

Figure 40. REG3 Output Voltage vs Input Voltage

Figure 41. REG4 Reference Voltage vs Temperature

6

5

4

3

2

1

0

90

VIN4=6V

Vrp=1Vpp

80

70

60

50

40

30

20

10

0

Io=5mA

Io=150mA

VIN4=6V

VO=5.2V

R_CLCAL=6.8kΩ

R_VOCAL=0Ω

Io=1500mA

0.0

0.4

0.8

1.2

1.6

100

1k

10k

100k

Output Current:Io[A]

Frequency:f[Hz]

Figure 42. REG4 Output Voltage vs Output Current

Figure 43. REG4 Ripple Rejection vs Frequency

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BD49101AEFS-M

6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

5.19

5.17

5.15

5.13

5.11

5.09

5.07

5.05

5.03

Io=1.5A

R_VOCAL=0Ω

VIN4=6V

R_VOCAL=120Ω

0

1

2

3

4

5

6

7

0.0

0.5

1.0

1.5

Input Voltage:V [V]

Output Current:lo[A]

IN

Figure 44. REG4 Output Voltage vs Input Voltage

Figure 45. Voltage Adjusted for Cable Impedance

vs Output Current

0.816

0.812

0.808

0.804

0.800

0.796

0.792

0.788

0.784

6

5

4

3

2

1

0

VIN5=14.4V

VO=5V

-40

-20

0

20

40

60

80

0.00

0.02

0.04

0.06

0.08

0.10

0.12

Ambient Temperature:Ta[°C]

Output Current:lo[A]

Figure 46. REG5 Reference Voltage vs Temperature

Figure 47. REG5 Output Voltage vs Output Current

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BD49101AEFS-M

90

80

70

60

50

40

30

20

10

6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

Io=5mA

Io=10mA

Io=50mA

VIN5=14.4V

Vrp=1Vpp

Io=25mA

20

0

5

10

15

25

100

1k

10k

100k

Input Voltage:V [V]

IN

Frequency:f[Hz]

Figure 48. REG5 Ripple Rejection vs Frequency

Figure 49. REG5 Output Voltage vs Input Voltage

16

14

12

10

8

3.0

2.5

2.0

1.5

1.0

6

4

2

VIN0=14.4V

0

200

400

600

800 1000 1200

-40

-20

0

20

40

60

80

Output Current:lo[mA]

Ambient Temperature:Ta[°C]

Figure 50. HSW Output Voltage vs Output Current

Figure 51. HSW ON Resistance vs Temperature

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3.0

2.5

2.0

1.5

1.0

0

5

10

15

20

25

Input Voltage:V [V]

IN

Figure 52. HSW ON Resistance vs Input Voltage

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BD49101AEFS-M

I²C-bus Block

(1) Electrical Specifications and Timing for Bus Lines and I/O Stages

SDA

tBUF

tHD;STA

tF

tSP

tR

tLOW

SCL

tSU;STO

tSU;STA

Sr

tHD;STA

tSU;DAT

tHD;DAT

tHIGH

S

P

Figure 53. Definition of timing on the I²C-bus

Table 1. Characteristics of the SDA and SCL Bus Lines for I²C-bus Devices

(Unless specified particularly, Ta=25°C, VIN0=14.4V)

Fast-modeI²C-bus

Parameter

Symbol

Unit

Min

0

1.3

Max

400

－

1

2

SCL Clock Frequency

fSCL

tBUF

kHz

μs

Bus Free Time between a STOP and START Condition

Hold Time (repeated) Start Condition

(After this period, the first clock pulse is generated.)

LOW Period of the SCL Clock

HIGH Period of the SCL Clock

Set-up Time for a Repeated START Condition

3

tHD;STA

0.6

－

μs

4

5

6

tLOW

tHIGH

tSU;STA

1.3

0.6

－

μs

0.06

7

Data Hold Time

tHD;DAT

－

μs

(Note 1)

8

9

Data Setup Time

Setup Time for STOP Condition

tSU;DAT

tSU;STO

120

0.6

－

ns

μs

All values referred to VIH min and VIL max levels (see Table 2).

(Note 1) A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH min. of the SCL signal) in order to bridge the

undefined region of the falling edge of SCL.

About 7(tHD;DAT), 8(tSU;DAT), make it the setup which a margin is fully in .

Table 2. Characteristics of the SDA and SCL I/O stages for I²C-bus Devices

Fast-modedevices

Parameter

Symbol

Unit

Min

-0.3

2.3

0

Max

+1

5

10 LOW Level Input Voltage:

11 HIGH Level Input Voltage:

12 Pulse Width of Spikes which must be suppressed by the input filter.

13 LOW Level Output Voltage: at 3mA sink current

VIL

VIH

tSP

VOL1

Ii

V

ns

V

50

0

-10

0.4

+10

14 Input Current each I/O pin with an input voltage between 0.4V and 4.5V.

μA

ｔHD;STA

：2us

ｔHD;DAT

：1us

ｔSU;DAT

：1us

ｔSU;STO

：2us

SCL

SDA

ｔBUF

：4us

ｔLOW

：3us

ｔHIGH

：1us

SCL clock frequency：250kHz

Figure 54. A Command Timing Example in the I²C Data Transmission

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BD49101AEFS-M

(2)I²C-bus Format

MSB

Slave Address

8bit

LSB

MSB

Select Address

8bit

LSB

MSB

LSB

S

1bit

A

1bit

A

1bit

Data

8bit

A

P

1bit 1bit

S

= Start Conditions (Recognition of Start Bit)

Slave Address = Recognition of Slave Address. 7 bits in upper order are voluntary.

The least significant bit is “L” due to writing.

A

= Acknowledge Bit (SDA “L”)

= Not Acknowledge Bit (SDA “H”)

Select Address = Select ENABLE / LDET SETTING / HSW OCP.

Data

P

= Data on ENABLE / LDET SETTING / HSW OCP

= Stop Condition (Recognition of Stop Bit)

(3)I²C-bus Interface・Protocol

1)Write Mode Fundamental

S

Slave Address

MSB LSB

A

Select Address

MSB LSB

A

Data

MSB LSB

A

P

2)Auto Increment(The selection address does increment(+1) the number of data.)

S

Slave Address

MSB LSB

A

Select Address

MSB LSB

A

Data1

MSB

A

Data2

MSB

A

LSB

････

DataN

MSB

A

P

LSB

(Example) ①Data 1 is set as data of the address specified in the selection address.

②Data 2 is set as data of the address specified in the selection address +1.

③Data N is set as data of the address specified in the selection address +N-1

3)Composition that cannot be transmitted(In this case, the selection address only 1 is set.)

S

Slave Address

MSB LSB MSB

(Attention) When you transmit data as selection address 2 next to data,

A

Select Address1

A

Data

A

Select Address 2

A

Data

A

P

LSB MSB LSB MSB

LSB MSB LSB

it doesn't recognize as selection address 2, and it recognizes it as

data.

4)Read Mode Protocol(Address 0x04 Read)

S

Slave Address

MSB 0xD8 LSB MSB

A

REQ Address

A

Select Address

0x04 LSB

A

P

0xD0 LSB MSB

A

S

Slave Address

MSB 0xD9 LSB

A

※READ DATA

MSB LSB

P

Because read data outputs with synchronizing with falling edge

of SCL, it latches with synchronizing with rising edge of SCL.

(4)Slave Address

MSB

A6

1

LSB

R/W

1/0

A5

1

A4

0

A3

1

A2

1

A1

0

A0

0

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BD49101AEFS-M

Register Map

DATA

D3

Select

Items

init

Address

D7

D6

D5

D4

D2

D1

D0

ENABLE

01

02

0x02

0x09

－

HSW_EN REG5_EN REG4_EN REG3_EN REG2_EN REG1_EN DCDC1_EN

LDET

SETTING

HSW

－

LDET[3:0]

HSW

OCP

04

0x00

－

OCP

・Select Address 01 : ENABLE

DATA

D3

Select

Address

Items

init

D7

D6

D5

D4

D2

D1

D0

ENABLE

01

0x02

－

HSW_EN REG5_EN REG4_EN REG3_EN REG2_EN REG1_EN DCDC1_EN

D[0]: DCDC1_EN ・・・DCDC1 enable control.

“0”: OFF (Initial Value)

D[4]: REG4_EN ・・・REG4 enable control.

“0”: OFF (Initial Value)

“1”: ON

D[1]: REG1_EN ・・・REG1 enable control.

D[5]: REG5_EN ・・・REG5 enable control.

“0”: OFF

“0”: OFF (Initial Value)

“1”: ON (Initial Value)

“1”: ON

D[2]: REG2_EN ・・・REG2 enable control.

D[6]: HSW_EN ・・・HSW enable control.

“0”: OFF (Initial Value)

“1”: ON

D[3]: REG3_EN ・・・REG3 enable control.

“0”: OFF (Initial Value)

“1”: ON

・Select Address 02 : LDET SETTING

DATA

Select

Address

Items

init

D7

D6

D5

D4

D3

D2

D1

LDET[3:0]

D0

LDET

SETTING

02

0x09

－

D[3:0]: LDET ・・・ The low voltage detect threshold of the pin VIN0 is set. When the pin VIN0 becomes below the set

threshold, the pin BSENS becomes L.

“0000”: 5.7V

“0001”: 5.8V

“0010”: 5.9V

“0011”: 6.0V

“0100”: 6.1V

“0101”: 6.2V

“0110”: 6.3V

“0111”: 6.4V

“1000”: 7.7V

“1001”: 7.8V (Initial Value)

“1010”: 7.9V

“1011”:

“1100”:

“1101”:

“1110”:

“1111”:

8.0V

8.1V

8.2V

8.3V

8.4V

・Select Address 04 : HSW OCP (Read only)

DATA

D3

Select

Address

Items

Init

D7

D6

D5

D4

D2

D1

D0

HSW

OCP

HSW

OCP

04

0x00

－

D[0]: HSW OCP ・・・ Detecting HSW over current condition

“0”: No detected (Initial Value)

“1”: Detected

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Application Example

4.7µF

50V

SNSH

20

TSD

24mΩ(OCP:4.2A)

21

SNSL

SYNC

RT

51kΩ

(fosc=300kHz)

1%

36

34

6.0V

Ext CLK

22

GATE1

DCDC1

output

Damping

Resistor

22µH

DCDC1

(Controller)

CD-Drive

100µF

16V

560pF

16V

1kΩ

OSC

130kΩ

1%

FB1

23

24

8

39kΩ

680pF

6.3V

INV1

390pF

6.3V

INTERNAL

20kΩ

1%

LC filter

VBAT

REGULATOR

VIN0

3.3V

2

SW2

DCDC2

output

47µH

1µF

50V

μ-con

390pF

10V

240kΩ

1%

100µF

10V

BCAP

FB2

220µF

50V

3

9

1kΩ

75kΩ

1000µF

50V

10µF

50V

DCDC2

470pF

6.3V

220pF

6.3V

75kΩ

1%

BCLDET

/BCOVP

10

INV2

VIN2

11

19

1µF

50V

VOUT0

STB_REG

8.8V

Audio

REG2

VOUT2

16

LDET/OVP

390kΩ

1%

1µF

16V

REG2

REG5

output

ADJ2

15

39kΩ

VIN1

1%

12

1µF

10V

1.25V

5.0V

REG1

output

REG5

VOUT5

VOUT1

14

13

μ-con RAM

1

LCD

470kΩ

1%

REG1

REG3

4.7µF

10V

430kΩ

output ^1µF

ADJ1

1%

ADJ5

44

16V

430kΩ

82kΩ

1%

VINSW

VIN3

30

4

1µF

4.7µF

50V

10V

3.3V

Hi-side SW

output

REG3

output

Hside

SW

ILM

6

VOUT3

32

31

Tuner

HSW

470kΩ

1%

4.7µF

10V

ADJ3

150kΩ

1%

BSENS

40

VIN4

29

1µF

5.2V

REG4OCB

10V

REG4

output

39

41

43

42

VOUT4

25

26

USB

ECO

E N

880kΩ

1%

120µF

10V

ADJ4

160kΩ

1%

REG4EN

REG4

(calibrate)

VOCAL

27

4.7µF

6.3V

120Ω

(VCAL:0.26Ω setting)

1%

SDA

SCL

38

37

I²C I/F

・Each ch on/off

・LDET setting

CLCAL

28

5.1kΩ

(OCP:1.96A setting)

1%

35

GND1

33

GND2

17

7

GND3 GND4

Please put this BCAP capacitor near the BCAP pin as much as possible.

※ꢀWe recommend you use less than 1% accuracy resistor with voltage, frequency, OCP detect and cable compensation setting.

※ This in an example. Please decide all parts after enough evaluations and verifications.

Figure 55. Application Example

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Selection of Components Externally Connected

1. Setting External Components for DCDC

Vin

Cin

Cbulk

SNSH

SNSL

Rcl

GATE1

L

DCDC

Vo

(Controller)

D

Co

C1

Rs

R1

R2

FB1

R3

C2

INV1

Figure 56. External Components for DCDC

(1) Setting Output Voltage

To set output voltage, connect R1 between VOUT and INV, R2 between INV and GND.

Furthermore, set the R1 and R2 to 10k–1MΩ.

VOUT = V_INVx (R1 + R2)/R2 [V]

V_INV: INV Voltage

0.8V(Typ),

(2) Selection of Coil L

The value of the coil can be obtained by the formula shown below:

( V_IN- V_O) × V_O

=

L

V_IN

× f × ΔI L

△I_L: Output Ripple Current

△I_Lshould typically be approximately 20 to 30% of Iomax (the maximum load current of DCDC)

If this coil is not set to the optimum value, normal (continuous) oscillation may not be achieved. Furthermore, set the

value of the coil with an adequate margin so that the peak current passing through the coil will not exceed the rated

current of the coil.

(3) Selection of Output Capacitors

The output capacitor can be determined according to the output ripple voltage △Vpp required. Obtain the required ESR

value by the formula shown below and then select the capacitance.

( V_IN- V_O) × V_O

ΔI_L

=

V_IN

L × f ×

× V

ΔIL

O

ΔVpp

× ESR +

ΔI_L

=

V

2 × Co × f ×

IN

Set the rating of the capacitor with an adequate margin to the output voltage. Also, set the maximum allowable ripple

current with an adequate margin to △IL. Furthermore, the output rise time should be shorter than the soft start time.

Select the output capacitor having a value smaller than that obtained by the formula shown below.

{

_O(Max) }

1.7ms × I_LIMIT- I

C _MAX

=

V_O

I_LIMIT: DCDC Over Current Limit Value 0.1/Rcl[A] (DCDC1)

3.6 [A]

(DCDC2)

Rcl: Resistance between SNSH and SNSL

If these capacitances are not optimum, faulty startup may result.

( ※1.7m is soft start time(min) )

(4) Selection of Diodes

Set diode rating with an adequate margin to the maximum load current. Also, make setting of the rated inverse voltage

with an adequate margin to the maximum input voltage.

A diode with a low forward voltage and short reverse recovery time will provide high efficiency.

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(5) Selection of Input Capacitors

Be sure to insert a ceramic capacitor of 2 to 10µF for C_in

Furthermore, connect the capacitor C_bulkto keep input voltage.

The capacitor C_bulkshould have a low ESR and a significantly large ripple current. The ripple current IRMS can be

obtained by the following formula:

Io x Vo x ( Vin – Vo ) / Vin²

IRMS

=

Select capacitors that can accept this ripple current.

If the capacitance of C_INand C28 is not optimum, the IC may malfunction.

(6) Setting of Phase Compensation

The following section summarizes the targeted characteristics of this application for the stability condition of DCDC.

・At a 1(0dB)gain, the phase delay is 150°or less(i.e. the phase margin is 30° or more).

・The GBW for this occasion is 1/10 or less of the switching frequency.

Vin

L

Vo

Re

D

Co

Figure 57. LC Filter of DCDC

1

f

[Hz] (LC Resonance Point)

[Hz] (Phase Lead)

r

=

2π × L × Co

1

f_{ESR =}

2π × Re × Co

Replace a secondary phase delay(-180°) with a secondary phase lead by inserting two-phase leads, to ensure

the stability through the phase compensation.

Vo

C3

C2 R3

C1

Rs

R1

R2

ERR1

INV1

FB1

Figure 58. Phase Compensation

1

[Hz] (Phase Lead)

f

z1

=

2π × R1 × C1

1

f

z2

=

2π × R3 × C2

Setting fz1,fz2 to be half to 2 times a frequency as large as fr provides an appropriate phase margin.

For output capacitors that have high ESR, because f_ESR(phase lead) occurs near LC resonance point,

it is unnecessary to insert fz1(phase lead).

For output capacitors that have low ESR, insert fz1(phase lead) and fp1 obtained by the following formula

and adjust frequency response.

C2 + C3

[Hz] (Phase Delay)

f

p1

=

2π × R3 × C2 × C3

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The setting value above is simple estimate. Consequently, the setting may be adjusted on the actual system.

Furthermore, since these characteristics vary with the layout of PCB loading conditions, precise calculations

should be made on the actual system.

To check on the actual frequency characteristics, use a FRA or a gain-phase analyzer. Moreover, there is a

method of guessing the room degree by the loading response, too, when these measuring instruments do not

exist. The response is low when the change of the output when it is made to change under no load to the

maximum load is monitored, and there are a lot of variation quantities. It can be said that the phase margin

degree is little when there are a lot of ringing frequencies after it changes. As the standard, it is two times or

more of ringing. However, a quantitative phase margin degree cannot be confirmed.

Maximum load

Load

0

Inadequate phase margin

Output voltage

Adequate phase margin

Figure 59. Load Response

(7) Setting of the Threshold for DCDC1 Over Current Protection

When the peak of the inductor current gets over the over current protection values, over current protection circuit

operates. The over current protection values can be obtained by the following formula:

100mV

Iocp

=

Rcl

(8) Selection of the Pch FET for DCDC1

・VDS＜-Vin

・VGS＜-5V(Typ)

・Allowable Current ＞ Output Current + Ripple Current

※Recommended more than the threshold for over current protection

※The FET with low on resistance will provide high efficiency.

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2. Setting External Components for REG

VIN

Cin

REG

VOUT

Co

R1

R2

ADJ

Figure 60. External Components for REG

Input Voltage Range[V] OCP Current Threshold[A]

Output Capacitance[µF]

Output

ch

Voltage[V]

Min

Typ

3.3

14.4

6

Max

6.5

25

Min

0.5

Typ

1.0

Max

1.5

Min

4.7

1

Typ

Max

REG1

REG2

REG3

REG4

REG5

1.25

8.8

3.3

5.2

5

2.25^{(Note 1)}

9.45^{(Note 1)}

3.9^{(Note 1)}

5.6^{(Note 1)}

5.65^{(Note 1)}

-

0.15

0.3

0.30

0.6

0.45

0.9

6.5

25

4.7

47

1

6

Typ-20% Variable Typ+20%

0.05 0.10 0.15

14.4

(Note 1) the value when Output Voltage is indicated above

Figure 61. Each REG’s Specification of BD49101AEFS-M

(1) Setting Output Voltage

To set output voltage, connect R2 between ADJ and GND, R1 between VOUT and ADJ.

Furthermore, set the R1 to 100kΩ(400kΩ for REG3) or more.

VOUT = V_ADJx (R1+R2)/R2 [V]

V_ADJ:ADJ Voltage(=Reference Voltage) REG3,REG4,REG5: 0.8V(Typ),

REG1:

REG2:

0.6V(Typ),

0.793V(Typ)

(2) Selection of Output Capacitors

To prevent from oscillation, insert output capacitor. Check to Figure 61 about minimum capacitance of each REG.

(Temperature characteristic is excluded) It may be use ceramic capacitors.

Because steep change and input voltage change have effect on output voltage change, please confirm output

capacitance in actual application.

(3) Over Current Protection(OCP) Threshold

The OCP threshold depends on output voltage setting value. Especially if you set lower voltage than indicated shown

as Figure 61, OCP threshold value decrease.

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(4) Setting of REG4 Over Current Protection Threshold and Cable Impedance Calibration

①

Setting of Over Current Protection Threshold

The over current protection threshold (I_RG4OCP) can be set by the resistance connected with CLCAL(R_CLCAL).

The threshold can be obtained by the following formula (Typical Characteristic)

R_CLCAL[Ω] = 5.1k x 1.96A / I_RG4OCP[A]

The relation between resistance and the threshold is decided as shown in the figure below.

2.0

1.96

R_CLCAL[kΩ] I_RG4OCP[A]

1.79

5.1

5.6

6.8

8.2

1.96

1.79

1.47

1.22

1.00

0.83

0.67

0.56

0.45

0.37

0.30

0.26

0.21

0.18

1.5

1.0

0.5

0.0

1.47

1.22

10.0

12.0

15.0

18.0

22.0

27.0

33.0

39.0

47.0

56.0

1.00

0.83

0.67

0.56

0.45

0.37

0.30

0.26

0.21

50

0.18

0

10

20

30

40

60

OCP Threshold CurrentSetting

Resistance :R_CLCAL[kΩ]

Figure 62. Setting of Over Current Protection Threshold

②

Setting of Cable Impedance Calibration

The cable impedance (R_CABLE) calibration value can be set by the resistance connected with the VOCALpin (R_VOCAL).

This value can be obtained by the following formula (Typical Characteristic):

R_VOCAL[Ω] = R_CABLE[Ω] x 2400 / VOUT4

V_OUT4: REG4 Output Setting Value(Typ)

250

R_VOCAL[Ω]

R_CABLE[Ω]

VOUT4=5.2V

V_OUT4=5.2V

0.000

0.022

0.039

0.085

0.163

0.217

0.238

0.260

0.282

0.325

0.347

0.390

0.433

0.477

0.520

0

10

18

39

200

150

100

50

75

100

110

120

130

150

160

180

200

220

240

0

0.1

0.2

0.3

0.4

0.5

Cable Resistance : R_CABLE[Ω]

Figure 63. Setting of Cable Impedance Calibration

When you set cable impedance, please assume VOUT4 absolute maximum rating(7.0V) and I/O voltage difference(0.4V max)

so that the cable impedance calibration cause rising output voltage.

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③Setting of the VOCAL Capacitor

VIN4

Vin

Cin

REG4

VOUT4

VOCAL

Vo

Co

C_VOCAL

R_VOCAL

Figure 64. Capacitance of the VOCAL pin (C_VOCAL

)

For the oscillation of REG4 cable impedance calibration circuit, insert more than 4.7µF capacitor to VOCAL

as shown above.

(5) The VOUT0 Pin Setting

Be sure to connect DCDC2 output with the VOUT0 pin. (refer to Figure 55.)

The VOUT0 pin is a power supply for I/O pin (36-43pin). Therefore, if VOUT0 and VODC2 output would not be

connected, you could not set external synchronization, register and DCDC2/STBREG mode or could not get BSENS or

REG4OCB output signal.

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3. Setting the Oscillator Frequency (F_OSC

)

An internal oscillator frequency can be set by the resistance connected with the RT pin.

The relation between resistance and the oscillator frequency is decided as shown in the figure below. (Typical Characteristic)

550

R_T[kΩ]

27

30

33

36

39

43

47

51

56

62

68

75

82

91

F_OSC[kHz]

537

500

450

400

350

300

250

200

150

489

449

415

386

353

324

300

275

250

229

209

192

174

20

30

40

50

60

70

80

90 100

Oscillator Frequency Setting

Resistance: R_T[kΩ]

Figure 65. Oscillator Frequency vs R_T

Thermal Reduction Characteristics

10

9

8

7

6.19W

6

5

4

3

2

1

0

※Reduce by 49.5 mW/°C,when mounted on 4-layer PCB

of 70 x 70 x 16 mm³

(Copper foil area on the reverse side of PCB: 70 x 70mm²).

25

50

75

100

125

150

Ambient Temperature : Ta [℃]

Figure 66. Thermal Reduction Characteristics

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BD49101AEFS-M

I/O Equivalence Circuit(s)

No.

Name

No.

Name

Equivalent Circuit

BCAP VIN 1,2,3,0

Equivalent Circuit

VINSW

Internal

Regulator

Internal

Regulator

Internal

Regulator

14

16

32

1

VOUT1

VOUT2

VOUT3

VOUT5

10kΩ

VOUT1,2,3,5

HSW

6

HSW

700kΩ

20kΩ

600kΩ

115kΩ

35kΩ

91kΩ

9kΩ

Internal

Regulator

BCAP

Internal

Regulator

BCAP

FB1,2

20Ω

23

9

FB1

FB2

8

SW2

1kΩ

SW2

100kΩ

BCAP

Internal

Regulator

BCAP

12

19

INV1

INV2

11

VOUT0

INV1,2

2500kΩ

5kΩ

800kΩ

SNSH

13

15

31

26

44

ADJ1

ADJ2

ADJ3

ADJ4

ADJ5

Internal

Regulator

SNSH

BCAP

5kΩ

10kΩ

ADJ1,2,3,4,5

21

SNSL

2kΩ

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No.

Name

No.

Name

Equivalent Circuit

SNSH

VIN4

SNSH

VOUT4

22

27

34

37

GATE1

VOCAL

RT

25 VOUT4

350kΩ

10kΩ

60.125kΩ

40kΩ

GATE1

5kΩ

150kΩ

Internal

Regulator

VIN4

Internal

Regulator

Internal

Regulator

Internal

Regulator

28

36

38

CLCAL

SYNC

SDA

VOCAL

CLCAL

500kΩ

5kΩ

Internal

Regulator

Internal

Regulator

BCAP

VOUT0

2kΩ

SYNC

RT

50Ω

30kΩ

100kΩ

VOUT0

2kΩ

SCL

SDA

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No.

Name

No.

Name

Equivalent Circuit

BCAP

VOUT0

BCAP

VOUT0

EN

43

42

41

BSENS

EN,REG4EN,

ECO

40

39

2kΩ

REG4

EN

BSENS,

REG4OCB

REG4

OCB

100kΩ

(EN:660kΩ)

ECO

Figure 67. I/O Equivalence Circuit(s)

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Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the

digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog

block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and

aging on the capacitance value when using electrolytic capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Thermal Consideration

Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in

deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size

and copper area to prevent exceeding the Pd rating.

6. Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately

obtained. The electrical characteristics are guaranteed under the conditions of each parameter.

7. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush

current may flow instantaneously due to the internal powering sequence and delays, especially if the IC

has more than one power supply. Therefore, give special consideration to power coupling capacitance,

power wiring, width of ground wiring, and routing of connections.

8. Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

9. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)

and unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

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Operational Notes – continued

12. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should

be avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 68. Example of monolithic IC structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe

Operation (ASO).

15. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction

temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins except DCDC2/STBREG

and REG1. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

16. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

17. DCDC2 Short Current Protection (SCP)

While OCP operates, if the output voltage falls below 70%, SCP will start up. If SCP operates, the output will be OFF

period of 1024 pulse. It extends the output OFF time to reduce the average output current. In addition, when power

start-up this feature is masked until it reaches the output voltage is set to prevent the startup imperfection.

18. BCAP Over Voltage Protection (BCOVP)

The output except DCDC2/STBREG and REG1 will be turned OFF when BCAP voltage exceeds 30V(Typ).

When the voltage falls under 28V(Typ), those outputs restarts. Please care the range of use voltage.

19. BCAP Voltage Slew Rate Limitation

When the large voltage slew rate would input on the BCAP pin over 1 V/µs, the IC could be reset. Please care with a

bypass capacitor or input LC filter etc. to reduce the slew rate.

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BD49101AEFS-M

Ordering Information

B D 4 9 1 0 1 A E F S -

M E 2

M: for

Auto-

motive

Part Number

Package

EFS: HTSSOP-A44

Packaging and forming specification

E2: Embossed tape and reel

Physical Dimension, Tape and Reel Information

Marking Diagrams

HTSSOP-A44 (TOP VIEW)

Part Number Marking

LOT Number

D49101AEF

S

1PIN MARK

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BD49101AEFS-M

Revision History

Date

Revision

Changes

06.Apr.2015

23.Jun.2016

001

002

New Release

Correction of descriptions, Add descriptions of function, Change format

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.003


型号：	BD49101AEFS-M
厂家：	ROHM
描述：	BD49101AEFS-M是内置多个汽车音响所需电源的系统电源IC。本IC内置DC/DC 2ch、线性稳压器5ch、高边开关SW，微控制器、CD、调谐器、USB、照明、音响等可仅靠本IC供电。以高效率DC/DC电源为基础实施了系统化，比以往产品发热少。内置低消耗电流模式切换功能及电源控制功能等，实现了（1）高效率（2）低待机电流（3）简单的电源设计。汽车音响开关控制器 CD 微控制器稳压器
文件：	总44页 (文件大小：2069K)
中文：	中文翻译
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BD49101AEFS-M [ROHM]

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