BD7542S [ROHM]

Operational Amplifiers: High Voltage CMOS; 运算放大器:高电压CMOS
BD7542S
型号: BD7542S
厂家: ROHM    ROHM
描述:

Operational Amplifiers: High Voltage CMOS
运算放大器:高电压CMOS

运算放大器
文件: 总17页 (文件大小:688K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TECHNICAL NOTE  
ROHM’s Selection Operational Amplifier/Comparator Series  
Operational Amplifiers:  
High Voltage CMOS  
Input-Output Full Swing  
BD7561G,BD7561SG,BD7541G,BD7541SG,  
BD7562F/FVM,BD7562S F/FVM, BD7542F/FVM,BD7542S F/FVM  
Description  
BD7561G  
(BD7561SGOperation guaranteed up to +105℃)  
High voltage operable CMOS Op-Amp BD7561/  
BD7541 family and BD7562/BD7542 family  
Integrate one or two independent input-output full  
swing Op-amps and phase compesation capacitors  
on a single chip.  
High speed  
Single  
BD7562F/FVM  
(BD7562SF/FVMOperation guaranteed up to +105℃)  
Dual  
BD7541G  
(BD7541SGOperation guaranteed up to +105℃)  
Low power  
Single  
Especially, characteristics are wide operating voltage  
range of +5[V]+14.5[V](single power supply),  
low supply current and little input bias current.  
BD7542F/FVM  
(BD7542SF/FVMOperation guaranteed up to +105℃)  
Dual  
Characteristics  
1) Wide operating supply voltage(5[V]~+14.5[V])  
2) 5[V]~+14.5[V](single supply)  
±2.5[V]±7.25[V](split supply)  
8) Internal ESD protection  
Human body model (HBM) ±4000[V](Typ.)  
9) Wide temperature range  
40[]~+85[]  
3) Input and Output full swing  
4) Internal phase compensation  
(BD7561G,BD7562 family, BD7541G,BD7542 family)  
40[]~+105[]  
5) High slew rate (BD7561 family, BD7562 family)  
6) Low supply current (BD7541 family, BD7542 family)  
7) High large signal voltage gain  
(BD7561SG,BD7562S family, BD7541SG,BD7542S family)  
Pin Assignment  
VDD  
OUT2  
IN2-  
1
2
3
4
8
7
6
5
OUT1  
VDD  
OUT  
1
2
3
5
4
IN+  
CH1  
- +  
IN1-  
+
-
VSS  
IN-  
CH2  
+ -  
IN1+  
VSS  
IN2+  
SOP8  
MSOP8  
SSOP5  
BD7561G  
BD7561SG  
BD7541G  
BD7541SG  
BD7562F  
BD7562SF  
BD7542F  
BD7542SF  
BD7562FVM  
BD7562SFVM  
BD7542FVM  
BD7542SFVM  
Dec. 2008  
Absolute Maximum Ratings (Ta=25[])  
Rating  
Parameter  
Symbol  
Unit  
BD7561GBD7562 F/FVM  
BD7541GBD7542 F/FVM  
BD7561SGBD7562S F/FVM  
BD7541SGBD7542S F/FVM  
Supply Voltage  
15.5  
VDD-VSS  
Vid  
V
V
Differential Input Voltage(*1)  
Input Common-mode Voltage Range  
Operating Temperature  
VDD-VSS  
(VSS0.3)(VDD0.3)  
Vicm  
V
40~+85  
40~+105  
Topr  
Storage Temperature  
55~+125  
125  
Tstg  
Maximum Junction Temperature  
Tjmax  
Note: Absolute maximum rating item indicates the condition which must not be exceeded.  
Application of voltage in excess of absolute maximum rating or use out absoluted maximum rated temperature environment may cause deterioration of characteristics.  
(*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.  
Then input terminal voltage is set to more then VSS.  
Electric Characteristics  
BD7561 family, BD7562 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[])  
Guaranteed limit  
Temperature  
range  
BD7561G  
BD7561SG  
BD7562 F/FVM  
BD7562S F/FVM  
Condition  
Parameter  
Symbol  
Unit  
Min.  
Typ.  
Max.  
Min.  
Typ.  
1
Max.  
Input Offset Voltage (*2)(*4)  
25℃  
Full range  
25℃  
-
-
-
-
-
-
-
-
1
9
-
9
Vio  
mV VDD=514.5[V],VOUT=VDD/2  
-
1
10  
-
-
10  
Input Offset Current (*2)  
Input Bias Current (*2)  
Supply Current (*4)  
Iio  
Ib  
-
-
1
-
pA  
pA  
-
-
25℃  
1
-
-
1
-
25℃  
370  
-
550  
-
750  
-
1300  
RL=All Op-Amps  
Full range  
25℃  
600  
-
1500  
AV=0[dB],VDD=5[V],VIN=2.5[V]  
RL=All Op-Amps  
IDD  
μA  
440  
-
650  
-
900  
-
1400  
AV=0[dB],VDD=12[V],VIN=6.0[V]  
Full range  
25℃  
700  
-
1600  
High Level Output Voltage  
Low Level Output Voltage  
Large Single Voltage Gain  
Input Common-mode Voltage Range  
Common-mode Rejection Ratio  
Power Supply Rejection Ratio  
Output Source Current (*3)  
Output Sink Current (*3)  
Slew Rate  
VOH  
VOL  
AV  
VDD-0.1  
-
-
-
VDD-0.1  
-
-
V
V
RL=10[k]  
25℃  
-
70  
0
VSS+0.1  
-
70  
0
-
VSS+0.1  
RL=10[k]  
25℃  
95  
-
-
12  
-
95  
-
-
12  
-
dB  
V
RL=10[k]  
25℃  
Vicm  
CMRR  
PSRR  
IOH  
IOL  
VDD-VSS=12[V]  
25℃  
45  
60  
3
60  
80  
8
45  
60  
3
60  
80  
8
dB  
dB  
-
-
25℃  
-
-
25℃  
-
-
mA VDD-0.4[V]  
25℃  
4
14  
0.9  
1.0  
50°  
0.05  
-
4
14  
0.9  
1.0  
50°  
0.05  
-
mA VSS+0.4[V]  
25℃  
SR  
-
-
-
-
V/μs CL=25[pF]  
Gain Bandwidth Product  
Phase Margin  
25℃  
FT  
-
-
-
-
MHz CL=25[pF], AV=40[dB]  
25℃  
θ
-
-
-
-
CL=25[pF], AV=40[dB]  
VOUT=1[Vp-p],f=1[kHz]  
Total Harmonic Distortion  
25℃  
THD  
-
-
-
-
%
(*2) Absolute value  
(*3) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.  
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.  
(*4) Full rangeBD7561, BD7562Ta=-40[]+85[] BD7561S, BD7562STa=-40[]+105[]  
Electric Characteristics  
BD7541 family, BD7542 family (Unless otherwise specified VDD=+12[V], VSS=0[V], Ta=25[])  
Guaranteed limit  
Temperature  
range  
BD7541G  
BD7541SG  
BD7542 F/FVM  
BD7542S F/FVM  
Condition  
Parameter  
Symbol  
Unit  
Min.  
Typ.  
Max.  
Min.  
Typ.  
1
Max.  
Input Offset Voltage (*5)(*7)  
25℃  
Full range  
25℃  
-
-
-
-
-
-
-
-
1
9
-
9
Vio  
mV VDD=514.5[V],VOUT=VDD/2  
-
1
10  
-
-
10  
Input Offset Current (*5)  
Input Bias Current (*5)  
Supply Current (*7)  
Iio  
Ib  
-
-
1
-
pA  
pA  
-
-
25℃  
1
-
-
1
-
25℃  
170  
-
300  
-
340  
-
650  
RL=All Op-Amps  
Full range  
25℃  
400  
-
850  
AV=0[dB],VDD=5[V],VIN=2.5[V]  
RL=All Op-Amps  
IDD  
μA  
180  
-
320  
-
400  
-
780  
AV=0[dB],VDD=12[V],VIN=6.0[V]  
Full range  
25℃  
420  
-
900  
High Level Output Voltage  
Low Level Output Voltage  
Large Single Voltage Gain  
Input Common-mode Voltage Range  
Common-mode Rejection Ratio  
Power Supply Rejection Ratio  
Output Source Current (*6)  
Output Sink Current (*6)  
Slew Rate  
VOH  
VOL  
AV  
VDD-0.1  
-
-
-
VDD-0.1  
-
-
V
V
RL=10[k]  
25℃  
-
70  
0
VSS+0.1  
-
70  
0
-
VSS+0.1  
RL=10[k]  
25℃  
95  
-
-
12  
-
95  
-
-
12  
-
dB  
V
RL=10[k]  
25℃  
Vicm  
CMRR  
PSRR  
IOH  
IOL  
VDD-VSS=12[V]  
25℃  
45  
60  
2
60  
80  
4
45  
60  
2
60  
80  
4
dB  
dB  
-
-
25℃  
-
-
25℃  
-
-
mA VDD-0.4[V]  
25℃  
3
7
-
3
7
-
mA VSS+0.4[V]  
25℃  
SR  
-
0.3  
0.6  
50°  
0.05  
-
-
0.3  
0.6  
50°  
0.05  
-
V/μs CL=25[pF]  
Gain Bandwidth Product  
Phase Margin  
25℃  
FT  
-
-
-
-
MHz CL=25[pF], AV=40[dB]  
25℃  
θ
-
-
-
-
CL=25[pF], AV=40[dB]  
VOUT=1[Vp-p],f=1[kHz]  
Total Harmonic Distortion  
(*5) Absolute value  
25℃  
THD  
-
-
-
-
%
(*6) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.  
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.  
(*7) Full rangeBD7541, BD7542Ta=-40[]+85[] BD7541S, BD7542STa=-40[]+105[]  
2/16  
Example of electrical characteristics  
BD7561 family  
BD7561 family  
BD7561 family  
BD7561 family  
800  
800  
600  
400  
200  
0
800  
600  
400  
200  
0
-40℃  
600  
BD7561G  
25℃  
BD7561SG  
400  
200  
0
85℃  
105℃  
0
50  
100  
150  
0
50  
100  
150  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
Fig.1  
Fig.2  
Fig.3  
Derating Curve  
Derating Curve  
Supply Current – Supply Voltage  
BD7561 family  
BD7561 family  
BD7561 family  
800  
600  
400  
200  
0
16  
12  
8
16  
12  
8
-40℃  
14.5V  
14.5V  
12V  
85℃  
25℃  
12V  
5V  
5V  
105℃  
4
4
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
Fig.4  
Fig.5  
Fig.6  
Supply Current – Ambient Temperature  
Output Voltage High – Supply Voltage  
Output Voltage High – Ambient Temperature  
(RL=10[k])  
(RL=10[k])  
BD7561 family  
BD7561 family  
BD7561 family  
40  
80  
40  
-40℃  
30  
60  
30  
20  
10  
0
14.5V  
85℃  
105℃  
25℃  
20  
10  
40  
20  
12V  
85℃  
25℃  
-40℃  
5V  
105℃  
0
0
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
8
9
10  
11  
12  
13  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
OUTPUT VOLTAGE [V]  
Fig.7  
Fig.8  
Fig.9  
Output Voltage Low – Supply Voltage  
Output Voltage Low – Ambient Temperature  
Output Source Current – Output Voltage  
(VDD=12[V])  
(RL=10[k])  
(RL=10[k])  
BD7561 family  
BD7561 family  
BD7561 family  
40  
100  
15  
80  
12  
9
14.5V  
30  
-40℃  
60  
14.5V  
20  
25℃  
12V  
40  
6
12V  
105℃  
10  
20  
3
85℃  
5V  
5V  
0
0
0
-60 -30  
0
30  
60  
90 120  
-1  
0
1
2
3
-60 -30  
0
30  
60  
90 120  
OUTPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.10  
Fig.11  
Fig.12  
Output Source Current – Ambient Temperature  
(VOUT=VDD-0.4[V])  
Output Sink Current – Output Voltage  
(VDD=12[V])  
Output Sink Current – Ambient Temperature  
(VOUT=VDD-11.6[V])  
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[] BD7561S-40[]+105[]  
3/16  
BD7561 family  
BD7561 family  
BD7561 family  
12V  
BD7561 family  
10.0  
7.5  
15  
10  
5
10.0  
7.5  
14.5V  
5.0  
5.0  
-40℃  
25℃  
2.5  
0.0  
25℃  
2.5  
-40℃  
0
0.0  
105℃  
85℃  
105℃  
-2.5  
-2.5  
-5.0  
-7.5  
-10.0  
85℃  
-5  
5V  
-5.0  
-7.5  
-10  
-15  
-10.0  
4
8
12  
16  
-1 0 1 2 3 4 5 6 7 8 9 10111213  
-60 -30  
0
30  
60  
90 120  
SUPPLY VOLTAGE [V]  
INPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.13  
Fig.14  
Fig.15  
Input Offset Voltage – Supply Voltage  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Ambient Temperature  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Input Voltage  
(VDD=12[V])  
BD7561 family  
BD7561 family  
BD7561 family  
160  
160  
120  
100  
-40℃  
25℃  
14.5V  
140  
120  
100  
80  
140  
105℃  
85℃  
12V  
80  
60  
40  
20  
0
120  
105℃  
85℃  
25℃  
100  
5V  
-40℃  
80  
60  
60  
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
Fig.16  
Fig.17  
Fig.18  
Large Signal Voltage Gain  
– Supply Voltage  
Large Signal Voltage Gain  
– Ambient Temperature  
Common Mode Rejection Ratio  
– Supply Voltage  
(VDD=12[V])  
BD7561 family  
BD7561 family  
BD7561 family  
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
4
3
2
1
0
5V  
14.5V  
14.5V  
12V  
12V  
5V  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.19  
Fig.20  
Fig.21  
Common Mode Rejection Ratio  
– Ambient Temperature  
(VDD=12[V])  
Power Supply Rejection Ratio  
– Ambient Temperature  
Slew Rate L-H – Ambient Temperature  
BD7561 family  
BD7561 family  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
80  
60  
40  
20  
0
200  
150  
100  
50  
Phase  
14.5V  
Gain  
12V  
5V  
0
1.E+00 1.E+02 1.E+04 1.E+06 1.E+08  
FREQUENCY [Hz]  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
Fig.22  
Fig.23  
Slew Rate H-L – Ambient  
Temperature  
Gain - Frequency  
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[] BD7561S-40[]+105[]  
4/16  
Example of electrical characteristics  
BD7562 family  
BD7562 family  
BD7562 family  
BD7562 family  
1200  
1000  
800  
600  
400  
200  
0
800  
800  
600  
400  
200  
0
-40℃  
25℃  
600  
BD7562F  
BD7562SF  
BD7562FVM  
BD7562SFVM  
400  
85℃  
105℃  
200  
0
0
50  
100  
150  
0
50  
100  
150  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
Fig.1  
Fig.2  
Fig.3  
Derating Curve  
Derating Curve  
Supply Current – Supply Voltage  
BD7562 family  
BD7562 family  
BD7562 family  
14.5V  
16  
12  
8
16  
12  
8
1200  
1000  
800  
600  
400  
200  
0
-40℃  
14.5V  
12V  
85℃  
12V  
25℃  
5V  
5V  
105℃  
4
4
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.4  
Fig.5  
Fig.6  
Supply Current – Ambient Temperature  
Output Voltage High – Supply Voltage  
Output Voltage High – Ambient Temperature  
(RL=10[k])  
(RL=10[k])  
BD7562 family  
BD7562 family  
BD7562 family  
40  
40  
80  
30  
30  
20  
10  
0
60  
40  
20  
0
-40℃  
14.5V  
85℃  
105℃  
25℃  
20  
10  
12V  
85℃  
25℃  
-40℃  
5V  
105℃  
0
8
9
10  
11  
12  
13  
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
OUTPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
Fig.7  
Fig.8  
Fig.9  
Output Voltage Low – Supply Voltage  
Output Voltage Low – Ambient Temperature  
Output Source Current – Output Voltage  
(VDD=12[V])  
(RL=10[k])  
(RL=10[k])  
BD7562 family  
BD7562 family  
BD7562 family  
100  
40  
15  
80  
12  
9
14.5V  
30  
-40℃  
60  
14.5V  
20  
25℃  
12V  
40  
6
12V  
105℃  
10  
20  
3
85℃  
5V  
5V  
0
0
0
-1  
0
1
2
3
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
OUTPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.10  
Fig.11  
Fig.12  
Output Source Current – Ambient Temperature  
(VOUT=VDD-0.4[V])  
Output Sink Current – Output Voltage  
(VDD=12[V])  
Output Sink Current – Ambient Temperature  
(VOUT=VDD-11.6[V])  
()The above data is ability value of sample, it is not guaranteed. BD7562-40[]+85[] BD7562S-40[]+105[]  
5/16  
BD7562 family  
BD7562 family  
BD7562 family  
BD7562 family  
10.0  
7.5  
15  
10  
5
10.0  
7.5  
14.5V  
12V  
5.0  
5.0  
-40℃  
25℃  
25℃  
-40℃  
2.5  
2.5  
0.0  
0
0.0  
105℃  
85℃  
105℃  
85℃  
-2.5  
-5.0  
-7.5  
-10.0  
-2.5  
-5  
5V  
-5.0  
-7.5  
-10  
-15  
-10.0  
-60 -30  
0
30  
60  
90 120  
-1 0 1 2 3 4 5 6 7 8 9 10111213  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
INPUT VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
Fig.13  
Fig.14  
Fig.15  
Input Offset Voltage – Supply Voltage  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Ambient Temperature  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Input Voltage  
(VDD=12[V])  
BD7562 family  
BD7562 family  
BD7562 family  
160  
160  
120  
-40℃  
85℃  
12V  
85℃  
14.5V  
100  
80  
60  
40  
20  
0
-40℃  
140  
120  
100  
80  
140  
120  
25℃  
105℃  
105℃  
25℃  
100  
5V  
80  
60  
60  
4
8
12  
16  
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
SUPPLY VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.16  
Fig.17  
Fig.18  
Large Signal Voltage Gain  
– Supply Voltage  
Large Signal Voltage Gain  
– Ambient Temperature  
Common Mode Rejection Ratio  
– Supply Voltage  
(VDD=12[V])  
BD7562 family  
BD7562 family  
5V  
BD7562 family  
4
3
2
1
0
120  
100  
80  
60  
40  
20  
0
200  
160  
120  
80  
12V  
14.5V  
14.5V  
40  
12V  
5V  
0
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.21  
AMBIENT TEMPERATURE [°C]  
Fig.19  
Fig.20  
Common Mode Rejection Ratio  
– Ambient Temperature  
(VDD=12[V])  
Power Supply Rejection Ratio  
– Ambient Temperature  
Slew Rate L-H – Ambient Temperature  
BD7562 family  
BD7562 family  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
80  
60  
40  
20  
0
200  
150  
100  
50  
Phase  
14.5V  
Gain  
12V  
5V  
0
1.E+00 1.E+02 1.E+04 1.E+06 1.E+08  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
Fig.22  
FREQUENCY [Hz]  
Fig.23  
Slew Rate H-L – Ambient  
Temperature  
Gain - Frequency  
()The above data is ability value of sample, it is not guaranteed. BD7562-40[]+85[] BD7562S-40[]+105[]  
6/16  
Example of electrical characteristics  
BD7541 family  
BD7541 family  
BD7541 family  
BD7541 family  
800  
800  
600  
400  
200  
0
400  
300  
200  
100  
0
25℃  
600  
-40℃  
BD7541G  
BD7541SG  
400  
200  
0
85℃  
105℃  
4
8
12  
16  
0
50  
100  
150  
0
50  
100  
150  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.1  
Fig.2  
Fig.3  
Derating Curve  
Derating Curve  
Supply Current – Supply Voltage  
BD7541 family  
BD7541 family  
BD7541 family  
400  
300  
200  
100  
0
16  
12  
8
16  
12  
8
-40℃  
14.5V  
14.5V  
12V  
85℃  
25℃  
12V  
5V  
5V  
105℃  
4
4
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.4  
Fig.5  
Fig.6  
Supply Current – Ambient Temperature  
Output Voltage High – Supply Voltage  
Output Voltage High – Ambient Temperature  
(RL=10[k])  
(RL=10[k])  
BD7541 family  
BD7541 family  
BD7541 family  
80  
80  
40  
-40℃  
60  
60  
40  
20  
0
30  
14.5V  
85℃  
25℃  
105℃  
40  
20  
85℃  
20  
10  
-40℃  
25℃  
12V  
5V  
105℃  
0
0
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
8
9
10  
11  
12  
13  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
OUTPUT VOLTAGE [V]  
Fig.7  
Fig.8  
Fig.9  
Output Voltage Low – Supply Voltage  
Output Voltage Low – Ambient Temperature  
Output Source Current – Output Voltage  
(VDD=12[V])  
(RL=10[k])  
(RL=10[k])  
BD7541 family  
BD7541 ファミリ  
BD7541 family  
50  
10  
20  
8
6
4
2
0
40  
-40℃  
15  
14.5V  
30  
14.5V  
25℃  
10  
20  
12V  
12V  
105℃  
5
10  
85℃  
5V  
5V  
0
0
-60 -30  
0
30  
60  
90 120  
-1  
0
1
2
3
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
OUTPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.10  
Fig.11  
Fig.12  
Output Source Current – Ambient Temperature  
(VOUT=VDD-0.4[V])  
Output Sink Current – Output Voltage  
(VDD=12[V])  
Output Sink Current – Ambient Temperature  
(VOUT=VDD-11.6[V])  
()The above data is ability value of sample, it is not guaranteed. BD7541-40[]+85[] BD7541S-40[]+105[]  
7/16  
BD7541 family  
BD7541 family  
BD7541 family  
BD7541 family  
10.0  
7.5  
10.0  
7.5  
15  
10  
5
14.5V  
12V  
5.0  
5.0  
-40℃  
25℃  
25℃  
-40℃  
2.5  
2.5  
0.0  
0
0.0  
105℃  
105℃  
85℃  
85℃  
-2.5  
-2.5  
-5.0  
-7.5  
-10.0  
-5  
5V  
-5.0  
-7.5  
-10  
-15  
-10.0  
-1 0  
1 2 3 4 5 6 7 8 9 10111213  
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
INPUT VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.13  
Fig.14  
Fig.15  
Input Offset Voltage – Supply Voltage  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Ambient Temperature  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Input Voltage  
(VDD=12[V])  
BD7541 family  
BD7541 family  
BD7541 family  
160  
160  
120  
-40℃  
25℃  
12V  
100  
80  
60  
40  
20  
0
105℃  
140  
120  
100  
80  
140  
105℃  
120  
85℃  
-40℃  
85℃  
25℃  
14.5V  
100  
5V  
80  
60  
60  
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
4
8
12  
16  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
Fig.16  
Fig.17  
Fig.18  
Large Signal Voltage Gain  
– Supply Voltage  
Large Signal Voltage Gain  
– Ambient Temperature  
Common Mode Rejection Ratio  
– Supply Voltage  
(VDD=12[V])  
BD7541 family  
BD7541 family  
BD7541 family  
2.0  
1.5  
1.0  
0.5  
0.0  
120  
100  
80  
60  
40  
20  
0
200  
160  
120  
80  
14.5V  
12V  
14.5V  
5V  
12V  
40  
5V  
0
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.19  
Common Mode Rejection Ratio  
– Ambient Temperature  
(VDD=12[V])  
Fig.20  
Fig.21  
Power Supply Rejection Ratio  
– Ambient Temperature  
Slew Rate L-H – Ambient Temperature  
BD7541 family  
BD7541 family  
100  
80  
60  
40  
20  
0
200  
150  
100  
50  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
Phase  
14.5V  
Gain  
12V  
5V  
0
1.E+00 1.E+02 1.E+04 1.E+06 1.E+08  
FREQUENCY [Hz]  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
Fig.22  
Fig.23  
Slew Rate H-L – Ambient  
Temperature  
Gain - Frequency  
()The above data is ability value of sample, it is not guaranteed. BD7541-40[]+85[] BD7541S-40[]+105[]  
8/16  
Example of electrical characteristics  
BD7542 family  
BD7542 family  
BD7542 family  
BD7542 family  
800  
600  
400  
200  
0
800  
800  
600  
400  
200  
0
BD7542F  
-40℃  
BD7542SF  
600  
25℃  
BD7542FVM  
BD7542SFVM  
400  
85℃  
200  
0
105℃  
4
8
12  
16  
0
50  
100  
150  
0
50  
100  
150  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.1  
Fig.2  
Fig.3  
Derating Curve  
Supply Current – Supply Voltage  
Derating Curve  
BD7542 family  
BD7542 family  
BD7542 family  
800  
600  
400  
200  
0
16  
12  
8
16  
12  
8
14.5V  
-40℃  
14.5V  
12V  
85℃  
25℃  
5V  
12V  
5V  
105℃  
4
4
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.4  
Fig.5  
Fig.6  
Supply Current – Ambient Temperature  
Output Voltage High – Supply Voltage  
Output Voltage High – Ambient Temperature  
(RL=10[k])  
(RL=10[k])  
BD7542 family  
BD7542 family  
BD7542 family  
80  
80  
40  
-40℃  
60  
60  
40  
20  
0
30  
14.5V  
25℃  
85℃  
105℃  
40  
20  
0
20  
85℃  
10  
-40℃  
105℃  
5V  
12V  
25℃  
0
8
9
10  
11  
12  
13  
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
OUTPUT VOLTAGE [V]  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.7  
Fig.8  
Fig.9  
Output Voltage Low – Supply Voltage  
Output Voltage Low – Ambient Temperature  
Output Source Current – Output Voltage  
(VDD=12[V])  
(RL=10[k])  
(RL=10[k])  
BD7542 family  
BD7542 family  
BD7542 family  
50  
20  
10  
40  
8
6
4
2
0
15  
-40℃  
14.5V  
30  
14.5V  
25℃  
10  
20  
12V  
12V  
85℃  
5
10  
105℃  
5V  
5V  
0
0
-1  
0
1
2
3
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
OUTPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.10  
Fig.11  
Fig.12  
Output Source Current – Ambient Temperature  
(VOUT=VDD-0.4[V])  
Output Sink Current – Output Voltage  
(VDD=12[V])  
Output Sink Current – Ambient Temperature  
(VOUT=VDD-11.6[V])  
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[] BD7561S-40[]+105[]  
9/16  
BD7542 family  
BD7542 family  
BD7542 family  
BD7542 family  
12V  
10.0  
7.5  
15  
10  
5
10.0  
7.5  
14.5V  
5.0  
5.0  
-40℃  
25℃  
25℃  
-40℃  
2.5  
2.5  
0.0  
0
0.0  
105℃  
85℃  
105℃  
85℃  
-2.5  
-2.5  
-5.0  
-7.5  
-10.0  
-5  
5V  
-5.0  
-7.5  
-10  
-15  
-10.0  
4
8
12  
16  
-1 0 1 2 3 4 5 6 7 8 9 10111213  
-60 -30  
0
30  
60  
90 120  
SUPPLY VOLTAGE [V]  
INPUT VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
Fig.13  
Fig.14  
Fig.15  
Input Offset Voltage – Supply Voltage  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Ambient Temperature  
(Vicm=VDD, VOUT=VDD/2)  
Input Offset Voltage – Input Voltage  
(VDD=12[V])  
BD7542 family  
BD7542 family  
BD7542 family  
160  
160  
120  
25℃  
14.5V  
12V  
105℃  
100  
80  
60  
40  
20  
0
140  
120  
100  
80  
140  
120  
100  
80  
-40℃  
105℃  
85℃  
-40℃  
85℃  
25℃  
5V  
60  
60  
4
8
12  
16  
-60 -30  
0
30  
60  
90 120  
4
8
12  
16  
SUPPLY VOLTAGE [V]  
AMBIENT TEMPERATURE [°C]  
SUPPLY VOLTAGE [V]  
Fig.16  
Fig.17  
Fig.18  
Large Signal Voltage Gain  
– Supply Voltage  
Large Signal Voltage Gain  
– Ambient Temperature  
Common Mode Rejection Ratio  
– Supply Voltage  
(VDD=12[V])  
BD7542 family  
BD7542 family  
BD7542 family  
2.0  
1.5  
1.0  
0.5  
0.0  
120  
100  
80  
60  
40  
20  
0
200  
160  
120  
80  
12V  
14.5V  
14.5V  
5V  
12V  
40  
5V  
0
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
AMBIENT TEMPERATURE [°C]  
Fig.19  
Fig.20  
Fig.21  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
– Ambient Temperature  
Slew Rate L-H – Ambient Temperature  
– Ambient Temperature  
(VDD=12[V])  
BD7542 family  
BD7542 family  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
100  
80  
60  
40  
20  
0
200  
150  
100  
50  
Phase  
14.5V  
Gain  
12V  
5V  
0
1.E+00 1.E+02 1.E+04 1.E+06 1.E+08  
FREQUENCY [Hz]  
-60 -30  
0
30  
60  
90 120  
AMBIENT TEMPERATURE [°C]  
Fig.22  
Fig.23  
Slew Rate H-L – Ambient  
Temperature  
Gain - Frequency  
()The above data is ability value of sample, it is not guaranteed. BD7561-40[]+85[] BD7561S-40[]+105[]  
10/16  
Schematic diagram  
Fig1. Schematic diagram  
Test circuit1 NULL method  
VDD,VSS,EK,Vicm Unit : [V]  
Parameter  
Input Offset Voltage  
VF  
S1  
ON  
ON  
S2  
ON  
ON  
S3  
OFF  
ON  
VDD VSS  
EK  
Vicm  
12  
Calculation  
VF1  
VF2  
VF3  
VF4  
VF5  
VF6  
VF7  
12  
12  
0
0
-6  
1
2
-0.5  
-11.5  
Large Signal Voltage Gain  
6
0
Common-mode Rejection Ratio  
(Input Common-mode Voltage Range)  
ON  
ON  
ON  
ON  
OFF  
OFF  
12  
0
0
-6  
3
4
12  
5
Power Supply Rejection Ratio  
-2.5  
0
14.5  
Calculation-  
|VF1|  
1+Rf/Rs  
1. Input Offset Voltage (Vio)  
Vio  
Av  
[V]  
=
(1+Rf/Rs)  
[dB]  
=20Log  
2. Large Signal Voltage Gain (Av)  
|VF2-VF3|  
1.8×(1+Rf/Rs)  
3. Common-mode Rejection Ratio (CMRR)  
4. Power Supply Rejection Ratio (PSRR)  
CMRR  
[dB]  
= 20Log  
|VF4-VF5|  
3.8×(1+Rf/Rs)  
PSRR= 20Log  
[dB]  
|VF6-VF7|  
0.1[μF]  
Rf =50[k]  
0.01[μF]  
500[k]  
VDD  
DUT  
SW1  
EK  
15[V]  
Vo  
Ri=1[M]  
RS 50[]  
500[k]  
0.015[μF]  
0.015[μF]  
NULL  
SW3  
RS 50[]  
Ri=1[M]  
1000[pF]  
VF  
RL  
Vicm  
SW2  
50[k]  
VRL  
-15[V]  
VSS  
Fig.2 Test circuit 1 (one channel only)  
11/16  
Test circuit2 switch condition  
Unit : [V]  
SW  
1
SW  
2
SW  
3
SW  
4
SW  
5
SW  
6
SW  
7
SW  
8
SW  
9
SW  
10  
SW  
11  
SW  
12  
SW No.  
Supply Current  
OFF  
OFF  
ON  
ON  
OFF  
ON  
ON  
ON  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
ON  
OFF  
OFF  
OFF  
ON  
OFF  
OFF  
ON  
OFF  
ON  
OFF  
OFF  
OFF  
ON  
Maximum Output Voltage RL=10 [k] OFF  
OFF OFF  
OFF OFF  
Output Current  
Slew Rate  
OFF  
OFF  
ON  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
OFF  
ON  
OFF  
OFF  
Maximum Frequency  
OFF OFF  
OFF  
ON  
ON  
VIN  
[V]  
12[V]  
SW3  
SW4  
12[VP-P  
]
R2 100[k]  
VDD=3[V]  
0[V]  
t
Input waveform  
VOUT  
[V]  
SR= ΔV / Δt  
SW1  
SW2  
12[V]  
SW8  
SW9  
SW10  
SW11  
SW12  
SW5  
SW6  
SW7  
R1  
1[k]  
GND  
ΔV  
RL  
CL  
VIN-  
VIN+  
Vo  
Δt  
0[V]  
t
Output waveform  
Fig3. Test circuit2  
Fig4. Slew rate input output wave  
Test circuit3 Channel separation  
R2=100[k]  
R2=100[k]  
VDD  
VDD  
R1=1[k]  
R1=1[k]  
VOUT1  
=1[Vrms]  
V
V
VOUT2  
R1//R2  
R1//R2  
VIN  
VSS  
VSS  
100×VOUT1  
CS=20Log  
VOUT2  
Fig5. Test circuit3  
12/16  
Description of electrical characteristics  
Described here are the terms of electric characteristics used in this technical note. Items and symbols used are also shown.  
Note that item name and symbol and their meaning may differ from those on another manufacture’s document or general document.  
1. Absolute maximum ratings  
Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute  
maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics.  
1.1 Power supply voltage VDD/VSS)  
Indicates the maximum voltage that can be applied between the positive power supply terminal and negative power supply terminal  
without deterioration or destruction of characteristics of internal circuit.  
1.2  
Differential input voltage Vid)  
Indicates the maximum voltage that can be applied between non-inverting terminal and inverting terminal without deterioration and  
destruction of characteristics of IC.  
1.3  
1.4  
Input common-mode voltage range Vicm)  
Indicates the maximum voltage that can be applied to non-inverting terminal and inverting terminal without deterioration or destruction of  
characteristics. Input common-mode voltage range of the maximum ratings not assure normal operation of IC. When normal  
Operation of IC is desired, the input common-mode voltage of characteristics item must be followed.  
Power dissipation Pd)  
Indicates the power that can be consumed by specified mounted board at the ambient temperature 25(normal temperature). As for  
package product, Pd is determined by the temperature that can be permitted by IC chip in the packagemaximum junction temperature)  
and thermal resistance of the package.  
2.  
Electrical characteristics item  
2.1  
Input offset voltage Vio)  
Indicates the voltage difference between non-inverting terminal and inverting terminal. It can be translated into the input voltage  
difference required for setting the output voltage at 0 [V].  
2.2  
2.3  
Input offset current Iio)  
Indicates the difference of input bias current between non-inverting terminal and inverting terminal.  
Input bias current Ib)  
Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias current at non-inverting terminal  
and input bias current at inverting terminal.  
2.4  
2.5  
Circuit current ICC)  
Indicates the IC current that flows under specified conditions and no-load steady status.  
High level output voltage / Low level output voltageVOH/VOL)  
Indicates the voltage range that can be output by the IC under specified load condition. It is typically divided into high-level output voltage  
and low-level output voltage. High-level output voltage indicates the upper limit of output voltage. Low-level output voltage indicates the  
lower limit.  
2.6  
Large signal voltage gain AV)  
Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal and inverting terminal.  
It is normally the amplifying rate (gain) with reference to DC voltage.  
Av = (Output voltage fluctuation) / (Input offset fluctuation)  
2.7  
Input common-mode voltage range Vicm)  
Indicates the input voltage range where IC operates normally.  
2.8 Common-mode rejection ratio CMRR)  
Indicates the ratio of fluctuation of input offset voltage when in-phase input voltage is changed. It is normally the fluctuation of DC.  
CMRR =(Change of Input common-mode voltage/Input offset fluctuation)  
2.9 Power supply rejection ratio PSRR)  
Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC.  
PSRR=(Change of power supply voltage/Input offset fluctuation)  
2.10 Channel separationCS)  
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage of driven channel.  
2.11 Slew rate SR)  
Indicates the time fluctuation ratio of voltage output when step input signal is applied.  
2.12 Unity gain frequency ft)  
Indicates a frequency where the voltage gain of Op-Amp is 1.  
2.13 Total harmonic distortion + Noise THDN)  
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage  
of driven channel.  
2.14 Input referred noise voltage Vn)  
Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected  
in series with input terminal.  
13/16  
Derating curve  
Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25(normal temperature).IC is heated  
when it consumed power, and the temperature of IC ship becomes higher than ambient temperature. The temperature that can  
be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited. Power  
dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and thermal resistance of  
package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the  
storage package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in  
the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame of the  
package. The parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal resistance,  
represented by the symbol θj-a[/W]. The temperature of IC inside the package can be estimated by this thermal resistance.  
Fig.6 (a) shows the model of thermal resistance of the package. Thermal resistance θja, ambient temperature Ta, junction  
temperature Tj, and power dissipation Pd can be calculated by the equation below :  
θja (TjTa) / Pd  
[/W]  
・・・・・ (Ⅰ)  
Derating curve in Fig.6 (b) indicates power that can be consumed by IC with reference to ambient temperature. Power that can  
be consumed by IC begins to attenuate at certain ambient temperature. This gradient iis determined by thermal resistance θja.  
Thermal resistance θja depends on chip size, power consumption, package, ambient temperature, package condition, wind  
velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value measured at a  
specified condition. Fig7(c)-(f) show a derating curve for an example of BU7561family, BU7562family, 7541family, 7542family.  
Power dissipation of LSI [W]  
Pd(max)  
P2  
P1  
θja  
(Tj Ta) / Pd  
[
/W]  
θja2 <θja1  
θja2  
Ambient temperature Ta []  
Package surface temperature []  
Tj(max)  
θja1  
0
50  
75  
100  
150  
25  
125  
Chip surface temperature Tj []  
Power dissipation P [W]  
Ambient temperature Ta []  
BD7561/BD7541  
Tj(max)  
(a) Thermal resistance  
(b) Derating curve  
Fig.6 Thermal resistance and derating  
800  
1000  
800  
600  
400  
200  
0
600  
BD7562F(*9)  
BD7542F(*9)  
620[mw]  
480[mw]  
BD7561G(*8)  
BD7541G(*8)  
540[mw]  
BD7562FVM(*10)  
BD7542FVM(*10)  
400  
200  
0
85  
0
50  
100  
150  
0
50  
100  
150  
85  
AMBIENT TEMPERATURE [  
]
AMBIENT TEMPERATURE [  
]
(d) BD7562F/FVM BD7542F/FVM  
(c) BD7561G BD7541G  
1000  
800  
600  
400  
200  
0
800  
600  
400  
200  
0
BD7562SF(*9)  
BD7542SF(*9)  
620[mw]  
480[mw]  
BD7561SG(*8)  
BD7541SG(*8)  
540[mw]  
BD7562SFVM(*10)  
BD7542SFVM(*10)  
105  
100  
105  
0
50  
150  
0
50  
100  
150  
AMBIENT TEMPERATURE [  
]
AMBIENT TEMPERATURE [  
]
(f) BD7562S F/FVM BD7542S F/FVM  
(e) BD7561SG BD7541SG  
*8) (*9) (*10)  
Unit  
[mW/]  
5.4  
6.2  
4.8  
When using the unit above Ta=25[], subtract the value above per degree[]. Permissible dissipation is the value  
when FR4 glass epoxy board 70[mm]×70[mm]×1.6[mm] (cooper foil area below 3[]) is mounted.  
Fig.7 Derating curve  
14/16  
Cautions on use  
1) Absolute maximum ratings  
Absolute maximum ratings are the values which indicate the limits,  
within which the given voltage range can be safely charged to the terminal.  
However, it does not guarantee the circuit operation.  
2) Applied voltage to the input terminal  
For normal circuit operation of voltage comparator, please input voltage for its  
input terminal within input common mode voltage VDD+0.3[V].  
Then, regardless of power supply voltage,VSS-0.3[V] can be applied to input  
terminals without deterioration or destruction of its characteristics.  
3) Operating power supply (split power supply/single power supply)  
The voltage comparator operates if a given level of voltage is applied between VDD and  
VSS. Therefore, the operational amplifier can be operated under single power supply  
or split power supply.  
4) Power dissipation (Pd)  
If the IC is used under excessive power dissipation. An increase in the chip temperature will cause  
deterioration of the radical characteristics of IC.  
For example, reduction of current capability. Take consideration of the effective power dissipation and  
thermal design with a sufficient margin. Pd is reference to the provided power dissipation curve.  
5) Short circuits between pins and incorrect mounting  
Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board,  
take notice of the direction and positioning of the IC.  
If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between  
output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged.  
6) Using under strong electromagnetic field  
Be careful when using the IC under strong electromagnetic field because it may malfunction.  
7) Usage of IC  
When stress is applied to the IC through warp of the printed circuit board,  
The characteristics may fluctuate due to the piezo effect.  
Be careful of the warp of the printed circuit board.  
8) Testing IC on the set board  
When testing IC on the set board, in cases where the capacitor is connected to the low impedance,  
make sure to discharge per fabrication because there is a possibility that IC may be damaged by stress.  
When removing IC from the set board, it is essential to cut supply voltage.  
As a countermeasure against the static electricity, observe proper grounding during fabrication process  
and take due care when carrying and storage it.  
9) The IC destruction caused by capacitive load  
The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged  
output terminal capacitor. When IC is used as a operational amplifier or as an application circuit,  
where oscillation is not activated by an output capacitor, the output capacitor must be kept below  
0.1[μF] in order to prevent the damage mentioned above.  
10) Decupling capacitor  
Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier.  
11) Latch up  
Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur  
latch up operation. And protect the IC from abnormaly noise.  
15/16  
Dimensions  
SSOP5  
SOP8  
MSOP8  
(Unit:mm)  
Model number construction  
Specify the product by the model  
number when placing an order.  
Make sure of the combinations  
-
B D 7 5 6 2 S F  
E 2  
of items.  
Start with the leftmost space without  
leaving any empty space between  
characters.  
E2 Embossed tape on reel with pin 1 near far when pulled out  
TR Embossed tape on reel with pin 1 near far when pulled out  
Product name  
Package type  
BD7561 BD7561S  
BD7541 BD7541S  
BD7562 BD7562S  
BD7542 BD7542S  
G  
F  
: SSOP5  
: SOP8  
FVM : MSOP8  
Packing specification reference  
Packing  
specification name  
Package  
Quantity  
3000  
Embossed carrier tape  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SSOP5  
TR  
E2  
TR  
1Pin  
Direction of feed  
Reel  
SOP8  
2500  
3000  
Direction of feed  
1Pin  
Reel  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
MSOP8  
Direction of feed  
1Pin  
Reel  
When you order , please order in times the amount of package quantity.  
Catalog No.08T880A '08.12 ROHM ©  
Appendix  
Notes  
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM  
CO.,LTD.  
The content specified herein is subject to change for improvement without notice.  
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you  
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM  
upon request.  
Examples of application circuits, circuit constants and any other information contained herein illustrate the  
standard usage and operations of the Products. The peripheral conditions must be taken into account when  
designing circuits for mass production.  
Great care was taken in ensuring the accuracy of the information specified in this document. However, should  
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no respon-  
sibility for such damage.  
The technical information specified herein is intended only to show the typical functions of and examples of  
application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or  
exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility  
whatsoever for any dispute arising from the use of such technical information.  
The Products specified in this document are intended to be used with general-use electronic equipment or  
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic  
appliances and amusement devices).  
The Products are not designed to be radiation tolerant.  
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or  
malfunction for a variety of reasons.  
Please be sure to implement in your equipment using the Products safety measures to guard against the  
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as  
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your  
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.  
The Products are not designed or manufactured to be used with any equipment, device or system  
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct  
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,  
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no  
responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended  
to be used for any such special purpose, please contact a ROHM sales representative before purchasing.  
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under  
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.  
Thank you for your accessing to ROHM product informations.  
More detail product informations and catalogs are available, please contact your nearest sales office.  
THE AMERICAS / EUROPE / ASIA / JAPAN  
ROHM Customer Support System  
Contact us : webmaster@ rohm.co.jp  
www.rohm.com  
TEL : +81-75-311-2121  
FAX : +81-75-315-0172  
Copyright © 2008 ROHM CO.,LTD.  
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan  
Appendix1-Rev3.0  

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