BD9326EFJ-2E [ROHM]
Simple Step-down Switching Regulators with Built-in Power MOSFET; 简单的降压开关稳压器具有内置功率MOSFET型号: | BD9326EFJ-2E |
厂家: | ROHM |
描述: | Simple Step-down Switching Regulators with Built-in Power MOSFET |
文件: | 总15页 (文件大小:455K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Single-chip Type with Built-in FET Switching Regulators
Simple Step-down
Switching Regulators
with Built-in Power MOSFET
No.10027ECT06
BD9325FJ,BD9326EFJ,BD9327EFJ
●Description
The BD9325FJ, BD9326EFJ and BD9327EFJ are step-down regulators that integrate a low resistance high side N-channel MOSFET.
It achieves 2A / 3A / 4A continuous output current over a wide input supply range.
Current mode operation provides fast transient response and easy phase compensation.
●Features
1) Wide operating INPUT Range 4.75V~18.0V
2) Selectable 2A / 3A / 4A Output Current
3) Selectable 0.16Ω / 0.12Ω / 0.11ΩInternal MOSFET Switch
4) Low ESR Output Ceramic Capacitors are Available
5) Low Stanby Current during Shutdown Mode
6) 380kHz Operating Frequency
7) Feedback voltage 0.9V ±1.5% Accuracy at room temp. (±3.0% for -40℃ to 85℃ temperature range)
8) Protection circuit: UnderVoltage lockout protection circuit
Thermal shutdown circuit
OverCurrent protection circuit
9) SOP-J8 Package for 2A model, HTSOP-J8 Package for 3A, 4A models (with Exposed thermal PAD)
●Applications
Distributed Power System
Pre-Regulator for Linear Regulator
●Line up matrix
LINE-UP
FET ON-RESISTANCE
OUTPUT CURRENT
Package
BD9325FJ
0.16 Ω
BD9326EFJ
0.12 Ω
BD9327EFJ
0.11 Ω
2.0 A
3.0A
4.0 A
SOP-J8
HTSOP-J8
HTSOP-J8
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.08 - Rev.C
1/14
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Absolute maximum ratings (Ta = 25°C)
Parameter
Symbol
VIN
Ratings
20
Unit
V
Supply Voltage
Switch Voltage
VSW
Pd1
20
V
Power Dissipation for HTSOP-J8
Power Dissipation for SOP-J8
Operating Temperature Range
Storage Temperature Range
Junction Temperature
BST Voltage
3760 *1
675 *2
-40~+85
-55~+150
150
mW
mW
℃
℃
℃
V
Pd2
Topr
Tstg
Tjmax
VBST
VEN
VSW+7
20
EN Voltage
V
All other pins
VOTH
7
V
*1 Derating in done 30.08 mW/℃ for operating above Ta≧25℃(Mount on 4-layer 70.0mm×70.0mm×1.6mm board)
*2 Derating in done 5.4 mW/℃ for operating above Ta≧25℃(Mount on 1-layer 70.0mm×70.0mm×1.6mm board)
●Operation Range (Ta= -40~85℃)
Ratings
Parameter
Symbol
Unit
Min
Typ
Max
18
Supply Voltage
SW Voltage
VIN
4.75
12
-
V
V
A
A
A
VSW
ISW2
ISW3
ISW4
-0.5
18
Output current for BD9325FJ
Output current for BD9326EFJ
-
-
-
-
2**
3**
4**
-
Output current for BD9327EFJ
-
** Pd, ASO should not be exceeded
●Electrical characteristics (Unless otherwise specified VIN=12V Ta=25℃)
Limits
Typ
Parameter
Symbol
Unit
Conditions
Min
Max
Error amplifier block
FB input bias current
IFB
-
0.1
2
µA
V
Feedback voltage1
VFB1
VFB2
0.886
0.873
0.900
0.900
0.914
0.927
Voltage follower
Feedback voltage2
V
Ta=-40℃~85℃
SW block – SW
Hi-side FET On-resistance for BD9325FJ
Hi-side FET On-resistance for BD9326EFJ
Hi-side FET On-resistance for BD9327EFJ
Lo-side FET On-resistance
Leak current N-channel
Switch Current Limit for BD9325FJ
Switch Current Limit for BD9326EFJ
Switch Current Limit for BD9327EFJ
Maximum duty cycle
RON2
RON3
-
0.16
0.12
0.11
10
0
-
-
Ω
Ω
Ω
Ω
µA
A
ISW= -0.8A ***
ISW= -0.8A ***
ISW= -0.8A ***
ISW= 0.1A
VIN= 18V, VSW = 0V
***
-
-
RON4
-
RONL
-
-
ILEAKN
ILIMIT2
ILIMIT3
ILIMIT4
MDUTY
-
10
-
2.5
3.5
4.5
-
-
-
-
A
***
-
-
A
***
90
-
%
VFB= 0V
General
Enable Sink current
IEN
VEN
VUVLO
VHYS
ISS
86
1.1
4.05
-
181
1.18
4.40
0.1
41
275
1.4
4.75
-
µA
V
VEN= 12V
VIN rising
Enable Threshold voltage
Under Voltage Lockout threshold
Under Voltage Lockout Hysteresis
Soft Start Current
V
V
23
-
62
uA
ms
kHz
mA
µA
VSS= 0 V
Soft Start Time
TSS
1.6
380
2.1
80
-
CSS= 0.1 µF
Operating Frequency
FOSC
ICC
300
-
460
4.3
170
Circuit Current
VFB= 1.5V, VEN= 12V
VEN= 0V
Quiescent Current
IQUI
-
*** See the series line-up table below.
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.08 - Rev.C
2/14
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Block diagram
VIN
5V
EN
OSC
VREF
VREG
BST
EN;PULL UP to VIN
OCP
12V
VIN
UVLO
TSD
IBIAS
LVS
LVS
S
DRV
+
FB
ERR
-
OUTPUT
SW
LOGIC
R
+
SLOPE
COMP
SS
PWM
-
Soft Start
GND
Fig.1 Block Diagram
●Typical application circuit
C_PC1
3300pF
R_DW
10k
R_PC
15k
C_SS
0.1μF
R_UP
27k
Thermal Pad
(For BD9326EFJ, BD9327EFJ)
L
VIN 12V
VOUT 3.3V
10μH
C_VC1
10μF
C_CO1
20μF
D
Fig.2 Application Circuit
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2010.08 - Rev.C
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© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Block operation
・VREG
A block to generate constant-voltage for DC/DC boosting.
・VREF
A block that generates internal reference voltage of 2.9 V (Typ.).
・TSD/UVLO
TSD (Thermal shutdown)/UVLO (Under Voltage Lockout) protection block. The TSD circuit shuts down IC at 175℃ (Typ.)
The UVLO circuit shuts down the IC when the VCC is Low Voltage.
・Error amp block (ERR)
This is the circuit to compare the reference voltage and the feedback voltage of output voltage. The COMP pin voltage
resulting from this comparison determines the switching duty. At the time of startup, since the soft start is operated by the
SS pin voltage, the COMP pin voltage is limited to the SS pin voltage.
・Oscillator block (OSC)
This block generates the oscillating frequency.
・SLOPE block
This block generates the triangular waveform from the clock created by OSC. Generated triangular waveform is sent to the
PWM comparator.
・PWM block
The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the
switching duty. Since the switching duty is limited by the maximum duty ratio which is determined internally, it does not
become 100%.
・DRV block
A DC/DC driver block. A signal from the PWM is input to drive the power FETs.
・Soft start circuit
Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the
output voltage overshoot or the rush current.
●Pin assignment and pin function
Pin No.
Pin name
BST
VIN
Function
High-Side Gate Drive Boost Input
Power Input
1
2
3
4
5
6
7
8
SW
Power Switching Output
Ground
GND
FB
Feed Back Input
COMP
EN
Compensation Node
Enable Input
SS
Soft Start Control Input
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.08 - Rev.C
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Typical performance characteristics (Unless otherwise specified, VIN= 12V Ta = 25℃)
0.1
0.08
0.06
0.04
0.02
0
2.5
2.4
2.3
2.2
2.1
2
160
140
120
100
80
1.9
1.8
1.7
1.6
1.5
-0.02
-0.04
-0.06
-0.08
-0.1
60
40
20
0
4
6
8
10
12
14
16
18
4
6
8
10
12
14
16
18
0
0.5
1
1.5
2
VFB [V]
VIN : [V]
VIN : [V]
Fig.3 Circuit Current
(No switching)
Fig.4 Quiescent Current
(IC not active)
Fig.5 Input Bias Current
0.25
0.2
370
360
350
340
330
320
310
300
0.923
0.913
0.903
0.893
0.883
0.873
BD9325FJ
0.15
0.1
BD9326EFJ
0.05
0
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
℃
Ta [
]
TEMPERATURE : [C]
TEMPERATURE : [C]
Fig.6 Feedback voltage
Fig.7 Hi-Side On-resistance
Fig.8 Operating Frequency
100
10
95
90
85
80
75
70
65
60
55
BD9326EFJ
VOUT
BD9325FJ
VSS
1
VSW
IOUT
0.1
50
0
0.01
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
0.001
0.01
0.1
1
CSS [uF]
Iout [A]
Fig.9 STEP Down Efficiency
(VIN= 12V VOUT= 3.3V L=10µH)
Fig.10 OverCurrent Protection
Fig.11 Soft Start Time
(VOUT is shorted to GND)
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2010.08 - Rev.C
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
VOUT: 100 mV / D
VOUT: 10.0 mV / Div
VOUT-MAX: +100mV
Δ: 10.4 mV
VOUT
VOUT
VOUT-MIN: -100m V
IOUT: 1.0 A / Div
IOUT: 1.0 A / Div
IOUT
IOUT
Fig.12 Transient Response
(VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF Iout= 0.2-1.0A )
Fig.13 Output Ripple Voltage
(VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF I out= 1.0A )
VOUT: 10.0 mV / Div
VOUT-MAX: +460mV
VOUT
VOUT
Δ:11.8 mV
VOUT-MIN: -240mV
IOUT: 1.0 A / Div
IOUT: 1.0 A / Div
IOUT
IOUT
Fig.15 Output Ripple Voltage
(VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF Iout= 3.0A)
Fig.14 Transient Response
(VIN= 12V VOUT= 3.3V L= 10µH Cout =22µF Iout= 0.2-3.0A)
EN
VOUT
IOUT
EN: 10V / Div
VOUT: 1.0V / Div
IOUT: 1.0 A / Div
Fig.16 Start Up waveform
(VIN= 12V VOUT= 3.3V L= 22µH CSS= 0.1µF Iout= 0A)
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© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Selecting application components
(1) Output LC constant (Buck Converter)
The inductance L to use for output is decided by the rated current ILR and input current maximum value IOMAX of the
inductance.
VCC
IOMAX + IL
should not reach
IL
the rated value level
IL
Vo
ILR
L
Co
IOMAX mean current
t
Fig.17
Fig.18
Adjust so that IOMAX + ∆IL does not reach the rated current value ILR. At this time, ∆IL can be obtained by the following
equation.
1
L
Vo
VCC
1
f
∆IL =
[A]
(VCC - Vo)
Set with sufficient margin because the inductance L value may have the dispersion of ± 30%.
For the capacitor C to use for the output, select the capacitor which has the larger value in the ripple voltage VPP
permissible value and the drop voltage permissible value at the time of sudden load change.
Output ripple voltage is decided by the following equation.
∆IL
2Co
Vo
VCC
1
f
∆VPP
=
[V]
∆IL RESR +
Perform setting so that the voltage is within the permissible ripple voltage range.
For the drop voltage VDR during sudden load change, please perform the rough calculation by the following equation.
∆IL
Co
VDR =
[V]
10 µs
However, 10μs is the rough calculation value of the DC/DC response speed.
Make Co settings so that these two values will be within the limit values.
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© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
(2) Loop Compensation
Choosing compensation capacitor C1 and resistor R3
The example of DC/DC converter application bode plot is shown below. The compensation resistor R3 will set the cross
over frequency FC that decides the stability and response speed of DC/DC converter. So compensation resistor R3 has to
be adjusted to adequate value for good stability and response speed.
The cross over frequency FC can be adjusted by changing the compensation resistor R3 connected to COMP terminal.
The higher cross over frequency achieves good response speed, but less stability. And the lower cross over frequency
shows good stability, but worse response speed.
Usually, the 1/10 of DC/DC converter operating frequency is used for cross over frequency FC. So please decide the
compensation resistor and capacitor using the following formula on setting FC to 1/10 of operating frequency at first.
After that, please measure and adjust the cross over frequency on your set (on the actual application) to meet the enough
response speed and phase-margin.
( i ) Choosing phase compensation resistor R3
Please decide the compensation resistor R3 on following formula.
Compensation Resistor
R3= 5800×COUT×FC×VOUT
[Ω]
Where
COUT : Output capacitor connected to DC/DC output
VOUT : Output voltage
FC
: Desired cross over frequency (38kHz)
( ii ) Choosing phase compensation capacitor C1
The stability of DC/DC converter needs to cancel the phase delay that is from output LC filter by inserting the phase
advance.
The phase advance can be added by the zero on compensation resistor and capacitor.
The LC resonant frequency FLC and the zero on compensation resistor and capacitor are expressed below.
1
LC resonant frequency
Zero by C1 and R3
FLC=
FZ=
[Hz]
[Hz]
2π√LCOUT
1
2πC1R3
Please choose C1 to make FZ to 1 / 3 of FLC .
3
Compensation Capacitor C1=
2πFLCR3
[F]
( iii )The condition of the loop compensation stability
The stability of DC/DC converter is important. To secure the operating stability, please check the loop compensation
has the enough phase-margin. For the condition of loop compensation stability, the phase-delay must be less than
150 degree where Gain is 0 dB. Namely over 30 degree phase-margin is needed.
Lastly after the calculation above, please measure and adjust the phase-margin to secure over 30 degree.
(a)
OUT
V
A
Gain [dB]
R1
GBW(b)
FB
COMP
0
-
+
F
F
FC
R2
PHASE
0
R3
C1
90°
-
90
-
PHASE MARGIN
180°
-
180
-
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
(3) Design of Feedback Resistance constant
Set the feedback resistance as shown below.
Reference voltage
R1 + R2
R2
VOUT =
[V]
Reference Voltage
VOUT
+
R1
ERR
-
FB
R2
●Soft Start Function
The buck converter has an adjustable Soft Start function to
prevent high inrush current during start up.
The soft-start time is set by the external capacitor connected to
SS pin.
COMP
2.9V(typ)
ERRAMP
+
-
The soft start time is given by;
70k(typ)
SS
Tss [ms] = 16.2・C [µF]
Css
Please confirm the overshoot of the output voltage and inrush
current when deciding the SS capacitor value.
●EN Function
The EN terminal controls IC’s shut down.
Leaving EN terminal open makes IC shutdown.
To start the IC, EN terminal should be connected to VIN or the
other power source output.
VIN
When the EN voltage exceed 1.2V (typ.), the IC start
operating.
EN
66kΩ(typ.)
60kΩ(typ.)
Fig.19 The equivalent internal circuit.
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© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Layout Pattern Consideration
Two high pulsing current flowing loops exist in the buck regulator system.
The first loop, when FET is ON, starts from the input capacitors, to the VIN terminal, to the SW terminal, to the inductor, to the
output capacitors, and then returns to the input capacitor through GND.
The second loop, when FET is OFF, starts from the shotkey diode, to the inductor, to the output capacitor, and then returns to
the shotkey diode through GND.
To reduce the noise and improve the efficiency, please minimize these two loop area.
Especially input capacitor, output capacitor and shotkey diode should be connected to GND plain.
PCB Layout may affect the thermal performance, noise and efficiency greatly. So please take extra care when designing
PCB Layout patterns.
L
VIN
VOUT
COUT
CIN
FET
Di
Fig.20 Current loop in Buck regulator system
・The thermal Pad on the back side of IC has the great thermal conduction to the chip. So using the GND plain as broad and
wide as possible can help thermal dissipation. And a lot of thermal via for helping the spread of heat to the different layer is
also effective.
・The input capacitors should be connected as close as possible to the VIN terminal.
・Keep sensitive signal traces such as trace connected FB and COMP away from SW pin.
・The inductor, the shot key diode and the output capacitors should be placed close to SW pin as much as possible.
SS
EN
BST
VIN
CIN
VIN
SW
COMP
FB
FET
SW
Di
GND
COUT
L
VOUT
Fig.21 The example of PCB layout pattern
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Operation Notes
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special
mode where the absolute maximum ratings may be exceeded is anticipated.
2) GND potential
Ensure a minimum GND pin potential in all operating conditions.
3) Setting of heat
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Pin short and mistake fitting
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the
presence of a foreign object may result in damage to the IC.
5) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure,
and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process.
7) Ground wiring patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring patterns of any external components.
8) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of
parasitic elements.
For example, when the resistors and transistors are connected to the pins as shown in Fig.22 , a parasitic diode or a
transistor operates by inverting the pin voltage and GND voltage.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result
of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC
malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will
trigger the operation of parasitic elements such as by the application of voltages lower than the GND (P substrate) voltage
to input and output pins.
Resistor
Transistor (NPN)
(Pin B)
B
E
(Pin A)
C
E
C
(Pin B)
B
GND
GND
N
P
P
P+
P+
P+
Parasitic
elements
P+
N
N
N
P
N
N
N
(Pin A)
P substrate
GND
Parasitic elements
GND
Parasitic
elements
Parasitic elements
GND
Fig.22 Example of a Simple Monolithic IC Architecture
9) Overcurrent protection circuits
An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC damage
that may result in the event of load shorting. This protection circuit is effective in preventing damage due to sudden and
unexpected accidents. However, the IC should not be used in applications characterized by the continuous operation or
transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capacity has negative
characteristics to temperatures.
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
10) Thermal shutdown circuit (TSD)
This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the
specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the attendant rise in the chip's junction temperature Tj will trigger the TSD circuit to turn off all output
power elements. Operation of the TSD circuit presumes that the
IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit.
11) Testing on application boards
At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure
to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before
connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as
an antistatic measure, and use similar caution when transporting or storing the IC.
●I/O Equivalent Circuit Diagram
1.BST
3.SW
5.FB
VIN
VIN
VIN
REG
SW
6.COMP
7.EN
8.SS
VIN
VIN
VIN
EF
VIN
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Power Dissipation
HTSOP-J8 Package
On 70 70 1.6 mm glass epoxy PCB
(1) 1-layer board (Backside copper foil area 0 mm 0 mm)
(2) 2-layer board (Backside copper foil area 15 mm 15 mm)
(3) 2-layer board (Backside copper foil area 70 mm 70 mm)
(4) 4-layer board (Backside copper foil area 70 mm 70 mm)
4000
3000
(4)3760mW
(3)2110mW
(2)1100mW
2000
1000
(1)820mW
25
0
0
50
75
100
125 150
AMBIENT TEMPERATURE: Ta [°C]
SOP-J8 Package
4000
On 70 70 1.6 mm glass epoxy PCB
(1) 1-layer board (Backside copper foil area 0 mm 0 mm)
3000
2000
1000
(1)675mW
0
0
25
50
75
100
125 150
AMBIENT TEMPERATURE: Ta [°C]
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Technical Note
BD9325FJ, BD9326EFJ, BD9327EFJ
●Ordering part number
B
D
9
3
2
5
F
J
-
E
2
Part No.
Part No.
9325
Package
FJ : SOP-J8
Packaging and forming specification
E2: Embossed tape and reel
9326
EFJ : HTSOP-J8
9327
SOP-J8
<Tape and Reel information>
4.9 0.2
(MAX 5.25 include BURR)
Tape
Embossed carrier tape
2500pcs
+
6°
4°
−4°
Quantity
8
7
6
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
2
3
4
0.545
0.2 0.1
S
1.27
0.42 0.1
Direction of feed
1pin
0.1
S
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
HTSOP-J8
<Tape and Reel information>
4.9 0.1
(MAX 5.25 include BURR)
Tape
Embossed carrier tape
(3.2)
+
Quantity
2500pcs
6
°
°
4°
−4
8
7
2
6
3
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
4
1PIN MARK
+0.05
-0.03
0.545
0.17
S
1.27
+0.05
0.42
0.08
-
0.04
M
0.08
S
Direction of feed
1pin
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
2010.08 - Rev.C
14/14
Notice
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The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
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implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
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use of such technical information.
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© 2010 ROHM Co., Ltd. All rights reserved.
R1010
A
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