BD9416FS_技术文档

LED Drivers for LCD Backlights

2ch Boost up type

White LED Driver for large LCD

BD9416xx Series

1.1 General Description

Key Specifications

BD9416xx Series is a high efficiency driver for white

LEDs and is designed for large LCDs. BD9416xx Series

has a boost DCDC converter that employs an array of

LEDs as the light source.

BD9416xx Series has some protection functions against

fault conditions, such as over-voltage protection (OVP),

over current limit protection of DCDC (OCP), LED OCP

protection, and Over boost protection (FBMAX).

Therefore it is available for the fail-safe design over a

wide range output voltage.

 Operating Power Supply Voltage Range:

9.0V to 35.0V

 Oscillator Frequency of DCDC:

150kHz (V_RT=100kΩ)

5.1mA(Typ)

 Operating Current:

 Operating Temperature Range:

-40°C to +105°C

1.2 Packages

SOP24 (BD9416F)

W(Typ) x D(Typ) x H(Max)

15.00mm x 7.80mm x 2.01mm

Pin pitch 1.27mm

Features

 DCDC Converter with Current Mode

 LED Protection Circuit (Over Boost Protection, LED

OCP Protection)

 Over Voltage Protection (OVP) for the Output Voltage

VOUT

 Adjustable Soft Start

 Adjustable Oscillation Frequency of DCDC

 Analog Dimming from 0.2V to 3.0V

 LED Dimming PWM Over Duty Protection(ODP)

Applications

 TV, Computer Display, LCD Backlighting

Figure 1-1. SOP24

10.00mm x 7.80mm x 2.10mm

SSOP-A24 (BD9416FS)

Pin pitch

0.8mm

1.3 Typical Application Circuit

V

OUT2

VOUT1

VCC

V

IN

VCC

Figure 1-2. SSOP-A24

OVP

GATE1

CS1

REG90

STB

RT

GND1

DIMOUT1

ISENSE1

FB1

SS

FAILB

PWM1

PWM2

GATE2

CS2

DUTYP

GND2

DUTYON

DIMOUT2

ISENSE2

FB2

ADIM

Figure 2. Typical Application Circuit

○Product structure：Silicon monolithic integrated circuit ○This product has not designed protection against radioactive rays

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Contents

1.1 General Description..................................................................................................................................................................1

Features ................................................................................................................................................................................1

Applications ................................................................................................................................................................................1

Key Specifications...........................................................................................................................................................................1

1.2 Packages..................................................................................................................................................................................1

1.3 Typical Application Circuit .........................................................................................................................................................1

1.4 Pin Configuration ......................................................................................................................................................................3

1.5 Pin Descriptions........................................................................................................................................................................3

1.6 Block Diagram ..........................................................................................................................................................................4

1.7 Absolute Maximum Ratings ......................................................................................................................................................5

1.8 Thermal Resistance..................................................................................................................................................................5

1.9 Recommended Operating Ranges ...........................................................................................................................................5

2.0 Electrical Characteristics...........................................................................................................................................................6

2.1 Typical Performance Curves (Reference data).........................................................................................................................8

2.2 Pin Descriptions........................................................................................................................................................................9

2.3 List of The Protection Function Detection Condition (Typ Condition)......................................................................................12

2.4 List of The Protection Function Operation...............................................................................................................................12

3.1 Application Circuit Example ....................................................................................................................................................13

3.2 External Components Selection..............................................................................................................................................14

3.3 DCDC Parts Selection ............................................................................................................................................................18

3.4 Loop Compensation................................................................................................................................................................21

3.5 Timing Chart ...........................................................................................................................................................................22

3.6 I/O Equivalent Circuits ............................................................................................................................................................30

Operational Notes.........................................................................................................................................................................31

Ordering Information.....................................................................................................................................................................33

Marking Diagrams.........................................................................................................................................................................33

Physical Dimension, Tape and Reel Information...........................................................................................................................34

Revision History............................................................................................................................................................................36

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1.4 Pin Configuration

REG90

OVP

VCC

STB

1

2

3

24

23

CS1

GATE1

GND1

CS2

22

21

20

GATE2

GND2

DIMOUT2

ISENSE2

FB2

4

5

6

DIMOUT1

ISENSE1

FB1

19

18

17

16

7

8

SS

ADIM

9

PWM1

RT

15

14

13

10

11

12

DUTYP

DUTYON

PWM2

FAILB

Figure 3. Pin Configuration

1.5 Pin Descriptions

No.

Pin Name

IN/OUT

Function

1

VCC

IN

Power supply pin

IC ON/OFF pin

2

STB

3

CS1

IN

DC/DC output current detect pin, OCP input pin ch1

DC/DC switching output pin ch1

GND ch1

4

GATE1

GND1

DIMOUT1

ISENSE1

FB1

OUT

-

5

6

OUT

IN

Dimming signal output for NMOS ch1

7

LED current detection input pin

Error amplifier output pin ch1

ADIM signal input pin

ch1

8

OUT

IN

9

ADIM

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

PWM1

PWM2

FAILB

DUTYON

DUTYP

RT

IN

External PWM dimming signal input pin ch1

External PWM dimming signal input pin ch2

Error detection output pin

IN

OUT

IN

Over Duty Protection ON/OFF pin

OUT

IN

Over Duty Protection reference frequency setting pin

DC/DC switching frequency setting pin

Soft start setting pin

SS

FB2

Error amplifier output pin ch2

ISENSE2

DIMOUT2

GND2

GATE2

CS2

LED current detection input pin

ch2

OUT

-

Dimming signal output for NMOS ch2

GND ch2

OUT

IN

DC/DC switching output pin ch2

DC/DC output current detect pin, OCP input pin ch2

Over voltage protection detection pin

9.0V output voltage pin

OVP

IN

REG90

OUT

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1.6 Block Diagram

VOUT2

VOUT1

VCC

VIN

VCC

OVP

REG90

STB

VCC

UVLO

VREG

TSD

OVP

REG90

UVLO

1MΩ

PWM

COMP

GATE1

CS1

+

-

RT

OSC

CONTROL

LOGIC

LEB

Current

compensation

GND1

Css

SS

REG90

DIMOUT1

SS-FB

clamper

Auto-Restart

Control

LEDOCP

ISENSE1

FB1

-

+

1.015V

Fail

detect

ERROR

amp

FAILB

MAXFB

PWM1

PWM2

1MΩ

GATE2

CS2

DUTYP

DUTYON

ADIM

Over Duty

Protection

OSC

Each channel

GND2

1MΩ

DIMOUT2

1/3

ISENSE2

FB2

Figure 4. Block Diagram

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1.7 Absolute Maximum Ratings (Ta=25°C)

Rating

Unit

V

Parameter

Power Supply Voltage

SS, RT, ISENSE1, ISENSE2, FB1,

FB2, CS1, CS2, DUTYP

Pin Voltage

Symbol

V_CC

-0.3 to +36

V_SS,V_RT,V_ISENSE1

V_ISENSE2, V_FB1,V_FB2

V_CS1,V_CS2,V_DUTYP

V_REG90,V_DIMOUT1

V_DIMOUT2,V_GATE1

V_GATE2

,

-0.3 to +7

-0.3 to +13

-0.3 to +20

V

,

REG90, DIMOUT1, DIMOUT2,

GATE1, GATE2 Pin Voltage

OVP, PWM1, PWM2, ADIM, STB,

FAILB, DUTYON

Pin Voltage

V_OVP,V_PWM1,V_PWM2

_ADIM,V_STB,V_FAILB, V_DUTYON

V

Junction Temperature

Tjmax

Tstg

150

°C

Storage Temperature Range

-55 to +150

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the

maximum junction temperature rating.

1.8 Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

SOP24

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

158.3

35

106.4

19

°C/W

Ψ_JT

SSOP-A24

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

104.4

7

54.1

6

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A(Still-Air).

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70μm

(Note 4) Using a PCB board based on JESD51-7.

Layer Number of

Material

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Measurement Board

4 Layers

FR-4

Top

Bottom

Copper Pattern

Thickness

Copper Pattern

Thickness

Footprints and Traces

70μm

74.2mm x 74.2mm

35μm

74.2mm x 74.2mm

70μm

1.9 Recommended Operating Ranges

Parameter

Symbol

Range

Unit

Operating Temperature Range

Topr

V_CC

-40 to +105

°C

V

Power Supply Voltage

9.0 to 35.0

50 to 1000

0.2 to 3.0

90 to 2000

DC/DC Oscillation Frequency

Effective Range of ADIM Signal

PWM Input Frequency

f_SW

kHz

V

V_ADIM

f_PWM

Hz

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2.0 Electrical Characteristics (Unless otherwise specified VCC=24V Ta=25°C)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

【Total Current Consumption】

Circuit Current

I_CC

I_ST

－

5.1

55

10.2

110

mA V_STB=3.0V, V_PWM=3.0V

Circuit Current (standby)

【UVLO Block】

μA

V_STB=0V

Operation Voltage（VCC）

Hysteresis Voltage（VCC）

【DC/DC Block】

V_{UVLO_VCC}

V_{UHYS_VCC}

6.5

7.5

8.5

V

V_CC=SWEEP UP

－

300

600

mV V_CC=SWEEP DOWN

ISENSE Threshold Voltage 1

ISENSE Threshold Voltage 2

ISENSE Threshold Voltage 3

V_LED1

V_LED2

V_LED3

0.225

0.656

0.988

0.233

0.667

1.000

0.242

0.677

1.012

V

V_ADIM=0.7V

V_ADIM=2.0V

V_ADIM=3.0V

V_ADIM=3.3V

(as masking analog dimming)

ISENSE Clamp Voltage

Oscillation Frequency

V_LED4

f_CT

0.989

142.5

1.015

150.0

1.040

V

157.5

+V_RTN

KHz R_RT=100kΩ

×90%

RT Short Protection Range

V_{RT_DET}

-0.3

-

V

V_RT=SWEEP DOWN

(Note 5)

RT Terminal Voltage

V_RT

1.6

90

2.0

95

2.4

99

V

R_RT=100kΩ

GATE Pin MAX DUTY Output

MAX_DUTY

%

GATE Pin ON Resistance

(as source)

GATE Pin ON Resistance

(as sink)

R_ONSOG

R_ONSIG

2.5

2.0

5.0

4.0

10.0

8.0

Ω

SS Pin Source Current

SS Pin ON Resistance at OFF

【DC/DC Block】

I_SSSO

-3.75

-

-3.00

3.0

-2.25

5.0

μA

kΩ

V_SS=2.0V

R_{SS_L}

Soft Start Ended Voltage

FB Source Current

V_{SS_END}

I_FBSO

3.52

-115

85

3.70

-100

100

3.88

-85

V

V_SS=SWEEP UP

μA

V_ISENSE=0.2V, V_ADIM=3.0V, V_FB=1.0V

V_ISENSE=2.0V, V_ADIM=3.0V, V_FB=1.0V

FB Sink Current

I_FBSI

115

【DC/DC Protection Block】

OCP Detect Voltage

V_OCP

V_OCPLT

V_OVP

360

0.85

2.88

150

-2

400

1.00

3.00

200

0

440

1.15

3.12

250

+2

mV V_CS=SWEEP UP

OCP Latch Off Detect Voltage

OVP Detect Voltage

V

V_CS=SWEEP UP

V_OVP=SWEEP UP

OVP Detect Hysteresis

OVP Pin Leak Current

V_{OVP_HYS}

I_{OVP_LK}

mV V_OVP=SWEEP DOWN

μA

V_OVP=4.0V, V_STB=3.0V

【LED Protection Block】

LED OCP Detect Voltage

Over Boost Detection Voltage

【Dimming Block】

V_LEDOCP

V_FBH

2.88

3.84

3.00

4.00

3.12

4.16

V

V_ISENSE=SWEEP UP

V_FB=SWEEP UP

ADIM Pin Leak Current

ISENSE Pin Leak Current

I_LADIM

-2

0

+2

μA

V_ADIM=2.0V

I_{L_ISENSE}

V_ISENSE=4.0V

DIMOUT Source ON

Resistance

DIMOUT Sink ON Resistance

【REG90 Block】

R_ONSOD

R_ONSID

4.0

3.0

8.0

6.5

16.0

13.0

Ω

REG90 Output Voltage 1

REG90 Output Voltage 2

REG90 Available Current

REG90_UVLO Detect Voltage

V_{REG90_1}

V_{REG90_2}

| I_REG90

V_{REG90_TH}

8.910

8.865

15

9.000

-

9.090

9.135

-

V

I_O=0mA

I_O=-15mA

|

mA

V

5.22

6.00

6.78

V_REG90=SWEEP DOWN, V_STB=0V

(Note 5) V_RTNis the RT terminal voltage at normal operation.

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2.0 Electrical Characteristics (Unless otherwise specified VCC=24V Ta=25°C)

- continued

Conditions

Parameter

【STB Block】

Symbol

Min

Typ

Max

Unit

STB Pin HIGH Voltage

STB Pin LOW Voltage

STB Pull Down Resistance

【PWM Block】

V_{STB_H}

V_{STB_L}

R_STB

2.0

-0.3

600

-

18

V

+0.8

1400

1000

kΩ

V_STB=3.0V

PWM Pin HIGH Voltage

PWM Pin LOW Voltage

PWM Pin Pull Down Resistance

【DUTYON Block】

V_{PWM_H}

V_{PWM_L}

R_PWM

1.5

-0.3

600

-

18

V

+0.8

1400

1000

kΩ

V_PWM=3.0V

DUTYON Pin HIGH Voltage

DUTYON Pin LOW Voltage

DUTYON Pin Pull Down

Resistance

V_{DTYON_H}

V_{DTYON_L}

R_DTYON

1.5

-

18

V

-0.3

+0.8

600

-

1000

1400

kΩ

V_DUTYON=3.0V

【Over Duty Protection Block】

PWM ODP Protection Detect

Duty

D_ODP

V_{DTYP_DET}

V_DTYP

35

-

%

f_PWM=120Hz, R_DUTYP=341kΩ

+V_DUTYPN

×90%

DUTYP Short Protection Range

-0.3

1.6

-

V

V_DUTYP=SWEEP DOWN

(Note 6)

DUTYP Terminal Voltage

【Filter Block】

2.0

2.4

R_DUTYP=100kΩ

Abnormal Detection Timer

AUTO Timer

t_CP

-

20

-

ms

f_CT=800kHz

t_AUTO

163

【FAILB Block 】

FAILB Pin LOW Voltage

V_FAILBL

0.25

0.5

1.0

V

I_FAILB=1mA

(Note 6) V_DUTUPNis the DUTYP terminal voltage at normal operation.

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2.1 Typical Performance Curves (Reference data)

8

180

170

160

150

140

130

120

7

6

5

4

3

2

Ta=25°C

V_STB=3.0V

V_PWM=3.0V

1

0

V_CC=24V

R_RT=100kΩ

8

12

16

20

24

28

32

36

-40

-20

0

20

40

60

80

100 120

Supply Voltage : Vcc[V]

Temperature : Temp[°C]

Figure 6. Oscillation Frequency vs Temperature

Figure 5. Operating Circuit Current vs Input Voltage

1.2

1.0

0.8

0.6

0.4

0.2

0.0

10000

1000

100

Ta=25°C

V_CC=24V

Ta=25°C

V_CC=24V

10

0

0.5

1

1.5

2

2.5

3

3.5

10

100

RT Resistance : R_RT[Ω]

1000

ADIM Voltage : V_ADIM[V]

Figure 8. ISENSE Feedback Voltage vs ADIM Voltage

0

Figure 7. Oscillation Frequency vs RT Resistance

160

140

120

100

80

Ta=25°C

V_CC=24V

Ta=25°C

V_CC=24V

-20

-40

-60

-80

-100

60

-120

-140

-160

40

20

0

0.5

1

1.5

2

2.5

3

3.5

0.5

1

1.5

2

2.5

3

3.5

FB Voltage : V_FB[V]

Figure 10. FB Source Current vs FB Voltage

Figure 9. FB Sink Current vs FB Voltage

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2.2 Pin Descriptions

Pin 1: VCC

This is the power supply pin of the IC. Input range is from 9.0V to 35.0V.

The operation starts when the supply is greater than 7.5V(Typ) and shuts down when the supply is less than 7.2V(Typ).

Pin 2: STB

This is the ON/OFF setting terminal of the IC. This pin is available for reset at shut down. Input reset-signal to this

terminal to reset IC from latch-off. At startup, internal bias starts at high level, and then DCDC boost starts after PWM

rising edge is detected.

Note: IC status (IC ON/OFF) changes depending on the voltage applied to STB terminal. Avoid the use of intermediate

level (from 0.8V to 2.0V).

Pin 3: CS1 , Pin 22: CS2

The CS pins have two functions.

VIN

1. DC / DC current mode Feedback terminal

The inductor current is converted to the CS pin voltage by the sense resistor R_CS.

This voltage compared to the voltage set by error amplifier controls the output

pulse.

BD9416

2. Inductor current limit (OCP) terminal

GATEx

CSx

Id

The CS terminal also has an over current protection (OCP). If the voltage is more

than 0.4V(Typ), the switching operation will be immediately stopped. And the next

boost pulse will be restarted to normal frequency.

In addition, when the CS voltage is more than 1.0V(Typ) during four GATE clocks,

IC will be latched off. Above OCP operation, if the current continues to flow even

when GATE=L because of the destruction of the boost MOS, IC will stop operation

completely.

Cs

Rcs

GNDx

Figure 11. CS terminal circuit example

Both of the above functions are enabled after 300ns(Typ) when GATE pin

asserts high, because the Leading Edge Blanking function (LEB) is included into this IC to prevent the effect of noise.

Please refer to section “3.3.1 Calculation Method for the Current Rating of DCDC Parts”, for detailed explanation.

If the capacitance Cs on the figure to the right is increased to a value in the micro order, please be careful that the limited

value of NMOS drain current Id is more than the simple calculation. Because the current Id flows not only through Rcs but

also through Cs, the CS pin voltage moves according to Id.

Pin 4: GATE1 , Pin 21: GATE2

These are the output terminals for driving the gate of the boost MOSFET. The high level is REG90. Frequency can be set

by the resistor connected to RT. Refer to <RT> pin description for the frequency setting.

The phase lag of GATE1 and GATE2 is shown in Figure below. This Figure illustrates the waveform as both GATE pin

output the maximum duty. The inrush current of the VIN terminal can be suppressed because each channel turns on

alternately.

GATE1

0.95T

T

GATE2

T

T/2

CS1

CS2

Figure 12. GATE timing chart

Pin 5: GND1 , Pin 20: GND2

These are the GND pins of the IC.

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Pin 6: DIMOUT1 , Pin 19: DIMOUT2

VOUTx

These are the output pins for external dimming NMOS. The table below shows the rough

output logic of each operation state, and the output H level is REG90. Please refer to “3.5

Timing Chart” for detailed explanations, because DIMOUT logic has an exceptional behavior.

Please insert the resistor R_DIMbetween the dimming MOS gate to improve the over shoot of

LED current, as PWM turns from low to high.

REG90

DIMOUTx

R

DIM

Status

Normal

DIMOUT output

Same logic to PWM

GND Level

ISENSEx

Abnormal

BD9416

Figure 13. DIMOUT terminal circuit

example

Pin 7: ISENSE1 , Pin 18: ISENSE2

These are the input pins for the current detection. The error amplifier

compares with the lower voltage between 1/3 of the analog modulated light

pin ADIM and 1.015V(Typ). It also detects abnormal LED over current

ISENSE=3.0V(Typ). If GATE pin continues during four CLKs (equivalent to

40μs at fosc = 100kHz), the latch turns off. (Please refer to section “3.5.7

Timing Chart”.)

VOUTx

BD9416

DIMOUTx

Error AMP

ISENSEx

ADIM

1.015V

1.0V

-

+

1.015V

Gain=1/3

1/3

Rs

67mV

FBx

3.0

0

0.2

ADIM[V]

Figure 14. Relationship of the feedback voltage and ADIM

Figure 15. ISENSE terminal circuit example

Pin 8: FB1 , Pin 17: FB2

These are the output pins of error amplifier.

FB pin rises with the same slope as the SS pin during the soft-start period.

After soft -start completion (V_SS>3.7V(Typ)), it operates as follows.

When PWM=H, it detects ISENSE terminal voltage and outputs error signal compared to analog dimming signal (ADIM).

When PWM=L, IC holds the voltage at the edge of PWM=H to L, and operates to hold the adjacent voltage.

It detects over boost (FBMAX) over VFB=4.0V(Typ). After the SS completion, if VFB>4.0V and PWM=H continues after

4clk GATE, the CP counter starts. After that, only the VFB>4.0V is monitored. When CP counter reaches 16384clk (2¹⁴clk),

IC will be latched off. (Please refer to section “3.5.6 Timing Chart”.)

The loop compensation setting is described in section "3.4 Loop Compensation".

Pin 9: ADIM

This is the input pin for analog dimming signal. The ISENSE feedback point is set as 1/3 of this pin bias. If V_ADIMis

supplied more than 3.0V(Typ), ISENSE feedback voltage is clamped to limit the flow of LED large current. In this

condition, the input current is generated. Please refer to <ISENSE> terminal explanation.

Pin 10: PWM1 , Pin 11: PWM2

These are the PWM dimming signal input pins. The high / low level of PWM pins are the following.

State

PWM input voltage

V_PWM=1.5V to 18.0V

V_PWM=-0.3V to +0.8V

PWM=H

PWM=L

Pin 12: FAILB

This is fail signal output (OPEN DRAIN) pin. At normal operation, NMOS will be in the OPEN state, during abnormality

detection NMOS will be in the ON (500Ω(Typ)) state.

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Pin 13: DUTYON

This is the ON/OFF setting terminal of the LED PWM Over Duty Protection (ODP). By adjusting DUTYON input voltage,

the ON/OFF state of the ODP is changed.

State

DUTYON input voltage

V_DUTYON=-0.3V to +0.8V

V_DUTYON=1.5V to 18.0V

ODP=ON

ODP=OFF

Pin 14: DUTYP

This is the pin that sets the ODP. The ODP (Over Duty Protection) is the function to limit DUTY of LED PWM frequency

f_PWMby ODP detection Duty (ODP_duty) set by resistance (R_DUTY) connected to DUTYP pin.

○Relationship between LED PWM frequency f_PWM, ODP Detection Duty ODP_dutyand DUTYP resistance (ideal)

1172×ODP [%]

duty

R_DUTYP

=

[kΩ]ꢀ

f

_PWM[Hz]

The R_DUTYPsetting ranges from 15kΩ to 500kΩ.

The setting example is separately described in the section ”3.2.5 ODP Setting”.

Pin 15: RT

This is the pin that sets the DC/DC switching frequency. DCDC frequency is decided by connected RT resistor.

○The relationship between the frequency and RT resistance value (ideal)

15000

R_RT

=

[kΩ]ꢀ

f_SW[kHz]

The oscillation setting ranges from 50kHz to 1000kHz.

The setting example is separately described in the section ”3.2.4 DCDC Oscillation Frequency Setting”.

Pin 16: SS

This is the pin which sets the soft start interval of DC/DC converter. It performs the constant current charge of 3.0μA(Typ)

to external capacitance Css. The switching duty of GATE output will be limited during 0V to 3.7V(Typ) of the SS voltage.

So the soft start interval Tss can be expressed as follows

T_SS=1.23×10⁶×C_SS[s]ꢀ Css: the external capacitance of the SS pin.

SS pin becomes L because it never became PWM=H after the latch turns OFF or reset is canceled. When SS

capacitance is under 1nF, please note if the in-rush current during startup is too large, or if over boost detection (FBMAX)

mask timing is too short.

Please refer to soft start behavior in the section “3.5.4 Timing Chart ”.

Pin 23: OVP

The OVP terminal is the input for over-voltage protection. If OVP is more than 3.0V(Typ), the over-voltage protection

(OVP) will work. At the moment of these detections, it sets GATE=L, DIMOUT=L and starts to count up the abnormal

interval. If OVP detection continued to count four GATE clocks, IC reaches latch off. (Please refer to “3.5.5 Timing Chart”)

The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.

Even if OVP function is not used, pin bias is still required because the open connection of this pin is not a fixed potential.

The setting example is separately described in the section ”3.2.6 OVP Setting”.

Pin 24: REG90

This is the 9.0V(Typ) output pin. Available current is 15mA (Min).

Please place the ceramic capacitor connected to REG90 pin (1.0μF to 10μF) closest to REG90-GND pin.

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2.3 List of The Protection Function Detection Condition (Typ Condition)

Detect condition

Timer

operatio

n

Protect

Detection

Release

Protection type

Detection

condition

function

condition

PWM

SS

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

Immediately auto-restart

after detection

2¹⁴clk

FBMAX

FB

V_FB>4.0V

H(4clk) V_SS>3.7V

V_FB<4.0V

LED OCP

ISENSE

V_ISENSE>3.0V

-

V_ISENSE<3.0V

4clk

(Judge periodically

whether normal or not)

RT GND

SHORT

V_RT<V_RTN×90%

V_RT>V_RTN×90%

Restart by release

RT

-

No

(Note 6)

RT HIGH

SHORT

REG90UVL

O

V_RT>5V

V_RT<5V

Restart by release

REG90

VCC

V_REG90<6.0V

V_CC<7.2V

-

V_REG90>6.5V

V_CC>7.5V

No

VCC UVLO

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

OVP

CS

V_OVP>3.0V

V_CS>0.4V

-

V_OVP<2.8V

-

4clk

No

Pulse by Pulse

OCP

Immediately auto-restart

after detection

(Judge periodically

whether normal or not)

OCP LATCH

CS

V_CS>1.0V

V_DUTYP

V_CS<1.0V

V_DUTYP

4clk

DUTYP GND

SHORT

Restart by release

DUTYP

<V_DUTYPN×90%

-

>V_DUTYPN×90%

No

(Note 7)

DUTYP

HIGH

V_DUTYP>5V

V_DUTYP<5V

SHORT

DUTYON=H

and

PWM_duty>ODP_duty

(Note 9)

ODP ^{(Note 8)}

Cycle by Cycle

PWM

H

-

No

The clock number of timer operation corresponds to the boost pulse clock.

(Note 6) V_RTNis the RT voltage at normal operation.

(Note 7) V_DUTYPNis the DUTYP voltage at normal operation.

(Note 8) About ODP, when PWM is inputted from low to high, PWM Duty count start and when PWM is inputted from high to lo, the counter is reest.

When PWM duty is set to 100%,after ODP works once, the GATE and DIMOUT outputs maintain low till PWM is inputted from high to low.

(Note 9) PWM_dutyis the Duty of PWM signal into PWM terminal and ODP_dutyis the Duty decided by the resister connecting to DUTY terminal.

2.4 List of The Protection Function Operation

Operation of the protect function

Protect function

DC/DC gate

output

Dimming transistor

(DIMOUT) logic

SS pin

FAILB pin

Stop after timer latch

Low after timer latch

Discharge after timer latch

Low after timer latch

FBMAX

Immediately high,

Low after timer latch

Stop immediately

LED OCP

Stop immediately

Immediately low

Not discharge

-

RT GND SHORT

RT HIGH SHORT

Low after REG90UVLO

detects

Stop immediately

Discharge immediately

High

STB

Stop immediately

Immediately low

Normal operation

Discharge immediately

Discharge after timer latch

Not discharge

High

REG90UVLO

VCC UVLO

OVP

High

Low after timer latch

-

OCP

Stop immediately

Low after timer latch

Discharge after timer latch

Low after timer latch

OCP LATCH

(Note10)

Stop immediately

Immediately low

Not discharge

-

DUTYP GND SHORT

DUTYP HIGH SHORT

ODP

Please refer to section “3.5 Timing Chart” for details.

(Note 10) Stop immediately due to detecting OCP before OCP_LATCH

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3.1 Application Circuit Example

Introduce an example application using the BD9416xx Series.

3.1.1 Basic Application Example

3.1.2 Only Used 1ch Example

VOUT2

VOUT1

VCC

VIN

VCC

VIN

VCC

OVP

VCC

OVP

REG90

STB

RT

REG90

STB

RT

GATE1

CS1

GATE1

CS1

SS

GND1

DIMOUT1

FAILB

ISENSE1

FB1

FAILB

ISENSE1

FB1

Rs1

GATE2

CS2

PWM1

PWM2

ADIM

GATE2

CS2

PWM1

PWM2

ADIM

GND2

DIMOUT2

DUTYP

ISENSE2

FB2

DUTYP

ISENSE2

FB2

DUTYON

Rs2

Figure 16. Basic application example

Figure 17. Example circuit for only used 1ch

3.1.3 Analog Dimming or PWM Dimming Examples

VOUT2

VOUT1

VCC

VIN

VCC

VIN

VCC

OVP

VCC

OVP

REG90

STB

RT

REG90

STB

RT

GATE1

CS1

GATE1

CS1

SS

GND1

DIMOUT1

FAILB

ISENSE1

FB1

FAILB

ISENSE1

FB1

Rs1

REG90

GATE2

CS2

PWM1

PWM2

ADIM

GATE2

CS2

PWM1

PWM2

ADIM

REG90

GND2

DIMOUT2

DUTYP

ISENSE2

FB2

DUTYP

ISENSE2

FB2

DUTYON

Rs2

DUTYON

Rs2

Figure 18. Example circuit for analog dimming

Figure 19. Example circuit for PWM dimming

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3.2 External Components Selection

3.2.1 Start Up Operation and Soft Start External Capacitance Setting

The below explanation is the start up sequence of this IC

1

5V

VOUT

SS

STB

SLOPE

FB

COMP

SS

OSC

GATE

CS

Css

DRIVER

OSC

SS=FB

Circuit

PWM

LED_OK

GATE

VOUT

2

DIMOUT

ISENSE

FB

3

ILED

PWM

4

LED_OK

6

5

Figure 20. Startup waveform

Figure 21. Circuit behavior at startup

○Explanation of start up sequence

1. Reference voltage REG90 starts by STB=H.

2. SS starts to charge at the time of first PWM=H. At this moment, the SS voltage of slow-start starts to equal FB

voltage,and the circuit becomes VFB=VSS regardless of PWM logic.

3. When VFB=VSS reaches the lower point of internal sawtooth waveform, GATE terminal outputs pulse and starts to

boost VOUT.

4. VOUT is increased and VOUT reaches the voltage to be able to flow LED current.

5. If LED current flows over the set level, FB=SS circuit disconnects and startup behavior completes.

6. Then it continues normal operation by feedback of ISENSE terminal. If LED current doesn't flow when VSS becomes

over 3.7V(Typ), SS=FF circuit completes immediately and FBMAX protection starts.

○Method of setting SS external capacitance

According to the sequence described above, start time when completed at V_FB=V_SScan be thought of as the time until FB

voltage reaches the feedback point from STB=ON.

The capacitance of SS terminal is defined as Css and the feedback voltage of FB terminal is defined as VFB. The

equation relating Css and VFB to T_SSis as follows.

C_SS[μF]× V_FB[V ]

T_SS=

[s]ꢀ

3[μA]

If Css is set to a very small value, rush current flows into the inductor at startup.

On the contrary, if Css is increased too much, LED will light up gradually.

The constant to set varies depending on characteristics required by Css and also differs by factors, such as voltage rise

ratio, output capacitance, DCDC frequency, and LED current. Please confirm with the system.

【Setting example】

When Css=0.1μF,Iss=3μA,and startup completes at V_FB=3.7V, SS setting time is as follows.

0.1×10⁻⁶[F]×3.7[V ]

T_SS=

=0.123[s]ꢀ

3×10⁻⁶[A]

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3.2.2 VCC Series Resistance Setting

VIN

Here are the following effects of inserting series resistor Rvcc into VCC line.

(i) It is possible to suppress the heat generation of the IC, when the voltage VCC

is reduced.

R

VCC

ΔV

(ii) It can limit the inflow current to VCC line.

VCC

However, if resistance Rvcc is set to a large value, VCC voltage is reduced below

minimum operation voltage (V_CC<9V). Rvcc must be set to an appropriate series

resistance.

I

IN

I

CC

+

-

REG90

I

REG

IC’s inflow current line I_INhas the following inflow lines.

・IC’s circuit current…I_CC

Internal

BLOCK

R

REG

I

DCDC

・Current of R_REGconnected to REG90…I_REG

・Current to drive FET’s Gate…I_GATE

These decide the voltage ΔV at R_VCC

VCC terminal voltage at that time can be expressed as follows.

.

I

GATE

DCDC

DRIVER

V_CC[V ] = V_IN[V ]ꢀ− (I_CC[A]+ I_DCDC[A]+ I_REG[A])× R_VCC[Ω] > 9[V ]

Here, judgement is the 9V minimum operation voltage.

Please consider a sufficient margin when setting the series resistor of VCC.

Figure 22. VCC series resistance

circuit example

【setting example】

Above equation is translated as follows.

V_IN[V ] − 9[V ]

I_CC[A] + I_DCDC[A] + I_REG[A]

R_VCC[Ω] <

ꢀ

When VIN=24V, ICC=2.0mA, RREG=10kΩ and IDCDC=2mA, RVCC’s value is calculated as follows.

24[V ]− 9[V ]

0.0051[A]+ 0.002[A]+ 9.0[V ]/10000[Ω]

R_VCC[Ω] <

ꢀ=1.88[kΩ]

(ICC is 5.1mA(Typ)) . Please set each values with tolerance and margin.

3.2.3 LED current setting

LED current can be adjusted by setting the resistance R_S[Ω] which connects to ISENSE pin and V_ADIM[V].

Relationship between R_Sand I_LEDcurrent

With DC dimming (V_ADIM<3.0V)

VOUTx

1 V_ADIM[V ]

3 I_LED[A]

R_S[Ω] =

[Ω]ꢀ

Without DC dimming (V_ADIM>3.0V)

I

LED

BD9416

Error AMP

DIMOUTx

1.015[V ]

R_S[Ω] =

[Ω]ꢀ

I

_LED[A]

ISENSEx

ADIM

-

【setting example】

If I_LEDcurrent is 200mA and V_ADIMis 2.0V, we can calculate R_Sas below.

+

1.015V

1/3

Rs

1 V_ADIM[V ] 1 2.0[V ]

R_S[Ω] =

=

= 3.33[Ω]ꢀ

FBx

3 I_LED[A] 3 0.2[A]

Figure 23. LED current setting example

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3.2.4 DCDC Oscillation Frequency Setting

Frequency(fsw)

R_RTwhich connects to RT pin sets the oscillation frequency f_SWof DCDC.

○Relationship between frequency f_SWand RT resistance (ideal)

15000

GATE

CS

R_RT

=

[kΩ]ꢀ

f_SW[kHz]

RT

Rcs

【setting example】

When DCDC frequency fsw is set to 200kHz, R_RTis as follows.

R_RT

GND

15000

R_RT=

=

= 75[kΩ]ꢀ

Figure 24. RT terminal setting example

f_SW[kHz] 200[kHz]

3.2.5 ODP Setting

R_DUTYPwhich connects to ODP pin sets the ODP detection duty.

○Relationship between LED PWM frequency f_PWM, ODP Detection

GATE

Duty

and DUTYP resistance (ideal)

CS

DUTYP

Rcs

R_DUTYP

1172×ODP [%]

duty

R_DUTYP

=

[kΩ]ꢀ

f

_PWM[Hz]

DIMOUT

ISENSE

【setting example】

Rs

PWM

When LED PWM frequency f_PWMis set to 120Hz and ODP Detection Duty

(ODP_duty) is set to 35%, R_DUTYPis as follows.

GND

1172×35[%]

R_DUTYP

=

= 341.8[kΩ]ꢀ

Figure 25. ODP setting example

120[Hz]

fPWM

PWM

3.2.6 OVP Setting

GATE

The OVP terminal is the input for over-voltage protection of the output

voltage.

The OVP pin is in high impedance state, because the internal

resistance is not connected to a certain bias.

DIMOUT

ODP^duty

Detection voltage of VOUT is set by dividing resistors R1 and R2. The

resistor values can be calculated by the formula below.

Figure 26. The GATE and the DIMOUT

waveform as PWM dimming (ODP)

○OVP detection equation

If VOUT is boosted abnormally, V_OVPDETis the detect voltage of OVP,

R1, R2 can be expressed by the following formula.

V_OVPDET[V ] − 3.0[V ]

R1 = R2[kΩ

]

×

[kΩ]ꢀ

3.0[V ]

○OVP release equation

By using R1 and R2 in the above equation, the release voltage of OVP,

VOVPCAN can be expressed as follows.

COVP

R1[kΩ]+ R2[kΩ]

V_OVPCAN= 2.8[V ]×

[V ]ꢀ

R2[kΩ]

Figure 27. OVP setting example

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【setting example】

If the normal output voltage, VOUT is 40V, the detect voltage of OVP is 48V, R2 is 10kΩ, R1 is calculated as follows.

V_OVPDET[V ] − 3.0[V ]

3.0[V ]

48[V ] − 3[V ]

3[V ]

R1 = R2[kΩ]×

=10[kΩ]×

=150[kΩ]ꢀ

By using these R1 and R2, the release voltage of OVP, V_OVPCANcan be calculated as follows.

R1[kΩ]+ R2[kΩ]

R2[kΩ]

10[kΩ]+150[kΩ]

10[kΩ]

V_OVPCAN= 2.8[V ]×

= 2.8[V ]×

= 44.8[V ]ꢀ

3.2.7 Timer Latch Time Setting, Auto-Restart Timer Setting

About over boost protection (FBMAX), timer latch time is set by counting the clock frequency which is set at the RT pin.

About the behavior from abnormal detection to latch-off, please refer to the section “3.5.6 Timing Chart”.

If the condition V_FB>4.0V(Typ) and PWM=H continues for more than four GATE clocks, it is counted as unusual. After

that, only the FB voltage is monitored and latch occurs after the time below has passed.

R_RT

1.5×10¹⁰

R_RT[kΩ]

1.5×10⁷

LATCH_TIME= 2¹⁴×

=16384 ×

[s]ꢀ

And Auto-Restart Time after latch off can be expressed by the following formula.

R_RT

1.5×10¹⁰

R_RT[kΩ]

1.5×10⁷

AUTO_TIME= 2¹⁷×

=131072 ×

[s]ꢀ

Here, LATCH_TIME= time until latch condition occurs, AUTO_TIME= auto restart timer’s time

R_RT= Resistor value connected to RT pin

【setting example】

Timer latch time when RT=100kΩ

R_RT[kΩ]

1.5×10⁷

100[kΩ]

1.5×10⁷

LATCH_TIME=16384×

=16384×

=109.2[ms]ꢀ

R_RT[kΩ]

1.5×10⁷

100[kΩ]

AUTO_TIME=131072×

=131072×

= 873.8[ms]ꢀ

1.5×10⁷

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3.3 DCDC Parts Selection

3.3.1. OCP Setting / Calculation Method for the Current Rating of DCDC Parts

OCP detection stops the switching when the CS pin voltage is more than 0.4V(Typ). The resistor value of CS pin, R_CS

needs to be considered after calculating the peak current in coil L. In addition, the current rating of DCDC external parts

should be greater than the peak current of the coil.

Shown below are the calculation method of the coil peak current, the selection method of Rcs (the resistor value of CS

pin) and the current rating of the external DCDC parts at Continuous Current Mode.

（the calculation method of the coil peak current, Ipeak at Continuous Current Mode）

At first, since the ripple voltage at CS pin depends on the application condition of DCDC, the following variables are used.

Vout voltage= V_OUT[V]

LED total current= I_OUT[A]

DCDC input voltage of the power stage = V_IN[V]

Efficiency of DCDC =η[%]

L

VOUT

VIN

And then, the average input current I_INis calculated by the following

equation.

IL

V_OUT[V ]× I_OUT[A]

V_IN[V ]×η[%]

I_I

=

[A]ꢀ

fsw

N

GATE

And the ripple current of the inductor L (ΔIL[A]) can be calculated by

using

DCDC the switching

frequency, fsw, as

[A]ꢀ

CS

(V_OUT[V ]−V_IN[V ])×V_IN[V ]

L[H]×V_OUT[V ]× f_SW[Hz]

∆IL =

Rcs

follows.

GND

Figure 28. Circuit Structure of DCDC parts

On the other hand, the peak current of the inductor Ipeak can be expressed as follows.

(V)

∆IL[A]

… (1)

ꢀ

Ipeak = I_IN[A]+

[A]

2

Therefore, the bottom of the ripple current I_Minis

（A)

(t)

∆IL[A]

Ipeak

I_Min= I_IN[A]−

or 0ꢀ

2

ΔIL

I

IN

I

Min

If I_Min>0, the operation mode is CCM (Continuous Current Mode), otherwise

the mode is DCM (Discontinuous Current Mode).

(t)

（V)

0.4V

(the selection method of Rcs at Continuous Current Mode)

Ipeak flows into Rcs and that causes the voltage signal to CS pin. (Please

refer to the timing chart at the right)

Peak voltage V_CSpeakis as follows.

V

CSpeak

V_CSpeak= R_CS× I _peak[V ]ꢀ

(t)

Figure 29. Coil current waveform

As this V_CSpeakreaches 0.4V(Typ), the DCDC output stops switching.

Therefore, Rcs value is necessary to meet the condition below.

R_CS× I_peak[V ] << 0.4[V ]

(the current rating of the external DCDC parts)

The peak current as the CS voltage reaches OCP level (0.4V (Typ)) is defined as I_{peak_det}

0.4[V ]

… (2)

I_{peak _det}

=

[A]

R_CS[Ω]

The relationship among I_peak(equation (1)), I_{peak_det}(equation (2)) and the current rating of parts is required to meet the

following

I_peak<< I_{peak _ det}<<

The current rating of parts

Please make the selection of the external parts such as FET, Inductor, diode meet the above condition.

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[setting example]

Output voltage = V_OUT[V] = 40V

LED total current = I_OUT[A] = 0.48V

DCDC input voltage of the power stage = V_IN[V] = 24V

Efficiency of DCDC =η[%] = 90%

Averaged input current I_INis calculated as follows.

V_OUT[V ]× I_OUT[A] 40[V ]× 0.48[A]

I _IN[A] =

=

= 0.89[A]

V_IN[V ]×η[%]

24[V ]×90[%]

If the switching frequency, f_SW= 200kHz, and the inductor, L=100μH, the ripple current of the inductor L (ΔIL[A]) can be

calculated as follows.

(V_OUT[V ]−V_IN[V ])×V_IN[V ]

(40[V ]− 24[V ])× 24[V ]

∆IL =

=

= 0.48[A]

L[H]×V_OUT[V ]× f_SW[Hz] 100×10⁻⁶[H]× 40[V ]× 200×10³[Hz]

Therefore the inductor peak current, Ipeak is

∆IL[A]

0.48[A]

…calculation result of the peak current

…Rcs value confirmation

I_peak= I_IN[A]+

[A] = 0.89[A]+

=1.13[A]

2

If Rcs is assumed to be 0.3Ω

V_CSpeak= R_CS× I_peak= 0.3[Ω]×1.13[A] = 0.339[V ] << 0.4V

The above condition is met.

And I_{peak_det}, the current OCP works, is

0.4[V ]

I _{peak _ det}

=

=1.33[A]

0.3[Ω]

If the current rating of the used parts is below 2A,

I_peak<< I_{peak _ det}<<

= 1.13[A] << 1.33[A] << 2.0[A]

The current rating

…current rating confirmation

of DCDC parts

This inequality meets the above relationship. The parts selection is proper.

And I_MIN, the bottom of the IL ripple current, can be calculated as follows.

∆IL[A]

I_Min= I_IN[A]−

[A] =1.13[A] − 0.48[A] = 0.65[A] >> 0

2

This inequality implies that the operation is continuous current mode.

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3.3.2. Inductor Selection

The inductor value affects the input ripple current, as shown the previous section 3.3.1.

(V_OUT[V ] −V_IN[V ])×V_IN[V ]

L[H]×V_OUT[V ]× f_SW[Hz]

∆IL =

[A]

V_OUT[V ]× I_OUT[A]

ΔI

L

I _IN[A] =

[A]

V_IN[V ]×η[%]

∆IL[A]

V_IN

I _peak= I_IN[A] +

[A]

2

I_L

L

Where

L: coil inductance [H]

V_IN: input voltage [V]

I_OUT: output load current (the summation of LED current) [A]

I_IN: input current [A] f_SW: oscillation frequency [Hz]

V_OUT

V_OUT: DCDC output voltage [V]

R_CS

C_OUT

Figure 30. Inductor current waveform and diagram

In continuous current mode, ⊿IL is set to 30% to 50% of the output load current in many cases.

In using smaller inductor, the boost is operated in discontinuous current mode in which the coil current returns to zero

at every period.

*The current exceeding the rated current value of inductor passing through the coil causes magnetic saturation, and

this results in to a decrease in efficiency. Inductor needs to be selected to have adequate margin such that the peak

current does not exceed the rated current value of the inductor.

*To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be

selected

3.3.3. Output Capacitance Cout Selection

Output capacitor C_OUTneeds to be selected in consideration of equivalent series

resistance R_ESRrequired to smooth out the ripple voltage. Be aware that the required

V_IN

LED current may not be observed due to decrease in LED terminal voltage if the

output ripple component is high.

I_L

L

Output ripple voltage

⊿Vis determined by Equation (4):

OUT

V_OUT

ΔV_OUT=ΔIL× R_ESR[ꢀV ]ꢀꢀ(3)

R_ESR

C_OUT

When the coil current is charged to the output capacitor as MOS turns off, a large

output ripple is caused. Large ripple voltage of the output capacitor may cause the

LED current ripple.

R_CS

Figure 31. Output capacitor diagram

* Rating of capacitor needs to be selected to have adequate margin against output voltage.

*To use an electrolytic capacitor, adequate margin against allowable current is also necessary. Be aware that the LED

current is larger than the set value momentarily especially in the case that LED is provided with PWM dimming.

3.3.4. Switching MOSFET Selection

There is no problem if the absolute maximum rating is larger than the rated current of the inductor L, or is larger than

the sum of the tolerance voltage of C_OUTand the rectifying diode V_F. The product with small gate capacitance (injected

charge) needs to be selected to achieve high-speed switching.

* One with over current protection setting or higher is recommended.

* The selection of one with small on resistance results in high efficiency.

3.3.5. Rectifying Diode Selection

A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than the

tolerance voltage of C_OUT, and most importantly, low forward voltage V_Fneeds to be selected.

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3.4 Loop Compensation

A current mode DCDC converter has one pole (phase lag) f_pdue to CR filter composed of the output capacitor and the

output resistance (= LED current) and one zero (phase lead) f_Zby the output capacitor and the ESR of the capacitor.

Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) f_ZRHPwhich is unique with the boost

converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the

cross-over frequency f_c,set as follows, is suggested.

fc = f_ZRHP/5 (f_ZRHP: RHP zero frequency)

Considering the response speed, the calculated constant below is not always completely optimized. It needs to be

adequately verified with an actual device.

V

OUT

VIN

I

LED

L

-

+

V

OUT

FB

gm

RFB1

RESR

CFB2

CFB1

RCS

COUT

Figure 32. Output stage and error amplifier diagram

i.

Calculate the pole frequency fp and the RHP zero frequency f_ZRHPof DC/DC converter

V_OUT×(1− D)²

2π × L× I_LED

I_LED

f _p=

[ꢀHz]ꢀꢀ

f_ZRHP

=

[ꢀHz]ꢀꢀ

2π ×V_OUT×C_OUT

V_OUT−V_IN

Where I_LED= the summation of LED current,

(Continuous Current Mode)

D =

ꢀꢀ

V_OUT

ii.

Calculate the phase compensation of the error amp output (f_c= f_ZRHP/5)

f_RHZP× R_CS× I_LED

5× f_p× gm×V_OUT×(1− D)

R_FB1

=

ꢀ[Ω]ꢀꢀ

1

5

C_FB1

=

[F]

2π × R_FB1× f_C2π × R_FB1× f_ZRHP

gm = 4.0 ×10⁻⁴[S]ꢀ

The above equation is described for lighting LED without the oscillation. The value may cause a large error if the quick

response for the abrupt change of dimming signal is required.

To improve the transient response, R_FB1needs to be increased, and C_FB1needs to be decreased. It needs to be

adequately verified with an actual device to consider part to part variation since phase margin could be decreased.

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3.5 Timing Chart

3.5.1 PWM Start up 1 (Input PWM Signal After Input STB Signal)

7.5V

VCC

STB

PWM

6.5V

REG90

3.7V

SS

0.4V

GATE

DIMOUT

2.0V

RT

FAILB

OFF

STANDBY

SS

Normal

SS

STANDBY

STATE

(*1) (*2)

(*3)

(*4)

(*5)

(*6)

Figure 33. PWM Start Up 1 (Input PWM Signal After Input STB Signal)

(*1)…REG90 starts up when STB is changed from Low to High. In the state where the PWM signal is not supplied, SS terminal

is not charged and DCDC does not start to operate, either.

(*2)…When REG90 is more than 6.5V(Typ), the reset signal is released.

(*3)…The charge of the pin SS starts at the positive edge of PWM=L to H, and the soft start starts. And while the SS is less than

0.4V, the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level.

(*4)…The soft start interval will end once the voltage of the pin SS, Vss reaches 3.7V(Typ). By this time, it boosts V_OUTto the

voltage where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.

(*5)…As STB=L, the boost operation is stopped immediately.

(*6)…In this diagram, before the charge period is completed, STB is changed to High again. As STB=H again, the boost

operation restarts the next PWM=H. It is the same operation as the timing of (*2). (For capacitance setting of SS terminal,

please refer to the section 3.2.1.

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3.5.2 PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)

7.5V

VCC

STB

PWM

6.5V

REG90

3.7V

0.4V

SS

0.4V

GATE

DIMOUT

RT

2.0V

FAILB

STATE

OFF

SS

NORMAL

STANDBY

SS

(*3)

Figure 34. PWM Start Up 2 (Input STB Signal After Inputted PWM Signal)

(*1)…REG90 starts up when STB=H.

(*4)

(*5)

(*1) (*2)

(*2)…When REG90UVLO releases or PWM is supplied to the edge of PWM=L→H, SS charge starts and soft start period is

started. And while the SS is less than 0.4V, the pulse does not output. The pin SS continues charging in spite of the

assertion of PWM or OVP level.

(*3)…The soft start interval will end once the voltage of the pin SS, Vss reaches 3.7V(typ.). By this time, it boosts V_OUTto the

point where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.

(*4)…As STB=L, the boost operation is stopped immediately (GATE=L, SS=L).

(*5)…In this diagram, before the discharge period is completed, STB is changed to High again. As STB=H again, operation will

be the same as the timing of (*1).

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3.5.3 Turn Off

STB

PWM

REG90

6.0V

REG90UVLO

DIMOUT

GATE

VOUT

SS

RT

2.0V

High

FAILB

ON

STATE

Dischange

OFF

(*2)

Figure 35. Turn Off

(*1)

(*1)…As STB=H→L, boost operation stops and REG90 starts to discharge.

(*2)…While STB=L, REG90UVLO=H, DIMOUT becomes same as PWM. When V_REG90=9.0V is less than 6.0V(Typ), IC changes

to OFF state. REG90 capacitor is discharged quickly and V_RTbecomes 0V at the same time. VOUT is discharged

completely until this time. It should be set to avoid sudden brightness.

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3.5.4 Soft Start Function

STB

PWM

7.2V

VCCUVLO

7.5V

6.0V

6.5V

3.0V

REG90UVLO

OVP

2.8V

GATE

DIMOUT

4clk

2.0V

RT

0.4V

SS

FAILB

(*1)

(*2)(*3)

(*4)

(*5)

(*6)

Figure 36. Soft Start Function

(*1)…The SS pin charge does not start by just STB=H. PWM=H is required to start the soft start. In the low SS voltage, the

GATE pin duty depends on the SS voltage. And while the SS is less than 0.4V, the pulse does not output.

(*2)…By the time STB=L, the SS pin is discharged immediately. Because of REG90UVLO=H, RT is still High.

(*3)…As the STB recovered to STB=H, The SS charge starts immediately by the logic PWM=H in this chart.

(*4)…The SS pin is discharged immediately by the VCCUVLO=L.

(*5)…The SS pin is discharged immediately by the REG90UVLO=L.

(*6)…Unusual detection to latch OFF including OVP detection turns OFF latch, only after SS pin is discharged.

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3.5.5 OVP Detection

STB

PWM

REG90

3.0V

2.8V

3.0V

2.8V

3.0V

OVP

Abnormal

COUNTOR

Smaller than

Gate 4count

Auto

Restart

Auto Restart

COUNTOR

Smaller than

Gate 2¹⁷count

SS

0.4V

GATE

DIMOUT

RT

2.0V

FAILB

Auto

Restart

STATE NORMAL

Reset

(OFF)

Latch off

OVP

NORMAL

OVP

Latch off

NORMAL

OVP

abnormal

(*10)

(*1)

(*3)

(*4) (*5)

(*6)

(*7)

(*9)

(*8)

(*2)

Figure 37. OVP Detection

(*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts.

(*2)…If OVP is released within 4 clocks of abnormal counter of the GATE pin frequency, the boost operation restarts.

(*3)…As the OVP is detected again, the boost operation is stopped.

(*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC will be latched off. After latch off, auto counter

starts counting.

(*5)… Once IC is latched off, the boost operation doesn't restart even if OVP is released.

(*6)… STB=L can release latch off. At the same time, Auto Restart counter is reset.

(*7)…Normal operation starts when STB is changed from Low to High.

(*8)…The operation of the OVP detection is not related to the logic of PWM. OVP detects and abnormal counter starts.

(*9)…same as (*4)

(*10)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. At this time, if V_OVPis normal level, IC state

shifts to normal.

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3.5.6 FBMAX Detection

STB

PWM

REG90

4.0V

FB

Abnormal

COUNTOR

Gate 4count

Smaller than

Gate 4count

CP

COUNTOR

Gate 2¹⁴count

Auto

Restart

Auto Restart

COUNTOR

Gate 2¹⁷count

Smaller than

Gate 2¹⁷count

3.7V

0.4V

SS

RT

0.4V

2.0V

GATE

DIMOUT

FAILB

Auto

Restart

NOR

MAL

CP

COUNTOR

abnormal

Latch

off

NOR

MAL

Latch

off

SS

STANDBY

FBMAX

CP COUNTOR

abnormal

STANDBY

SS

STATE

FBMAX

SS

abnormal

(*6)

(*7)

(*8)

(*9)

(*10)

(*11)

(*3)

(*12)

(*13)

(*1)

(*4)

(*5)

(*2)

Figure 38. FBMAX Detection

(*1) …When PWM is changed to high, soft-start starts.

(*2) …During the soft start, it is not judged as an abnormal state even if the FB=H(V_FB>4.0V(Typ)).

(*3) …When V_SSreaches to 3.7V, soft-start finishes.

(*4) …When the PWM=H and FB=H, the abnormal counter start immediately.

(*5)…The CP counter will start if the PWM=H and the FB=H detection continues up to 4 clocks of the GATE frequency. Once the

count starts, only FB level is monitored.

(*6)…When the FBMAX detection continues till the CP counter reaches 16384clk (2¹⁴clk), IC will be latched off. The latch off

interval (LATCH_TIME) can be calculated by the external resistor of RT pin. (Please refer to the section 3.2.7.)

(*7)…STB=L can release latch off.

(*8)…When PWM is set from low to high, IC starts normal start-up..

(*9)…same as (*3)

(*10)…same as (*4)

(*11)…same as (*5)

(*12)…same as (*6)

(*13)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. At this time, if V_FBis normal level, IC state shifts

to normal.

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3.5.7 LED OCP Detection

STB

PWM

REG90

3.0V

ISENSE

Abnormal

4count

COUNTOR

4count

Smaller than

4count

Auto

Restart

Auto Reatart

COUNTOR

Gate 2¹⁷count

Smaller than

Gate 2¹⁷count

SS

0.4V

GATE

DIMOUT

RT

2.0V

FAILB

Auto

Restart

STATE

NORMAL

Reset

(OFF)

Latch off

LEDOCP

abnormal

NORMAL

LEDOCP

abnormal

NORMAL

LEDOCP

abnormal

(*2)

(*1)

(*3)

(*4) (*5)

(*6)

(*7)

(*8)

(*9)

(*10)

Figure 39. LED OCP Detection

(*1)…If V_ISENSE>3.0V(Typ), LEDOCP is detected, and GATE becomes L. To detect LEDOCP continuously, The DIMOUT is

forced high, regardless of the PWM dimming signal.

(*2)…When the LEDOCP releases within 4 counts of the GATE frequency, the boost operation restarts.

(*3) …As the LEDOCP is detected again, the boost operation is stopped.

(*4)…If the LEDOCP detection continues up to 4 counts of GATE frequency. IC will be latch off. After latched off, auto counter

starts counting.

(*5)…Once IC is latched off, the boost operation doesn't restart even if the LEDOCP releases.

(*6)…STB=L can release latch off.

(*7)…When PWM is set from low to high, IC starts normal start-up.

(*8)…The operation of the LEDOCP detection is not related to the logic of the PWM.

(*9)…same as (*4)

(*10)…When auto counter reaches 131072clk (2¹⁷clk), IC will be auto-restarted. At this time, if V_ISENSEis normal level, IC state

shifts to normal.

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3.5.8 ODP Operation

DUTYON

(*1)

(*2)

PWMduty<ODPduty PWMduty>ODPduty

(*5)

PWMduty<ODPduty PWMduty>ODPduty

(*3)

(*6)

(*7)

(*4)

PWMduty=100%

PWM

ODPCLK

(internal

signal）

DIMOUT

GATE

Figure 40. ODP Operation

(*1)…When DUTYON=L and PWM pin’s duty (PWM_duty) is smaller than internal ODPCLK’s duty (ODP_duty), PWM_dutyis reflected

to DIMOUT and GATE.

(*2)…When DUTYON=L and PWM pin’s duty (PWM_duty) is larger than internal ODPCLK’s duty (ODP_duty), ODP_dutyis reflected to

DIMOUT and GATE.

(*3)…When DUTYON=L and PWM pin’s duty (PWM_duty) is equal to internal ODPCLK’s duty (ODP_duty), ODP_dutyis reflected to

DIMOUT and GATE only once, and then untill PWM is changed from low to high, DIMOUT and GATE output is low.

(*4) … When PWM is changed from low to high, ODP_dutyis reflected to DIMOUT and GATE again.

(*5)(*6)(*7)…When DUTYON=L, PWM_dutyis reflected to DIMOUT and GATE.

Please refer to the section “3.2.5 ODP Setting ” for ODP_dutysetting.

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3.6 I/O Equivalent Circuits

STB

DIMOUT1 / DIMOUT2 /

GND1 / GND2

GATE1 / GATE2 / REG90 / CS1 / CS2

REG90

STB

100k

GATEx

DIMOUTx

5V

1M

100k

GNDx

CSx

100k

GNDx

ISENSE1 / ISENSE2

FB1 / FB2

ADIM

ISENSEx

ADIM

20k

45k

FBx

5V

FAILB

PWM1 / PWM2

DUTYON

PWMx

FAILB

DUTYON

100k

500

5V

1M

5V

1M

DUTYP

RT

SS

RT

DUTYP

6k

5V

OVP

100k

5V

Figure 41. Equivalent Circuits

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Operational Notes

1.Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

2.Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all

power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4.Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground

caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground

voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating conditions.

The characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.

6.Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of

connections.

7.Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

8.Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the

IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be

turned off completely before connecting or removing it from the test setup during the inspection process. To prevent

damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.

9.Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin

shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional

solder bridge deposited in between pins during assembly to name a few.

10.Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply

or ground line.

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Operational Notes – continued

11.Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.

P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or

transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 42. Example of monolithic IC structure

12.Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature

and the decrease in nominal capacitance due to DC bias and others.

13.Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within the

Area of Safe Operation (ASO).

14.Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be

within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the junction

temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the

TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

15.Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection

circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in

applications characterized by continuous operation or transitioning of the protection circuit.

16.Disturbance Light

In a device where a portion of silicon is exposed to light such as in a WL-CSP and chip products, IC characteristics may be

affected due to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent

the chip from being exposed to light.

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Ordering Information

B D 9 4 1 6

x

-

E 2

Part Number

Package

F: SOP24

Packaging and forming specification

E2: Embossed tape and reel

FS:SSOP-A24

Marking Diagrams

SSOP-A24(TOP VIEW)

SOP24(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

B D 9 4 1 6 F S

B D 9 4 1 6 F

1PIN MARK

Part Number Marking

BD9416F

Package

SOP24

Orderable Part Number

BD9416F-E2

BD9416FS

SSOP-A24

BD9416FS-E2

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Physical Dimension, Tape and Reel Information

Package Name

SOP24

(Max 15.35 (include.BURR))

(UNIT : mm)

PKG : SOP24

Drawing No. : EX118-5001

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Physical Dimension, Tape and Reel Information

- continued

Package Name

SSOP-A24

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Revision History

Date

Revision

Rev.001

Changes

08.Apr.2017

New Release

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.003


型号：	BD9416FS
厂家：	ROHM
描述：	BD9416FS是白色LED用高效率驱动器，适用于大屏幕液晶驱动器。BD9416FS内置了可向光源（LED串联连接的阵列）提供适当电压的DCDC转换器。BD9416FS中内置了应对异常状态的几种保护功能。过电压保护(OVP: Over Voltage Protection)、过电流检测(OCP: Over Current Limit Protection of DCDC)、LED 过流保护(LEDOCP: LEDOver Current Protection)、过升压保护(FBMAX: Over Boost Protection)等。因此，可在更宽的输出电压条件及负载条件下使用。驱动 CD 驱动器转换器
文件：	总39页 (文件大小：2231K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9416FS [ROHM]

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