BD9478F-XX_技术文档

BD9478F

Datasheet

LED Drivers series for LCD Backlights

PWM pulse Generator for

LCD Panels

BD9478F

General Description

Features

BD9478F is PWM pulse generator for LCD panel. This

IC compares triangle waveform which is generated

inside IC and external DC signal, and generates a

PWM pulse. This PWM pulse is provided to LED driver

and controls LED grayscale. PWM pulse frequency

can be synchronized to external signal frequency

inputted to SYNC terminal. Even if this frequency gets

out of range, it works in the setting frequency, is

protected and it always provides stable PWM pulse to

LED driver.

The signal that the frequency synchronizes with the

VSYNC signal is output to PWMOUT.

The PWM pulse is generated with the DC signal of a

triangular wave and PDIM generated with the LCT

capacitor.

When the VSYNC frequency exceeds the stipulated

range, it fixes by a set frequency.

(fSYNC<fPLLtyp*0.35 -> fPLL=0.36*fPLLtyp , fSYNC>

fPLLtyp*2.75 -> fPLL=2.75*fPLLtyp)

When VSYNC is a no signal input, the self-oscillation is

operated by set frequency decided on the CT capacitance.

When the pulse signal is input to the terminal EXTPWM,

it shifts automatically to external PWM mode.

Key Specification

ꢀ Operating power supply voltage range: 4.5V to 5.5V

ꢀ Free Run frequency:

ꢀ Operating Current:

150Hz (CT=0.01µF)

2mA (typ.)

ꢀ Operating temperature range:

-40

to +85

Package

SOP-8:

Pin Pitch:

W(Typ.) D(Typ.) H(Max.)

5.00mm x 6.20mm x 1.71mm

1.27mm

Applications

LED backlight of monitor, TV, NOTE PC, etc.

Typical Application Circuit

Figure 1. SOP-8

Figure 2. Typical Application Circuit

Product structure Silicon monolithic integrated circuit

This product is not designed protection against radioactive rays

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Datasheet

BD9478F

Absolute maximum ratings (Ta=25

)

Parameter

Symbol

VCC

Ratings

7

Unit

V

Power supply voltage

Operating Temperature Range

Storage Temperature Range

Junction Temperature

Ta(opr)

Tstg

-40 ~ +85

-55 ~ +150

150

°C

Tjmax

Pd

°C

Power Dissipation

689

1

mW

^*1Decreases 5.5mW/ at Ta=25 or higher (When mounting a one-layer 70.0mmx70.0mmx1.6mm board)

Operating Ratings (Ta = 25

Parameter

Power supply voltage

)

Symbol

VCC

Range

Unit

V

4.5

5.5

0.8

30

0.040

FCT

VSYNC input frequency range

F_VSYNC

kHz

EXTPWM input PWM signal frequency range

F_EXTPWM

The operating conditions written above are constants of the IC unit. Be careful enough when setting the constant in the actual set.

FCT is dimming frequency that oscillates itself when VSYNC terminal is input no signal

External Components Recommended Range

Item

Symbol

CVCC

CT

Setting Range

0.1 ~ 10

Unit

µF

VCC capacitance

PLL Burst OSC oscillation frequency setting

capacitance

0.040

0.8

µF

The operating conditions written above are constants of the IC unit. Be careful enough when setting the constant in the actual set.

Pin Configuration

Marking diagram and physical dimension

8

7

6

5

D9478

Lot No.

1

2

3

4

SOP-8

Figure 3. Pin Configuration

Figure 4. Physical Dimension

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Datasheet

BD9478F

Electrical Characteristics (Unless otherwise specified, Ta=25

VCC=5V)

Limit

Parameter

[Whole Device]

Symbol

Unit

Condition

Min.

Typ.

Max.

PDIM=3V,CT=0.01uF

VSYNC=EXTPWM=open

Circuit Current during Operation

ICC

―

2

4

mA

[UVLO Block]

Release voltage

Hysteresis voltage

[PLL Block]

VUVLO

VUHYS

3.5

3.8

4.1

V

VCC=SWEEP UP

150

300

600

mV

VCC=SWEEP DOWN

Oscillation frequency when VSYNC is

input no signal

fCTNS

VCTH

142

150

158

Hz

CT=0.01µF,LPF=0V

V

Triangle wave maximum voltage

2.70

0.40

3.00

0.50

3.30

0.60

fCT=150Hz

Triangle wave minimum voltage

Synchronous signal abnormal judgment

voltage, (at High frequency input)

Synchronous signal normal judgment

voltage, (at High frequency input)

Internal RT voltage at Synchronous

signal, abnormal judgment when High

frequency input

Synchronous signal abnormal judgment

voltage, (at Low frequency input)

Synchronous signal normal judgment

voltage, (at Low frequency input)

Internal RT voltage at Synchronous

signal, abnormal judgment when High

frequency input

VCTL

CT_SYNC

_DET1

CT_SYNC

_OKH

2.612

2.517

2.750

2.650

2.888

2.783

V

LPF=2.0V→3.0V

LPF=3.0V→2.0V

VRTFH

CT_SYNC

_DET2

CT_SYNC

_OKL

-

2.750

0.350

0.450

-

V

LPF=3V

0.331

0.414

0.389

0.486

LPF=1.0V→0.1V

LPF=0.1V→1.0V

VRTFL

VINTF

VRTFI

-

0.10

-

0.360

0.15

-

0.20

-

V

LPF=0.25V

LPF=1.0V→0.1V

LPF=0V

Switch voltage to internal fixed

frequency

Internal RT voltage at switched to

internal fixed, frequency

0.900

Input pin (EXTPWM,PDIM,VSYNC)

Input High level

VIH

VIL

V

2.0

-

20

Input Low level

-0.3

0.5

-

0.8

2.0

Pull down resistance

Output pin (PWMOUT)

Output High level

RIPD

1.0

MΩ

VOH

VOL

4.3

-

4.85

0.1

-

V

Io=-1mA

Io=1mA

Output Low level

0.5

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Datasheet

BD9478F

Pin Descriptions

Pin No

Pin Name

In/Out

Function

Rating [V]

-0.3~7

-0.3~20

-0.3~7

-

1

2

3

4

5

6

7

8

-

In

Power supply

VCC

EXTPWM

PDIM

External PWM signal input

In

DC signal input for Internal PWM

Synchronous signal input

Capacitance pin for VCO

LPF output for PLL

In

VSYNC

CT

Out

In/Out

-

LPF

Ground

GND

Out

PWM dimming signal output

-0.3~7

PWMOUT

Pin ESD Type

VCC

EXTPWM / VSYNC /PDIM

CT

VCC

CT

7V

LPF

GND

PWMOUT

Figure 5. Pin ESD Type

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Datasheet

BD9478F

Block Diagram

Figure 6. Block Diagram

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Datasheet

BD9478F

Typical Performance Curve

Figure 7. Operating Current (ICC) [mA] vs. VCC[V]

4

Figure 8. frequency fCT[Hz] vs. CT[nF]

500

400

300

200

100

0

3

2

1

0

4.0

4.5

5.0

5.5

6.0

0

5

10

15

20

VCC [V]

CCT [nF]

Figure 10. PWMOUT jitter [µs] vs. fCT[Hz]

Figure 9. PWM DUTY [%] vs. PDIM[V]

4.0

120

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

100

80

60

40

20

0

100

150

200

250

300

350

400

0

1

2

3

4

fCT [Hz]

PDIM [V]

Figure 12. EXTPWM mode waveform

Figure 11. Start up waveform (Free Run mode)

VCC

PDIM

CT

PDIM

EXTPWM

PWMOUT

f-200Hz

CT

PWMOUT

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Datasheet

BD9478F

Pin Function

Pin 1: VCC

Power supply pin of the IC. Input range is from 4.5V to 5.5V

Operation starts at VCC=3.8V TYP. or higher and shuts down at VCC=3.5V(TYP.) or lower.

Pin 2: EXTPWM

External PWM signal input terminal.

In case of the following equation, the signal input to EXTPWM is output directly to PWMOUT.

The equation

;

f(PLL) < 2 * f(EXTPWM)

f(EXTPWM) ; frequency of signal input to EXTPWM

f(PLL) ; frequency of signal that synchronizes with VSYNC signal

Pin 3: PDIM

DC signal input terminal to generate internal PWM signal.

The PWM signal is generated with compare it with a triangular waveform in IC.

If PDIM input DC level is changed, PWM Duty can be changed.

PDIM input DC voltage range is from 0.5V to 3.0V. (PWM Duty is changed from 0% to 100%)

Pin 4: VSYNC

Synchronous signal input terminal.

The signal that synchronizes with the frequency of the signal input to VSYNC is generated with PLL.

A triangular wave is generated based on the frequency of this synchronized signal, and the PWM

pulse is generated with compare it with the PDIM signal

Pin 5: CT

Capacitor connection terminal that decides the oscillation frequency of VCO..

Please adjust the capacity of CT by the following equation so that the voltage of the terminal LPF

may become 0.9V when the frequency of the signal that synchronizes is input.

1.5

CT =

[ꢀuF]ꢀ

f_PLLtyp[Hz]

Pin 6: LPF

Low pass filter connection pin.

The pulse signal output from Phase Comparator is smoothed by Low path filter, and it inputs to Voltage.

Controlled Oscillator (VCO).

Pin 7: GND

Ground pin of this IC.

Pin 8: PWMOUT

PWM signal output pin.

The PWM signal generated in IC is output.

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Datasheet

BD9478F

About Dimming Function

Burst Frequency Free Run Function

Because PLL is incorporated, Free Run operation is possible for burst frequency.

PLL circuit will operate like it synchronizes with the frequency of signal input to VSYNC pin.

Then, the voltage that is in proportion to the frequency will be generated in LPF pin.

When LPF pin voltage becomes 0.35V or lower, it will judge the external burst frequency is abnormal and clumps with the

frequency of fPLLmin. Then, PLL frequency is changed to Free Run frequency. (note1)

When the burst frequency becomes normal and LPF pin becomes over 0.9V, it will return to the state that synchronizes

with the burst frequency.(note2)

In the same way, when LPF pin becomes 2.75V or more, it will clump with the frequency of fPLLmax.

When the burst frequency becomes normal and LPF2 pin becomes 2.65V or lower, it will return to the state that

synchronizes with the burst frequency.

When LPF pin becomes 0.15V or lower, it will judge the external burst frequency is not inputted and switches to the

frequency of fPLLtyp.(Free Run mode)

Figure 13.

Note1

Note2

If fVSYNC is less than fPLLmin, the input of VCO is fixed to 0.36V inside IC, and PWM frequency is fixed

to fPLLmin. However, since it is fVSYNC<fPLLmin, a LPF terminal approaches 0V.

Then, it is set to LPF<0.15V, and it shifts to Free Run mode and PWM frequency is set to fPLLtyp.

In order to shift to PLL mode, it is necessary to input bigger frequency than Free Run frequency into VSYNC.

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Datasheet

BD9478F

Figure 14.

Free Run Operation Explanation

For example, if you set CT=0.01uF (At this time, fPLLtyp is adjusted to 150 Hz.) and f(VSYNC)=180Hz,

the LPF pin voltage becomes 1.2V.

The built-in VCO is proportional to the LPF pin voltage.

If VSYNC is inputted to low frequency and it becomes LPF<0.35V (at this time, f<58Hz),it will clump at fPLLmin=58Hz.

However, since it is fVSYNC<fPLLmin, a LPF terminal approaches 0V.

Then, it is set to LPF<0.15V, and it shifts to Free Run mode and PWM frequency is set to fPLLtyp.

(at this time, f=150Hz).If fSYNC is larger than fPLLtyp, PWM frequency will return to the frequency that

synchronizes with f(VSYNC).

If VSYNC is inputted high frequency and it becomes LPF>2.75V (at this time, f>343Hz),it will clump at fPLLmax=343Hz.

When synchronous signal is not inputted to VSYNC terminal, LPF voltage decreases and then it becomes

LPF<0.15V (at this time, f<19Hz), it oscillates typical frequency (at this time, f=150Hz).

Note: Please set f(VSYNC) frequency to satisfy the following equations when you start up PLL mode.

And then, please change f(VSYNC) frequency.

f(VSYNC) > fPLLtyp , fPLLtyp = 1.5/(CT[uF]) [Hz]

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Datasheet

BD9478F

Dimming Signal Automatic Selection Function

In this IC, even if either PWM dimming signal or DC dimming signal is inputted into the DUTY pin, it is automatically

distinguished as DC or PWM in the IC.

By detecting 4 cycles of the PWM signal within the 8 cycles of the burst frequency in the IC, it will switch automatically

to PWM dimming.

Therefore, set the burst frequency in the IC as follows:

(Burst Frequency in the IC(same fSYNC))

2 X (Externally inputted PWM signal (fEXTPWM))

Also, if you do not detect 4 cycles of the PWM signal within the 8 cycles of the burst frequency after switching to PWM

dimming, it will automatically switch to DC dimming.

When (Burst Frequency in the IC)

2 X (Externally inputted PWM signal)

Burst frequency in the IC

Burst FF output in the IC

Burst frequency 8 cycles

Externally inputted PWM signal

Output dimming signal

PWM signal 4 cycles

Output comparator of

PWM dimming output

triangle wave and PWM signal

Figure 15.

When (Burst Frequency in the IC )

2 X (Externally inputted PWM signal)

Burst frequency in the IC

Burst FF output in the IC

Burst frequency 8 cycles

PWM signal 4 cycles

External PWM signal

Burst dimming signal

Output comparator of

triangle wave and PWM signal

Figure 16.

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Datasheet

BD9478F

Operational Notes

1.) Although the quality of this product has been tightly controlled, deterioration or even destruction may occur if the absolute maximum

ratings, such as for applied pressure and operational temperature range, are exceeded. Furthermore, we are unable to assume short

or open mode destruction conditions. If special modes which exceed the absolute maximum ratings are expected, physical safely

precautions such as fuses should be considered.

2.) The IC can destruct from reverse connection of the power supply connector. Precautions, such as inserting a diode between t

he external power supply and IC power terminal, should be taken as protection against reverse connection destruction.

3.) When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC. If the IC is att

ached incorrectly, it may be destroyed.

Destruction can also occur when there is a short, which can be caused by foreign objects entering between outputs or an output and the

power GND.

4.) Because there is a return of current regenerated by back EMF of the external coil, the capacity value should be determined af

ter confirming that there are no problems with characteristics such as capacity loss at low temperatures with electrolysis conde

nsers, for example by placing a condenser between the power supply and GND as a route for the regenerated current.

5.) The potential of the GND pin should be at the minimum potential during all operation status

6.) Heat design should consider power dissipation (Pd) during actual use and margins should be set with plenty of room.

7.) Exercise caution when operating in strong magnet fields, as errors can occur.

8.) When using this IC, it should be configured so that the output Tr should not exceed absolute maximum ratings and ASO. Wit

h CMOS ICs and ICs which have multiple power sources, there is a chance of rush current flowing momentarily, so exercise c

aution with power supply coupling capacity, power supply and width of GND pattern wiring and its layout.

9.) This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut

off the IC from thermal runaway, and has not been designed to protect or guarantee the IC. Therefore, the user should not

plan to activate this circuit with continued operation in mind.

10.) If a condenser is connected to a pin with low impedance when inspecting the set substrate, stress may be placed on the IC,

so there should be a discharge after each process. Furthermore, when connecting a jig for the inspection process, the power

must first be turned OFF before connection and inspection, and turned OFF again before removal.

11.) This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation.

There is a P-N junction formed between this P-layer and each element’s N-layer, which makes up various parasitic elements.

For example, when resistance and transistor are connected with a terminal as in figure 15:

When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic

diode.

Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements close to the

aforementioned parasitic diode.

With the IC’s configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The operation

of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore, uses which

cause the parasitic elements to operate, such as applying voltage to the input terminal which is lower than the GND (P-substrate), should

be avoided.

Transistor (NPN)

B

Resistor

(Pin A)

E

C

(Pin B)

GND

N

P

N

P substrate

GND

Parasitic element

GND

Parasitic element

(Pin B)

C

E

(Pin A)

B

Parasitic element

Adjacent other elements

GND

Figure 17. Example of Simple Structure of Monolithic IC

Parasitic

Status of this document

The Japanese version of this document is formal specification. A customer may use this translation version only for a reference

to help reading the formal version.

If there are any differences in translation version of this document formal version takes priority

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Datasheet

BD9478F

Ordering Information

B D 9 4 7 8 F

-

XX

Part Number

Package

F:SOP

Packaging and forming specification

XX: Please confirm the formal name

to our sales.

Physical Dimension Tape and Reel Information

SOP8

5.0 0.2

(MAX 5.35 include BURR)

Tape

Embossed carrier tape

2500pcs

+

6

°

4

°

−4

Quantity

8

7

6

5

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1

2

3

4

0.595

+0.1

-0.05

0.17

S

0.1

S

1.27

Direction of feed

1pin

0.42 0.1

Reel

Order quantity needs to be multiple of the minimum quantity.

(Unit : mm)

∗

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●Other Precaution

1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

5) The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - Rev.003


型号：	BD9478F-XX
厂家：	ROHM
描述：	PWM pulse Generator for LCD Panels PWM脉冲发生器，用于LCD面板脉冲脉冲发生器 CD
文件：	总15页 (文件大小：725K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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