BR24G01FVJ-3_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

I²C BUS EEPROM (2-Wire)

BR24G01-3

General Description

BR24G01-3 is a serial EEPROM of I²C BUS Interface Method

Features

Packages W(Typ) x D(Typ) x H(Max)

Completely conforming to the world standard I²C

BUS.

All controls available by 2 ports of serial clock

(SCL) and serial data (SDA)

Other devices than EEPROM can be connected to

the same port, saving microcontroller port

1.6V to 5.5V Single Power Source Operation most

suitable for battery use

DIP-T8

9.30mm x 6.50mm x 7.10mm

TSSOP-B8

3.00mm x 6.40mm x 1.20mm

1.6V to 5.5V wide limit of operating voltage, possible

FAST MODE 400kHz operation

Page Write Mode useful for initial value write at

factory shipment

Self-timed Programming Cycle

Low Current Consumption

SOP8

TSSOP-B8J

3.00mm x 4.90mm x 1.10mm

5.00mm x 6.20mm x 1.71mm

Prevention of Write Mistake

¾

Write (Write Protect) Function added

Prevention of Write Mistake At Low Voltage

More than 1 million write cycles

More than 40 years data retention

Noise filter built in SCL / SDA terminal

Initial delivery state FFh

SOP- J8

4.90mm x 6.00mm x 1.65mm

MSOP8

2.90mm x 4.00mm x 0.90mm

SSOP-B8

3.00mm x 6.40mm x 1.35mm

VSON008X2030

2.00mm x 3.00mm x 0.60mm

Figure 1.

BR24G01-3

Power Supply

Voltage

VSON008

X2030

Capacity Bit Format

1kbit 128×8

Type

DIP-T8

SOP8

SOP-J8 SSOP-B8 TSSOP-B8 TSSOP-B8J MSOP8

BR24G01-3 1.6V to 5.5V

●

○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays

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Datasheet

BR24G01-3

Absolute Maximum Ratings (Ta=25℃)

Parameter

Symbol

V_CC

Rating

Unit

V

Remark

Supply Voltage

-0.3 to +6.5

450 (SOP8)

Derate by 4.5mW/°C when operating above Ta=25°C

Derate by 3.0mW/°C when operating above Ta=25°C

Derate by 3.3mW/°C when operating above Ta=25°C

Derate by 3.1mW/°C when operating above Ta=25°C

Derate by 3.0mW/°C when operating above Ta=25°C

Derate by 8.0mW/°C when operating above Ta=25°C

450 (SOP-J8)

300 (SSOP-B8)

330 (TSSOP-B8)

310 (TSSOP-B8J)

310 (MSOP8)

300 (VSON008X2030)

800 (DIP-T8)

Power Dissipation

Pd

mW

Storage Temperature

Tstg

Topr

-65 to +150

℃

Operating Temperature

-40 to +85

The Max value of Input Voltage/Output Voltage is not over 6.5V.

When the pulse width is 50ns or less, the Min value of Input

Voltage/Output Voltage is not lower than -0.8V.

Input Voltage /

Output Voltage

‐

-0.3 to Vcc+1.0

150

V

Junction

Temperature

Tjmax

℃

Junction temperature at the storage condition

Memory Cell Characteristics (Ta=25℃, Vcc=1.6V to 5.5V)

Limit

Typ

Parameter

Unit

Min

1,000,000

40

Max

-

Write Cycles ⁽¹⁾

-

Times

Years

Data Retention ⁽¹⁾

(1) Not 100% TESTED

Recommended Operating Ratings

Parameter

Power Source Voltage

Input Voltage

Symbol

V_CC

V_IN

Rating

1.6 to 5.5

0 to Vcc

Unit

V

DC Characteristics

(Unless otherwise specified, Ta=-40

℃

to +85℃,

Vcc=1.6V to 5.5V

)

Limit

Parameter

Symbol

Unit

Conditions

Min

0.7V_CC

-0.3 ⁽²⁾

0.8V_cc

-0.3 ⁽²⁾

-

Typ

Max

Input High Voltage1

Input Low Voltage1

Input High Voltage2

Input Low Voltage2

Output Low Voltage1

Output Low Voltage2

V_IH1

V_IL1

V_IH2

V_IL2

V_OL1

V_OL2

I_LI

-

V_cc+1.0

+0.3V_cc

V_cc+1.0

+0.2V_cc

0.4

V

1.7V≦V_cc≦5.5V

1.6V≦V_cc＜1.7V

V

I_OL=3.0mA, 2.5V≦V_cc≦5.5V (SDA)

I_OL=0.7mA, 1.6V≦V_cc＜2.5V (SDA)

V_IN=0 to V_cc

-

0.2

V

Input Leakage Current

Output Leakage Current

-1

+1

µA

I_LO

-1

+1

V_OUT=0 to V_cc(SDA)

V_cc=5.5V, f_SCL=400kHz, t_WR=5ms,

Byte write, Page write

V_cc=5.5V, f_SCL=400kHz

Random read, current read, sequential read

V_cc=5.5V, SDA・SCL=V_cc

Supply Current (Write)

Supply Current (Read)

Standby Current

I_CC1

I_CC2

I_SB

-

2.0

0.5

2.0

mA

µA

A0,A1,A2=GND,WP=GND

(2) When the pulse width is 50ns or less, it is -0.8V.

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Datasheet

BR24G01-3

AC Characteristics (Unless otherwise specified, Ta=-40℃ to +85℃, Vcc=1.6V to 5.5V)

Limit

Parameter

Symbol

Unit

Min

-

Typ

Max

Clock Frequency

f_SCL

t_HIGH

t_LOW

t_R

-

400

kHz

µs

ns

µs

ms

µs

Data Clock High Period

Data Clock Low Period

SDA, SCL (INPUT) Rise Time ⁽¹⁾

SDA, SCL (INPUT) Fall Time ⁽¹⁾

SDA (OUTPUT) Fall Time ⁽¹⁾

Start Condition Hold Time

Start Condition Setup Time

Input Data Hold Time

0.6

1.2

-

1.0

t_F1

-

1.0

t_F2

-

0.3

t_HD:STA

t_SU:STA

t_HD:DAT

t_SU:DAT

t_PD

0.6

0

-

Input Data Setup Time

Output Data Delay Time

Output Data Hold Time

Stop Condition Setup Time

Bus Free Time

100

0.1

0.6

1.2

-

0.9

t_DH

-

t_SU:STO

t_BUF

-

Write Cycle Time

t_WR

5

0.1

-

Noise Spike Width (SDA and SCL)

WP Hold Time

t_I

-

t_HD:WP

t_SU:WP

t_HIGH:WP

1.0

0.1

1.0

WP Setup Time

-

WP High Period

-

(1) Not 100% TESTED.

Condition Input data level: V_IL=0.2×V_ccV_IH=0.8×V_cc

Input data timing reference level: 0.3×V_cc/0.7×V_cc

Output data timing reference level: 0.3×V_cc/0.7×V_cc

Rise/Fall time : ≦20ns

Serial Input / Output Timing

tR

tF1

tHIGH

70%

30%

70%

SCL

70% 70%

30%

70%

30%

tLOW

tHD:STA

tHD:DAT

tSU:DAT

DATA(n)

DATA(1)

D0 ACK

70%

30%

ACK

D1

30%

SDA

(入力)

(INPUT)

tWR

tDH

tPD

tBUF

70%

30%

70%

30%

SDA

(出力)

(OUTPUT)

30%

tF2

tSU:WP

tHD:WP

STOP CONDITION

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

Figure 2-(a). Serial Input / Output Timing

Figure 2-(d). WP Timing at Write Execution

DATA(n)

DATA(1)

70%

D1

ACK

D0

tSU:STA

tHD:STA

tSU:STO

tWR

tHIGH:WP

70%

30%

STOP CONDITION

START CONDITION

Figure 2-(b). Start-Stop Bit Timing

Figure 2-(e). WP Timing at Write Cancel

70%

ACK

D0

write data

(n-th address)

tWR

STOP CONDITION START CONDITION

Figure 2-(c). Write Cycle Timing

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Datasheet

BR24G01-3

Block Diagram

A0

1

8

VCC

1kbit EEPROM Array

8bit

Word

Register

Address

Decoder

Data

7bit

WP

A1

A2

2

3

4

7

6

5

Register

START

STOP

SCL

SDA

Control Circuit

ACK

High Voltage

Generating Circuit

Power Source

GND

Voltage Detection

Figure 3. Block Diagram

Pin Configuration

(TOP VIEW)

VCC

8

7

1

2

A0

WP

A1

A2

BR24G01-3

3

4

6

5

SCL

SDA

GND

Pin Descriptions

Terminal Input/

Descriptions

Name

Output

Input

-

Slave address setting

A0

A1

A2

Reference voltage of all input / output, 0V

Serial data input serial data output

GND

Input/

output

SDA

Serial clock input

SCL

WP

Input

-

Write protect terminal

Connect the power source.

VCC

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Datasheet

BR24G01-3

Typical Performance Curves

6

5

4

3

2

1

0

Ta=-40

Ta= 25

Ta= 85

℃

Ta= 25

℃

5

Ta= 85

℃

4

3

SPEC

2

1

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage: Vcc(V)

Figure 4. Input High Voltage1,2 vs Supply Voltage

(A0, A1, A2, SCL, SDA, WP)

Figure 5. Input Low Voltage1,2 vs Supply Voltage

(A0, A1, A2, SCL, SDA, WP)

1

Ta=-40

Ta= 25

Ta= 85

℃

Ta=-40

℃

Ta= 25

Ta= 85

℃

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Output Low Current : I_OL(mA)

Figure 6. Output Low Voltage1 vs Output Low Current

(V_CC=2.5V)

Figure 7. Output Low Voltage2 vs Output Low Current

(V_CC=1.6V)

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Datasheet

BR24G01-3

Typical Performance Curves‐continued

1.2

1

1.2

SPEC

1

Ta=-40

℃

Ta=-40

℃

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

Ta= 25

Ta= 85

℃

Ta= 25

Ta= 85

℃

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

SupplyVoltage: Vcc(V)

Figure 9. Output Leakage Current vs Supply Voltage

(SDA)

Figure 8. Input Leakage Current vs Supply Voltage

(A0, A1, A2, SCL, WP)

3

2.5

2

0.6

SPEC

0.5

SPEC

Ta=-40℃

0.4

Ta= 25℃

Ta= 85℃

1.5

1

0.3

Ta=-40

℃

Ta= 25

Ta= 85

℃

0.2

0.1

0

℃

0.5

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

Figure 10. Supply Current (Write) vs Supply Voltage

(f_SCL=400kHz)

Figure 11. Supply Current (Read) vs Supply Voltage

(f_SCL=400kHz)

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BR24G01-3

Typical Performance Curves‐continued

10000

1000

100

10

2.5

SPEC

2

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

1.5

Ta=-40℃

Ta= 25℃

Ta= 85℃

1

0.5

0

1

0.1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

SupplyVoltage: Vcc(V)

Figure 13. Clock Frequency vs Supply Voltage

Figure 12. Standby Current vs Supply Voltage

1.5

1.2

0.9

0.6

0.3

0

1

0.8

0.6

0.4

0.2

0

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

SupplyVoltage: Vcc(V)

Figure 14. Data Clock High Period vs Supply Voltage

Figure 15. Data Clock Low Period vs Supply Voltage

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BR24G01-3

Typical Performance Curves‐continued

1

0.8

0.6

0.4

0.2

0

0.8

SPEC

0.6

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.4

0.2

0

-0.2

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

Figure 17. Start Condition Setup Time vs Supply Voltage

Figure 16. Start Condition Hold Time vs Supply Voltage

50

SPEC

0

-50

Ta=-40℃

Ta= 25℃

Ta= 85℃

-100

Ta=-40℃

Ta= 25℃

Ta= 85℃

-150

-200

-150

-200

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

Figure 18. Input Data Hold Time vs Supply Voltage

(HIGH)

Figure 19. Input Data Hold Time vs Supply Voltage

(LOW)

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Typical Performance Curves‐continued

300

200

100

0

300

200

SPEC

100

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

-100

-200

-100

-200

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage: Vcc(V)

Supply Voltage: Vcc(V)

Figure 20. Input Data Setup Time vs Supply Voltage

(HIGH)

Figure 21. Input Data Setup Time vs Supply Voltage

(LOW)

2

Ta=-40℃

Ta= 25℃

Ta= 85℃

1.5

Ta=-40℃

Ta= 25℃

Ta= 85℃

SPEC

1

0.5

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

SupplyVoltage: Vcc(V)

Figure 22. Output Data Delay Time vs Supply Voltage

(LOW)

Figure 23. Output Data Delay Time vs Supply Voltage

(HIGH)

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BR24G01-3

Typical Performance Curves‐continued

2

1.5

1

Ta=-40℃

Ta= 25℃

Ta= 85℃

1.5

SPEC

1

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.5

0

-0.5

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

SupplyVoltage: Vcc(V)

Figure 24. Stop Condition Setup Time vs Supply Voltage

Figure 25. Bus Free Time vs Supply Voltage

6

0.6

0.5

0.4

0.3

0.2

0.1

0

SPEC

5

Ta=-40℃

Ta= 25℃

Ta= 85℃

4

3

2

Ta=-40

℃

Ta= 25

Ta= 85

℃

1

0

℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

Figure 27. Noise Spike Width vs Supply Voltage

(SCL HIGH)

Figure 26. Write Cycle Time vs Supply Voltage

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Datasheet

BR24G01-3

Typical Performance Curves‐continued

0.6

0.5

0.4

0.3

0.2

0.1

0

0.6

0.5

Ta=-40℃

Ta= 25℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.4

Ta= 85℃

0.3

0.2

0.1

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(V)

Figure 29. Noise Spike Width vs Supply Voltage

(SDA HIGH)

Figure 28. Noise Spike Width vs Supply Voltage

(SCL LOW)

1.2

1

0.6

SPEC

0.5

0.4

0.3

0.2

0.1

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.8

0.6

0.4

0.2

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage: Vcc(v)

Supply Voltage: Vcc(V)

Figure 31. WP Hold Time vs Supply Voltage

Figure 30. Noise Spike Width vs Supply Voltage

(SDA LOW)

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Datasheet

BR24G01-3

Typical Performance Curves‐continued

1.2

1

0.2

SPEC

0.1

0

Ta=-40℃

0.8

0.6

0.4

0.2

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta= 25℃

-0.1

Ta= 85℃

-0.2

-0.3

-0.4

-0.5

-0.6

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage: Vcc(v)

Supply Voltage: Vcc(v)

Figure 33. WP High Period vs Supply Voltage

Figure 32. WP Setup Time vs Supply Voltage

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Datasheet

BR24G01-3

Timing Chart

1. I²C BUS Data Communication

I²C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,

and acknowledge is always required after each byte. I²C BUS data communication with several devices is possible by

connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).

Among the devices, there should be a “master” that generates clock and control communication start and end. The

rest become “slave” which are controlled by an address peculiar to each device, like this EEPROM. The device that

outputs data to the bus during data communication is called “transmitter”, and the device that receives data is called

“receiver”.

SDA

1-7

8

9

8

9

8

9

SCL

S

P

START ADDRESS R/W

condition

ACK

DATA

ACK

DATA

ACK

STOP

condition

Figure 34. Data Transfer Timing

2. Start Condition (Start Bit Recognition)

(1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when

SCL is 'HIGH' is necessary.

(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this

condition is satisfied, any command cannot be executed.

3. Stop Condition (Stop Bit Recognition)

(1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is

'HIGH'.

4. Acknowledge (ACK) Signal

(1) The acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not.

In a master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command,

to this IC ) at the transmitter (sending) side releases the bus after output of 8bit data.

(2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the

receiver (receiving) side sets SDA 'LOW' during the 9th clock cycle, and outputs acknowledge signal (ACK

signal) showing that it has received the 8bit data.

(3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal)

'LOW'.

(4) After receiving 8bit data (word address and write data) during each write operation, this IC outputs acknowledge

signal (ACK signal) 'LOW'.

(5) During read operation, this IC outputs 8bit data (read data) and detects acknowledge signal (ACK signal) 'LOW'.

When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM)

side, this IC continues to output data. When acknowledge signal (ACK signal) is not detected, this IC stops data

transfer, recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for another

transmission.

5. Device Addressing

(1) Slave address comes after start condition from master.

(2) The significant 4 bits of slave address are used for recognizing a device type.

The device code of this IC is fixed to '1010'.

(3) Next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and plural ones can be used on a

same bus according to the number of device addresses.

(4) The most insignificant bit (R / W --- READ/ WRITE ) of slave address is used for designating write or read

operation, and is as shown below.

Setting R/ W to 0 ------- write (setting 0 to word address setting of random read)

Setting R/ W to 1 ------- read

Maximum number of

Slave address

Connected buses

1

0

1

0

A2 A1 A0 R/^―W^―

8

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Datasheet

BR24G01-3

Write Command

1. Write Cycle

(1) Arbitrary data can be written to this EEPROM. When writing only 1 byte, Byte Write is normally used, and when

writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. The maximum

number of bytes is specified per device of each capacity. Up to 8 arbitrary bytes can be written.

S

T

A

R

T

W

R

I

T

E

S

T

O

P

SLAVE

ADDRESS

WORD

ADDRESS

DATA

* Don't Care bit

SDA

LINE

WA

6

WA

0

1

0

1

0 A2A1A0

D7

D0

*

A

C

K

A

C

K

R

/

W

A

C

K

Figure 35. Byte Write cycle

S

T

A

R

T

W

R

I

T

E

S

T

O

P

SLAVE

ADDRESS

WORD

ADDRESS(n)

DATA(n)

DATA(n+7)

SDA

LINE

WA

0

WA

6

* Don't Care bit

1

0

1

A2A1A0

D7

D0

0

*

A

C

K

R

/

W

A

C

K

A

C

K

A

C

K

Figure 36. Page Write cycle

(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.

(3) Data is written to the address designated by word address (n-th address)

(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.

(5) When internal write is started, command is not accepted for t_WR(5ms at maximum).

(6) Using page write cycle, writing in bulk is done as follows: When data of more than 8 bytes is sent, the byte in

excess overwrites the data already sent first.

(Refer to "Internal Address Increment".)

(7) As for page write cycle of BR24G01-3 where 2 or more bytes of data is intended to be written, after the 4

significant bits of word address are designated arbitrarily, only the value of 3 least significant bits in the address

is incremented internally, so that data up to 8 bytes of memory only can be written.

In the case BR24G01-3, 1 page=8bytes, but the page write cycle time is 5ms at maximum for 8byte bulk write. It does

not stand 5ms at maximum×8byte=40ms (max).

2. Internal Address Increment

Page write mode (in the case of BR24G01-3)

WA7

0

WA4 WA3 WA2 WA1 WA0

0

1

0

1

0

Increment

0

For example, when it is started from address 06h,

then, increment is made as below,

06h→07h→00h→01h･･･ please take note.

0

1

0

1

0

1

0

06h

※06h･･･6E in hexadecimal, therefore,

00000110 becomes a binary number.

Significant bit is fixed.

No digit up

3. Write Protect (WP) Terminal

Write Protect (WP) Function

When WP terminal is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set at GND (L level),

data rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L

level. Do not leave it open.

In case of using it as ROM, it is recommended to connect it to pull up or Vcc.

At extremely low voltage at power ON / OFF, by setting the WP terminal 'H', write error can be prevented.

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BR24G01-3

Read Command

1. Read Cycle

Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random

read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a

command to read data of internal address register without designating an address, and is used when to verify just after

write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in

succession.

W

R

I

T

E

S

T

A

R

T

S

T

A

R

T

R

E

A

D

S

T

O

P

SLAVE

ADDRESS

SLAVE

ADDRESS

WORD

ADDRESS(n)

DATA(n)

* Don’t Care bit

SDA

LINE

WA

6

WA

0

1 0 1 0 A2A1A0

1

0 1 0 A2A1A0

D7

D0

*

A

C

K

R A

/ C

W K

A

C

K

R A

/ C

W K

Figure 37. Random Read Cycle

S

T

A

R

T

R

E

A

D

S

T

O

P

SLAVE

ADDRESS

DATA(n)

SDA

LINE

1 0 1 0 A2A1A0

D7

D0

A

C

K

R A

/ C

W K

Figure 38. Current Read Cycle

S

T

A

R

T

R

E

A

D

S

T

O

P

SLAVE

ADDRESS

DATA(n)

DATA(n+x)

SDA

LINE

A2 A0

A1

1

0

1

0

D7

D0

D7

D0

R A

A

C

K

A

C

K

A

C

K

/

C

W K

Figure 39. Sequential Read Cycle (in the case of Current Read Cycle)

(1) In random read cycle, data of designated word address can be read.

(2) When the command just before current read cycle is random read cycle, current read cycle (each including

sequential read cycle), data of incremented last read address (n)-th , i.e., data of the (n+1)-th address is output.

(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next

address data can be read in succession.

(4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to

‘H’ while SCL signal is 'H' .

(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.

Therefore, read command cycle cannot be ended. To end the read command cycle, be sure to input 'H' to ACK

signal after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.

(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is

asserted from ‘L’ to ‘H’ while SCL signal is 'H'.

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BR24G01-3

Software Reset

Software reset is executed to avoid malfunction after power on and during command input. Software reset has several

kinds and 3 kinds of them are shown in the figure below. (Refer to Figure 40.-(a), Figure 40.-(b), and Figure 40.-(c).) Within

the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may

be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to

instantaneous power failure of system power source or influence upon devices.

Dummy clock×14

13

Start×2

SCL

SDA

Normal command

1

2

14

Figure 40-(a). The case of dummy clock×14 + START+START+ command input

Start

Dummy clock×9

Start

SCL

SDA

Normal command

1

2

8

9

Figure 40-(b). The case of START + dummy clock×9 + START + command input

Start×9

SCL

Normal command

1

2

3

7

8

9

SDA

SD

Figure 40-(c). START×9 + command input

※Start command from START input.

Acknowledge Polling

During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic

write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it

means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge

polling, next command can be executed without waiting for t_WR= 5ms.

To write continuously, R/ W = 0, then to carry out current read cycle after write, slave address with R/ W = 1 is sent. If

ACK signal sends back 'L', and then execute word address input and data output and so forth.

During internal write,

ACK = HIGH is sent back.

First write command

S

T

A

R

T

S

T

A

R

T

S

T

A

C

K

H

A

T

A

R

T

Slave

C

K

H

Write command

O

…

address

P

t_WR

Second write command

S

T

A

R

T

S

T

A

R

T

S

T

O

P

A

C

K

L

A

C

K

L

A

C

K

L

Slave

Word

Slave

C

…

Data

K

address

H

t_WR

After completion of internal write,

ACK=LOW is returned, so input next

word

address

and

data

in

succession.

Figure 41. Case of Continuous Write by Acknowledge Polling

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Datasheet

BR24G01-3

WP Valid Timing (Write Cancel)

WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid

timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte

write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of

data(in page write cycle, the first byte data) is the cancel invalid area.

WP input in this area becomes ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the

cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.

・Rise of SDA

・Rise of D0 taken clock

SCL

SDA

D1

D0 ACK

SDA D0

ACK

Enlarged view

S

A

C

K

L

A

C

K

L

A

C

K

L

S

T

O

P

t_WR

T

A

R

T

Slave

Word

SDA

WP

D7 D6 D5

D2 D1 D0

D4 D3

C

K

L

Data

address

WP Cancel Invalid Area

WP Cancel Valid Area

Data is not written.

WP cancel invalid area

Figure 42. WP Valid Timing

Command Cancel by Start Condition and Stop Condition

During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure

43.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop

condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by

start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not

determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession,

carry out random read cycle.

SCL

SDA

1

0

1

0

Start condition

Stop condition

Figure 43. Case of cancel by start, stop condition during slave address input

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BR24G01-3

I/O Peripheral Circuit

1. Pull-Up Resistance of SDA Terminal

SDA is NMOS open drain, so it requires a pull up resistor. As for this resistance value (R_PU), select an appropriate value

from microcontroller V_IL, I_L, and V_OL-I_OLcharacteristics of this IC. If R_PUis large, operating frequency is limited. The

smaller the R_PU, the larger is the supply current (Read).

2. Maximum Value of R_PU

The maximum value of R_PUis determined by the following factors:

(1)SDA rise time to be determined by the capacitance (C_BUS) of bus line and R_PUof SDA should be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(2)The bus’ electric potential

A to be determined by the input current leak total (I_L) of the device connected to the bus

○

with output of 'H' to the SDA line and R_PUshould sufficiently secure the input 'H' level (V_IH) of microcontroller and

EEPROM including recommended noise margin of 0.2Vcc.

V_CC-I_LR_PU-0.2 V_CC≧ V_IH

0.8V_cc－V_IH

Microcontroller

BR24GXX

∴

R_PU≦

IL

RPU

Ex.) V_cc=3V IL=10µA V_IH=0.7 V_cc

From(2)

SDA terminal

A

0.8×3－0.7×3

R_PU≦

10×10^-6

IL

Bus line

Capacity

C_BUS

≦ 30 [kΩ]

Figure 44. I/O Circuit Diagram

3. Minimum Value of R_PU

The minimum value of R_PUis determined by the following factors.

(1) When IC outputs LOW, it should be satisfied that V_OLMAX=0.4V and I_OLMAX=3mA.

V_cc-V_OL

R_PU

≦I_OL

V_cc－V_OL

∴

R_PU≧

I_OL

(2) V_OLMAX=0.4V should secure the input 'L' level (V_IL) of microcontroller and EEPROM including recommended noise

margin 0.1V_cc.

V_OLMAX≦ V_IL-0.1 Vcc

Ex.) V_CC=3V, V_OL=0.4V, I_OL=3mA, microcontroller, EEPROM V_IL=0.3Vcc

from (1)

3－0.4

3×10^－

R_PU≧

3

≧

867[Ω]

And

V_OL=0.4［V］

V_IL=0.3×3

=0.9［V］

Therefore, the condition (2) is satisfied.

4. Pull-Up Resistance of SCL Terminal

When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time

where SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several kΩ to several ten kΩ is

recommended in consideration of drive performance of output port of microcontroller.

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BR24G01-3

Cautions on Microcontroller Connection

1. R_S

In I²C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output of

tri state to SDA port, insert a series resistance R_Sbetween the pull up resistor R_PUand the SDA terminal of EEPROM.

This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON

simultaneously. R_Salso plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is

open drain input/output, R_Scan be used.

ACK

SCL

RPU

RS

SDA

'H' output of microcontroller

'L' output of EEPROM

EEPROM

Microcontroller

Over current flows to SDA line by 'H'

output of microcontroller and 'L'

output of EEPROM.

Figure 45. I/O Circuit Diagram

Figure 46. Input / Output Collision Timing

2. Maximum Value of R_s

The maximum value of R_Sis determined by the following relations:

(1)SDA rise time to be determined by the capacitance (C_BUS) of bus line and R_PUof SDA should be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(2)The bus’ electric potential

should sufficiently secure the input 'L' level (V_IL) of microcontroller including recommended noise margin of 0.1Vcc.

A to be determined by R_PUand R_Sthe moment when EEPROM outputs 'L' to SDA bus

○

(V_cc－V_OL)×R_S

+V_OL+0.1V_cc≦V_IL

VCC

R_PU+R_S

A

RPU

RS

V_IL－V_OL－0.1V_cc

1.1V_cc－V_IL

×R_PU

∴

R_S≦

VOL

IOL

Ex) VCC=3V VIL=0.3VCC VOL=0.4V R_PU=20 kΩ

Bus line

capacity

C_BUS

0.3×3－0.4－0.1×3

×20×10³

R_S≦

1.1×3－0.3×3

VIL

EEPROM

Micro controller

≦1.67 [kΩ]

Figure 47. I/O Circuit Diagram

3. Minimum Value of R_s

The minimum value of R_sis determined by over current at bus collision. When over current flows, noises in power source

line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the

following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source

line in set and so forth. Set the over current to EEPROM at 10mA or lower.

V_cc

R_S

≦I

R_PU

R_S

V_cc

I

∴

R_S≧

'L'output

EX) V_CC=3V I=10mA

3

Over current I

R_S≧

3

10×10^－

'H' output

≧300 [Ω]

EEPROM

Microcontroller

Figure 48. I/O Circuit Diagram

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BR24G01-3

I/O Equivalence Circuit

1. Input (A0, A1, A2, SCL, WP)

Figure 49. Input Pin Circuit Diagram

2. Input / Output (SDA)

Figure 50. Input / Output Pin Circuit Diagram

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BR24G01-3

Power-Up/Down Conditions

At power on, the IC’s internal circuits may go through unstable low voltage area as the Vcc rises, making the IC’s internal

logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and

LVCC circuit. To assure the operation, observe the following conditions at power on.

1. Set SDA = 'H' and SCL ='L' or 'H’

2. Start power source so as to satisfy the recommended conditions of t_R, t_OFF, and V_botfor operating POR circuit.

t_R

Recommended conditions of t_R, t_OFF,V_bot

VCC

t_R

t_OFF

V_bot

10ms or below

100ms or below

10ms or larger

0.3V or below

0.2V or below

t_OFF

V_bot

0

Figure 51. Rise Waveform Diagram

3. Set SDA and SCL so as not to become 'Hi-Z'.

When the above conditions 1 and 2 cannot be observed, take the following countermeasures.

(1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power on

.

→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.

V^CC

t_LOW

SCL

SDA

After Vcc becomes stable

t_DH

t_SU:DAT

Figure 53. When SCL='L' and SDA='L'

Figure 52. When SCL= 'H' and SDA= 'L'

(2) In the case when the above condition 2 cannot be observed.

→After power source becomes stable, execute software reset (Page 16).

(3) In the case when the above conditions 1 and 2 cannot be observed.

→Carry out (1), and then carry out (2).

Low Voltage Malfunction Prevention Function

LVCC circuit prevents data rewrite operation at low power and prevents write error. At LVCC voltage (Typ =1.2V) or below,

data rewrite is prevented.

Noise Countermeasures

1. Bypass Capacitor

When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a

bypass capacitor (0.1µF) between the IC’s V_CCand GND pins. Connect the capacitor as close to the IC as possible. In

addition, it is also recommended to connect a bypass capacitor between the board’s V_CCand GND.

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BR24G01-3

Operational Notes

1. Described numeric values and data are design representative values only, and the values are not guaranteed.

2. We believe that the application circuit examples in this document are recommendable. However, in actual use, confirm

characteristics further sufficiently. If changing the fixed number of external parts is desired, make your decision with

sufficient margin in consideration of static characteristics, transient characteristics, and fluctuations of external parts

and our LSI.

3. Absolute maximum ratings

If the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, LSI

may be destroyed. Do not supply voltage or subject the IC to temperatures exceeding the absolute maximum ratings.

In the case of fear of exceeding the absolute maximum ratings, take physical safety countermeasures such as adding

fuses, and see to it that conditions exceeding the absolute maximum ratings should not be supplied to the LSI.

4. GND electric potential

Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower

than that of GND terminal.

5. Thermal design

Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in

actual operating conditions.

6. Short between pins and mounting errors

Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong

orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.

7. Operating the IC in the presence of strong electromagnetic field may cause malfunction, therefore, evaluate design

sufficiently.

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Datasheet

BR24G01-3

Part Numbering

B R

2 4

G

0 1

x x x -

3

x x

BUS Type

24 : I²C

Operating Temperature/

Power Source Voltage

-40℃ to+85℃/

1.6V to 5.5V

Capacity

01=1K

Package

Blank :DIP-T8

F

:SOP8

FJ

:SOP-J8

FV

: SSOP-B8

: TSSOP-B8

: TSSOP-B8J

: MSOP8

FVT

FVJ

FVM

NUX

: VSON008X2030

Process Code

Packaging and Forming Specification

E2

: EMBOSSED tape and reel

(SOP8,SOP-J8, SSOP-B8,TSSOP-B8, TSSOP-B8J)

: Embossed tape and reel

TR

(MSOP8, VSON008X2030)

None : Tube

(DIP-T8)

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BR24G01-3

Physical Dimensions Tape and Reel Information

DIP-T8

9.3± 0.3

8

1

5

4

7.62

0.3± 0.1

0°−15°

2.54

0.5± 0.1

(Unit : mm)

Container

Quantity

Tube

2000pcs

Direction of feed Direction of products is fixed in a container tube

Order quantity needs to be multiple of the minimum quantity.

∗

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Datasheet

BR24G01-3

SOP8

5.0± 0.2

(MAX 5.35 include BURR)

+

−

6

°

4°

4

°

8

7

6

5

1 2

3

4

0.595

+0.1

0.17

-

0.05

S

0.1 S

1.27

0.42± 0.1

(Unit : mm)

Tape

Embossed carrier tape

Quantity

2500pcs

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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BR24G01-3

SOP-J8

4.9± 0.2

(MAX 5.25 include BURR)

+

6°

4°

−4°

8

7

6

5

1

2

3

4

0.545

0.2± 0.1

S

1.27

0.42± 0.1

0.1

S

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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BR24G01-3

SSOP-B8

3.0± 0.2

(MAX 3.35 include BURR)

8

7

6

5

1

2

3

4

0.15± 0.1

S

0.1

S

+0.06

(0.52)

0.65

0.22

−0.04

M

0.08

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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BR24G01-3

TSSOP-B8

3.0± 0.1

(MAX 3.35 include BURR)

4 ± ±4

8

7

6

5

1

2

3

4

1PIN MARK

+0.05

0.145

−0.03

0.525

S

0.08 S

+0.05

0.245

M

−0.04

0.08

0.65

(Unit : mm)

Tape

Embossed carrier tape

Quantity

3000pcs

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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Datasheet

BR24G01-3

TSSOP-B8J

3.0± 0.1

(MAX 3.35 include BURR)

4 ± ±4

8

7

6

5

1

2

3

4

1PIN MARK

+0.05

0.525

0.145

−0.03

S

0.08 S

+0.05

0.32

−0.04

M

0.08

0.65

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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Datasheet

BR24G01-3

MSOP8

2.9± 0.1

(MAX 3.25 include BURR)

+

6°

4°

−4°

8 7 6 5

1

2 3 4

1PIN MARK

+0.05

−0.03

0.145

0.475

S

0.22

−0.04

0.08 S

0.65

(Unit : mm)

Tape

Embossed carrier tape

3000pcs

Quantity

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1pin

Direction of feed

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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Datasheet

BR24G01-3

VSON008X2030

2.0± 0.1

1PIN MARK

S

0.08 S

1.5± 0.1

0.5

C0.25

1

8

4

5

0.25

+0.05

−0.04

0.25

(Unit : mm)

Tape

Embossed carrier tape

4000pcs

Quantity

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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Datasheet

BR24G01-3

Marking Diagrams (TOP VIEW)

DIP-T8 (TOP VIEW)

SOP8 (TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

4 G 0 1

BR24G01

1PIN MARK

SOP-J8 (TOP VIEW)

SSOP-B8 (TOP VIEW)

Part Number Marking

LOT Number

4 G A

LOT Number

4 G 0 1

1PIN MARK

TSSOP-B8 (TOP VIEW)

TSSOP-B8J (TOP VIEW)

Part Number Marking

4 G 0

LOT Number

1

3

1PIN MARK

MSOP8 (TOP VIEW)

VSON008X2030 (TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

4 G A

4 G 0

LOT Number

1

3

1PIN MARK

www.rohm.com

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Datasheet

BR24G01-3

Revision History

Date

Revision

001

Changes

15.Jun.2012

New Release

Update some English words, sentences’ descriptions, grammar and formatting.

Add tF2 in AC Characteristic and Serial Input / Output Timing

25.Feb.2013

002

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Daattaasshheeeett

Notice

●General Precaution

1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.

ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any

ROHM’s Products against warning, caution or note contained in this document.

2) All information contained in this document is current as of the issuing date and subject to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales

representative.

●Precaution on using ROHM Products

1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

2) ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3) Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4) The Products are not subject to radiation-proof design.

5) Please verify and confirm characteristics of the final or mounted products in using the Products.

6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8) Confirm that operation temperature is within the specified range described in the product specification.

9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Notice - Rev.004

Daattaasshheeeett

●Precaution for Mounting / Circuit board design

1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

●Precautions Regarding Application Examples and External Circuits

1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2) You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

●Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

●Precaution for Storage / Transportation

1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4) Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

●Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

●Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

●Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

●Precaution Regarding Intellectual Property Rights

1) All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

2) No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the information contained in this document.

Notice - Rev.004

Daattaasshheeeett

●Other Precaution

1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

5) The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - Rev.004


型号：	BR24G01FVJ-3
厂家：	ROHM
描述：	Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire) 串行EEPROM系列标准EEPROM I2C总线的EEPROM （ 2线）可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总36页 (文件大小：526K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR24G01FVJ-3 [ROHM]

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