BR24G32FJ-3A_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

I²C BUS EEPROM (2-Wire)

BR24G32-3A

General Description

BR24G32-3A is a 32Kbit serial EEPROM of I²C BUS Interface Method

Features

Packages W(Typ) x D(Typ) x H(Max)

 All controls available by 2 ports of serial clock(SCL) and

serial data(SDA)

 Other devices than EEPROM can be connected to the

same port, saving microcontroller port

 1.6V to 5.5V Single Power Source Operation most

suitable for battery use

 1MHz action is possible(1.7V to 5.5V)

 Up to 32 Byte in Page Write Mode

 Bit format 4K x 8bit

Not Recommended for

New Designs

DIP-T8

9.30mm x 6.50mm x 7.10mm

TSSOP-B8

3.00mm x 6.40mm x 1.20mm

 Self-timed Programming Cycle

 Low Current Consumption

 Prevention of Write Mistake

SOP8

TSSOP-B8J

3.00mm x 4.90mm x 1.10mm



WP (Write Protect) Function added

Prevention of Write Mistake at Low Voltage

5.00mm x 6.20mm x 1.71mm

 1 million write cycles

 40 years data retention

 Noise filter built in SCL / SDA terminal

 Initial delivery state FFh

SOP-J8

4.90mm x 6.00mm x 1.65mm

MSOP8

2.90mm x 4.00mm x 0.90mm

SSOP-B8

3.00mm x 6.40mm x 1.35mm

VSON008X2030

2.00mm x 3.00mm x 0.60mm

Figure 1.

〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

V_CC

Rating

Unit

V

Remark

Supply Voltage

-0.3 to +6.5

0.45 (SOP8)

Derate by 4.5mW/°C when operating above Ta=25°C

Derate by 3.0mW/°C when operating above Ta=25°C

Derate by 3.3mW/°C when operating above Ta=25°C

Derate by 3.1mW/°C when operating above Ta=25°C

Derate by 3.0mW/°C when operating above Ta=25°C

Derate by 8.0mW/°C when operating above Ta=25°C

0.45 (SOP-J8)

0.30 (SSOP-B8)

0.33 (TSSOP-B8)

0.31 (TSSOP-B8J)

0.31 (MSOP8)

Permissible

Dissipation

Pd

W

0.30 (VSON008X2030)

0.80 (DIP-T8^(Note1)

)

Storage Temperature

Tstg

Topr

-65 to +150

°C

Operating Temperature

-40 to +85

The Max value of Input Voltage/Output Voltage is not over 6.5V.

When the pulse width is 50ns or less, the Min value of Input

Voltage/Output Voltage is -1.0V.

Input Voltage /

Output Voltage

-

-0.3 to V_CC+1.0

150

V

Junction

Temperature

Tjmax

°C

Junction temperature at the storage condition

Electrostatic discharge

voltage

V_ESD

-4000 to +4000

V

(human body model)

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the

absolute maximum ratings.

(Note1) Not Recommended for New Designs.

Memory Cell Characteristics (Ta=25°C, V_CC=1.6V to 5.5V)

Limit

Typ

-

Parameter

Unit

Min

1,000,000

40

Max

-

Write Cycles ^(Note2)

Times

Years

Data Retention ^(Note2)

(Note2) Not 100% TESTED

Recommended Operating Ratings

Parameter

Power Source Voltage

Input Voltage

Symbol

V_CC

V_IN

Rating

1.6 to 5.5

0 to V_CC

Unit

V

DC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, V_CC=1.6V to 5.5V)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

V_CC+1.0

+0.3V_CC

V_CC+1.0

+0.2V_CC

0.4

Input High Voltage 1

Input Low Voltage 1

Input High Voltage 2

Input Low Voltage 2

Output Low Voltage 1

Output Low Voltage 2

Input Leakage Current

Output Leakage Current

V_IH1

V_IL1

V_IH2

V_IL2

V_OL1

V_OL2

I_LI

0.7V_CC

-0.3 ^(Note3)

-

V

1.7V≤V_CC≤5.5V

0.8V_CC

-0.3 ^(Note3)

V

1.6V≤V_CC<1.7V

V

1.6V≤V_CC<1.7V

-

V

I_OL=3.0mA, 2.5V≤V_CC≤5.5V (SDA)

I_OL=0.7mA, 1.6V≤V_CC<2.5V (SDA)

V_IN=0 to V_CC

-

0.2

V

-1

+1

μA

I_LO

+1

V_OUT=0 to V_CC(SDA)

V_CC=5.5V,f_SCL=1MHz, t_WR=5ms,

Byte write, Page write

V_CC=5.5V,f_SCL=1MHz

Random read, current read,

sequential read

V_CC=5.5V, SDA, SCL=V_CC

A0, A1, A2=GND,WP=GND

Supply Current (Write)

Supply Current (Read)

Standby Current

I_CC1

I_CC2

I_SB

-

2.0

mA

μA

(Note3) When the pulse width is 50ns or less, it is -1.0V.

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AC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C)

Limits

(1.6V≤V_CC≤5.5V)

Limits

(1.7V≤V_CC≤5.5V)

Parameter

Symbol

Unit

Min

Typ

Max

Min

Typ

Max

Clock Frequency

f_SCL

t_HIGH

t_LOW

t_R

-

400

-

0.30

0.5

-

1000

kHz

µs

ns

Data Clock High Period

0.6

-

Data Clock Low Period

1.2

-

SDA, SCL (INPUT) Rise Time ^(Note1)

SDA, SCL (INPUT) Fall Time ^(Note1)

SDA (OUTPUT) Fall Time ^(Note1)

Start Condition Hold Time

Start Condition Setup Time

Input Data Hold Time

-

1

0.12

t_F1

-

1

-

0.12

t_F2

-

0.3

-

0.12

t_HD:STA

t_SU:STA

t_HD:DAT

t_SU:DAT

0.6

-

0.25

0.20

0

-

0.6

-

0

100

-

Input Data Setup Time

-

50

0.1^(Note2)

0.05^(Note3)

0.1^(Note2)

0.05^(Note3)

0.6

0.9

Output Data Delay Time

Output Data Hold Time

t_PD

0.05

-

0.45

-

µs

0.9

-

t_DH

-

Stop Condition Setup Time

Bus Free Time

t_SU:STO

t_BUF

-

0.25

0.5

-

µs

ms

µs

1.2

-

Write Cycle Time

t_WR

-

5

Noise Spike Width (SDA, SCL)

WP Hold Time

t_I

-

0.05

-

0.05

t_HD:WP

t_SU:WP

t_HIGH:WP

1.0

-

1.0

0.1

1.0

-

WP Setup Time

0.1

WP High Period

1.0

(Note1) Not 100% tested

(Note2) At 1.6V≤V_CC<1.7V

(Note3) At 1.7V≤V_CC≤5.5V

AC Characteristics Condition

Parameter

Symbol

Conditions

Unit

Load Capacitance

C_L

t_R

100

pF

ns

V

SDA, SCL (INPUT) Rise Time

SDA, SCL (INPUT) Fall Time

Input Data Level

20

t_F1

V_IL/V_IH

0.2V_CC/0.8V_CC

Input/Output Data Timing Reference Level

-

0.3V_CC/0.7V_CC

V

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Serial Input / Output Timing

t_R

t_HIGH

t_F1

70%

30%

70%

SCL

30%

t_HD:STA

t_HD:DAT

t_LOW

t_SU:DAT

70%

30%

SDA

30%

(input)

t_DH

t_PD

t_BUF

SDA

(output)

70%

30%

t_F2

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

Figure 2-(a). Serial Input / Output Timing

70%

SCL

SDA

70%

t_SU:STA

t_SU:STO

t_HD:STA

70%

30%

STOP condition

START condition

Figure 2-(b). Start-Stop Bit Timing

SCL

SDA

70%

D0

ACK

t_WR

write data

(n-th address)

START condition

STOP condition

Figure 2-(c). Write Cycle Timing

DATA(n)

70%

SCL

DATA(1)

70%

ACK

SDA

WP

t_WR

70%

30%

t_HD:WP

t_SU:WP

STOP condition

Figure 2-(d). WP Timing at Write Execution

SCL

SDA

DATA(n)

DATA(1)

70%

ACK

D1

D0

t_WR

t_HIGH:WP

70%

WP

Figure 2-(e). WP Timing at Write Cancel

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Block Diagram

A0

1

8

VCC

32Kbit EEPROM array

8bit

Address

Register

Address

Decoder

Word

Data

12bit

A1

A2

2

3

4

7

6

5

WP

Register

START

STOP

SCL

SDA

Control Circuit

ACK

High Voltage

Generating Circuit

Power Source

GND

Voltage Detection

Figure 3. Block Diagram

(TOP VIEW)

Pin Configuration

A0

A1

A2

VCC

8

1

WP

2

7

BR24G32-3A

SCL

3

6

1

GND

4

5

SDA

Pin Descriptions

Terminal

Name

Input/

Output

Descriptions

A0

A1

Input

-

Slave address setting^(Note1)

Reference voltage of all input / output, 0V

Serial data input serial data output

Serial clock input

A2

GND

SDA

SCL

WP

VCC

Input/

output

Input

-

Write protect terminal

Connect the power source.

(Note1) A0,A1 and A2 are not allowed to use as open.

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Typical Performance Curves

6

5

4

3

2

1

0

6

Ta=-40°C

Ta= 25°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

5

Ta= 85°C

4

3

SPEC

2

1

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage: Vcc(v)

Figure 4. Input High Voltage1,2 vs Supply Voltage

(A0, A1, A2, SCL, SDA, WP)

Figure 5. Input Low Voltage1,2 vs Supply Voltage

(A0, A1, A2, SCL, SDA, WP)

1

0.8

0.6

0.4

0.2

0

1

0.8

0.6

0.4

0.2

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Output Low Current : I_OL(mA)

Figure 7. Output Low Voltage2 vs Output Low Current

(V_CC=1.6V)

Figure 6. Output Low Voltage1 vs Output Low Current

(V_CC=2.5V)

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Typical Performance Curves - Continued

1.2

1

SPEC

1

Ta=-40℃

Ta= 25℃

0.8

0.6

0.4

0.2

0

Ta= 85℃

Ta=-40℃

Ta= 25℃

0.6

Ta= 85℃

0.4

0.2

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Input Voltage : V (V)

Output Voltage : V_OUT(V)

IN

Figure 8. Input Leakage Current vs Supply Voltage

(A0,A1,A2,SCL,WP)

Figure 9. Output Leakage Current vs Supply Voltage

(SDA)

3

2.5

2

2.5

Ta=-40℃

Ta= 25℃

SPEC

Ta= 85℃

2

1.5

1

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

1.5

1

0.5

0

0.5

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Supply Voltage : Vcc(V)

Figure 11. Supply Current (Read) vs Supply Voltage

(f_SCL=1MHz)

Figure 10. Supply Current (Write) vs Supply Voltage

(f_SCL=1MHz)

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Typical Performance Curves - Continued

2.5

10000

1000

100

10

SPEC

2

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

1.5

Ta=-40℃

Ta= 25℃

Ta= 85℃

1

0.5

0

1

0.1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Figure 12. Standby Current vs Supply Voltage

Figure 13. Clock Frequency vs Supply Voltage

0.6

0.4

0.3

0.2

0.1

0

SPEC

0.5

0.4

0.3

0.2

0.1

0

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : Vcc(V)

SupplyVoltage : Vcc(V)

Figure 15. Data Clock Low Period vs Supply Voltage

Figure 14. Data Clock High Period vs Supply Voltage

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Typical Performance Curves - Continued

0.14

0.3

0.25

0.2

SPEC

0.12

0.1

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.08

0.15

0.1

0.06

0.04

0.02

0

0.05

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : Vcc(V)

Figure 17. Start Condition Hold Time vs Supply Voltage

Figure 16. SDA (OUTPUT) Fall Time vs Supply Voltage

0.3

0.25

0.2

50

0

SPEC

0.15

0.1

Ta=-40℃

Ta= 25℃

Ta= 85℃

-50

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.05

0

-100

-150

-0.05

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SUPPLY VOLTAGE: Vcc(v)

Supply Voltage: Vcc(V)

Figure 19. Input Data Hold Time vs Supply Voltage

(HIGH)

Figure 18. Start Condition Setup Time vs Supply Voltage

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Typical Performance Curves - Continued

60

50

40

30

20

10

0

50

SPEC

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

-50

Ta=-40℃

Ta= 25℃

Ta= 85℃

-100

-150

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : Vcc(V)

Figure 20. Input Data Hold Time vs Supply Voltage

(LOW)

Figure 21. Input Data Setup Time vs Supply Voltage

(HIGH)

60

50

40

30

20

10

0

0.5

0.4

0.3

0.2

0.1

0

SPEC

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Figure 23. Output Data Delay Time vs Supply Voltage

(LOW)

Figure 22. Input Data Setup Time vs Supply Voltage

(LOW)

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Typical Performance Curves - Continued

0.5

0.3

0.25

0.2

SPEC

0.4

0.3

0.15

0.1

0.2

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.1

0.05

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Figure 25. Stop Condition Setup Time vs Supply Voltage

Figure 24. Output Data Delay Time vs Supply Voltage

(HIGH)

0.6

6

SPEC

0.5

0.4

0.3

0.2

0.1

0

5

4

3

Ta=-40℃

Ta= 25℃

Ta= 85℃

2

Ta=-40℃

Ta= 25℃

1

0

Ta= 85℃

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Figure 26. Bus Free Time vs Supply Voltage

Figure 27. Write Cycle Time vs Supply Voltage

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Typical Performance Curves - Continued

0.3

0.25

0.2

0.25

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.2

0.15

0.1

0.15

0.1

0.05

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : Vcc(V)

Figure 29. Noise Spike Width vs Supply Voltage

(SCL LOW)

Figure 28. Noise Spike Width vs Supply Voltage

(SCL HIGH)

0.3

0.25

0.2

0.3

0.25

0.2

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.15

0.1

0.15

0.1

0.05

0

0.05

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Supply Voltage : Vcc(V)

Figure 30. Noise Spike Width vs Supply Voltage

(SDA HIGH)

Figure 31. Noise Spike Width vs Supply Voltage

(SDA LOW)

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Typical Performance Curves - Continued

1.2

0.2

0.1

0

SPEC

1

0.8

Ta=-40℃

Ta= 25℃

Ta= 85℃

Ta=-40℃

Ta= 25℃

Ta= 85℃

0.6

-0.1

-0.2

-0.3

0.4

0.2

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : Vcc(V)

Figure 32. WP Hold Time vs Supply Voltage

Figure 33. WP Setup Time vs Supply Voltage

1.2

1

SPEC

0.8

0.6

0.4

0.2

0

Ta=-40℃

Ta= 25℃

Ta= 85℃

0

1

2

3

4

5

6

SupplyVoltage : Vcc(V)

Figure 34. WP High Period vs Supply Voltage

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Timing Chart

1. I²C BUS Data Communication

I²C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,

and acknowledge is always required after each byte. I²C BUS data communication with several devices is possible by

connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).

Among the devices, there should be a “master” that generates clock and control communication start and end. The rest

is “slave” which are controlled by an address peculiar to each device. EEPROM is a “slave”. The device that outputs

data to the bus during data communication is called “transmitter”, and the device that receives data is called “receiver”.

SDA

1-7

8

9

8

9

8

9

SCL

S

P

START ADDRESS R/W

ACK

DATA

ACK

DATA

ACK

STOP

condition

Figure 35. Data Transfer Timing

2. Start Condition (Start Bit Recognition)

(1) Before executing each command, start condition (start bit) that SDA goes from 'HIGH' down to 'LOW' when SCL is

'HIGH' is necessary.

(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not. Therefore, unless this condition

is satisfied, any command cannot be executed.

3. Stop Condition (Stop Bit Recognition)

(1) Each command can be ended by a stop condition (stop bit), namely, SDA goes from 'LOW' to 'HIGH' while SCL is

'HIGH'.

4. Acknowledge (ACK) Signal

(1) This acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally.

In both master and slave communication, the device at the transmitter (sending) side releases the bus after

outputting 8 bit data. When a slave address of a write command or a read command is input, microcontroller is the

device at the transmitter side. When output the data of read command, this IC is the device at the transmitter side.

(2) The device on the receiver (receiving) side sets SDA ‘LOW’ during the 9^thclock cycle, and outputs an ACK signal

showing that the 8-bit data has been received. When a slave address of a write command or a read command is

input, this IC is the device at the receiver side. When output the data of read command, microcontroller is the

device at the receiver side.

(3) This IC outputs ACK signal ‘LOW’ after recognizing start condition and slave address (8 bit).

(4) Each write operation outputs ACK signal ‘LOW’ every 8 bit data (a word address and write data) reception.

(5) During read operation, this IC outputs 8 bit data (read data) and detects the ACK signal ‘LOW’. When ACK signal is

detected, and no stop condition is sent from the master (microcontroller) side, this IC continues to output data. If the

ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the read

operation. Then this IC is ready for another transmission.

5. Device Addressing

(1) Slave address comes after start condition from master.

(2) The significant 4 bits of slave address are used for recognizing a device type.

(3) The device code of this IC is fixed to '1010'.

(4) Next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and plural ones can be used on a

same bus according to the number of device addresses. It is possible to select and operate only EEPROM that has

matched ‘HIGH’ ‘LOW’ input conditions of the A0, A1, A2 pin and the ‘HIGH’ ‘LOW’ input conditions of slave address

sent from the master.

(5) The most insignificant bit (R/W --- READ/WRITE) of slave address is used for designating write or read operation,

and is as shown below.

――

Setting R / W to 0 ------- write (setting 0 to word address setting of random read)

――

Setting R / W to 1 ------- read

Maximum number of

Type

Slave address

0 1 0

A2 A1 A0 R/^―W^―

Connected buses

8

BR24G32-3A

1

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Write Command

1. Write Cycle

(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when

writing continuous data of 2 Bytes or more, simultaneous write is possible by Page Write cycle. Up to 32 arbitrary

Bytes can be written.

S

T

A

R

T

W

R

I

T

E

S

T

O

P

SLAVE

ADDRESS

1st WORD

ADDRESS

2nd WORD

ADDRESS

DATA

*1 WA12 to WA15 is don't care.

SDA

LINE

WAWAWAWAWA

15 14 13 12 11

WA

0

1

0

1

0 A2A1A0

D7

D0

A

C

K

A

C

K

A

C

K

R

/

W

A

C

K

*1

Figure 36. Byte Write Cycle

S

T

A

R

T

W

R

I

T

E

S

T

O

SLAVE

ADDRESS

1st WORD

ADDRESS(n)

2nd WORD

ADDRESS(n)

DATA(n)

DATA(n+31)

P

*1 WA12 to WA15 is don't care.

SDA

LINE

WAWA WAWA WA

15 14 13 12 11

WA

D7

1

0

1

A2 A1 A0

D0

0

A

C

K

R

/

W

A

C

K

A

C

K

A

C

K

A

C

K

*1

Figure 37. Page Write Cycle

(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.

(3) Data is written to the address designated by word address (n-th address)

(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.

(5) When internal write is started, command is not accepted for t_WR(5ms at maximum).

(6) Using Page Write, it is possible to write one lump sum up to 32 bytes. When data with the maximum number of

bytes + 1 byte or more is sent, the bytes in excess overwrite from the first byte. (Refer to “Internal Address

Increment”).

(7) As for page write cycle of BR24G32-3A, after the 7 significant bits of word address are designated arbitrarily,

data up to 32 bytes can be written. Because keep inputting data 2 bytes or more, the value of 5 least significant

bits in the address is incremented internally.

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2. Notes on Write Cycle Continuous Input

The maximum page numbers of BR24G32-3A are 32 Bytes. Any bytes below these can be written.

1 page = 32 Bytes, but the page write cycle time is 5ms at maximum for 32 Byte bulk write.

It does not stand 5ms at maximum x 32 Byte=160ms (Max)

3. Internal Address Increment

Page write mode

WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0

0

1

0

1

0

Increment

0

1

0

1

0

1

0

1

0

1

0

1Eh

For example, when it is started from address 1Eh,

then, increment is made as below,

1Eh→1Fh→00h→01h···. Please take note.

*1Eh···1E in hexadecimal, therefore, 00011110 is a

binary number.

Significant bit is fixed.

No digit up

4. Write Protect (WP) Terminal

Write Protect (WP) Function

When WP terminal is set at V_CC(H level), data rewrite of all addresses is prohibited. When it is set GND (L level),

data rewrite of all address is enabled. Be sure to connect this terminal to V_CCor GND, or control it to H level or L

level. Do not leave it open.

In case of using it as ROM, it is recommended to connect it to pull up or V_CC. At extremely low voltage at power

ON/OFF, by setting the WP terminal ‘H’, write error can be prevented.

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Read Command

1. Read Cycle

Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random

read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a

command to read data of internal address register without designating an address, and is used when to verify just after

write cycle. In both the read cycles, sequential read cycle is available and the next address data can be read in

succession.

S

T

A

R

T

W

R

I

T

E

S

T

A

R

T

R

E

A

D

S

T

O

P

SLAVE

ADDRESS

1st WORD

ADDRESS（ｎ）

2nd WORD

ADDRESS（ｎ）

SLAVE

ADDRESS

DATA(n)

*1 WA12 to WA15 is don’t care.

SDA

LINE

WA

0

WAWAWAWAWA

15 14 13 12 11

A2

1 0 1 0 A1A0

1 0 1 0

A1A0

D7

D0

A2

R

/ C

W K

A

C

K

A

C

K

R

/

W

A

C

K

A

C

K

*1

Figure 38. Random Read cycle

S

T

A

R

T

R

E

A

S

T

O

SLAVE

ADDRESS

D

DATA(n)

P

SDA

LINE

1 0 1 0 A2A1A0

D7

D0

A

C

K

R A

/ C

W K

Figure 39. Current Read Cycle

S

T

A

R

T

R

E

A

S

T

O

P

SLAVE

ADDRESS

DATA(n)

DATA(n+x)

D

SDA

LINE

A2 A0

A1

1

0

1

0

D7

D0

D7

D0

R

/

W

A

C

K

A

C

K

A

C

K

A

C

K

Figure 40. Sequential Read Cycle (in the case of Current Read Cycle)

(1) In random read cycle, data of designated word address can be read.

(2) When the command just before current read cycle is random read cycle or current read cycle (each including

sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output.

(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (μ-COM) side, the next

address data can be read in succession.

(4) Read is ended by stop condition that ‘H’ is input to ACK signal after D0 and SDA signal goes from ‘L’ to ‘H’ while

at SCL signal is ‘H’.

(5) When ‘L’ is input at ACK signal after D0 without ‘H’ input, sequential read gets in, and the next data is output.

Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK

signal after D0, and the stop condition that SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.

(6) Sequential read is ended by stop condition that 'H' is input to ACK signal after arbitrary D0 and SDA is asserted

from ‘L’ to ‘H’ while SCL signal is 'H'.

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Software Reset

Software reset is executed to avoid malfunction after power ON, or when it is necessary to reset during command input.

Software reset has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 41-(a), Figure 41-(b),

Figure 41-(c).) Within the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0'

(both 'L' level) may be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow,

leading to instantaneous power failure of system power source or influence upon devices.

Dummy clock×14

Start×2

SCL

SDA

Normal command

1

2

13

14

Figure 41-(a). The case of dummy clock × 14 +START+START+ command input

Start

Dummy clock×9

2

Start

SCL

SDA

Normal command

1

8

9

Figure 41-(b). The case of START + dummy clock × 9 +START+ command input

Start×9

SCL

SDA

Normal command

1

2

3

7

8

9

Normal command

Figure 41-(c). START×9+ command input

*Start normal command from START input.

Acknowledge Polling

During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic

write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it

means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge

polling, next command can be executed without waiting for t_WR= 5ms.

To write continuously, send the slave address of R/W=0, and to carry out current read cycle after write, send the slave

address of R/W=1. If ACK signal sends back 'L', execute word address input and data output and so forth.

During internal write,

ACK = HIGH is returned.

First write command

S

T

A

R

T

S

T

A

R

T

S

T

A

C

K

H

A

T

A

R

T

Slave

C

K

H

···

Write command

O

address

P

t_WR

Second write command

S

T

A

R

T

S

T

A

R

T

S

T

O

P

A

C

K

L

A

C

K

L

A

C

K

L

Slave

Word

Slave

···

C

Data

K

address

H

t_WR

After completion of internal write,

ACK=LOW is returned, so input next

word address and data in succession.

Figure 42. Case of Continuous Write by Acknowledge Polling

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WP Valid Timing (Write Cancel)

WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid

timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte

write cycle and page write cycle, the area from the first start condition of command before the rise of clock to take in D0 of

data(in page write cycle, the first byte data) is the cancel invalid area.

WP input in this area is ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the cancel

valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.

·Rise of SDA

ACK

·Rise of D0 taken clock

SCL

SDA

D1

D0 ACK

SDA D0

Enlarged view

S

A

S

A

C

K

L

A

C

K

L

t_WR

T

A

R

T

Slave

Word

SDA

WP

D7 D6

D5

C

K

L

D2 D1 D0

C

T

D4 D3

Data

K

O

address

L

P

WP cancel invalid area

WP cancel valid area

Data is not written.

WP cancel invalid area

Figure 43. WP Valid Timing

Command Cancel by Start Condition and Stop Condition

During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure

44.) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop

condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by

start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not

determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession,

carry out random read cycle.

SCL

SDA

1

0

1

0

Start condition

Stop condition

Figure 44. Case of cancel by start, stop condition during slave address input

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I/O Peripheral Circuit

1. Pull-up Resistance of SDA Terminal

SDA is NMOS open drain, so it requires a pull up resistor. As for this resistor value (R_PU), select an appropriate value

from microcontroller V_IL, I_L, and V_OL-I_OLcharacteristics of this IC. If R_PUis large, operating frequency is limited. The

smaller the R_PU, the larger is the supply current.

2. Maximum value of R_PU

The maximum value of R_PUis determined by the following factors.

(1) SDA rise time determined by the capacitance (C_BUS) of bus line of SDA and R_PUshould be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(2) The bus’s electric potential

A determined by input leak current total (I_L) of the device connected to the bus

with output of 'H' to SDA line and R_PUshould sufficiently secure the input 'H' level (V_IH) of microcontroller and

EEPROM including recommended noise margin of 0.2V_CC

.

V

CC -I

L

R

PU -0.2VCC VIH

0.8VCC -VIH

Microcontroller

BR24GXX

∴RPU



IL

RPU

Ex.) V_CC=3V I_L=10μA V_IH=0.7 V_CC

SDA terminal

From (2)

A

0.8 3 -0.7 3

∴RPU



10 10 ^-6

IL

30

[ kΩ ]

Bus line

capacity

C_BUS

3. Minimum value of R_PU

The minimum value of R_PUis determined by the following factors.

(1) When IC outputs LOW, it should be satisfied that

V_OLMAX=0.4V and I_OLMAX=3mA.

Figure 45. I/O Circuit Diagram

V

CC -V

^OLIOL

RPU

VCC -VOL

∴RPU



IOL

(2) V_OLMAX=0.4V should secure the input 'L' level (V_IL) of microcontroller and EEPROM

including recommended noise margin 0.1V_CC

.

V_OLMAX≤ V_IL-0.1 V_CC

Ex.) V_CC=3V, V_OL=0.4V, I_OL=3mA, microcontroller, EEPROM V_IL=0.3V_CC

3 - 0.4

From (1)

RPU

≥

3×10^-3

[Ω]

867

And

V_OL=0.4 [V]

V_IL=0.3×3

=0.9 [V]

Therefore, the condition (2) is satisfied.

4. Pull-up Resistance of SCL Terminal

When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time

that SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several kΩ to several ten kΩ is

recommended in consideration of drive performance of output port of microcontroller.

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Cautions on Microcontroller Connection

1. R_S

In I²C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output

of tri state to SDA port, insert a series resistance R_Sbetween the pull up resistor R_PUand the SDA terminal of

EEPROM. This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM

are turned ON simultaneously. R_Salso plays the role of protecting the SDA terminal against surge. Therefore, even

when SDA port is open drain input/output, R_Scan be used.

ACK

SCL

RPU

RS

SDA

'H' output of microcontroller

'L' output of EEPROM

Over current flows to SDA line by 'H'

output of microcontroller and 'L'

output of EEPROM.

EEPROM

Microcontroller

Figure 46. I/O Circuit Diagram

Figure 47. Input / Output Collision Timing

2. Maximum value of R_s

The maximum value of R_sis determined by the following relations.

(1) SDA rise time determined by the capacitance (C_BUS) of bus line of SDA and R_PUshould be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(2) The bus’s electric potential A determined by R_puand R_sthe moment when EEPROM outputs 'L' to SDA bus

should sufficiently secure the input 'L' level (V_IL) of microcontroller including recommended noise margin of

0.1V_CC

.

(V_CCV_OL)×R_S

-

VCC

+

V_OL+0.1V_CCV_IL

≤

R_PU+R_S

A

RPU

RS

V_{IL -}V_{OL -}0.1V_CC

1.1V_CC-V_IL

VOL

∴

R_S

×

R_PU

≤

IOL

Ex. V =3V V_IL=0.3V_CCV_OL=0.4V R_PU=20kΩ

Bus line

capacity

C_BUS

)

CC

0.3×3 0.4 0.1×3

-

20×10³

R_S

×

≤

VIL

1.1×3 0.3×3

-

EEPROM

Micro controller

Figure 48. I/O Circuit Diagram

1.67 kΩ

3. Minimum value of R_s

The minimum value of R_sis determined by over current at bus collision. When over current flows, noises in power

source line and instantaneous power failure of power source may occur. When allowable over current is defined as I,

the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power

source line in set and so forth. Set the over current to EEPROM at 10mA or lower.

V_CC

I

≤

R_S

R_PU

R_S

'L'output

V_CC

I

∴

R_S

≥

Over current I

Ex.) V_CC=3V, I=10mA

'H' output

3

R_S

≥

10×10 ^-3

EEPROM

Microcontroller

[Ω]

300

Figure 49. I/O Circuit Diagram

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I/O Equivalence Circuit

1. Input (A0, A1, A2, SCL, WP)

2. Input / Output (SDA)

Figure 51. Input / Output Pin Circuit Diagram

Figure 50. Input Pin Circuit Diagram

Power-Up/Down Conditions

At power on, the IC’s internal circuits may go through unstable low voltage area as the V_CCrises, making the IC’s internal

logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and

LVCC circuit. To assure the operation, observe the following conditions at power ON.

1. Set SDA = 'H' and SCL ='L' or 'H’

2. Start power source to satisfy the recommended conditions of t_R, t_OFF, and V_botfor operating POR circuit.

t_R

VCC

Recommended conditions of t_R, t_OFF,V_bot

t_R

10ms or below 10ms or larger 0.3V or below

100ms or below

t_OFF

V_bot

t_OFF

V_bot

10ms or larger 0.2V or below

0

Figure 52. Rise Waveform Diagram

3. Set SDA and SCL to avoid being 'Hi-Z'.

When the above conditions 1 and 2 cannot be observed, take the following countermeasures.

(1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power ON.

→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.

VCC

t_LOW

SCL

SDA

After Vcc becomes stable

t_DH

t_SU:DAT

Figure 53. When SCL= 'H' and SDA= 'L'

Figure 54. When SCL='L' and SDA='L'

(2) In the case when the above condition 2 cannot be observed.

→After power source becomes stable, execute software reset(Page 18).

(3) In the case when the above conditions 1 and 2 cannot be observed.

→Carry out (1), and then carry out (2).

Low Voltage Malfunction Prevention Function

LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ=1.2V) or below,

data rewrite is prevented.

Noise Countermeasures

1. Bypass Capacitor

When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a bypass

capacitor (0.1μF) between the IC’s V_CCand GND pins. Connect the capacitor as close to the IC as possible. In addition, it is also

recommended to connect a bypass capacitor between board’s V_CCand GND.

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

Thermal Consideration

Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may

result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the

board size and copper area to prevent exceeding the maximum junction temperature rating.

6.

7.

Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately

obtained. The electrical characteristics are guaranteed under the conditions of each parameter.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may

flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,

and routing of connections.

8.

9.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)

and unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

12. Regarding the Input Pin of the IC

In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The

operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical

damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an

input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins

when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the

input pins have voltages within the values specified in the electrical characteristics of this IC.

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Part Numbering

B

R

2

4

G

3

2

x

-

3

A

x

BUS Type

24 : I²C

Operating Temperature/

Operating Voltage

-40°C to +85°C / 1.6V to 5.5V

Capacity

32=32Kbit

Package

*1

Blank

F

FV

: DIP-T8

: SOP8

: SSOP-B8

: TSSOP-B8J

: VSON008X2030

: SOP-J8

FJ

: TSSOP-B8

: MSOP8

FVT

FVM

FVJ

NUX

Process code

Revision

Blank

:

DIP-T8^*1, SOP8, SOP-J8, SSOP-B8, TSSOP-B8,

TSSOP-B8J, MSOP8, VSON008X2030

G

Blank

:

Halogen free

Not Halogen free

As an exception, VSON008X2030 package will be Halogen free with “Blank”

T

:

100% Sn

Blank

Packaging and forming specification

E2

: Embossed tape and reel

(SOP8, SOP-J8, SSOP-B8, TSSOP-B8, TSSOP-B8J)

: Embossed tape and reel

TR

(MSOP8, VSON008X2030)

None : Tube

(DIP-T8^*1)

*1 Not Recommended for New Designs.

Lineup

Package

Capacity

Orderable Part Number

Remark

Type

DIP-T8^*1

Quantity

Tube of 2000

Reel of 2500

Reel of 3000

Reel of 2500

Reel of 3000

Reel of 4000

BR24G32

-3A

Not Halogen free

Halogen free

100% Sn

SOP8

BR24G32F

-3AGTE2

-3AGE2

-3AGTE2

-3AGTTR

-3ATTR

SOP-J8

BR24G32FJ

BR24G32FV

BR24G32FVT

BR24G32FVJ

BR24G32FVM

BR24G32NUX

SSOP-B8

TSSOP-B8

TSSOP-B8J

MSOP8

32Kbit

VSON008X2030

*1 Not Recommended for New Designs.

www.rohm.com

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Physical Dimension, Tape and Reel Information

Package Name

DIP-T8

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Physical Dimension and Packing Information

Package Name

SOP8

(Max 5.35 (include.BURR))

(UNIT: mm)

PKG: SOP8

Drawing No.: EX112-5001-1

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Physical Dimension and Packing Information

Package Name

SOP-J8

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Physical Dimension and Packing Information

Package Name

SSOP-B8

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Physical Dimension and Packing Information

Package Name

TSSOP-B8

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Physical Dimension and Packing Information

Package Name

TSSOP-B8J

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Physical Dimension and Packing Information

Package Name

MSOP8

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Physical Dimension and Packing Information

Package Name

VSON008X2030

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Marking Diagrams (TOP VIEW)

DIP-T8 (TOP VIEW)

SOP8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

BR24G32A

4 G 3 2 A

1PIN MARK

SSOP-B8(TOP VIEW)

SOP-J8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

4 G FA

4 G 3 2 A

LOT Number

1PIN MARK

TSSOP-B8(TOP VIEW)

MSOP8(TOP VIEW)

Part Number Marking

LOT Number

4

G

F

3

A

LOT Number

1PIN MARK

VSON008X2030 (TOP VIEW)

TSSOP-B8J(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

4 G 3

2 A 3

4 G 3

2 A 3

1PIN MARK

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Revision History

Date

15.May.2012

Revision

001

Changes

New Release

25.Feb.2013

29.Mar.2013

1.May.2013

002

003

004

Update some English words, sentences’ descriptions, grammar and formatting.

P.5 - Add directions in Pin Descriptions

P.2- Add VESD in Absolute Maximum Ratings

P.1 Change format of package line-up table.

P.3 Modified tSU:STA (0.25->0.20)

P.24 Update Part Numbering. Add Lineup Table

Add SOP-J8M,TSSOP-B8M Package

P1.Add 32Kbit to a General Description

P1.Add “Up to 32 Byte in Page Write Mode”

P1.Add “Bit Format 4K x 8”

27.Aug.2014

27.Oct.2014

005

006

P1. List of models deletion

P2. Change the unit of Power Dissipation to “W”

P22. Change the Operational Notes

Change notice to Rev003

18.May.2016

31.Aug.2016

007

008

Update Japanese version

Add VMMP008Z1830 package

Add the range of supply voltage 1.6V≤V_CC≤5.5V

P.2 Add caution in absolute maximum ratings

P.4/22 Add terminal names in Figure 2-(b) to (e) and Figure 54

P.6-13 Change title of figure to adjust the name of DC/AC characteristics

P.9 Change Figure18

P.25 Update Physical Dimension of DIP-T8

Remove the SOP-J8M package

Remove the TSSOP-B8M package

P.15(6) Modify the Write Cycle

Change the fonts and format

Remove the VMMP008Z1830 package

Added watermarks and words for Not Recommended New Designs category

product.

19.Nov.2018

11.Jun.2019

009

010

Changed a format of “Physical Dimension and Packing Information”.

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.004


型号：	BR24G32FJ-3A
厂家：	ROHM
描述：	ROHM的串行EEPROM按照世界高水平为用户准备了多种容量、接口和封装形式，在世界上具有较高的市场占有率。ROHM的串行EEPROM配置有世界标准的总线形式（Microwire、I²C、SPI），而且工作电源电压范围宽（1.7 ～ 5.5V、1.8 ～ 5.5V、2.5 ～ 5.5V、3.0 ～ 3.6V），还适合采用电池供电。整个系列均是无铅产品，符合RoHS指令。可编程只读存储器电动程控只读存储器电可擦编程只读存储器电池
文件：	总37页 (文件大小：2671K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR24G32FJ-3A [ROHM]

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