BR25H040F-WCE2 [ROHM]
EEPROM, 512X8, Serial, CMOS, PDSO8, SOP-8;
| 型号： | BR25H040F-WCE2 |
| 厂家： | 
ROHM |
| 描述： | EEPROM, 512X8, Serial, CMOS, PDSO8, SOP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
| 文件： | 总32页 (文件大小：1026K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Automotive Series Serial EEPROMs
125°C SPI BUS ICs BR25xxxxFamily
BR25Hxxx-WC Series
(1K 2K 4K 8K 16K 32K)
Description
BR25Hxxx-WC series is a serial EEPROM of SPI BUS interface method.
Features
Packages W(Typ) x D(Typ) x H(Max)
High Speed Clock Action Up to 5MHz (Max)
Wait Function by HOLDB Terminal.
Part or Whole of Memory Arrays Settable as Read
Only Memory Area by Program.
2.5 to 5.5V single power source action most suitable
for battery use.
Page Write Mode Useful for Initial Value Write at
Factory Shipment.
Highly Reliable Connection by Au Pad and Au Wire.
For SPI Bus Interface (CPOL, CPHA)=(0, 0), (1, 1)
Auto Erase and Auto End Function at Data Rewrite.
Low Current Consumption
SOP8
5.00mm x 6.20mm x 1.71mm
¾
¾
¾
At Write Action (5V)
At Read Action (5V)
At Standby Action (5V) : 0.1µA (Typ)
: 1.5mA (Typ)
: 1.0mA (Typ)
Address Auto Increment Function at Read Action
Write Mistake Prevention Function
SOP-J8
4.90mm x 6.00mm x 1.65mm
¾
¾
¾
¾
Write Prohibition at Power on.
Write Prohibition by Command Code (WRDI).
Write Prohibition by WPB Pin.
Write Prohibition Block Setting by Status
Registers (BP1, BP0)
¾
Write Mistake Prevention Function at Low
Voltage.
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
Data at Shipment Memory Array: FFh, Status
Register WPEN, BP1, BP0 : 0
Data Kept for 40 Years.
Data Rewrite Up to 1,000,000 Times.
AEC-Q100 Qualified
Page Write
Number of pages
16 Byte
32 Byte
BR25H010-WC
BR25H020-WC
BR25H040-WC
BR25H080-WC
BR25H160-WC
BR25H320-WC
Product Number
BR25Hxxx-WC Series
Capacity
Bit Format
Type
Power Source Voltage
2.5 to 5.5V
SOP8
●
SOP-J8
●
TSSOP-B8
1Kbit
128×8
256×8
512×8
1K×8
2K×8
4Kx8
BR25H010-WC
●
●
●
●
●
2Kbit
BR25H020-WC
BR25H040-WC
BR25H080-WC
BR25H160-WC
BR25H320-WC
2.5 to 5.5V
●
●
4Kbit
2.5 to 5.5V
●
●
8Kbit
2.5 to 5.5V
●
●
16Kbit
32Kbit
2.5 to 5.5V
●
●
2.5 to 5.5V
●
●
○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Limits
Unit
V
Remarks
Impressed Voltage
VCC
-0.3 to +6.5
When using at Ta=25°C or higher, 4.5mW to be reduced per 1°C
When using at Ta=25°C or higher, 4.5mW to be reduced per 1°C
When using at Ta=25°C or higher, 3.3mW to be reduced per 1°C
0.56 (SOP8)
0.56 (SOP-J8)
0.41 (TSSOP-B8)
-65 to +150
Permissible
Dissipation
Pd
W
Storage Temperature Range
Tstg
Topr
-
°C
°C
V
Operating Temperature
Range
-40 to +125
Terminal Voltage
-0.3 to VCC+0.3
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Memory Cell Characteristics (VCC=2.5V to 5.5V)
Limits
Parameter
Unit
Condition
Ta≤85°C
Min
1,000,000
500,000
300,000
40
Typ
Max
-
-
-
-
-
-
-
-
-
-
Times
Times
Times
Years
Years
Number of Data Rewrite Times (Note1)
Ta≤105°C
Ta≤125°C
Ta≤25°C
Data Hold Years (Note1)
20
Ta≤125°C
(Note1) Not 100% TESTED
Recommended Operating Ratings
Parameter
Power Source Voltage
Input Voltage
Symbol
Limits
Unit
V
VCC
VIN
2.5 to 5.5
0 to VCC
Input / Output Capacity (Ta=25°C, Frequency=5MHz)
Parameter
Input Capacity (Note1)
Output Capacity (Note1)
Symbol
Min
Max
8
Unit
pF
Conditions
CIN
-
-
VIN=GND
COUT
8
VOUT=GND
(Note1) Not 100% TESTED
Electrical Characteristics (Unless otherwise specified, Ta=-40°C to +125°C, VCC=2.5V to 5.5V)
Limits
Parameter
Symbol
Unit
Conditions
Min
0.7xVCC
-0.3
Typ
Max
VCC+0.3
0.3xVCC
0.4
2.5V≤VCC≤5.5V
2.5V≤VCC≤5.5V
IOL=2.1mA
“H” Input Voltage
VIH
VIL
VOL
VOH
ILI
-
-
-
-
-
-
V
V
“L” Input Voltage
“L” Output Voltage
“H” Output Voltage
Input Leak Current
Output Leak Current
0
V
IOH=-0.4mA
VCC-0.5
-10
VCC
V
VIN=0 to VCC
10
µA
µA
VOUT=0 to VCC, CSB=VCC
ILO
-10
10
VCC=2.5V, fSCK=5MHz, tE/W=5ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byte write, Page write, Write status register
VCC=5.5V, fSCK=5MHz, tE/W=5ms
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Byte write, Page write, Write status register
VCC=2.5V, fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
VCC=5.5V, fSCK=5MHz
VIH/VIL=0.9VCC/0.1VCC, SO=OPEN
Read, Read status register
VCC=5.5V
CSB=HOLDB=WPB=VCC, SCK=SI=VCC or =GND,
SO=OPEN
ICC1
ICC2
ICC3
ICC4
ISB
-
-
-
-
-
-
-
-
-
-
2.0
3.0
1.5
2.0
10
mA
mA
mA
mA
µA
Current Consumption at Write
Action
Current Consumption at Read
Action
Standby Current
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Operating Timing Characteristics
(Ta=-40°C to +125°C, unless otherwise specified, load capacity CL1=100pF)
2.5≤VCC≤5.5V
Parameter
Symbol
Unit
Min
-
Typ
-
Max
SCK Frequency
SCK High Time
SCK Low Time
CSB High Time
CSB Setup Time
CSB Hold Time
SCK Setup Time
SCK Hold Time
SI Setup Time
SI Hold Time
fSCK
tSCKWH
tSCKWL
tCS
5
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ms
85
85
85
90
85
90
90
20
30
-
-
-
-
-
-
-
-
tCSS
tCSH
tSCKS
tSCKH
tDIS
-
-
-
-
-
-
-
-
-
tDIH
-
-
Data Output Delay Time1
Data Output Delay Time2 (CL2=30pF)
Output Hold Time
tPD1
tPD2
tOH
-
70
55
-
-
-
0
-
Output Disable Time
tOZ
-
-
100
-
HOLDB Setting Setup Time
HOLDB Setting Hold Time
HOLDB Release Setup Time
HOLDB Release Old Time
Time from HOLDB to Output High-Z
Time from HOLDB To Output Change
SCK Rise Time (Note1)
tHFS
tHFH
tHRS
tHRH
tHOZ
tHPD
tRC
0
-
40
0
-
-
-
-
70
-
-
-
-
100
70
1
-
-
-
-
SCK Fall Time (Note1)
tFC
-
-
1
OUTPUT Rise Time (Note1)
OUTPUT Fall Time (Note1)
tRO
-
-
50
50
5
tFO
-
-
Write Time
tE/W
-
-
(Note1) NOT 100% TESTED
Sync Data Input / Output Timing
tCSS
tCS
tCS
CSB
SCK
tSCKH
CSB
tSCKS
tCSH
tRC
tFC
tSCKWH
tSCKWL
tDIS
SCK
SI
tDIH
tPD
tOH
SI
tRO,tFO
tOZ
High-Z
SO
High-Z
SO
Figure 1. Input Timing
Figure 2. Input / Output Timing
SI is taken into IC inside in sync with data rise
edge of SCK. Input address and data from the
most significant bit MSB.
SO is output in sync with data fall edge of SCK.
Data is output from the most significant bit MSB.
AC Measurement Conditions
CSB "H"
"L"
Limits
Parameter
Symbol
Unit
tHFS tHFH
tHRS tHRH
Min
Typ
Max
100
30
SCK
SI
tDIS
Load Capacity 1
Load Capacity 2
Input Rise Time
Input Fall Time
Input Voltage
CL1
-
-
-
-
-
-
-
-
pF
pF
ns
ns
V
n
n+1
n-1
CL2
tHOZ
Dn
tHPD
High-Z
SO
Dn+1
Dn
Dn-1
-
-
-
50
50
HOLDB
0.2VCC/0.8VCC
0.3VCC/0.7VCC
Figure 3. HOLD timing
Input / Output
Judgment Voltage
-
V
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Block Diagram
VOLTAGE
DETECTION
CSB
SCK
INSTRUCTION DECODE
CONTROL CLOCK
GENERATION
(Note1) 7bit: BR25H010-WC
8bit: BR25H020-WC
HIGH VOLTAGE
GENERATOR
WRITE
INHIBITION
9bit: BR25H040-WC
10bit: BR25H080-WC
11bit: BR25H160-WC
12bit: BR25H320-WC
SI
INSTRUCTION
REGISTER
STATUS REGISTER
(Note1)
(Note1)
ADDRESS
HOLDB
ADDRESS
7～12bit
7～12bit
REGISTER
DECODER
1～32K
EEPROM
DATA
READ/WRITE
AMP
WPB
SO
8bit
8bit
REGISTER
Figure 4. Block diagram
HOLDB SCK
Pin Configuration
Vcc
SI
BR25H010-WC
BR25H020-WC
BR25H040-WC
BR25H080-WC
BR25H160-WC
BR25H320-WC
CSB
SO
WPB
GND
Figure 5. Pin Configuration
Pin Description
Terminal name
Input/Output
Function
Power source to be connected
VCC
GND
CSB
SCK
SI
-
-
All input / output reference voltage, 0V
Chip select input
Input
Input
Input
Output
Serial clock input
Start bit, ope code, address, and serial data input
SO
Serial data output
Hold input
HOLDB
WPB
Input
Input
Command communications may be suspended temporarily (HOLD
status)
Write protect input
Write command is prohibited (Note1)
Write status register command is prohibited.
(Note1) BR25H010/020/040-WC
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Typical Performance Curves
Figure 6. “H” Input Voltage vs Supply Voltage
Figure 7. “L” Input Voltage vs Supply Voltage
Figure 8. “L” Output Voltage vs Output Current (Vcc=2.5V)
Figure 9. "H" Output Voltage vs Output Current (Vcc=2.5V)
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Typical Performance Curves - continued
Figure 10. Input Leak Current vs Supply Voltage
Figure 11. Output Leak Current vs Output Voltage (Vcc=5.5V)
Figure 13. Consumption Current at READ Operation
vs Supply Voltage
Figure 12. Current Consumption at WRITE Operation
vs Supply Voltage
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Typical Performance Curves - continued
Figure 15. SCK Frequency vs Supply Voltage
Figure 14. Standby Current vs Supply Voltage
Figure 17. SCK Low Time vs Supply Voltage
Figure 16. SCK High Time vs Supply Voltage
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Typical Performance Curves - continued
Figure 19. CSB Setup Time vs Supply Voltage
Figure 18. CSB High Time vs Supply Voltage
Figure 21. SI Setup Time vs Supply Voltage
Figure 20. CSB Hold Time vs Supply Voltage
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Typical Performance Curves - continued
Figure 23. Data Output Delay Time vs Supply Voltage
(CL1=100pF)
Figure 22. SI Hold Time vs Supply Voltage
Figure 24. Data Output Delay Time vs Supply Voltage
(CL2=30pF)
Figure 25. Output Disable Time vs Supply Voltage
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Typical Performance Curves - continued
Figure 27. HOLDB Release Hold Time vs Supply Voltage
Figure 26. HOLDB Setting Hold Time vs Supply Voltage
Figure 29. Time from HOLDB to Output Change
vs Supply Voltage
Figure 28. Time from HOLDB to Output High-Z
vs Supply Voltage
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Typical Performance Curves - continued
Figure 31. Output Fall Time vs Supply Voltage
Figure 30. Output Rise Time vs Supply Voltage
Figure 32. Write Cycle Time vs Supply Voltage
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Features
1. Status Registers
This IC has status registers. The status registers are of 8 bits and express the following parameters.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore
are valid even when power source is turned off.
Rewrite characteristics and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when
power source is turned off. R/B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status command.
Status Registers
Product number
bit 7
1
bit 6
1
bit 5
1
bit 4
1
bit 3
BP1
bit 2
BP0
bit 1
bit 0
BR25H010-WC
BR25H020-WC
BR25H040-WC
BR25H080-WC
BR25H160-WC
BR25H320-WC
―
WEN
R/B
―
WPEN
0
0
0
BP1
BP0
WEN
R/B
Memory
location
bit
Function
Contents
WPB pin enable / disable designation bit
WPEN=0=invalid
This enables / disables the functions
of WPB pin.
WPEN
EEPROM
EEPROM
WPEN=1=valid
This designates the write disable
area of EEPROM. Write
designation areas of product
numbers are shown below.
BP1
BP0
EEPROM write disable block designation bit
Write and write status register write enable
This confirms prohibited status or
permitted status of the write and
the write status register.
/ disable status confirmation bit
WEN
Register
Register
WEN=0=prohibited
WEN=1=permitted
Write cycle status (READY / BUSY) status confirmation bit
―
――
This confirms READY status or
BUSY status of the write cycle.
R/B=0=READY
R/B
――
R/B=1=BUSY
Write Disable Block Setting
BP
1
Write disable block
BP0
BR25H010-WC BR25H020-WC BR25H040-WC BR25H080-WC
BR25H160-WC BR25H320-WC
0
0
1
0
1
None
None
None
None
None
None
0
1
1
60h-7Fh
40h-7Fh
00h-7Fh
C0h-FFh
80h-FFh
00h-FFh
180h-1FFh
100h-1FFh
000h-1FFh
300h-3FFh
200h-3FFh
000h-3FFh
600h-7FFh
400h-7FFh
000h-7FFh
C00h-FFFh
800h-FFFh
000h-FFFh
1. WPB Pin
By setting WPB=LOW, write command is prohibited. As for BR25H080/160/320-WC, only when WPEN bit is set “1”, the
WPB pin functions become valid. And the write command to be disabled at this moment is WRSR. As for BR25H010/
020/040-WC, both WRITE and WRSR commands are prohibited.
However, when write cycle is in execution, no interruption can be made.
Product number
BR25H010-WC
BR25H020-WC
BR25H040-WC
BR25H080-WC
BR25H160-WC
BR25H320-WC
WRSR
WRITE
Prohibition
possible
Prohibition
possible
Prohibition possible
but WPEN bit “1”
Prohibition
impossible
2. HOLDB Pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Command Mode
Ope Code
BR25H080-WC
BR25H040-WC BR25H160-WC
BR25H320-WC
Command
Contents
BR25H010-WC
BR25H020-WC
WREN Write Enable
WRDI Write Disable
READ Read
Write Enable Command
Write Disable Command
Read Command
0000
0000
0000
0000
0000
0000
*110
*100
*011
*010
*101
*001
0000
0000
0000
0000
0000
0000
*110
*100
0000
0000
0000
0000
0000
0000
0110
0100
0011
0010
0101
0001
A8011
A8010
*101
WRITE Write
Write Command
RDSR Read Status Register Status Register Read Command
WRSR Write Status Register Status Register Write Command
*001
*=Don’t Care Bit.
Timing Chart
1. Write Enable (WREN) / Disable (WRDI) Cycle
WREN (WRITE ENABLE): Write Enable
CSB
SCK
SI
0
1
2
3
4
5
6
7
0
0
0
0
*
1
1
0
High-Z
SO
* BR25H010/020/040-WC= Don’t care
BR25H080/160/320-WC= “0” input
Figure 33. Write Enable Command
WRDI (WRITE DISABLE): Write Disable
CSB
SCK
SI
0
1
2
3
4
5
6
7
0
0
0
0
1
*
1
0
0
High-Z
SO
* BR25H010/020/040-WC= Don’t care
BR25H080/160/320-WC= “0” input
Figure 34. Write Disable
This IC has write enable status and write disable status. It is set to write enable status by write enable command, and
it is set to write disable status by write disable command. As for these commands, set CSB LOW, and then input the
respective ope codes. The respective commands accept command at the 7-th clock rise. Even with input over 7 clocks,
command becomes valid.
When to carry out write and write status register command, it is necessary to set write enable status by the write
enable command. If write or write status register command is input in the write disable status, commands are cancelled.
And even in the write enable status, once write and write status register command is executed, it gets in the write
disable status. After power on, this IC is in write disable status.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
2. Read Command (READ)
CSB
～～
～～
～～
Product
number
BR25H010-WC
BR25H020-WC
BR25H040-WC
Address
length
A6-A0
A7-A0
A8-A0
～～
0
1
2
3
4
5
6
7
8
9
10
11
15
16
22
SCK
SI
～～
～～
0
0
0
0
＊
0
1
1
A7 A6 A5
A4
A1 A0
～～
～～
～～
High-Z
SO
D7 D6
D2 D1 D0
* BR25H010/020-WC=Don’t care
BR25H040-WC=A8
Figure 35. Read Command
(BR25H010/020/040-WC)
CSB
SCK
～
～
～～
～～
Product
number
Address
length
～～
～～
0
1
2
3
4
5
6
7
8
12
23
24
30
～～
BR25H080-WC
BR25H160-WC
BR25H320-WC
A9-A0
A10-A0
A11-A0
～～
～～
＊
＊
＊
0
0
0
0
0
0
1
1
A11
A1 A0
～～
SI
～～
～～
～～
～～
～～
High-Z
D7 D6
D2 D1 D0
SO
*=Don’t Care
Figure 36. Read Command (BR25H080/160/320-WC)
By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read
ope code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 15/23(Note1)
clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by
continuing input of SCK, data of the next address can be read. Increment read can read all the addresses of EEPROM.
After reading data of the most significant address, by continuing increment read, data of the most insignificant address
is read.
(Note1) BR25H010/020/040-WC=15 clocks
BR25H080/160/320-WC=23 clocks
3. Write Command (WRITE)
CSB
Product
number
BR25H010-WC
BR25H020-WC
BR25H040-WC
Address
length
A6-A0
A7-A0
A8-A0
～～
～～
0
1
2
3
4
5
6
7
8
15
16
22
23
SCK
～～
～～
～～
0
0
0
0
＊
0
1
0
A7
A6
A5
A4
A1
A0
D7 D6
D2
～～
D1 D0
SI
～～
～～
High-Z
SO
* BR25H010/020-WC=Don’t care
BR25H040-WC=A8
Figure 37. Write Command (BR25H010/020/040-WC)
CSB
SCK
～～
～～
～～
～～
Product
number
BR25H080-WC
BR25H160-WC
BR25H320-WC
Address
length
A9-A0
A10-A0
A11-A0
～～
0
1
2
3
4
5
6
7
8
12
23
24
30
31
～～
～～
～～
～～
＊
＊
0
0
0
0
0
0
1
0
＊
A11
A1
A0
D7 D6
D2
～～
D1
D0
SI
～～
High-Z
～～
～～
SO
＊=Don't Care
*
Figure 38. Write Command
(BR25H080/160/320-WC)
By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data
after write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires
time of tE/W (Max 5ms). During tE/W, other than status read command is not accepted. Start CSB after taking the last
data (D0), and before the next SCK clock starts. At other timing, write command is not executed, and this write
command is cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data
input without starting CSB, data up to 16/32(Note1)bytes can be written for one tE/W. In page write, the insignificant
4/5(Note2) bit of the designated address is incremented internally at every time when data of 1 byte is input and data is
written to respective addresses. When data of the maximum bytes or higher is input, address rolls over, and previously
input data is overwritten.
(Note1) BR25H010/020/040-WC=16 bytes at maximum
BR25H080/160/320-WC=32 bytes at maximum
(Note2) BR25H010/020/040-WC=Insignificant 4 bits
BR25H080/160/320-WC=Insignificant 5 bits
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4. Status Register Write / Read Command
CSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
0
0
0
0
＊
0
0
1
＊
BP1 BP0
＊
＊
＊
＊
＊
SI
High-Z
SO
＊=Don't care
Figure 39. Status Register Write Command (BR25H010/020/040-WC)
CSB
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
bit7
WPEN
bit6
bit5
bit4
bit3
bit2
bit1
bit0
＊
＊
＊
＊
＊
0
0
0
0
0
0
0
1
BP1 BP0
SI
High-Z
SO
＊=Don't care
Figure 40. Status Register Write Command (BR25H080/160/320-WC)
Write status register command can write status register data. The data can be written by this command are 2 bits (Note1)
,
that is, BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of EEPROM can
be set. As for this command, set CSB LOW, and input ope code of write status register, and input data. Then, by
making CSB HIGH, EEPROM starts writing. Write time requires time of tE/W as same as write. As for CSB rise, start
CSB after taking the last data bit (bit0), and before the next SCK clock starts. At other timing, command is cancelled.
Write disable block is determined by BP1 and BP0, and the block can be selected from 1/4 of memory array, 1/2, and
entire memory array. (Refer to the write disable block setting table.)
To the write disabled block, write cannot be made, and only read can be made.
(Note1) 3bits including BR25H080/160/320-WC WPEN (bit7)
CSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
SI
0
0
0
0
＊
1
0
1
bit7
bit6
bit5
bit4
bit3
bit2
bit1
WEN
bit0
R/B
High-Z
1
1
1
BP1 BP0
SO
1
＊=Don’t care
Figure 41. Status Register Read Command (BR25H010/020/040-WC)
CSB
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0
1
0
1
SI
0
bit7
WPEN
bit6
bit5
bit4
bit3
bit2
bit1
WEN
bit0
R/B
High-Z
0
0
0
BP1 BP0
SO
Figure 42. Status Register Read Command (BR25H080/160/320-WC)
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At Standby
1. Current at Standby
Set CSB “H”, and be sure to set SCK, SI, WPB, HOLDB input “L” or “H”. Do not input intermediate electric potantial.
2. Timing
As shown in Figure 43., at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.
Even if CSB is fallen at SCK=SI=”H”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
SI
0
1
2
Figure 43. Operating Timing
WPB Cancel Valid Area
WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command and
write command, pay attention to the following WPB valid timing.
While write or write status register command is executed, by setting WPB = “L” in cancel valid area, command can be
cancelled. The area from command ope code before CSB rise at internal automatic write start becomes the cancel valid
area. However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes
invalid.
SCK
6
7
15
16
tE/W
Ope Code
Data
Data write time
Valid
(WEN is reset by WPB=L)
(BR25H010/020/040-WC)
(BR25H080/160/320-WC)
Invalid
Invalid
Invalid
Valid
Figure 44. WPB Valid Timing (WRSR)
(Note2)
(Note1)
24/32
SCK
6
7
8
15/23
tE/W
Data
Ope Code
Address
Va lid
Data write time
(BR25H010/020/040-WC)
(BR25H080/160/320-WC)
Invalid
Invalid
(WEN is reset by WPB=L)
Invalid
Invalid
Invalid
(Note1) BR25H010/020/040-WC = 15
BR25H080/160/320-WC = 23
(Note2) BR25H010/020/040-WC = 24
BR25H080/160/320-WC = 32
Figure 45. WPB Valid Timing (WRITE)
HOLDB Pin
By HOLDB pin, command communication can be stopped temporarily (HOLD status). The HOLDB pin carries out command
communications normally when it is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the
HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release
the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD
status, by starting A4 address input, read can be restarted. When in HOLD status, leave CSB LOW. When it is set
CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
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Method to Cancel Each Command
1. READ, RDSR
・Method to cancel : cancel by CSB = “H”
Data
Ope code
8 bits
Ope code
8 bits
Address
Data
8 bits
8 bits/16bits
8 bits
Cancel available in all
areas of rdsr mode
Cancel available in all areas of read mode
Figure .46 READ Cancel Valid Timing
Figure .47 RDSR Cancel Valid Timing
2. WRITE, PAGE WRITE
a：Ope code, address input area.
Address
Data
tE/W
Ope code
8bits
Cancellation is available by CSB=”H”
b：Data input area (D7 to D1 input area)
Cancellation is available by CSB=”H”
8bits/16bits
8bits
b
a
d
c：Data input area (D0 area)
c
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any means.
d：tE/W area.
SCK
SI
Cancellation is available by CSB = “H”. However, when
write starts (CSB is started) in the area c, cancellation
cannot be made by any means. And by inputting on
SCK clock, cancellation cannot be made. In page write
mode, there is write enable area at every 8 clocks.
D7 D6 D5 D4 D3 D2 D1 D0
c
b
Figure 48. WRITE Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
3. WRSR
14 15
16
17
a：From ope code to 15 rise.
SCK
SI
Cancel by CSB =”H”.
b：From 15 clock rise to 16 clock rise (write enable area).
When CSB is started, write starts.
D1
a
D0
b
c
After CSB rise, cancellation cannot be made by any means.
c：After 16 clock rise.
tE/W
Ope code
8 bits
Data
8 bits
Cancel by CSB=”H”. However, when write starts (CSB is started)
in the area b, cancellation cannot be made by any means.
And, by inputting on SCK clock, cancellation cannot be made.
a
c
b
Figure 49. WRSR Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable,
therefore, it is recommended to fall in SCK = “L” area. As for SCK rise, assure timing of tCSS / tCSH or higher.
4. WREN, WRDI
a：From ope code to 7-th clock rise, cancel by CSB = “H”.
7
8
9
SCK
b：Cancellation is not available when CSB is started after 7-th clock.
Ope code
8 bits
a
b
Figure 50. WREN/WRDI Cancel Valid Timing
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High Speed Operation
In order to realize stable high speed operations, pay attention to the following input / output pin conditions.
1. Input Pin pull up, pull down Resistance
When to attach pull up, pull down resistance to EEPROM input pin, select an appropriate value for the microcontroller
VOL, IOL from VIL characteristics of this IC.
2. Pull up Resistance
VCC -VOLM
･･･①
RPU ≥
IOLM
･･･②
V
OLM ≤VILE
Microcontroller
VOLM
“L” output
IOLM
EEPROM
VILE
RPU
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA,
from the equation ①,
“L” input
5 -0.4
RPU ≥
-3
・VILE :EEPROM VIL specifications
・VOLM :Microcontroller VOL specifications
・IOLM :Microcontroller IOL specifications
2×10
∴RPU ≥ 2.3 ꢁ kΩ ꢀ
With the value of RPU to satisfy the above equation, VOLM
becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is
also satisfied.
Figure 51. Pull up Resistance
And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make CSB pull up.
3. Pull down Resistance
VOHM
RPD ≥
･･･③
IOHM
Microcontroller
VOHM
EEPROM
VIHE
･･･④
VOHM ≥VIHE
RPD
“H” output
“H” input
Example) When VCC=5V, VOHM=VCC-0.5V, IOHM＝0.4mA,
IOHM
V
IHE=VCC×0.7V, from the equation③,
5 -0.5
RPD ≥
-3
Figure 52. Pull down Resistance
0.4×10
∴RPU ≥11.3 ꢁ kΩ ꢀ
Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude
of VCC / GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of
0.8VCC / 0.2VCC is input, operation speed becomes slow. (Note1)
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as
possible, and make the amplitude of signal input to EEPROM close to the amplitude of VCC / GND level.
(Note1) At this moment, operating timing guaranteed value is guaranteed.
tPD_VIL characteristics
80
Spec
70
60
50
40
30
Vcc=2.5V
20
Ta=25
℃
VIH=Vcc
10
0
CL=100pF
0
0.2
0.4
0.6
0.8
1
VIL[V]
Figure 53. Data Output Delay Time vs “L” Input Voltage
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4. SO Road Capacity Condition
Load capacity of SO output pin affects upon delay characteristic of SO output. (Data output delay time, time from
HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacity small. In
concrete, “Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and
so forth.
tPD-CL characteristics
80
ꢀ
℃
Spec
Vcc=2.5V Ta=25
70
60
50
40
30
20
VIH/VIL=0.8Vcc/0.2Vcc
EEPROM
SO
Spec
CL
0
20
40
60
80
100
120
CL[pF]
Figure 54. Data Output Delay Time vs SO Load
5. Other Cautions
Make the wire length from the microcontroller to EEPROM input signal same length, in order to prevent setup / hold
violation to EEPROM, owing to difference of wire length of each input.
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Input / Output Circuit
1. Output Circuit
SO
OEint.
Figure 55. SO Output Equivalent Circuit
2. Input Circuit
RESETint.
CSB
Figure 56. CSB Input Equivalent Circuit
SCK
SI
Figure 57. SCK Input Equivalent Circuit
Figure 58. SI Input Equivalent Circuit
HOLDB
WPB
Figure 59. HOLDB Input Equivalent Circuit
Figure 60. WPB Input Equivalent Circuit
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Notes on Power ON/OFF
1. At Power ON/OFF, Set CSB “H” (=VCC).
When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes
may cause malfunction, mistake write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status,
all inputs are canceled.)
(Good example) CSB terminal is pulled up to VCC.
At power OFF, take 10ms or higher before supply. If power is turned on without observing this condition, the IC
internal circuit may not be reset, which please note.
(Bad example)
CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction, mistake write owing to
noises and the likes.
Even when CSB input is High-Z, the status becomes like this case, which please note.
2. LVCC Circuit
LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ =1.9V) or below, it prevent data rewrite.
3. P.O.R. Circuit
This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable
status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if
the recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status
owing to noises and the likes.
Recommended conditions of tR, tOFF, Vbot
tR
tOFF
Vbot
10ms or below
100ms or below
10ms or higher
10ms or higher
0.3V or below
0.2V or below
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Noise Countermeasures
1. VCC Noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1µF) between IC VCC and GND. At that moment, attach it as close to IC
as possible. And, it is also recommended to attach a bypass capacitor between board VCC and GND.
2. SCK Noise
When the rise time (tR) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to
clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysterisis width of this circuit is
set about 0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the
rise time (tR) of SCK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise
countermeasures. Make the clock rise, fall time as small as possible.
3. WPB Noise
During execution of write status register command, if there exist noises on WPB pin, mistake in recognition may occur
and forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input. In
the same manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
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Operational Notes – continued
10. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
11. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have
voltages within the values specified in the electrical characteristics of this IC.
12. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Ordering Information
B R
2 5
H
x x x
x - W C
E 2
Bus type
25 : SPI
Operating
Temperature
H : -40°C to +125°C
Capacity
010=1K
080=8K
Package
F
020=2K
040=4K
160=16K 320=32K
:SOP8
FJ
:SOP-J8
FVT
:TSSOP-B8
W : Double Cell
C : For Automotive Application
Packaging and forming specification
E2
:Embossed tape and reel
Lineup
Package
Quantity
Capacity
Orderable Part Number
Type
SOP8
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 2500
Reel of 2500
BR25H010F-WCE2
BR25H010FJ-WCE2
BR25H010FVT-WCE2
BR25H020F-WCE2
BR25H020FJ-WCE2
BR25H020FVT-WCE2
BR25H040F-WCE2
BR25H040FJ-WCE2
BR25H040FVT-WCE2
BR25H080F-WCE2
BR25H080FJ-WCE2
BR25H080FVT-WCE2
BR25H160F-WCE2
BR25H160FJ-WCE2
BR25H160FVT-WCE2
BR25H320F-WCE2
BR25H320FJ-WCE2
1K
2K
4K
8K
SOP-J8
TSSOP-B8
SOP8
SOP-J8
TSSOP-B8
SOP8
SOP-J8
TSSOP-B8
SOP8
SOP-J8
TSSOP-B8
SOP8
16K
32K
SOP-J8
TSSOP-B8
SOP8
SOP-J8
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Physical Dimension, Tape and Reel Information
Package Name
SOP8
(Max 5.35 (include.BURR)
<Tape and Reel information>
Tape
Embossed carrier tape
2500pcs
Quantity
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Physical Dimensions Tape and Reel Information - continued
Package Name
SOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
2500pcs
Quantity
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
26/29
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Daattaasshheeeett
BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Physical Dimensions Tape and Reel Information - continued
Package Name
TSSOP-B8
<Tape and Reel information>
Tape
Embossed carrier tape
3000pcs
Quantity
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Marking Diagrams (TOP VIEW)
SOP8 (TOP VIEW)
SOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
LOT Number
1PIN MARK
1PIN MARK
TSSOP-B8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
Marking Information
Product Name
Marking
Package
Type
Capacity
SOP8
1K
H010
H020
H040
H080
SOP-J8
TSSOP-B8
SOP8
2K
4K
8K
SOP-J8
TSSOP-B8
SOP8
SOP-J8
TSSOP-B8
SOP8
SOP-J8
TSSOP-B8
SOP8
16K
32K
H160
H320
SOP-J8
TSSOP-B8
SOP8
SOP-J8
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
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BR25Hxxx-WC Series (1K 2K 4K 8K 16K 32K)
Revision History
Date
Revision
Changes
23.May.2012
31.Oct.2013
001
002
New Release
All Page Document converted to new format.
www.rohm.com
TSZ02201-0R1R0G100060-1-2
31.Oct.2013 Rev.002
© 2012 ROHM Co., Ltd. All rights reserved.
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - SS
Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - SS
Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
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