BR93H56RFJ-WCE2_技术文档

Datasheet

Serial EEPROM Series Automotive EEPROM

125℃ Operation Microwire BUS EEPROM(3-Wire)

BR93Hxx-WC

(2K 4K 8K 16K)

●General Description

BR93Hxx-WC is a serial EEPROM of serial 3-line interface method.

●Features

●Packages W(Typ.) x D(Typ.) x H(Max.)

Conforming to Microwire BUS

Withstands electrostatic voltage 8kV,

(HBM method typ.,except BR93H66RFVM-WC)

Wide temperature range -40℃ to +125℃

Same package line up and same pin configuration

2.7V to 5.5V single supply voltage operation

Address auto increment function at read operation

Write mistake prevention function

¾

Write prohibition at power on

Write prohibition by command code

Write mistake prevention circuit at low voltage

SOP-J8

4.90mm x 6.00mm x 1.65mm

SOP8

5.00mm x 6.20mm x 1.71mm

Program cycle auto delete and auto end function

Program condition display by READY / BUSY

Low current consumption

¾

At write operation (at 5V)

At read operation (at 5V)

At standby condition (at 5V) : 0.1μA(Typ.)(CMOS input)

: 0.6mA (Typ.)

MSOP8

Built-in noise filter CS, SK, DI terminals

High reliability by ROHM original Double-Cell structure

Data retention for 20 years (Ta≦125℃)

Endurance up to 300,000 times (Ta≦125℃)

Data at shipment all address FFFFh

AEC-Q100 Qualified

2.90mm x 4.00mm x 0.90mm

●BR93Hxx-WC

Package type

SOP8

RF

SOP-J8

MSOP8

RFVM

Power source

voltage

Capacity

Bit format

Type

RFJ

2Kbit

4Kbit

8Kbit

16Kbit

128×16

256×16

512×16

1K×16

BR93H56-WC

BR93H66-WC

BR93H76-WC

BR93H86-WC

2.7V to 5.5V

●

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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●Absolute Maximum Ratings (Ta=25℃)

Parameter

Symbol

Limits

Unit

V

Remarks

Impressed voltage

VCC

Pd

-0.3 to +6.5

When using at Ta=25℃ or higher, 4.5mW, to be reduced per 1℃.

When using at Ta=25℃ or higher, 3.1mW, to be reduced per 1℃.

0.56 (SOP8)

0.56 (SOP-J8)

0.38 (MSOP8)

-65 to +150

Permissible dissipation

W

Storage temperature range

Operating temperature range

Terminal voltage

Tstg

Topr

‐

℃

V

-40 to +125

-0.3 to VCC+0.3

●Memory Cell Characteristics(VCC=2.7V to 5.5V)

Limit

Parameter

Limit

Min.

1,000,000

500,000

300,000

40

Typ.

Max.

-

Times

Years

Ta≦85℃

Ta≦105℃

Ta≦125℃

Ta≦25℃

Ta≦125℃

Endurance ^*1

Data retention ^*1

20

*1：Not 100％ TESTED

●Recommended Operating Ratings

Parameter

Symbol

Limits

Unit

V

Power source voltage

Input voltage

VCC

VIN

2.7 to 5.5

0 to VCC

●Electrical Characteristics(Unless otherwise specified, Ta=-40℃ to +125℃, V^CC=2.7V to 5.5V)

Limits

Parameter

Symbol

Unit

Conditions

Min.

Typ.

Max.

0.3x VCC

VCC +0.3

0.4

“L” input voltage

VIL

VIH

-0.3

-

V

“H” input voltage

0.7x VCC

-

“L” output voltage 1

“L” output voltage 2

“H” output voltage 1

“H” output voltage 2

Input leak current

Output leak current

VOL1

VOL2

VOH1

VOH2

ILI

0

-

V

IOL=2.1mA, 4.0V≦VCC≦5.5V

IOL=100μA

0

-

0.2

V

2.4

-

VCC

10

V

IOH=-0.4mA, 4.0V≦VCC≦5.5V

IOH=-100μA

VCC -0.2

-

V

-10

-

μA

mA

μA

VIN=0V to VCC

ILO

-10

-

10

VOUT=0V to VCC, CS=0V

fSK=1.25MHz, tE/W=10ms (WRITE)

fSK=1.25MHz (READ)

fSK=1.25MHz, tE/W=10ms (WRAL)

CS=0V, DO=OPEN

ICC1

ICC2

ICC3

ISB

-

3.0

Current consumption

Standby current

-

1.5

-

4.5

0.1

10

●Operating Timing Characteristics (Unless otherwise specified, Ta=-40℃ to +125℃, V^CC=2.7V to 5.5V)

Parameter

Symbol

fSK

Min.

Typ.

Max.

Unit

MHz

ns

SK frequency

SK “H” time

SK “L” time

-

250

200

100

0

-

7

-

1.25

tSKH

tSKL

tCS

-

ns

CS “L” time

CS setup time

DI setup time

CS hold time

DI hold time

ns

tCSS

tDIS

-

ns

-

ns

tCSH

tDIH

tPD1

tPD0

tSV

-

ns

100

-

ns

Data “1” output delay time

Data “0” output delay time

Time from CS to output establishment

Time from CS to High-Z

300

200

10

5

ns

-

ns

-

ns

tDF

-

ns

Write cycle time

tE/W

-

ms

Write cycle time(BR93H66RFVM-WC)

-

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●Sync data input / output timing

CS

tCSS

tSKH

tSKL

tCSH

SK

tDIS

tDIH

DI

tPD1

tPD0

DO(READ)

tDF

DO(WRITE)

STATUS VALID

○Data is taken by DI sync with the rise of SK.

○At read operation, data is output from DO in sync with the rise of SK.

○The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area

DO where CS is “H”, and valid until the next command start bit is input. And, white CS is “L”, DO becomes High-Z.

○After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following operation

mode.

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●Block Diagram

Power source voltage detection

Command decode

Control

CS

SK

Clock generation

Write

prohibition

High voltage occurrence

7bit

Address

buffer

Address

decoder

7bit

Command

register

8bit

9bit

DI

2,048 bit

8bit

9bit

10bit

4,096 bit

8,192 bit

16,384 bit

EEPROM

Data

register

R/W

amplifier

16bit

DO

Dummy bit

●Pin Configurations

TOP VIEW

VCC TEST2 TEST1

GND

5

VCC

8

NC

7

TEST GND

8

7

6

5

BR93H66RF-WC:SOP8

BR93H66RFJ-WC:SOP-J8

BR93H66RFVM-WC:MSOP8

BR93H76RF-WC:SOP8

BR93H76RFJ-WC:SOP-J8

BR93H86RF-WC:SOP8

BR93H86RFJ-WC:SOP-J8

BR93H56RF-WC:SOP8

BR93H56RFJ-WC:SOP-J8

1

2

3

4

1

2

3

4

CS

SK

DI

DO

CS

SK

DI

DO

●Pin Descriptions

Pin name

Vcc

I / O

Function

-

Power source

GND

CS

-

All input / output reference voltage, 0V

Chip select input

Input

SK

Input

Serial clock input

DI

Input

Start bit, ope code, address, and serial data input

DO

Output

Serial data output, READY / BUSY internal condition display output

Non connected terminal, Vcc, GND or OPEN

TEST terminal, GND or OPEN

NC

-

TEST1

TEST2

TEST

TEST terminal, Vcc, GND or OPEN

TEST terminal, GND or OPEN

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●Typical Performance Curves

(The following characteristic data are Typ. values.)

Figure 2. L input voltage VIL (CS, SK, DI)

Figure 1. H input voltage VIH (CS, SK, DI)

Figure 4. L output voltage VOL-IOL

(VCC=4.0V)

Figure 3. L output voltage VOL-IOL (VCC=2.7)

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●Typical Performance Curves‐Continued

Figure 5. H output voltage VOH-IOH

(VCC=2.7)

Figure 6. H output voltage VOH-IOH (VCC=4.0V)

Figure 7. Input leak current ILI (CS, SK, DI)

Figure 8. Output leak current ILO (DO)

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●Typical Performance Curves‐Continued

Figure 9. Current consumption at WRITE Operation

ICC1 (WRITE, fSK=1.25MHz)

Figure 10. Consumption current at READ Operation

ICC2 (READ, fSK=1.25MHz)

Figure 11. Consumption current at WRAL operation

ICC3 (WRAL, fSK=1.25MHz)

Figure 12. Consumption current at standby condition

ISB

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●Typical Performance Curves‐Continued

Figure 14. SK high time tSKH

Figure 13. SK frequency fSK

Figure 16. CS low time tCS

Figure 15. SK low time tSKL

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●Typical Performance Curves‐Continued

Figure 17. CS setup time tCSS

Figure 18. DI setup time tDIS

Figure 19. DI hold time tDIH

Figure 20. CS hold time tCSH

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●Typical Performance Curves‐Continued

Figure 21. Data “1” output delay time tPD1

Figure 22. Data “0” output delay time tPD0

Figure 23. Time from CS to output establishment

tSV

Figure 24. Time from CS to High-Z tDF

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●Typical Performance Curves‐Continued

6

5

4

3

2

1

0

SPEC

Ta=125

℃

Ta=25

℃

Ta=-40

℃

2

3

4

5

6

SUPPLY VOLTAGE : Vcc(V)

Figure 25. Write cycle time tE/W

Figure 26. Write cycle time tE/W

(BR93H66RFVM-WC)

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●Description of Operations

Communications of the Microwire Bus are carried out by SK (serial clock), DI (serial data input), DO (serial data output), and

CS (chip select) for device selection.

When to connect one EEPROM to a microcontroller, connect it as shown in Figure 27-(a) or Figure 27-(b). When to use the

input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Figure 27-(b) (Refer

to page 16.), and connection by 3 lines is available.

In the case of plural connections, refer to Figure 27-(c).

Micro-

controller

Micro-

BR93HXX

CS

BR93HXX

CS

controller

CS3

CS1

CS0

SK

DO

DI

CS

SK

DO

DI

CS

SK

DO

SK

DI

SK

DI

DO

Device 1

Device 2

Device 3

Figure 27-(a) Connection by 4 lines

Figure 27-(b) Connection by 3 lines

Figure 27-(c) Connection example of plural devices

Figure 27. Connection method with microcontroller

Communications of the Microwire Bus are started by the first “1” input after the rise of CS. This input is called a start bit.

After input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners.

“0” input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO of

the microcontroller, input “0” before the start bit input, to control the bit width.

●Command Mode

Start

bit

Ope

code

Address

Command

Data

BR93H56/66-WC

A7,A6,A5,A4,A3,A2,A1,A0

BR93H76/86-WC

*1

Read (READ)

A9,A8,A7,A6,A5,A4,A3,A2,A1,A0

D15 to D0(READ DATA)

1

10

Write enable (WEN)

Write (WRITE)

1

*

1

*

* *

1

00

01

00

*2

A7,A6,A5,A4,A3,A2,A1,A0

A9,A8,A7,A6,A5,A4,A3,A2,A1,A0

B2,B1,B0

D15 to D0(WRITE DATA)

*2,3

Write all (WRAL)

0

1

*

B0

*

0

1

* * * * *

Write disable (WDS)

0

*

0

*

* *

1

00

・ Input the address and the data in MSB first manners.

・ As for *, input either VIH or VIL.

*Start bit

Acceptance of all the commands of this IC starts at recognition of the start bit.

The start bit means the first “1” input after the rise of CS.

A7 and B0 of BR93H56-WC becomes Don't Care.

A9 and B2 of BR93H76-WC becomes Don't Care.

*1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and

address data in significant order are sequentially output continuously. (Auto increment function)

*2 When the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written.

*3 For the write all command, data written in memory cell of the areas designated by B2, B1, and B0, are automatically

deleted, and input data is written in bulk.

●Write All Area

B2 B1 B0

Write area

Designation of B2, B1, and B0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

000h to 07Fh

080h to 0FFh

100h to 17Fh

180h to 1FFh

200h to 27Fh

280h to 2FFh

300h to 37Fh

380h to 3FFh

H56

H66

H76

H86

＊

B2

＊

B0

B1

・The write all command is written in bulk in 2Kbit unit.

The write area can be selected up to 3bit. Confirm the settings and write areas of the above B2, B1, and B0.

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●Timing Chart

1) Read cycle (READ)

～～

CS

*1

SK

DI

1

2

n

n+1

4

～～

BR93H56/66-WC : n=27, m=7

BR93H76/86-WC : n=29, m=9

A1

A0

Am

1

0

～～

*2

D15 D14

D0

0

D15 D14

D1

DO

～～

*2 The following address data output

(auto increment function)

High-Z

*1 Start bit

When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as a

start bit, and the following operation is started. This is common to all the commands to described hereafter.

Figure 28. Read cycle

○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in

sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK.

This IC has address auto increment function valid only at read command. This is the function where after the above read

execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto increment,

keep CS at “H”.

2) Write cycle (WRITE)

～～

tCS

n

CS

SK

DI

STATUS

～～

BR93H56/66-WC : n=27, m=7

BR93H76/86-WC : n=29, m=9

2

1

4

～～

D15 D14

D1

A1

A0

D0

Am

1

0

1

tSV

READY

DO

BUSY

～～

High-Z

Figure 29. Write cycle

tE/W

○In this command, input 16bit data (D15 to D0) are written to designated addresses (Am to A0). The actual write starts by

the fall of CS of D0 taken SK clock(n-th clock from the start bit input), to the rise of the (n+1)-th clock.

When STATUS is not detected, (CS="L" fixed) Max. 10ms(Max.5ms:BR93H66RFVM-WC) in conformity with tE/W, and

when STATUS is detected (CS="H"), all commands are not accepted for areas where "L" (BUSY) is output from D0,

therefore, do not input any command.

Write is not made even if CS is started after input of clock after (n+1)-th clocks.

Note) Take tSKH or more from the rise of the n-th clock to the fall of CS.

3) Write all cycle (WRAL)

tCS

STATUS

CS

1

2

5

m

n

BR93H56/66-WC : n=27, m=9

BR93H76/86-WC : n=29, m=11

SK

DI

1

0

1

B2

B1

B0 D15

D1

D0

tSV

BUSY

READY

DO

High-Z

tE/W

Figure 30. Write all cycle

○In this command, input 16bit data is written simultaneously to designated block for 128 words. Data is writen in bulk at a

write time of only Max. 10ms(Max.5ms:BR93H66RFVM-WC) in conformity with tE/W. When writing data to all addresses,

designate each block by B2, B1, and B0, and execute write. Write time is Max.10ms(Max.5ms:BR93H66RFVM-WC). The

actual write starts by the fall of CS from the rise of D0 taken at SK clock (n-th clock from the start bit input), to the rise of

the (n+1)-th clock. When CS is ended after clock input after the rise of the (n+1)-th clock, command is cancelled, and write

is not completed.

Note)Take tSKH or more from the rise of the n-th clock to the fall of CS.

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4) Write enable (WEN) / disable (WDS) cycle

～～

CS

SK

1

2

0

3

4

5

6

7

8

n

～～

BR93H56/66-WC : n=11

BR93H76/86-WC : n=13

ENABLE=1

DISABLE=0

1

0

～～

DI

1

0

DO

High-Z

Figure 31. Write enable (WEN) / disable (WDS) cycle

○At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write

command, it is necessary to execute the write enable command. And, once this command is executed,

it is valid unitl the write disable command is executed or the power is turned off. However, the read

command is valid irrespective of write enable / disable command. Input to SK after 6 clocks of this

command is available by either “H” or “L”, but be sure to input it.

○When the write enable command is executed after power on, write enable status gets in. When the

write disable command is executed then, the IC gets in write disable status as same as at power on,

and then the write command is cancelled thereafter in software manner. However, the read command is

executable. In write enable status, even when the write command is input by mistake, write is started.

To prevent such a mistake, it is recommended to execute the write disable command after completion

of write.

●Application

1) Method to cancel each command

○READ

Address^*1

8bit

Data

16bit

*1 Address is 8 bits in BR93H56-WC, and BR93H66-WC.

Start bit

1bit

Ope code

2bit

Address is 10 bits in BR93H76-WC, and BR93H86-WC.

Cancel is available in all areas in read mode.

●Method to cancel：cancel by CS=“L”

Figure 32. READ cancel available timing

○WRITE, WRAL

・Rise of 27clock *2

SK

DI

26

D1

27

D0

29

28

c

a

b

Enlarged figure

*1

(Case of BR93H56-WC)

Start bit

1bit

Ope code

2bit

Address

8bit

Data

tE/W

c

16bit

b

a

*1 Address is 8 bits in BR93H56/66-WC

Address is 10 bits in BR93H76/86-WC

*2 27 clocks in BR93H56/66-WC

29 clocks in BR93H76/86-WC

*3 28 clocks in BR93H56/66-WC

30 clocks in BR93H76/86-WC

a：From start bit to 27 clock rise

Cancel by CS=“L”

b：27 clock rise and after *²

Cancellation is not available by any means. If Vcc is made OFF in this area,

designated address data is not guaranteed, therefore write once again.

Note 1) If Vcc is made OFF in this area,

designated address data is not guaranteed,

therefore write once again.

c：28 clock rise and after *³

Cancel by CS=“L”

However, when write is started in b area (CS is ended), cancellation is not

available by any means.

And when SK clock is input continuously, cancellation is not available.

Note 2) If CS is started at the same timing as that of

the SK rise, write execution/cancel becomes

unstable, therefore, it is recommended to fail in

SK=”L” area. As for SK rise, recommend timing of

tCSS/tCSH or higher.

Figure 33. WRITE, WRAL cancel available timing

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2) Equivalent circuit

○Output circuit

DO

OEint.

Figure 34. Output circuit (DO)

○ Input circuit

RESET int.

TEST1

(TEST)

TESTint.

CSint.

LPF

CS

EN

Figure 35. Input circuit (CS)

Figure 36. Input circuit (TEST1, TEST)

EN

TEST2

SK

DI

SK(DI)int.

LPF

Figure 38. Input circuit (TEST2)

Figure 37. Input circuit (SK, DI)

3) I/O peripheral circuit

3-1) Pull down CS.

By making CS=“L” at power ON/OFF, mistake in operation and mistake write are prevented.

Refer to the item 6) Notes at power ON/OFF in page 20.

○Pull down resistance Rpd of CS pin

To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary.

Select an appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC.

VOHM

Rpd ≧

・・・①

IOHM

Microcontroller

VOHM

EEPROM

VIHE

VOHM ≧ VIHE

・・・②

Example) When V_CC=5V, VIHE=2V, VOHM=2.4V, IOHM=2mA,

from the equation ①,

2.4

2×10^-3

“H” output

“L” input

IOHM

Rpd

Rpd ≧

∴

Rpd ≧ 1.2 [kΩ]

With the value of Rpd to satisfy the above equation, VOHM becomes

Figure 39. CS pull down resistance

2.4V or higher, and VIHE (=2.0V), the equation ② is also satisfied.

: EEPROM VIH specifications

: Microcontroller VOH specifications

:Microcontroller IOH specifications

・VIHE

・VOHM

・IOHM

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3-2) DO is available in both pull up and pull down.

Do output become “High-Z” in other READY / BUSY output timing than after data output at read command and write

command. When malfunction occurs at “High-Z” input of the microcontroller port connected to DO, it is necessary to

pull down and pull up DO. When there is no influence upon the microcontroller operations, DO may be OPEN. If DO

is OPEN, and at timing to output status READY, at timing of CS=“H”, SK=“H”, DI=“H”, EEPROM recognizes this as

a start bit, resets READY output, and DO=”High-Z”, therefore, READY signal cannot be detected. To avoid such

output, pull up DO pin for improvement.

CS

SK

DI

CS

SK

DI

“H”

Enlarged

D0

High-Z

CS=SK=DI=”H”

When DO=OPEN

READY

High-Z

DO

BUSY

Improvement by DO pull up

CS=SK=DI=”H”

When DO=pull up

READY

Figure 40. READY output timing at DO=OPEN

○Pull up resistance Rpu and pull down resistance Rpd of DO pin

As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller

VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC.

Vcc－VOLE

Rpu ≧

・・・③

・・・④

IOLE

VOLE ≦ VILM

Microcontroller

VILM

EEPROM

Rpu

IOLE

Example) When V_CC=5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V,

from the equation ③,

VOLE

5－0.4

2.1×10^-3

“L” input

Rpu ≧

・VOLE

・IOLE

・VILM

“L” output

∴

Rpu ≧ 2.2 [kΩ]

With the value of Rpu to satisfy the above equation, VOLE becomes 0.4V or

below, and with VILM(=0.8V), the equation ④ is also satisfied.

: EEPROM VOL specifications

: EEPROM IOL specifications

: Microcontroller VIL specifications

・VOLE

・IOLE

・VILM

Figure 41. DO pull up resistance

VOHE

Rpd ≧

・・・⑤

・・・⑥

IOHE

VOHE ≧ VIHM

EEPROM

Microcontroller

Example) When V_CC=5V, VOHE=Vcc－0.2V, IOHE=0.1mA,

VIHM=Vcc×0.7V from the equation ⑤

VIHM

VOHE

5－0.2

0.1×10^-3

IOHE

Rpd ≧

“H” input

“H” output

Rpd

∴

Rpd ≧ 48 [kΩ]

With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V or

below, and with VIHM (=3.5V), the equation ⑥ is also satisfied.

Figure 42. DO pull down resistance

: EEPROM VOH specifications

: EEPROM IOH specifications

: Microcontroller VIH specifications

・VOHE

・IOHE

・VIHM

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○READY / BUSY status display (DO terminal)

(common to BR93H56-WC, BR93H66-WC, BR93H76-WC, BR93H86-WC)

This display outputs the internal status signal. When CS is started after tCS (Min.200ns)

from CS fall after write command input, “H” or “L” output.

R/B display＝“L” (BUSY) = write under execution

(DO status)

After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically.

And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted.

R/B display = “H” (READY) = command wait status

(DO status）

Even after tE/W (max.10ms) (Max.5ms:BR93H66RFVM-WC) from write of the memory cell, the following

command is accepted.

Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore,

DI=“L” in the area CS=“H”. (Especially, in the case of shared input port, attention is required.)

*Do not input any command while status signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted.

Therefore, status READY output is cancelled, and malfunction and mistake write may be made.

STATUS

CS

SK

DI

CLOCK

WRITE

INSTRUCTION

High-Z

tSV

BUSY

DO

READY

Figure 43. R/B status output timing chart

4) When to directly connect DI and DO

This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,

meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1

control line.

Microcontroller

EEPROM

DI/O PORT

DI

R

DO

Figure 44. DI, DO control line common connection

○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input.

Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the

same time in the following points.

4-1) 1 clock cycle to take in A0 address data at read command

Dummy bit “0” is output to DO terminal.

→When address data A0 = “1” input, through current route occurs.

EEPROM CS input

“H”

EEPROM SK input

A1

A0

EEPROM DI input

Collision of DI input and DO output

D15 D14 D13

EEPROM DO output

Microcontroller DI/O port

0

High-Z

A1 A0

High-Z

Microcontroller output

Microcontroller input

Figure 45. Collision timing at read data output at DI, DO direct connection

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4-2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output.

When the next start bit input is recognized, “HIGH-Z” gets in.

→Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”,

READY output “H” is output from DO terminal, and through current route occurs.

Feedback input at timing of these 4-1) and 4-2) does not cause disorder in basic operations, if resistance R is inserted.

～～

EEPROM CS input

～～

Write command

～～

EEPROM SK input

EEPROM DI input

Write command

～～

High-Z

READY

Collision of DI input and DO output

BUSY

EEPROM DO output

Microcontroller DI/O port

～～

BUSY

Write command

～～

Microcontroller output

Microcontroller input

Microcontroller output

Figure 46. Collision timing at DI, DO direct connection

○Selection of resistance value R

The resistance R becomes through current limit resistance at data collision. When through current flows, noises of

power source line and instantaneous stop of power source may occur. When allowable through current is defined as I,

the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so

forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL,

even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence

upon basic operations.

4-3) Address data A0 = “1” input, dummy bit “0” output timing

(When microcontroller DI/O output is “H”, EEPROM DO outputs “L”, and “H” is input to DI)

・Make the through current to EEPROM 10mA or below.

・See to it that the input level VIH of EEPROM should satisfy the following.

Conditions

VOHM ≦ VIHE

Microcontroller

EEPROM

VOHM ≦ IOHM×R + VOLE

At this moment, if VOLE=0V,

DI/O PORT

VOHM

IOHM

DI

“H” output

VOHM ≦ IOHM×R

R

VOHM

R ≧

DO

∴

・・・⑦

IOHM

VOLE

・VIHE : EEPROM VIH specifications

“L” output

: EEPROM VOL specifications

・VOLE

・VOHM

・IOHM

: Microcontroller VOH specifications

: Microcontroller IOH specifications

Figure 47. Circuit at DI, DO direct connection (Microcontroller DI/O “H” output, EEPROM “L” output)

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4-4) DO status READY output timing

(When the microcontroller DI/O is “L”, EEPROM DO outputs “H”, and “L” is input to DI)

・Set the EEPROM input level VIL so as to satisfy the following.

Conditions

Microcontroller

DI/O PORT

EEPROM

VOLM ≧ VILE

VOLM ≧ VOHE – IOLM×R

As this moment, if VOHE=Vcc,

DI

“L” output

VOLM

R

IOHM

VOLM ≧ Vcc – IOLM×R

DO

Vcc – VOLM

∴

R ≧

・・・⑧

VOHE

“H” output

IOLM

・VILE

: EEPROM VIL specifications

: EEPROM VOH specifications

: Microcontroller VOL specifications

: Microcontroller IOL specifications

・VOHE

・VOLM

・IOLM

Example) When Vcc=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA,

From the equation ⑦,

From the equation ⑧,

VOHM

Vcc –

R ≧

IOHM

VOLM

5

IOLM

R ≧

0.4×10^-3

5 – 0.4

2.1×10^-3

∴

R ≧ 12.5 [kΩ] ・・・⑨

∴

R ≧ 2.2 [kΩ] ・・・⑩

Therefore, from the equations ⑨ and ⑩,

R ≧ 12.5 [kΩ]

∴

Figure 48. Circuit at DI, DO direct connection (Microcontroller DI/O “L” output, EEPROM “H” output)

5) Notes at test pin wrong input

There is no influence of external input upon TEST2 pin.

For TEST1 (TEST)pin, input must be GND or OPEN. If H level is input, the following may occur,

1. At WEN, WDS, READ command input

There is no influence by TEST1 (TEST) pin.

2. WRITE, WRAL command input

* BR93H56-WC, BR93H66-WC, address 8 bits

BR93H76-WC, BR93H86-WC, address 10 bits

Start bit

1bits

Ope code

2bits

Address*

8bits

Data

16bits

tE/W

a

Write start

CS rise timing

Figure 49.TEST1(TEST) pin wrong input timing

a：There is no influence by TEST1 (TEST) pin.

b：If H during write execution, it may not be written correctly. And H area remains BUSY and READY does not go back.

Avoid noise input, and at use, be sure to connect it to GND terminal or set it OPEN.

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6) Notes on power ON/OFF

・At power ON/OFF, set CS “L”.

When CS is “H”, this IC gets in input accept status (active). At power ON, set CS “L” to prevent malfunction from noise.

(When CS is in “L” status, all inputs are cancelled.) At power decline low power status may prevail. Therefore, at power

OFF, set CS “L” to prevent malfunction from noise.

V_CC

GND

V_CC

CS

GND

Bad example

Good example

Figure 50. Timing at power ON/OFF

(Bad example) CS pin is pulled up to Vcc.

(Good example）It is “L” at power ON/OFF.

In this case, CS becomes “H” (active status), EEPROM may

malfunction or have write error due to noises. This is true even

when CS input is High-Z.

Set 10ms or higher to recharge at power OFF.

When power is turned on without observing this condition,

IC internal circuit may not be reset.

○POR citcuit

This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR operation, it gets in write

disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS

is “H” at power ON/OFF, it may become write enable status owing to noises and the likes. For secure operation,

observe the follwing conditions.

1. Set CS=”L”

2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit operation.

t_R

VCC

Recommended conditions of tR, tOFF, Vbot

t_R

t_OFF

Vbot

10ms or below 10ms or higher 0.3V or below

100ms or below 10ms or higher 0.2V or below

t_OFF

Vbot

0

Figure 51. Rise waveform diagram

○LVCC circuit

LVCC (VCC-Lockout) circuit prevents data rewrite operation at low power, and prevents wrong write.

At LVCC voltage (Typ.=1.9V) or below, it prevent data rewrite.

7) Noise countermeasures

○VCC noise (bypass capacitor)

When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is

recommended to attach a by pass capacitor (0.1μF) between IC VCC and GND, At that moment, attach it as close to IC

as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.

○SK noise

When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to

clock bit displacement.

To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is set about 0.3, if noises

exist at SK input, set the noise amplitude 0.3p-p or below. And it is recommended to set the rise time (tR) of SK 100ns

or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the clock rise,

fall time as small as possible.

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●Cautions on Use

(1) Described numeric values and data are design representative values, and the values are not guaranteed.

(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further

sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in

consideration of static characteristics and transition characteristics and fluctuations of external parts and our IC.

(3) Absolute Maximum Ratings

If the absolute maximum ratings such as impressed voltage and operating temperature range and so forth are exceeded,

IC may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of

fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that

conditions exceeding the absolute maximum ratings should not be impressed to IC.

(4) GND electric potential

Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower than

that of GND terminal in consideration of transition status.

(5) Heat design

In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin.

(6) Terminal to terminal shortcircuit and wrong packaging

When to package IC onto a board, pay sufficient attention to IC direction and displacement. Wrong packaging may

destruct IC. And in the case of shortcircuit between IC terminals and terminals and power source, terminal and GND

owing to foreign matter, IC may be destructed.

(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently.

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●Ordering Information

Product Code Description

B

R

9 3

H

x x

x

x - W C

x

BUS Type

93：Microwire

Operating temperature

-40℃ to +125℃

Capacity

56=2K

66=4K

76=8K

86=16K

Package type

RF

: SOP8

RFJ

: SOP-J8

: MSOP8

RFVM

W : Double cell

C : For Automotive Application

Package specifications

E2

TR

：Embossed tape and reel (SOP8, SOP-J8)

：Embossed tape and reel (MSOP8)

●Lineup

Package

Capacity

Type

SOP8

Quantity

2K

4K

Reel of 2500

SOP-J8

SOP8

Reel of 2500

Reel of 3000

Reel of 2500

SOP-J8

MSOP8

SOP8

8K

SOP-J8

SOP8

16K

Reel of 2500

SOP-J8

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●Physical Dimension Tape and Reel Information

SOP8

5.0 0.2

(MAX 5.35 include BURR)

+

−

6

°

4°

4

°

8

7

6

5

1

2

3

4

0.595

+0.1

0.17

-

0.05

S

0.1 S

1.27

0.42 0.1

(Unit : mm)

Tape

Embossed carrier tape

Quantity

2500pcs

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Physical Dimension Tape and Reel Information - Continued

SOP-J8

4.9 0.2

(MAX 5.25 include BURR)

+

6°

4°

−4°

8

7

6

5

1

2

3

4

0.545

0.2 0.1

S

1.27

0.42 0.1

0.1

S

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Physical Dimension Tape and Reel Information – Continued

MSOP8

2.9 0.1

(MAX 3.25 include BURR)

+

6°

4°

−4°

8 7 6 5

1

2 3 4

1PIN MARK

+0.05

0.145

–0.03

0.475

S

0.22

–0.04

0.08 S

0.65

(Unit : mm)

Tape

Embossed carrier tape

3000pcs

Quantity

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1pin

Direction of feed

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Marking Diagrams

SOP8(TOP VIEW)

SOP-J8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

1PIN MARK

MSOP8(TOP VIEW)

Part Number Marking

LOT Number

1PIN MARK

●Marking Information

Product Name

Marking

Capacity

2K

Package Type

SOP8

RH56

RH66

RH76

RH86

SOP-J8

SOP8

SOP-J8

MSOP8

SOP8

4K

8K

SOP-J8

SOP8

16K

SOP-J8

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●Revision History

Date

Revision

001

Changes

31.Aug.2012

New Release

P.1 Added AEC-Q100 Qualified

P.2 Changed Unit of Rd

6.Nov.2013

002

P.22 Update Product Code Description.

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice - SS

Rev.002

Daattaasshheeeett

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

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third parties with respect to the information contained in this document.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

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consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - SS

Rev.002

Daattaasshheeeett

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

Notice – WE

Rev.001


型号：	BR93H56RFJ-WCE2
厂家：	ROHM
描述：	EEPROM, 128X16, Serial, CMOS, PDSO8, SOP-8 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件：	总30页 (文件大小：938K)
中文：	中文翻译
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BR93H56RFJ-WCE2 [ROHM]

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