BU1594AGLU [ROHM]

Consumer Circuit, PBGA128, VFLGA-128;
BU1594AGLU
型号: BU1594AGLU
厂家: ROHM    ROHM
描述:

Consumer Circuit, PBGA128, VFLGA-128

商用集成电路
文件: 总2页 (文件大小:277K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Multimedia Image Processor  
for Mobile Camera  
BU1594AGS/AGLU  
Description  
Dimension (Unit : mm)  
BU1594AGS/AGLU series are camera/LCD interface  
LSIs designed for folding type cellular phones.  
This LSI enables to control camera/LCD signal and to  
reduce the number of main internal wires in the hinge  
part of the cellular phones, thus it is advantageous for  
radiation noise countermeasures. Hardware control  
of camera image inputting, LCD display and JPEG  
encode/decode makes it possible to greatly reduce  
the load on the CPU.  
1Pin  
MARK  
9.0±0.1  
8.7  
0.8  
φ0.45±0.05  
0.08 A B  
J
H
G
F
E
D
C
B
A
1
2
3
4
5
6
7
8
9
P=0.8×8  
1.3±0.15  
S
Features  
A
1) Built-in camera image input interface and  
0.1  
S
image processing function  
2) Built-in compound function of camera image  
and photo frame (15 frame/sec. display)  
3) Built-in JPEG encode/decode function  
(VGA size,15 frame/sec. compression)  
4) Built-in main/sub LCD interface  
FBGA80A  
(Same bus switch control)  
A
7.0±0.1  
1PIN  
127-  
φ0.3±0.05  
0.75±0.1  
P=0.5X11  
MARK  
5) Built-in control mode to go through LCD  
6) Built-in PWM output for 3-color LED and white LED control  
7) Built-in oscillation circuit  
0.05  
M
S
AB  
M
L
K
J
H
G
F
E
D
C
B
A
(Clocks are not passed through hinge part.)  
1
2
3
4
5
6
7
8
9
101112  
S=10/1  
1PINMARK  
0.5  
0.3  
(UNIT:mm)  
Applications  
EX319-5006  
S
Cellular phone with camera  
0.08  
S
Absolute Maximum Ratings (Ta=25˚C)  
VFLGA128V7  
Symbol  
VDDIO1,2  
VDD  
VIN1,2  
Tstg  
Limits  
~
Unit  
V
V
V
˚C  
mW  
mW  
Parameter  
Applied supply voltage 1,2  
–0.5  
–0.5  
–0.5  
–30  
+3.5  
+2.2  
Applied supply voltage 3  
~
Input voltage  
Storage temperature range  
VDDIO1,2  
+
0.5  
~
+125  
~
1
2
4
FBGA80A  
,
Pd  
Pd  
610  
450  
1200  
650  
Package power  
3
,
VFLGA128V7  
∗1 Derating : 6.1mW/˚C for operation above Ta=25˚C (When only IC is used.)  
∗2 Derating : 12.0mW/˚C for operation above Ta=25˚C PCB (70mmx70mm, t=1.6mm) glass epoxy mounting.  
∗3 Derating : 4.5mW/˚C for operation above Ta=25˚C (When only IC is used.)  
∗4 Derating : 6.5mW/˚C for operation above Ta=25˚C PCB (70mmx70mm, t=1.6mm) glass epoxy mounting.  
This product is not designed for protection against radioactive rays.  
Recommended Operating Conditions (Ta=25˚C)  
Symbol  
VDD  
Min.  
1.70  
1.70  
2.70  
Typ.  
1.80  
1.80  
2.85  
-
Max.  
1.90  
3.00  
Unit  
V
V
V
V
Parameter  
Applied supply voltage 1(CORE)  
Applied supply voltage 2 (I/O)  
Applied supply voltage 3 (I/O)  
Input voltage range  
VDDIO1  
VDDIO2  
3.00  
VIN-VDDIO1,2  
VDDIO+0.3  
+85  
-
0.3  
20  
Operating temperature range  
Supply power in order to VDDVDDIO1VDDIO2  
TOPR  
-
-
˚C  
Electrical characteristics (Unless otherwise noted: Ta=25˚C, VDD=1.8V, VDDIO=2.85V, GND=0.0V, fin=30.0MHz, fSYS=30.0MHz)  
Parameter  
Input frequency  
Internal operating frequency  
Symbol  
f IN  
f SYS  
Min.  
Typ.  
Max.  
30.0  
30.0  
Unit  
MHz  
MHz  
Conditions  
XIN (DUTY50%)  
Internal SCLK frequency  
At camera ON, LCD display ON  
At viewer operating  
Operating  
IDD  
5.5  
mA  
consumption current  
At suspend mode setting  
VIH=VDDIO  
IDDst  
IIH1  
IIH2  
IIH3  
IIL1  
IIL2  
IIL3  
50  
10  
100  
10  
10  
10  
-25  
Static consumption current  
Input "H" current 1  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
50  
-10  
Input "H" current 2  
Input "H" current 3  
Input "L" current 1  
Input "L" current 2  
Input "L" current 3  
Pull-Down terminal, VIH=VDDIO  
Pull-Up terminal, VIH=VDDIO  
VIL=GND  
25  
-
-
-
10  
10  
10  
Pull-Down terminal, VIL=VDDIO  
Pull-Up terminal, VIL=VDDIO  
-
100  
-50  
VDDIO  
x0.8  
VDDIO  
+0.3  
Normal input  
V
V
V
Input "H" voltage 1  
Input "L" voltage 1  
Input "H" voltage 2  
VIH1  
VIL1  
VIH2  
(including input mode of I/O terminal)  
VDDIO  
x0.2  
Normal input  
-0.3  
(including input mode of I/O terminal)  
VDDIO  
x0.85  
VDDIO  
+0.3  
Hysteresis input  
VDDIO  
x0.15  
Hysteresis input  
V
V
V
Input "L" voltage 2  
VIL2  
Vhys  
VOH  
-
0.3  
0.9  
Hysteresis input (XIN)  
Hysteresis voltage width  
Output "H" voltage  
VDDIO  
IOH1=-1.0mA (DC)  
VDDIO  
(including output mode of I/O terminal)  
-
0.4  
IOL1=1.0mA (DC)  
V
Output "L" voltage  
System Diagram  
VOL  
0.0  
0.4  
(including output mode of I/O terminal)  
BU1594AGS  
BU1594AGLU  
FBGA80 Package VFLGA128V7 Package  
MAX VGA size(640x480)  
Camera  
MAX 176x232(65K color)  
Camera I/F  
Filter  
LCD I/F  
MAIN  
LCD  
Panel  
Memory Ctrl  
SUB  
Back light  
white LED  
Full color LED  
JPEG  
Display  
Display  
R
G
B
CODEC  
CameraMem.  
LCD  
Panel  
R
HOST IF  
LED Driver  
LED Controller  
The number of signals at connection part can be reduced.  
Clock does not go through.  
Power  
1
4
7
2
3
RF  
Audio  
SRAM  
Baseband  
CPU  
5
8
0
6
9
#
FLASH  
CPU Bus  

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