BU3081FV [ROHM]
Video Clock Generator, 36.864MHz, CMOS, PDSO28, SSOP-28;
| 型号： | BU3081FV |
| 厂家： | 
ROHM |
| 描述： | Video Clock Generator, 36.864MHz, CMOS, PDSO28, SSOP-28 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总8页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BU3081FV
Multimedia ICs
Clock generator with built-in VCO, VCXO
BU3081FV
BU3081FV is a clock generator. It can generate four video / audio clock signals that is used for DVD recorder (Especially
for DVD recorder with DV interface of IEEE1394) from one reference frequency. Reference frequency suited for set
application can be selected from built-in VCO, VCXO and external input.
zApplications
zExternal dimensions (Unit : mm)
DVD Recorder
10.0 ± 0.2
28
15
zFeatures
1) Clock signals are generated by connecting crystal
oscillator.
1
14
0.15 ± 0.1
0.1
2) SSOP-B28 package
3) 3.3V operating voltage
0.65
0.22 ± 0.1
4) Built-in VCXO (Voltage-Controlled Crystal Oscillator)
adjusts clock signal ±110ppm.
5) PLL reference frequency is available from built-in
VCO, VCXO and external input.
6) Audio clock can be selected by switches.
SSOP-B28
zAbsolute maximum ratings (Ta=25°C)
Limits
Typ.
3.3
Parameter
Applied voltage
Symbol
Unit
Min.
Max.
V
DD
IN
−0.3
+7.0
V
V
Input voltage
V
−0.3
−30
−
−
−
−
V
DD+0.3
+125
850
Strange temperature range
Tstg
PD
°C
mW
Power dissipation
∗ An operation is not guaranteed.
∗ In case it is used at Ta=25°C or more, 8.5mW is reduced at every 1°C.
∗ Radiation resistance design is not used.
∗ Power dissipation measured when BU3081FV is place in the board.
zRecommended operating conditions (Ta=25°C)
Limits
Parameter
Symbol
Unit
Min.
3.15
Typ.
3.3
Max.
Analog VDD voltage
AVDD,VDD_V
3.45
3.6
V
V
Digital VDD voltage
V
DD_EX, VDD
VIH
3.0
0.8VDD
0.0
3.3
Input H voltage range
Input L voltage range
−
VDD
V
VIL
−
25
0.2VDD
70
V
Operation temperature range
Frequency control voltage
Output maximum load (CLK)
Iopr
−5
°C
V
V
C
0.25VDD
−
0.5VDD
−
0.75VDD
15
CL_CLK
pF
Rev.A
1/7
BU3081FV
Multimedia ICs
zBlock diagrams
AMCLK_SEL
L
H
PLL
EXT_IN2
AMCLK_SEL
REF_SEL
REF_SEL
L
VCO
H
VCXO or EXT_IN1
AFS1
AFS2
AFS1
AFS2
H
L
L
L
L
H
44.1kHz
48kHz
32kHz
2bit
VCO_OUT
FS1
FS2
FS1
FS2
2bit
L
L
H
H
L
H
L
256fs
384fs
512fs
768fs
H
data1a
data1b
data1c
VCO
VCO_CTRL
SET_R
PLL
D range
1/2
1/1
1/4
1/6
+
27MHz 2.5%
AMCLK_OUT
−
(1ch)
~
+
27MHz 18.5%
−
147.4560MHz
or
135.4752MHz
or
98.304MHz
EXT_IN2
VCLK_OUT
VIDEO_SEL
VIDEO_SEL
EXT_IN1
L
H
VCXO
EXT_IN1
VCXO
VCXO_OUT
27.0MHz
+
110ppm
−
VCXO_CTRL
OE
(H or Open : "enable", L : "disable")
Fig.1
Rev.A
2/7
BU3081FV
Multimedia ICs
zExplanation for terminal function
Pin.No
1
Pin.name
AFS1
Function
Switch of Audio clock output (with pull-down) ( 1)
∗
∗
∗
∗
2
AFS2
Switch of Audio clock output (with pull-down) ( 1)
3
FS1
Switch of Audio clock output (with pull-down) ( 1)
4
FS2
Switch of Audio clock output (with pull-down) ( 1)
5
VCO_CTRL
AVDD
Input terminal for controlling VCO
Analog VDD
6
7
AVSS
Analog GND
8
SET_R
XTAL_IN
XTAL_OUT
Normally OPEN. Terminal for VCO output adjustment
Standard crystal input
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Standard crystal output
V
DD_V
V
DD for VCXO
VCXO_CTRL
VSS_V
Input terminal for controlling VCXO
GND for VCXO
VCXO_OUT
TEST
VCXO through output
Input for test mode (with pull-down), normally OPEN (or L)
Power-down control (with pull-up), H (Open) : enable, L : disable
External clock input
OE
EXT_IN1
VSS_EX
EXT_IN2
GND for external input
External clock input
V
DD_EX
V
DD for external input
VCLK_OUT
VIDEO_SEL
AMCLK_OUT
Video clock output ( 2)
∗
Switch of video clock (with pull-down) ( 2)
∗
Audio clock output ( 1)
∗
V
V
SS
Logic GND for PLL
Logic VDD for PLL
DD
REF_SEL
Switch of reference clock (with pull-down) ( 3)
∗
AMCLK_SEL
VCO_OUT
Switch of audio clock (with pull-down) ( 4)
∗
VCO through output
( 1) Audio clock output select (AMCLK_SEL=L or OPEN)
( 2) Video clock select
∗
∗
AFS1 AFS2
FS1
FS2
AMCLK_OUT[MHz]
VIDEO_SEL VCLK_OUT
L
L
L
L
L
L
L
H
L
12.288
18.432
24.576
36.864
8.192
L
VCXO
H
EXT_IN1
L
L
H
H
L
( 3) Reference clo ck select
∗
L
L
H
L
REF_SEL
Reference clock
VCO
VCXO or EXT_IN1
L
H
H
H
H
L
L
L
L
H
L
12.288
16.384
24.576
11.2896
16.9344
22.5792
33.8688
H
L
H
H
L
L
H
L
( 4) Audio clock select
∗
H
H
H
H
AMCLK_SEL
AMCLK_OUT
L
L
H
L
L
PLL
L
H
H
H
EXT_IN2
L
H
Rev.A
3/7
BU3081FV
Multimedia ICs
1 : AFS1
28 : VCO_OUT
2 : AFS2
27 : AMCLK_SET
3 : FS1
26 : REF_SEL
25 : VDD
4 : FS2
5 : VCO_CTRL
6 : AVDD
24 : VSS
23 : AMCLK_OUT
22 : VIDEO_SEL
21 : VCLK_OUT
20 : VDD_EX
19 : EXT_IN2
18 : VSS_EX
17 : EXT_IN1
16 : OE
7 : AVSS
8 : SET_R
9 : XTAL_IN
10 : XTAL_OUT
11 : VDD_V
12 : VCXO_CTRL
13 : VSS_V
14 : VCXO_OUT
15 : TEST
zInput /output equivalent circuit
Pin No.
Equivalent circuit
Input PIN (Schmitt trigger)
1, 2, 3, 4, 15,
22, 26, 27
(with pull-down)
16
(with pull-up)
Direct input PIN
5, 12
CMOS input PIN
17, 19
Rev.A
4/7
BU3081FV
Multimedia ICs
Output PIN
14, 21, 23, 28
X'tal input PIN
9
X'tal output PIN
10
Input terminal
8
Rev.A
5/7
BU3081FV
Multimedia ICs
zElectrical characteristics (Unless otherwise noted, VCC=3.3V, Ta=25°C, Crystal frequency=27.0000MHz, No load)
Rated value
Parameter
Symbol
Unit
Condition
Min.
2.4
−
−
−
Typ.
Max.
−
0.4
Output H voltage
VOH VCLK
VOL VCLK
IDD
−
−
50
V
V
IOH= −4.0mA
IOL= 4.0mA
No load
Output L voltage
Power supply current
Power supply current2
65
mA
µA
IDD2
50
100
OE=L
CLK768_44
CLK768_48
CLK768_32
CLK512_44
CLK512_48
CLK512_32
CLK384_44
CLK384_48
CLK384_32
CLK256_44
CLK256_48
CLK256_32
33.8688
36.864
24.576
22.5792
24.576
16.384
16.9344
18.432
12.288
11.2896
12.288
8.192
XTAL_IN (3136 / 625) /4
∗
XTAL_IN (2048 / 375) /4
∗
XTAL_IN (4096 / 1125) /4
∗
XTAL_IN (3136 / 625) /6
∗
XTAL_IN (2048 / 375) /6
∗
XTAL_IN (4096 / 1125) /6
∗
CLK
MHz
XTAL_IN (3136 / 625) /8
∗
XTAL_IN (2048 / 375) /8
∗
XTAL_IN (4096 / 1125) /8
∗
XTAL_IN (3136 / 625) /12
∗
XTAL_IN (2048 / 375) /12
∗
XTAL_IN (4096 / 1125) /12
∗
Note) When input frequency is 27.0000MHz, output frequency is above rated value. Output frequency is
decided by the formula inputted to XTALIN.
zDeign guaranteed characteristics
(Unless otherwise noted, VCC=3.3V, Ta=25°C, Crystal frequency=27.0000MHz, No load)
Rated value
Parameter
Symbol
Unit
Condition
At 1/2 VDD point
Min.
45
−
−
−
Typ.
50
Max.
Duty
Duty
JsSD
JsABS
tr
55
−
−
−
−
%
Jitter 1σ
Jitter p-p
50
psec
psec
Jitter 1sigma ( 1)
∗
300
2.5
2.5
−
MIN-MAX ( 1)
∗
rise time
nsec Time from 0.2VDD to 0.8VDD
nsec Time from 0.8VDD to 0.2VDD
fall time
tf
−
−
PLL lock time
Tlock
1
msec
( 2)
∗
<
VCXO>
Frequency variable
range (MAX)
−
−
+65
+110
−110
+155
−65
ppm (VCXO_CTRL=0.75VDD
(VCXO_CTRL=0.25VDD
ppm
)
)
(MIN)
−155
<
VCO>
Frequency variable
range (MAX)
(MIN)
−
−
27.675
22
30
24
32
MHz (VCO_CTRL=0.75VDD
(VCO_CTRL=0.25VDD
MHz
)
)
26.325
Note 2) However, it is just the guarantee of IC and dispersion of X'tal and so on is not taken in consideration.
( 1) JITTER means center value when using Time Interval Analyzer with 10,000 sampling.
∗
( 2) Time between voltage supply leads to 3.0V and output clock gets stable.
∗
(Operation of VCLK_OUT at the time of VIDEO_SEL input switching)
Switching
Switching
VIDEO_SEL input
1
2
1
2
VCXO output
EXT_IN1
1
2
1
2
VCLK_OUT
VCXO output
Output L
EXT_IN1
Output L
VCXO output
After VIDEO_SEL was switched, when VIDEO_SEL is switched again before VCLK_OUT is switched, less than half clock may be output in VCLK_OUT.
Rev.A
6/7
BU3081FV
Multimedia ICs
zApplication circuit
Control clock supplied
from outside
IEEE1394
Controller
Audio Clock
1:AFS1
2:AFS2
3:FS1
28:VCO_OUT
27:AMCLK_SEL
26:REF_SEL
25:VDD
4:FS2
Audio Loop
PWM
5:VCO_CTRL
6:AVDD
24:VSS
23:AMCLK_OUT
22:VIDEO_SEL
7:AVSS
DV Codec
Block
8:SET_R
21:VCLK_OUT
20:VDD_EX
9:XTAL_IN
10:XTAL_OUT
11:VDD_V
27MHz
19:EXT_IN2
18:VSS_EX
17:EXT_IN1
16:OE
Input for external clock
Input for external clock
Video Loop
PWM
12:VCXO_CTRL
13:VSS_V
Video Clock
14:VCXO_OUT
15:TEST
+
27MHz 110ppm
−
Note 1) When OE is L, Pin14 : VCXO_OUT, Pin21 : VCLK_OUT, Pin23 : AMCLK_OUT, Pin28 : VCO_OUT become L.
Note 2) Pin8 : SET_R is set to OPEN.
Note 3) When Pin17 : EXT_IN1 is not used, set VIDEO_SEL to OPEN or L, and input the output clock of Pin28 : VCO_OUT
into Pin17.
Note 4) When a crystal is not connected and VCXO is not used, set VIDEO_SEL to H and input the same external clock into
Pin9 : XTAL_IN as Pin17 : EXT_IN1. Set VCXO_CTRL to L, and set VCXO_OUT and XTAL_OUT to OPEN.
Note 5) When neither VCXO nor Pin17 : EXT_IN1 is not used, set EXT_IN1, VCXO_CTRL to L, set VIDEO_SET to OPEN or
L, and set VCXO_OUT, VCLK_OUT, XTAL_IN, and XTAL_OUT to OPEN.
Note 6) When Pin5 : VCO_CTRL is not used, set it to L.
Note 7) When Pin28 : VCO_OUT or Pin23 : AMCLK_OUT is not used, set them to OPEN.
Note 8) When Pin19 : EXT_IN2 is not used, set it to L.
Note 9) Pin15 : TEST is set to OPEN (or L).
Note10) The VCXO operation is checked by using the crystal (specification No. EXS00A-00460) made by NDK (Nihon
Dempa Kogyo Co., LTD). Condition : normal temperature, applied voltage 3.3V
Finally, the crystal needs to be tuned to each set for adjustment f=27MHz at the time of VCXO_CTRL=1.65V
and cancel of temperature characteristic. Please ask a crystal maker.
Note11) BU3081 is basically placed on the board.
Decoupling capacitance (0.1µF) need to be placed between Pin6 (AVDD) and Pin7 (AVSS), Pin11 (VDD_V) and
Pin13 (VSS_V), Pin20 (VDD_EX) and Pin18 (VSS_EX), Pin25 (VDD) and Pin24 (VSS).
To obtain accurate frequency, capacitance (pF) need to be placed between Pin9 and Pin13, Pin10 and Pin13
Tantalum capacitance (10∼100pF), ferrite beads may need to be placed to prevent power supply drop in certain
<
boards case. To reduce high frequency noise, selected bypass capacitors( 1Ω at problem high frequency)
−
may be used for power pin as close to BU3081FV as possible.
Note12) ROHM assumes no responsibility for connection of application circuit and use of external components
and component's constant described herein, conveys no license under any patent or other right, and makes
no representation that the circuit are free from patent infringement.
Rev.A
7/7
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level of
reliability and the malfunction of with would directly endanger human life (such as medical instruments,
transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other
safety devices), please be sure to consult with our sales representative in advance.
About Export Control Order in Japan
Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control
Order in Japan.
In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause)
on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.
Appendix1-Rev1.1
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