LMR1801HFV-LB_技术文档

Datasheet

Operational Amplifier

Low Noise

CMOS Operational Amplifier

LMR1801xxx-LB

General Description

Key Specifications

 Input Offset Voltage:

 Input Referred Noise Voltage Density

This is the product guarantees long time support in

Industrial market. And it is suitable for usage of industrial

applications.

5 μV(Typ)

f=10 Hz:

20 nV/√Hz(Typ)

5 nV/√Hz(Typ)

f=1 kHz:

 Input Common Mode Voltage Range:

LMR1801xxx-LB is single CMOS operational amplifier

features low noise, low input offset voltage and low input

bias current. It is suitable for equipment operating from

battery power and using a sensors amplifier.

V_SSto V_DD-1.0 V

0.5 pA(Typ)

 Input Bias Current:

 Operating Supply Voltage

Single Supply:

2.2 V to 5.5 V

Dual Supply:

±1.10 V to ±2.75 V

 Operating Temperature Range: -40 °C to +125 °C

Features

 Long Time Support Product for Industrial Applications.

 Low Input-Referred Noise Voltage Density

 Driving High Capacitive Load

 Full-Swing Output

Package

W(Typ) x D(Typ) x H(Max)

2.90 mm x 2.80 mm x 1.25 mm

1.60 mm x 1.60 mm x 0.60 mm

SSOP5

HVSOF5

Applications

 Industrial Equipment

 Sensor Amplifiers

 Battery-powered Equipment

 Current Monitoring Amplifier

 ADC Front Ends, Buffer Amplifier

 Photodiode Amplifier

 Amplifiers

SSOP5

HVSOF5

Typical Application Circuit

C_F= 10 pF

R_F= 10 kΩ

VDD=+2.5 V

R_IN= 100 Ω

푹_푭

푹_푰푵

푽_푶푼푻= −

푽_푰푵

V_IN

OUT

VSS=-2.5 V

〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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Pin Configuration

1

5

4

VDD

+IN

+

2

3

VSS

-IN

-

OUT

(TOP VIEW)

Pin Description

Pin No.

Pin Name

Function

1

2

3

4

+IN

VSS

-IN

Non-inverting input

Negative power supply / Ground

Inverting input

OUT

VDD

Output

5

Positive power supply

Block Diagram

1

5 VDD

+IN

Iref

+

OPAMP

2

3

VSS

-IN

-

4

OUT

Description of Blocks

1. OPAMP:

This block includes a full-swing output operational amplifier with class-AB output circuit and low-noise-ground-sense

differential input stage.

2. Iref:

This block supplies reference current to operate OPAMP block.

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Absolute Maximum Ratings (Ta=25 °C)

Parameter

Symbol

Rating

Unit

Supply Voltage

V_DD-V_SS

V_ID

7.0

V

Differential Input Voltage^{(Note 1)}

V_DD- V_SS

Common-mode Input Voltage Range

V_ICMR

(V_SS- 0.3) to (V_DD+ 0.3)

Input Current

I_I

±10

150

mA

°C

Maximum Junction Temperature

Storage Temperature Range

Tjmax

Tstg

- 55 to + 150

°C

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operate over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing

board size and copper area so as not to exceed the maximum junction temperature rating.

(Note 1) The differential input voltage indicates the voltage difference between inverting input and non-inverting input.

The input pin voltage is set to V_SSor more.

Thermal Resistance^{(Note 2)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 4)}

2s2p^{(Note 5)}

SSOP5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 3)}

θ_JA

376.5

40

185.4

30

°C/W

Ψ_JT

HVSOF5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 3)}

θ_JA

358.2

39

85.3

21

°C/W

Ψ_JT

(Note 2) Based on JESD51-2A (Still-Air).

(Note 3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface

of the component package.

(Note 4) Using a PCB board based on JESD51-3.

(Note 5) Using a PCB board based on JESD51-7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70 μm

Layer Number of

Measurement Board

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

4 Layers

Top

Copper Pattern

Bottom

Copper Pattern

74.2 mm x 74.2 mm

Thickness

Copper Pattern

Thickness

Footprints and Traces

70 μm

74.2 mm x 74.2 mm

35 μm

70 μm

Recommended Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

2.2

±1.1

5.0

±2.5

5.5

±2.75

Operating Supply Voltage

Operating Temperature

V_DD

V

Topr

-40

+25

+125

°C

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Electrical Characteristics (Unless otherwise specified V_DD=5 V, V_SS=0 V, Ta=25 °C)

Limit

Temperature

Parameter

Symbol

V_IO

Unit

Conditions

Range

Min

-

Typ

5

Max

900

Input Offset Voltage^{(Note 1)}

25 °C

μV

μV/°C

pA

-

Input Offset Voltage

ΔV_IO/ΔT Full range

-

0.8

-

Temperature Drift^{(Note 1,2)}

Input Offset Current ^{(Note 1)}

I_IO

25 °C

-

0.5

-

220.0

Input Bias Current^{(Note 1,2)}

I_B

pA

-

Full range

25 °C

-

3000

950

-

1500

Supply Current^{(Note 2)}

I_DD

μA

R_L=∞, G=0 dB

Full range

25 °C

-

1550

R_L=10 kΩ,

V_OH=V_DD-V_OUT

Output Voltage High

Output Voltage Low

V_OH

V_OL

-

7

50

mV

25 °C

-

5

50

R_L=10 kΩ

25 °C

110

100

0

140

-

Large Signal Voltage

Gain ^{(Note 2)}

A_V

dB

R_L=10 kΩ

Full range

25 °C

-

Common-mode Input Voltage

Range

Common-mode Rejection

Ratio

V_ICMR

CMRR

PSRR

-

4.0

V

V_SSto V_DD-1.0 V

-

25 °C

80

90

2.0

25

3

100

125

3.5

50

9

-

dB

Power Supply Rejection Ratio

25 °C

-

V_OUT=V_DD-0.1 V

V_OUT=V_SS

Output Source Current^{(Note 1,3)}

I_OH

25 °C

mA

V_OUT=V_SS+0.1 V

V_OUT=V_DD

Output Sink Current^{(Note 1,3)}

I_OL

25

-

50

2.5

6

Slew Rate

SR

GBW

θ

25 °C

V/μs

MHz

deg

dB

C_L=25 pF

Gain Bandwidth Product

Phase Margin

Gain Margin

-

C_L=25 pF, G=40 dB

f=10 Hz

-

65

9

Gm

-

20

5

Input-Referred Noise Voltage

Density

Vn

25 °C

nV/√Hz

-

f=1 kHz

V_OUT=4 V_P-P

LPF=80 kHz,

f=1 kHz

,

Total Harmonic Distortion +

Noise

THD+N

-

0.0035

-

%

(Note 1) Absolute value

(Note 2) Full range: Ta=-40 °C to +125 °C

(Note 3) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.

When the output pins are short-circuited continuously, the output current may decrease due to the temperature rise by the heat generation of inside the

IC.

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Description of Terms in Electrical Characteristics

Described below are description of the relevant electrical terms used in this datasheet. Items and symbols generally used are

also shown. Note that item names and symbols, and their meanings may differ from those on another manufacturer’s or

general documents.

1. Absolute Maximum Ratings

Absolute maximum rating items indicates the condition which must not be exceeded even if it is instantaneous. Applying of a

voltage exceeding the absolute maximum ratings or use outside the temperature range which is provided in the absolute

maximum ratings cause characteristic deterioration or destruction of the IC.

1.1 Supply Voltage (V_DD-V_SS)

This indicates the maximum voltage that can be applied between the positive power supply pin and the negative power

supply pin without deteriorating the characteristics of internal circuit or without destroying it.

1.2 Differential Input Voltage (V_ID)

This indicates the maximum voltage that can be applied between the non-inverting input pin and the inverting input pin

without deteriorating the characteristics of the IC or without destroying it.

1.3 Common-mode Input Voltage Range (V_ICMR

)

This indicates the maximum voltage that can be applied to the non-inverting input pin and inverting input pin without

deteriorating the characteristics of the IC or without destroying it. Common-mode Input Voltage Range of the maximum

ratings does not assure normal operation of IC. For normal operation, use the IC within the Common-mode Input Voltage

Range characteristics.

2. Electrical Characteristics

2.1 Input Offset Voltage (V_IO)

This indicates the voltage difference between non-inverting and inverting pins. It can be translated as the input voltage

difference required for setting the output voltage at 0 V.

2.2 Input Offset Voltage Temperature Drift (ΔV_IO/ΔT)

Denotes the ratio of the input offset voltage fluctuation to the ambient temperature fluctuation.

2.3 Input Offset Current (I_IO)

This indicates the difference of input bias current between the non-inverting and inverting pins.

2.4 Input Bias Current (I_B)

This indicates the current that flows into or out from the input pin. It is defined by the average of input bias currents at

the non-inverting and inverting pins.

2.5 Supply Current (I_DD

)

This indicates the current of the IC itself flowing under the specified conditions and under no-load or steady-state

conditions.

2.6 Output Voltage High / Output Voltage Low (V_OH/V_OL)

This indicates the voltage range of the output under specified load condition. It is divided into output voltage High and

low. Output voltage high indicates the upper limit of output voltage. Output voltage low indicates the lower limit.

2.7 Large Signal Voltage Gain (A_V)

This indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting pin and

inverting pin. It is normally the amplifying rate (gain) with reference to DC voltage.

A_V= (Output voltage) / (Differential input voltage)

2.8 Common-mode Input Voltage Range (V_ICMR

)

This indicates the input voltage range where IC normally operates.

2.9 Common-mode Rejection Ratio (CMRR)

This indicates the ratio of fluctuation of input offset voltage when Common-mode Input Voltage is changed. It is

normally the fluctuation of DC.

CMRR = (Change of Input common-mode voltage)/(Input offset fluctuation)

2.10 .Power Supply Rejection Ratio (PSRR)

This indicates the ratio of fluctuation of input offset voltage when supply voltage is changed.

It is normally the fluctuation of DC.

PSRR= (Change of power supply voltage)/(Input offset fluctuation)

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Description of Terms in Electrical Characteristics - continued

2.11 Output Source Current/ Output Sink Current (I_SOURCE/ I_SINK

)

The maximum current that can be output from the IC under specific output conditions. The output source current

indicates the current flowing out from the IC, and the output sink current indicates the current flowing into the IC.

2.12 Slew Rate (SR)

This is a parameter representing the operational speed of the operational amplifier. This indicates the rate at which

the output voltage can change in the specified unit time.

2.13 Gain Bandwidth (GBW)

This indicates the product of an arbitrary frequency and its gain in the range of the gain slope of -6 dB/octave.

2.14 Phase Margin (θ)

This indicates the margin of phase from the phase delay of 180 degree at the frequency which the gain of the

operational amplifier is 1.

2.15. Gain Margin (Gm)

This indicates the margin of Gain from 0 dB at the frequency which the phase delay of 180 degree.

2.16. Input-Referred Noise Voltage (Vn)

Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in

series with input terminal.

2.17 Total Harmonic Distortion + Noise (THD+N)

This indicates the content ratio of harmonic and noise components relative to the output signal.

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Typical Performance Curves

V_SS=0 V

1200

1100

1000

900

1200

1100

1000

900

5.0 V

+125 °C

3.0 V

800

2.2 V

-40 °C +25 °C

700

600

500

400

1

2

3

4

5

6

-50 -25

0

25 50 75 100 125 150

Supply Voltage V_DD[V]

Ambient Temperature Ta[°C]

Figure 1. Supply Current vs Supply Voltage

Figure 2. Supply Current vs Ambient Temperature

20

15

10

5

+125 °C

10

5.0 V

+25 °C

3.0 V

5

2.5 V

-40 °C

0

2

3

4

5

6

-50 -25

0

25 50 75 100 125 150

Supply Voltage V_DD[V]

Ambient Temperature Ta[°C]

Figure 3. Output Voltage High vs Supply Voltage

(R_L=10 kΩ, V_OH=V_DD-V_OUT

Figure 4. Output Voltage High vs Ambient Temperature

(R_L=10 kΩ, V_OH=V_DD-V_OUT

)

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Typical Performance Curves - continued

V_SS=0 V

10

8

10

8

6

+125 °C

5.0 V

3.0 V

4

+25 °C

2

2.2 V

-40 °C

0

-50 -25

0

25

50

75 100 125 150

1

2

3

4

5

6

Supply Voltage V_DD[V]

Ambient Temperature Ta [°C]

Figure 5. Output Voltage Low vs Supply Voltage

Figure 6. Output Voltage Low vs Ambient Temperature

(R_L=10 kΩ)

80

70

60

50

40

30

20

10

0

70

-40 °C

60

50

+25 °C

40

+125 °C

30

20

10

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Output Voltage V_OUT[V]

Figure 7. Output Source Current vs Output Voltage

(V_DD=5 V)

Figure 8. Output Sink Current vs Output Voltage

(V_DD=5 V)

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Typical Performance Curves - continued

V_SS=0 V

500

400

300

200

100

0

500

400

300

200

5.0 V

-40 °C

3.0 V

100

0

-100

-200

-300

-400

-500

-100

+25°C

2.2 V

+125°C

-200

-300

-400

-500

-50 -25

0

25

50

75 100 125 150

1

2

3

4

5

6

Supply Voltage V_DD[V]

Ambient Temperature Ta [°C]

Figure 9. Input Offset Voltage vs Supply Voltage

Figure 10. Input Offset Voltage vs Ambient Temperature

200

180

500

400

300

200

100

0

160

-40 °C

+25 °C

140

120

+25 °C

+125 °C

-100

-200

-300

-400

-500

100

80

+125 °C

60

40

1

2

3

4

5

6

-1

0

1

2

3

4

5

6

Supply Voltage V_DD[V]

Input Common Mode Voltage V_ICM[V]

Figure 12. Large Signal Voltage Gain vs Supply Voltage

Figure 11. Input Offset Voltage vs Input Common Mode

(R_L=10 kΩ)

Voltage

(V_DD=5 V)

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Typical Performance Curves - continued

V_SS=0 V

200

180

160

140

120

100

80

+125 °C

2.2 V

3.0 V

140

5.0 V

120

+25 °C

-40 °C

100

80

60

40

60

20

40

0

-50 -25

0

25

50

75 100 125 150

1

2

3

4

5

6

Ambient Temperature Ta [°C]

Supply Voltage V_DD[V]

Figure 13. Large Signal Voltage Gain vs Ambient

Temperature

Figure 14. Common-mode Rejection Ratio vs Supply Voltage

160

200

180

160

140

120

100

80

140

120

100

80

5.0 V

2.2 V 3.0 V

60

40

20

0

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Ambient Temperature Ta [°C]

Figure 15. Common-mode Rejection Ratio vs Ambient

Temperature

Figure 16. Power Supply Rejection Ratio vs Ambient

Temperature

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Typical Performance Curves – continued

V_SS=0 V

30

25

20

15

10

5

800

700

600

500

400

300

200

100

0

10

100

1000

10000

100000

0

25

50

75

100

125

150

Frequency f [Hz]

Ambient Temperature Ta [°C]

Figure 17. Input Bias Current vs Ambient Temperature

(V_DD=5 V)

Figure 18. Input-Referred Noise Voltage Density vs

Frequency

(V_DD=5 V)

4

3

Fall

Rise

2

Rise

1

0

1

0

1

2

3

4

5

6

-50 -25

0

25

50

75 100 125 150

Ambient Temperature Ta [°C]

Supply Voltage V_DD[V]

Figure 19. Slew Rate vs Supply Voltage

Figure 20. Slew Rate vs Ambient Temperature

(V_DD=5 V)

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Typical Performance Curves - continued

V_SS=0 V

6

70

60

50

40

30

20

10

0

5.0 V

5

5.0 V

3.0 V

2.2 V

4

2.2 V

3.0 V

3

2

1

0

10

100

Load Capacitance C_L[pF]

1000

-50 -25

0

25

50

75 100 125 150

Ambient Temperature Ta [°C]

Figure 21. Gain Bandwidth Product vs Ambient Temperature

(Inverting Amplifier)

Figure 22. Phase Margin vs Load Capacitance

(R_F=10 kΩ, G=+40 dB)

6

100

200

160

120

80

Phase

C_L=600 pF

C_L=500 pF

C_L=330 pF

4

2

80

60

40

0

C_L=0 pF

-2

-4

-6

Gain

20

40

0

100

0

10²

10³

10⁴

10⁵

10⁶

10⁷

10⁸

10²

10³

10⁴

10⁵

10⁶

10⁷

10⁸

1000 10000 10000010000010000001000000000

Frequency f [Hz]

Figure 23. Voltage Gain, Phase vs Frequency

(V_DD=5 V)

Figure 24. Voltage Gain vs Frequency

(V_DD=5 V, G=0 dB, V_IN=180 mV_PP)

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Application Examples

○Voltage Follower

Using this circuit, the output voltage (V_OUT) is configured

to be equal to the input voltage (V_IN). This circuit also

stabilizes the output voltage (V_OUT) due to high input

impedance and low output impedance. Computation for

output voltage (V_OUT) is shown below.

VDD

OUT

푽_푶푼푻= 푽_푰푵

IN

VSS

Voltage Follower Circuit

○Inverting Amplifier

R_F

For inverting amplifier, input voltage (V_IN) is amplified by

a voltage gain and depends on the ratio of R_INand R_F.

The out-of-phase output voltage is shown in the next

expression.

VDD

R_IN

V_IN

푹_푭

푹_푰푵

OUT

푽_푶푼푻= −

푽_푰푵

This circuit has input impedance equal to R_IN.

VSS

Inverting Amplifier Circuit

○Non-inverting Amplifier

R_IN

R_F

For non-inverting amplifier, input voltage (V_IN) is amplified

by a voltage gain, which depends on the ratio of R_INand

R_F. The output voltage (V_OUT) is in-phase with the input

voltage (V_IN) and is shown in the next expression.

VDD

VSS

OUT

푹_푭

푹_푰푵

푽_푶푼푻= (ퟏ +

)푽_푰푵

V_IN

Effectively, this circuit has high input impedance since its

input side is the same as that of the operational amplifier.

Non-inverting Amplifier Circuit

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I/O Equivalence Circuits

Pin No.

Pin Name

Pin Description

Equivalence Circuit

5

4

OUT

Output

4

2

5

50 Ω

1

3

+IN

-IN

Input

1, 3

2

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Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

6. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

8. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

9. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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Operational Notes – continued

10. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example, (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Example of monolithic IC structure

11. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

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Ordering Information

L M R 1 8 0 1

x

-

L B T R

Package

G: SSOP5

HFV: HVSOF5

Lineup

Operating

Temperature Range

Operating Supply

Voltage

Number of

Channels

Package

Orderable Part Number

SSOP5

Reel of 3000

LMR1801G-LBTR

2.2 V to 5.5 V

±1.1 V to ±2.75 V

-40 °C to +125 °C

Single

HVSOF5

LMR1801HFV-LBTR

Marking Diagram

SSOP5(TOP VIEW)

Part Number Marking

LOT Number

HVSOF5(TOP VIEW)

Part Number Marking

LOT Number

A S

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Physical Dimension and Packing Information

Package Name

SSOP5

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Physical Dimension and Packing Information - continued

Package Name

HVSOF5

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Revision History

Date

Revision

001

Changes

New Release

20.Jul.2018

19.Oct.2018

29.Oct.2018

002

P.4 Change Limits

003

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	LMR1801HFV-LB
厂家：	ROHM
描述：	LMR1801HFV-LB是一款具备业界顶级的低噪声性能，并具有卓越的稳定性的运放产品。
文件：	总23页 (文件大小：2235K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LMR1801HFV-LB [ROHM]

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