LMR822F-E2 [ROHM]
Low Supply Current Output Full Swing Operational Amplifiers;
| 型号： | LMR822F-E2 |
| 厂家： | 
ROHM |
| 描述： | Low Supply Current Output Full Swing Operational Amplifiers |
| 文件： | 总53页 (文件大小：5250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Operational Amplifiers
Low Supply Current
Output Full Swing Operational Amplifiers
LMR821G LMR822xxx LMR824xxx
General Description
Key Specifications
LMR821G, LMR822xxx, and LMR824xxx are
Operating Supply Voltage (Single Supply):
low-voltage
low-current
full-swing
operational
+2.5V to +5.5V
amplifiers. These products exhibit high voltage gain
and high slew rate, making them suitable for mobile
equipment, low voltage application and active filters.
Voltage Gain (RL=600Ω):
Temperature Range:
Slew Rate:
105dB (Typ)
-40°C to +85°C
2.0V/μs (Typ)
Input Offset Voltage:
LMR821G
LMR822xxx
LMR824xxx
Input Bias Current:
3.5mV (Max)
5mV (Max)
5mV (Max)
30nA (Typ)
Features
Low Operating Supply Voltage
Output Full Swing
High Large Signal Voltage Gain
High Slew Rate
Packages
W(Typ) x D(Typ) x H(Max)
2.90mm x 2.80mm x 1.25mm
5.00mm x 6.20mm x 1.71mm
4.90mm x 6.00mm x 1.65mm
3.00mm x 6.40mm x 1.35mm
3.00mm x 6.40mm x 1.20mm
2.90mm x 4.00mm x 0.90mm
3.00mm x 4.90mm x 1.10mm
8.70mm x 6.20mm x 1.71mm
8.65mm x 6.00mm x 1.65mm
5.00mm x 6.40mm x 1.20mm
Low Supply Current
SSOP5
SOP8
SOP-J8
SSOP-B8
TSSOP-B8
MSOP8
TSSOP-B8J
SOP14
Applications
Mobile Equipment
Low Voltage Application
Active Filter
Buffer
Consumer Electronics
SOP-J14
TSSOP-B14J
Pin Configuration
LMR821G
: SSOP5
1
Pin No.
Pin Name
+IN
+IN
VSS
-IN
5
4
VDD
OUT
1
2
3
4
5
VSS
+
2
-
-IN
OUT
VDD
3
LMR822F
LMR822FJ
LMR822FV
LMR822FVT
LMR822FVM
LMR822FVJ
: SOP8
: SOP-J8
: SSOP-B8
: TSSOP-B8
: MSOP8
: TSSOP-B8J
Pin No.
Pin Name
OUT1
-IN1
1
2
3
4
5
6
7
8
OUT1 1
8
7
6
5
VDD
+IN1
-IN1
2
3
OUT2
-IN2
CH1
-
+
VSS
+IN1
+IN2
CH2
-
+
-IN2
VSS 4
+IN2
OUT2
VDD
○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays.
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TSZ22111･14･001
LMR821G LMR822xxx LMR824xxx
Datasheet
LMR824F
: SOP14
LMR824FJ
LMR824FVJ
: SOP-J14
: TSSOP-B14J
Pin No.
Pin Name
OUT1
-IN1
1
2
3
+IN1
VDD
OUT1
1
2
3
4
5
6
7
14 OUT4
13
4
-IN1
+IN1
VDD
+IN2
-IN2
-IN4
12 +IN4
11
CH1
CH4
5
+IN2
-IN2
-
-
+
+
6
7
OUT2
OUT3
-IN3
VSS
10 +IN3
8
9
-
-
+
+
10
11
12
13
14
+IN3
VSS
CH2
CH3
9
8
-IN3
OUT2
OUT3
+IN4
-IN4
OUT4
Ordering Information
L M R 8
2
x
x
x
x
-
x
x
Part Number
LMR821G
LMR822F
LMR822FJ
LMR822FV
LMR822FVT
LMR822FVM
LMR822FVJ
LMR824F
Package
G
F
Packaging and forming specification
TR: Embossed tape and reel
(SSOP5/MSOP8)
: SSOP5
: SOP8
: SOP14
: SOP-J8
: SOP-J14
: SSOP-B8
: TSSOP-B8
: MSOP8
: TSSOP-B8J
: TSSOP-B14J
E2: Embossed tape and reel
FJ
(SOP8/SOP-J8/SSOP-B8/TSSOP-B8/
TSSOP-B8J/SOP14/SOP-J14/TSSOP-B14J)
FV
FVT
FVM
FVJ
LMR824FJ
LMR824FVJ
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LMR821G LMR822xxx LMR824xxx
Datasheet
Line-up
Orderable Part
Topr
Channels
1ch
Package
Reel of 3000
Number
LMR821G-TR
LMR822F-E2
SSOP5
SOP8
Reel of 2500
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 3000
Reel of 2500
Reel of 2500
Reel of 2500
Reel of 2500
SOP-J8
LMR822FJ-E2
LMR822FV-E2
LMR822FVT-E2
LMR822FVM-TR
LMR822FVJ-E2
LMR824F-E2
SSOP-B8
TSSOP-B8
MSOP8
2ch
4ch
-40°C to +85°C
TSSOP-B8J
SOP14
SOP-J14
TSSOP-B14J
LMR824FJ-E2
LMR824FVJ-E2
Absolute Maximum Ratings (TA=25°C)
Ratings
LMR822xxx
+7
Parameter
Symbol
Unit
V
LMR821G
LMR824xxx
Supply Voltage
VDD-VSS
SSOP5
0.67 (Note 1,8)
-
-
SOP8
SOP-J8
-
-
-
-
-
-
-
-
-
0.68 (Note 2,8)
0.67 (Note 1,8)
0.62 (Note 3,8)
0.62 (Note 3,8)
0.58 (Note 4,8)
0.58 (Note 4,8)
-
-
-
SSOP-B8
TSSOP-B8
MSOP8
-
-
Power Dissipation
Pd
W
-
TSSOP-B8J
SOP14
-
0.56 (Note 5,8)
1.02 (Note 6,8)
0.84 (Note 7,8)
SOP-J14
TSSOP-B14J
VID
-
-
Differential Input Voltage (Note 9)
VDD – VSS
V
V
Input Common-mode
Voltage Range
VICM
(VSS - 0.3) to (VDD + 0.3)
Input Current (Note 10)
II
Vopr
Topr
Tstg
±10
mA
V
Operating Supply Voltage
Operating Temperature
Storage Temperature
+2.5 to +5.5
- 40 to +85
- 55 to +150
°C
°C
Maximum
Junction Temperature
Tjmax
+150
°C
(Note 1) Pd is reduced by 5.4mW/°C above TA= 25°C.
(Note 2) Pd is reduced by 5.5mW/°C above TA= 25°C.
(Note 3) Pd is reduced by 5.0mW/°C above TA= 25°C.
(Note 4) Pd is reduced by 4.7mW/°C above TA= 25°C.
(Note 5) Pd is reduced by 4.5mW/°C above TA= 25°C.
(Note 6) Pd is reduced by 8.2mW/°C above TA= 25°C.
(Note 7) Pd is reduced by 6.8mW/°C above TA= 25°C.
(Note 8) Mounted on an FR4 glass epoxy PCB 70mm×70mm×1.6mm (Copper foil area less than 3%).
(Note 9) Differential Input Voltage is the voltage difference between the inverting and non-inverting inputs.
The input pin voltage is set to more than VSS
.
(Note 10) An excessive input current will flow when input voltages of more than VDD+0.6V or less than VSS-0.6V are applied.
The input current can be set to less than the rated current by adding a limiting resistor.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics
○LMR821G (Unless otherwise specified VDD=+2.5V, VSS=0V)
Limits
Temperature
Parameter
Symbol
VIO
Unit
mV
Conditions
Range
Min
Typ
Max
3.5
4
25°C
-
-
1
-
Input Offset Voltage (Note 11)
VDD=2.5V to 5.5V
Full Range
2.30
2.37
2.46
130
80
-
RL=600Ω (Note 12)
RL=2kΩ (Note 12)
RL=600Ω (Note 12)
RL=2kΩ (Note 12)
Maximum Output Voltage(High)
VOH
25°C
25°C
V
2.40
-
-
-
200
120
Maximum Output Voltage(Low)
VOL
mV
(Note 11) Absolute value
(Note 12) Output load resistance connects to a half of VDD
.
○LMR821G (Unless otherwise specified VDD=+2.7V, VSS=0V)
Limits
Temperature
Parameter
Symbol
VIO
Unit
mV
Conditions
Range
Min
Typ
Max
3.5
4
25°C
-
-
1
-
Input Offset Voltage (Note 13,14)
VDD=2.5V to 5.5V
Full Range
Input Offset Voltage Drift
Input Offset Current (Note 13)
Input Bias Current (Note 13)
ΔVIO/ΔT
25°C
25°C
25°C
-
-
-
1
-
μV/°C
nA
-
-
-
IIO
IB
0.5
30
30
90
nA
25°C
-
-
280
-
340
500
Supply Current (Note 14)
IDD
μA
AV=0dB, V+IN=1.35V
Full Range
2.50
2.58
-
RL=600Ω (Note 16)
Maximum Output Voltage(High)
VOH
25°C
V
2.60
2.66
130
80
-
200
120
-
RL=2kΩ (Note 16)
RL=600Ω (Note 16)
RL=2kΩ (Note 16)
RL=600Ω (Note 16)
RL=2kΩ (Note 16)
-
-
Maximum Output Voltage(Low)
Large Signal Voltage Gain
VOL
AV
25°C
25°C
mV
dB
-
100
100
95
-
Input Common-mode
Voltage Range
VICM
25°C
25°C
25°C
25°C
0
-
1.8
V
VSS to (VDD-0.9V)
-
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current (Note 15)
Output Sink Current (Note 15)
Slew Rate
CMRR
PSRR
ISOURCE
70
75
12
85
85
16
-
-
-
dB
dB
mA
VDD=2.7V to 5.5V
VICM=1V
VOUT=0V
Short Circuit Current
VOUT=2.7V
ISINK
SR
25°C
25°C
25°C
12
-
26
2.0
5.0
-
-
-
mA
V/μs
MHz
Short Circuit Current
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
-
Phase Margin
θ
25°C
25°C
25°C
-
-
-
50
4.5
30
-
-
-
deg
dB
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
Input Referred Noise Voltage
nV/ Hz f=1kHz
VOUT=2.2VP-P, f=1kHz
Total Harmonic Distortion
+ Noise
THD+N
25°C
-
0.01
-
%
RL=10kΩ
AV=0dB, DIN-AUDIO
(Note 13) Absolute value
(Note 14) Full Range: TA=-40°C to +85°C
(Note 15) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 16) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics - continued
○LMR821G (Unless otherwise specified VDD=+5.0V, VSS=0V)
Limits
Temperature
Parameter
Symbol
VIO
Unit
mV
Conditions
Range
Min
Typ
Max
3.5
4
25°C
-
-
1
-
Input Offset Voltage (Note 17,18)
VDD=2.5V to 5.5V
Full Range
Input Offset Voltage Drift
Input Offset Current (Note 17)
Input Bias Current (Note 17)
ΔVIO/ΔT
25°C
25°C
25°C
-
-
-
1
-
μV/°C
nA
-
-
-
IIO
IB
0.5
40
30
100
nA
25°C
-
-
325
-
425
600
Supply Current (Note 18)
IDD
μA
AV=0dB, V+IN=2.5V
Full Range
4.75
4.84
4.90
170
100
105
105
-
RL=600Ω (Note 20)
RL=2kΩ (Note 20)
RL=600Ω (Note 20)
RL=2kΩ (Note 20)
RL=600Ω (Note 20)
RL=2kΩ (Note 20)
Maximum Output Voltage(High)
VOH
25°C
25°C
25°C
V
4.85
-
250
150
-
-
-
Maximum Output Voltage(Low)
Large Signal Voltage Gain
VOL
mV
-
AV
dB
V
95
-
Input Common-mode
Voltage Range
VICM
25°C
25°C
25°C
0
-
4.1
VSS to (VDD-0.9V)
-
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current (Note 19)
Output Sink Current (Note 19)
Slew Rate
CMRR
PSRR
72
75
90
85
-
-
VDD=2.7V to 5.5V
VICM=1V
VOUT=0V
Short Circuit Current
VOUT=5V
dB
ISOURCE
ISINK
25°C
25°C
25°C
20
20
-
45
40
-
-
-
mA
mA
Short Circuit Current
SR
2.0
V/μs
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
θ
25°C
25°C
25°C
25°C
-
-
-
-
5.5
50
-
-
-
-
MHz
deg
dB
Phase Margin
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
4.5
30
Input Referred Noise Voltage
nV/ Hz f=1kHz
VOUT=4.1VP-P, f=1kHz
Total Harmonic Distortion
+ Noise
THD+N
25°C
-
0.01
-
%
RL=10kΩ
AV=0dB, DIN-AUDIO
(Note 17) Absolute value
(Note 18) Full Range: TA=-40°C to +85°C
(Note 19) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 20) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics - continued
○LMR822xxx (Unless otherwise specified VDD=+2.5V, VSS=0V)
Limits
Typ
1
Temperature
Parameter
Symbol
VIO
Unit
mV
V
Conditions
Range
Min
Max
25°C
-
5
5
Input Offset Voltage (Note 21)
Maximum Output Voltage(High)
VDD=2.5V to 5.5V
Full Range
-
2.30
2.40
-
-
2.37
2.46
130
80
-
RL=600Ω (Note 22)
RL=2kΩ (Note 22)
RL=600Ω (Note 22)
RL=2kΩ (Note 22)
VOH
25°C
25°C
-
200
120
Maximum Output Voltage(Low)
VOL
mV
-
(Note 21) Absolute value
(Note 22) Output load resistance connects to a half of VDD
.
○LMR822xxx (Unless otherwise specified VDD=+2.7V, VSS=0V)
Limits
Temperature
Parameter
Symbol
VIO
Unit
mV
Conditions
Range
Min
Typ
Max
5
25°C
-
-
1
-
Input Offset Voltage (Note 23,24)
VDD=2.5V to 5.5V
Full Range
5
Input Offset Voltage Drift
Input Offset Current (Note 23)
Input Bias Current (Note 23)
ΔVIO/ΔT
25°C
25°C
25°C
-
-
-
1
-
μV/°C
nA
-
-
-
IIO
IB
0.5
30
30
90
nA
25°C
-
-
560
-
680
1000
-
Supply Current (Note 24)
IDD
μA
AV=0dB, V+IN=1.35V
Full Range
2.50
2.60
-
2.58
2.66
130
RL=600Ω (Note 26)
RL=2kΩ (Note 26)
RL=600Ω (Note 26)
RL=2kΩ (Note 26)
RL=600Ω (Note 26)
RL=2kΩ (Note 26)
Maximum Output Voltage(High)
VOH
25°C
25°C
25°C
V
-
200
Maximum Output Voltage(Low)
VOL
AV
mV
dB
-
-
80
120
100
100
-
-
Large Signal Voltage Gain
95
Input Common-mode
Voltage Range
VICM
25°C
25°C
25°C
0
-
1.8
V
VSS to (VDD-0.9V)
-
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current (Note 25)
CMRR
PSRR
70
75
85
85
-
-
dB
dB
VDD=2.7V to 5.5V
VICM=1V
VOUT=0V
ISOURCE
25°C
12
16
-
mA
Short Circuit Current
VOUT=2.7V
Short Circuit Current
Output Sink Current (Note 25)
Slew Rate
ISINK
SR
25°C
25°C
25°C
25°C
25°C
25°C
12
-
26
2.0
5.0
50
-
-
-
-
-
-
mA
V/μs
MHz
deg
dB
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
θ
-
Phase Margin
-
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
-
4.5
30
Input Referred Noise Voltage
-
nV/ Hz f=1kHz
VOUT=2.2VP-P, f=1kHz
Total Harmonic Distortion
+ Noise
THD+N
CS
25°C
25°C
-
-
0.01
100
-
-
%
RL=10kΩ
AV=0dB, DIN-AUDIO
Channel Separation
dB
AV=40dB, VOUT=0.5Vrms
(Note 23) Absolute value
(Note 24) Full Range: TA=-40°C to +85°C
(Note 25) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 26) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics - continued
○LMR822xxx (Unless otherwise specified VDD=+5.0V, VSS=0V)
Limits
Temperature
Parameter
Symbol
VIO
Unit
mV
Conditions
Range
Min
Typ
Max
5
25°C
-
-
1
-
Input Offset Voltage (Note 27,28)
VDD=2.5V to 5.5V
Full Range
5
Input Offset Voltage Drift
Input Offset Current (Note 27)
Input Bias Current (Note 27)
ΔVIO/ΔT
25°C
25°C
25°C
-
-
-
1
-
μV/°C
nA
-
-
-
IIO
IB
0.5
40
30
100
nA
25°C
-
650
-
850
1200
-
Supply Current (Note 28)
IDD
μA
AV=0dB, V+IN=2.5V
Full Range
-
4.75
4.84
4.90
170
100
105
RL=600Ω (Note 30)
RL=2kΩ (Note 30)
RL=600Ω (Note 30)
RL=2kΩ (Note 30)
RL=600Ω (Note 30)
RL=2kΩ (Note 30)
Maximum Output Voltage(High)
VOH
25°C
25°C
25°C
V
4.85
-
-
-
-
250
150
-
Maximum Output Voltage(Low)
Large Signal Voltage Gain
VOL
AV
mV
dB
95
0
105
-
-
Input Common-mode
Voltage Range
VICM
CMRR
PSRR
ISOURCE
ISINK
25°C
25°C
25°C
25°C
25°C
25°C
4.1
V
dB
VSS to (VDD-0.9V)
-
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current (Note 29)
Output Sink Current (Note 29)
Slew Rate
72
75
20
20
-
90
85
45
40
2.0
-
-
-
-
-
VDD=2.7V to 5.5V
VICM=1V
dB
VOUT=0V
Short Circuit Current
mA
mA
V/μs
VOUT=5V
Short Circuit Current
SR
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
θ
25°C
25°C
25°C
25°C
-
-
-
-
5.5
50
-
-
-
-
MHz
deg
dB
Phase Margin
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
4.5
30
Input Referred Noise Voltage
nV/ Hz f=1kHz
VOUT=4.1VP-P, f=1kHz
Total Harmonic Distortion
+ Noise
THD+N
CS
25°C
25°C
-
-
0.01
100
-
-
%
RL=10kΩ
AV=0dB, DIN-AUDIO
Channel Separation
dB
AV=40dB, VOUT=0.5Vrms
(Note 27) Absolute value
(Note 28) Full Range: TA=-40°C to +85°C
(Note 29) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 30) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics - continued
○LMR824xxx (Unless otherwise specified VDD=+2.5V, VSS=0V)
Limits
Typ.
1
Temperature
Parameter
Symbol
VIO
Unit
mV
V
Condition
Range
Min.
Max.
25°C
-
5
5
Input Offset Voltage (Note 31)
Maximum Output Voltage(High)
VDD=2.5V to 5.5V
Full Range
-
2.30
2.40
-
-
2.37
2.46
130
80
-
RL=600Ω (Note 32)
RL=2kΩ (Note 32)
RL=600Ω (Note 32)
RL=2kΩ (Note 32)
VOH
25°C
25°C
-
200
120
Maximum Output Voltage(Low)
VOL
mV
-
(Note 31) Absolute value
(Note 32) Output load resistance connects to a half of VDD
.
○LMR824xxx (Unless otherwise specified VDD=+2.7V, VSS=0V)
Limits
Typ.
1
Temperature
Parameter
Symbol
VIO
Unit
mV
Condition
Range
Min.
Max.
25°C
Full Range
25°C
-
5
Input Offset Voltage (Note 33,34)
VDD=2.5V to 5.5V
-
-
5
Input Offset Voltage Drift
Input Offset Current (Note 33)
Input Bias Current (Note 33)
ΔVIO/ΔT
-
1
-
30
90
1360
2000
-
μV/°C
nA
-
-
-
IIO
IB
25°C
-
0.5
30
25°C
-
nA
25°C
-
-
1120
-
Supply Current (Note 34)
IDD
μA
V
AV=0dB, V+IN=1.35V
Full Range
2.50
2.60
-
2.58
2.66
130
80
RL=600Ω (Note 36)
RL=2kΩ (Note 36)
RL=600Ω (Note 36)
RL=2kΩ (Note 36)
RL=600Ω (Note 36)
RL=2kΩ (Note 36)
Maximum Output Voltage(High)
Maximum Output Voltage(Low)
Large Signal Voltage Gain
VOH
25°C
25°C
25°C
25°C
25°C
-
200
120
-
VOL
mV
dB
V
-
90
95
100
100
AV
-
Input Common-mode
Voltage Range
VICM
CMRR
0
-
1.8
-
VSS to (VDD-0.9V)
Common-mode Rejection Ratio
70
85
dB
-
VDD=2.7V to 5.5V
VICM=1V
PSRR
25°C
25°C
75
12
85
16
-
-
dB
Power Supply Rejection Ratio
Output Source Current (Note 35)
VOUT=0V
Short Circuit Current
ISOURCE
mA
VOUT=2.7V
Short Circuit Current
Output Sink Current (Note 35)
Slew Rate
ISINK
SR
25°C
25°C
25°C
12
-
26
2.0
5.0
-
-
-
mA
V/μs
MHz
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
-
Phase Margin
θ
25°C
25°C
25°C
-
-
-
50
4.5
30
-
-
-
deg
dB
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
Input Referred Noise Voltage
nV/ Hz f=1kHz
VOUT=2.2VP-P, f=1kHz
RL=10kΩ
Total Harmonic Distortion
+ Noise
THD+N
CS
25°C
25°C
-
-
0.01
100
-
-
%
AV=0dB, DIN-AUDIO
Channel Separation
dB
AV=40dB, VOUT=0.5Vrms
(Note 33) Absolute value
(Note 34) Full Range: TA=-40°C to +85°C
(Note 35) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 36) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Electrical Characteristics - continued
○LMR824xxx (Unless otherwise specified VDD=+5V, VSS=0V)
Limits
Typ.
1
Temperature
Parameter
Symbol
VIO
Unit
mV
Condition
Range
Min.
Max.
25°C
Full Range
25°C
-
5
Input Offset Voltage (Note 37,38)
VDD=2.5V to 5.5V
-
-
5
Input Offset Voltage Drift
Input Offset Current (Note 37)
Input Bias Current (Note 37)
ΔVIO/ΔT
-
1
-
30
100
1700
2400
-
μV/°C
nA
-
-
-
IIO
IB
25°C
-
0.5
40
25°C
-
nA
25°C
-
1130
-
Supply Current (Note 38)
IDD
μA
V
AV=0dB, V+IN=2.5V
Full Range
-
4.75
4.84
4.90
170
100
105
105
RL=600Ω (Note 40)
RL=2kΩ (Note 40)
RL=600Ω (Note 40)
RL=2kΩ (Note 40)
RL=600Ω (Note 40)
RL=2kΩ (Note 40)
Maximum Output
Voltage(High)
VOH
25°C
25°C
25°C
25°C
25°C
4.85
-
-
-
250
150
-
Maximum Output
Voltage(Low)
VOL
mV
dB
V
-
Large Signal Voltage Gain
AV
95
-
Input Common-mode
Voltage Range
VICM
CMRR
0
-
4.1
-
VSS to (VDD-0.9V)
Common-mode Rejection
Ratio
72
90
dB
-
VDD=2.7V to 5.5V
VICM=1V
PSRR
25°C
25°C
75
20
85
45
-
-
dB
Power Supply Rejection Ratio
Output Source Current (Note 39)
VOUT=0V
Short Circuit Current
ISOURCE
mA
VOUT=5V
Short Circuit Current
Output Sink Current (Note 39)
Slew Rate
ISINK
SR
25°C
25°C
25°C
20
1.4
-
40
2.0
5.5
-
-
-
mA
V/μs
MHz
CL=25pF
CL=25pF, AV=40dB
f=1MHz
Gain Bandwidth
GBW
Phase Margin
θ
25°C
25°C
25°C
-
-
-
50
4.5
30
-
-
-
deg
dB
CL=25pF, AV=40dB
CL=25pF, AV=40dB
Gain Margin
GM
VN
Input Referred Noise Voltage
nV/ Hz f=1kHz
VOUT=4.1VP-P, f=1kHz
RL=10kΩ
Total Harmonic Distortion
+ Noise
THD+N
CS
25°C
25°C
-
-
0.01
100
-
-
%
AV=0dB, DIN-AUDIO
Channel Separation
dB
AV=40dB, VOUT=0.5Vrms
(Note 37) Absolute value
(Note 38) Full Range: TA=-40°C to +85°C
(Note 39) Consider the power dissipation of the IC under high temperature environment when selecting the output current value.
There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC.
(Note 40) Output load resistance connects to a half of VDD
.
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LMR821G LMR822xxx LMR824xxx
Datasheet
Description of Electrical Characteristics
Described below are the relevant electrical terms used in this datasheet. Items and symbols used are also shown. Note that
the item names, symbols, and their meanings may differ from those of another manufacturer’s document or a general
document.
1. Absolute Maximum Ratings
Absolute maximum rating items indicate the conditions which must not be exceeded. Application of voltage in excess of absolute
maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics.
(1) Supply Voltage (VDD/VSS
)
Indicates the maximum voltage that can be applied between the VDD terminal and VSS terminal without deterioration
of characteristics of internal circuit.
(2) Differential Input Voltage (VID)
Indicates the maximum voltage that can be applied between the non-inverting terminal and inverting terminal without
damaging the IC.
(3) Input Common-mode Voltage Range (VICM
)
Indicates the maximum voltage that can be applied to the non-inverting and inverting terminals without deterioration of
electrical characteristics. The input common-mode voltage range of the maximum ratings does not assure normal
operation of IC. For normal operation, use the IC within the input common-mode voltage range.
(4) Power Dissipation (Pd)
Indicates the power that can be consumed by the IC when mounted on a specific board at ambient temperature (normal
temperature), 25°C. As for the packaged product, Pd is determined by the temperature that can be permitted by the IC
in the package (maximum junction temperature) and thermal resistance of the package.
2. Electrical Characteristics
(1) Input Offset Voltage (VIO)
Indicates the voltage difference between the non-inverting terminal and inverting terminal. It can be translated to the
input voltage difference required for setting the output voltage to 0 V.
(2) Input Offset Voltage Drift (△VIO/△T)
Denotes the ratio of the input offset voltage fluctuation to the ambient temperature fluctuation.
(3) Input Offset Current (IIO)
Indicates the difference of input bias current between non-inverting and inverting terminals.
(4) Input Bias Current (IB)
Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias currents at the
non-inverting and inverting terminals.
(5) Supply Current (IDD
Indicates the current that that is consumed by the IC under specified no-load conditions.
(6) Maximum Output Voltage (High) / Maximum Output Voltage (Low) (VOH/VOL
)
)
Indicates the output voltage range under a specified load condition. It can be differentiated to maximum output voltage
high and low. Maximum output voltage high indicates the upper limit of the output voltage, and maximum output
voltage low indicates the lower limit.
(7) Large Signal Voltage Gain (AV)
Indicates the amplification rate (gain) of output voltage against the voltage difference between the non-inverting and
inverting terminal. It is normally the amplification rate (gain) in reference to DC voltage.
AV = (Output voltage) / (Differential Input voltage)
(8) Input Common-mode Voltage Range (VICM
)
Indicates the input voltage range at which the IC operates normally.
(9) Common-mode Rejection Ratio (CMRR)
Indicates the ratio of fluctuation of input offset voltage to the change of common-mode input voltage.
CMRR = (Change of Input common-mode voltage)/(Input offset fluctuation)
(10) Power Supply Rejection Ratio (PSRR)
Indicates the ratio of fluctuation of input offset voltage to the change in supply voltage.
PSRR= (Change of power supply voltage)/(Input offset fluctuation)
(11) Output Source Current/ Output Sink Current (ISOURCE / ISINK
)
The maximum current that the IC can output under specific conditions. The output source current indicates the current
flowing out from the IC, and the output sink current indicates the current flowing into the IC.
(12) Slew Rate (SR)
Indicates the rate of the change in output voltage with time when a step input signal is applied.
(13) Gain Band Width (GBW)
The product of the open-loop voltage gain and the frequency at which the voltage gain decreases by 6dB/octave.
(14) Phase Margin (θ)
Indicates the margin of phase from 180° phase lag at unity gain frequency.
(15) :Gain Margin (GM)
Indicates the difference between 0dB and gain where the operational amplifier has 180° phase delay.
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LMR821G LMR822xxx LMR824xxx
Datasheet
(16) Total Harmonic Distortion + Noise (THD+N)
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage
of driven channel.
(17) Input Referred Noise Voltage (VN)
Indicates the noise voltage generated inside the operational amplifier equivalent to an ideal voltage source connected
in series with input terminal.
(18) Channel Separation (CS)
Indicates the fluctuation of the output voltage of the driven channel with reference to the change of output voltage of
the channel which is not driven.
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Datasheet
Typical Performance Curves
○LMR821G
0.8
400
350
300
250
200
0.6
LMR821G
85°C
0.4
0.2
25°C
-40°C
0.0
85
2
3
4
5
6
0
25
50
75
100
125
150
Ambient Temperature [°C]
Supply Voltage [V]
Figure 2. Supply Current vs Supply Voltage
Figure 1. Power Dissipation vs Ambient
Temperature (Derating Curve)
6
5
4
3
2
1
0
400
350
300
250
200
85°C
25°C
5.0V
2.7V
-40°C
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 4. Maximum Output Voltage (High) vs
Figure 3. Supply Current vs Ambient
Temperature
Supply Voltage (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR821G
6
100
90
80
70
60
50
40
30
20
10
0
5
5.0V
4
3
85°C
25°C
-40°C
2.7V
2
1
0
-50
-25
0
25
50
75
100
2
3
4
5
6
Ambient Temperature [°C]
Supply Voltage [V]
Figure 5. Maximum Output Voltage (High) vs
Figure 6. Maximum Output Voltage (Low) vs
Ambient Temperature (RL=2kΩ)
Supply Voltage (RL=2kΩ)
30
25
20
15
10
5
100
90
80
70
60
50
40
30
20
10
0
5.0V
-40°C
25°C
2.7V
85°C
0
-50
-25
0
25
50
75
100
0
1
2
3
Output Voltage [V]
Ambient Temperature [°C]
Figure 8. Output Source Current vs Output
Voltage (VDD=2.7V)
Figure 7. Maximum Output Voltage (Low) vs
Ambient Temperature (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR821G
40
35
30
25
20
15
10
5
100
90
80
70
25°C
5.0V
85°C
60
50
40
-40°C
30
2.7V
20
10
0
0
-50
-25
0
25
50
75
100
0
1
2
3
Output Voltage [V]
Ambient Temperature [°C]
Figure 9. Output Source Current vs Ambient
Temperature
Figure 10. Output Sink Current vs Output
Voltage (VDD=2.7V)
100
90
80
70
60
50
40
30
20
10
0
4
3
2
1
85°C
25°C
0
5.0V
-40°C
-1
-2
-3
-4
2.7V
-50
-25
0
25
50
75
100
2
3
4
5
6
Supply Voltage [V]
Ambient Temperature [°C]
Figure 11. Output Sink Current vs Ambient
Temperature
Figure 12. Input Offset Voltage vs Supply
Voltage (VICM=VDD/2, EK=-VDD/2)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR821G
4
3
2
4
3
2
1
1
85°C
25°C
5.0V
0
0
2.7V
-40°C
-1
-1
-2
-3
-4
-2
-3
-4
-50
-25
0
25
50
75
100
-1
0
1
2
3
Ambient Temperature [°C]
Input Voltage [V]
Figure 13. Input Offset Voltage vs Ambient
Temperature (VICM=VDD/2, EK=-VDD/2)
Figure 14. Input Offset Voltage vs Input
Voltage (VDD=2.7V)
140
130
120
110
100
90
140
130
120
110
100
90
5.0V
2.7V
85°C
-40°C
25°C
80
80
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 15. Large Signal Voltage Gain vs
Supply Voltage
Figure 16. Large Signal Voltage Gain vs
Ambient Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR821G
140
130
120
140
130
120
110
100
90
-40°C
25°C
5.0V
2.7V
110
85°C
100
90
80
80
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 17. Common-mode Rejection Ratio vs
Supply Voltage (VDD=2.7V)
Figure 18. Common-mode Rejection Ratio vs
Ambient Temperature
140
130
120
110
100
90
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5.0V
2.7V
80
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature [°C]
Ambient Temperature [°C]
Figure 19. Power Supply Rejection Ratio vs
Ambient Temperature (VDD=2.7V to 5.0V)
Figure 20. Slew Rate L-H vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Datasheet
Typical Performance Curves – continued
○LMR821G
3.0
100
80
60
40
20
0
200
Phase
5.0V
2.5
150
100
50
2.0
2.7V
1.5
Gain
1.0
0.5
0.0
0
3
4
5
6
7
8
10
-50
-25
0
25
50
75
100
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
10
10
10
10
10
Frequency [Hz]
Ambient Temperature [°C]
Figure 22. Voltage Gain・Phase vs Frequency
Figure 21. Slew Rate H-L vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Datasheet
Typical Performance Curves – continued
○LMR822xxx
0.8
800
750
700
650
600
550
500
450
400
LMR822F
LMR822FJ
0.6
LMR822FV
LMR822FVT
25°C
LMR822FVM
LMR822FVJ
85°C
0.4
0.2
-40°C
0.0
85
2
3
4
5
6
0
25
50
75
100
125
150
Supply Voltage [V]
Ambient Temperature [°C]
Figure 23. Power Dissipation vs Ambient
Temperature (Derating Curve)
Figure 24. Supply Current vs Supply Voltage
800
700
600
500
400
6
5
4
3
2
85°C
5.0V
2.7V
25°C
-40°C
-50
-25
0
25
50
75
100
2
3
4
5
6
Ambient Temperature [°C]
Supply Voltage [V]
Figure 25.
Figure 26. Maximum Output Voltage (High) vs
Supply Current vs Ambient Temperature
Supply Voltage (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Datasheet
Typical Performance Curves – continued
○LMR822xxx
100
90
80
70
60
50
40
30
20
10
0
6
5
5.0V
85°C
25°C
-40°C
4
3
2.7V
2
1
0
2
3
4
5
6
-50
-25
0
25
50
75
100
Ambient Temperature [°C]
Supply Voltage [V]
Figure 27. Maximum Output Voltage (High) vs
Figure 28. Maximum Output Voltage (Low) vs
Ambient Temperature (RL=2kΩ)
Supply Voltage (RL=2kΩ)
30
25
20
15
10
5
100
90
80
70
60
50
40
30
20
10
0
5.0V
-40°C
25°C
2.7V
85°C
0
0
1
2
3
-50
-25
0
25
50
75
100
Ambient Temperature [°C]
Output Voltage [V]
Figure 29. Maximum Output Voltage (Low) vs
Figure 30. Output Source Current vs Output
Voltage (VDD=2.7V)
Ambient Temperature (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR822xxx
100
90
40
35
30
25
20
15
10
5
80
85°C 25°C
70
5.0V
60
50
40
-40°C
30
2.7V
20
10
0
0
-50
-25
0
25
50
75
100
0
1
2
3
Ambient Temperature [°C]
Output Voltage [V]
Figure 31. Output Source Current vs Ambient
Temperature
Figure 32. Output Sink Current vs Output
Voltage (VDD=2.7V)
100
90
80
70
60
50
40
30
20
10
0
4
3
2
1
85°C
5.0V
2.7V
0
25°C
-40°C
-1
-2
-3
-4
-50
-25
0
25
50
75
100
2
3
4
5
6
Ambient Temperature [°C]
Supply Voltage [V]
Figure 34. Input Offset Voltage vs Supply
Voltage (VICM=VDD/2, EK=-VDD/2)
Figure 33. Output Sink Current vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR822xxx
4
3
2
1
4
3
2
1
5.0V
2.7V
85°C
25°C
0
-1
-2
-3
-4
0
-40°C
-1
-2
-3
-4
-50
-25
0
25
50
75
100
-1
0
1
2
3
Input Voltage [V]
Ambient Temperature [°C]
Figure 36. Input Offset Voltage vs Input
Voltage (VDD=2.7V)
Figure 35. Input Offset Voltage vs Ambient
Temperature (VICM=VDD/2, EK=-VDD/2)
140
130
120
110
100
90
140
130
120
110
100
90
85°C
5.0V
25°C
-40°C
2.7V
80
80
-50
-25
0
25
50
75
100
2
3
4
5
6
Ambient Temperature [°C]
Supply Voltage [V]
Figure 37. Large Signal Voltage Gain vs
Supply Voltage
Figure 38. Large Signal Voltage Gain vs
Ambient Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR822xxx
140
130
120
110
100
90
140
130
120
110
85°C
5.0V
2.7V
100
-40°C
25°C
90
80
80
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 39. Common-mode Rejection Ratio vs
Supply Voltage (VDD=2.7V)
Figure 40. Common-mode Rejection Ratio vs
Ambient Temperature
140
130
120
110
100
90
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5.0V
2.7V
80
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature [°C]
Ambient Temperature [°C]
Figure 41. Power Supply Rejection Ratio vs
Ambient Temperature (VDD=2.7V to 5.0V)
Figure 42. Slew Rate L-H vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR822xxx
3.0
100
80
60
40
20
0
200
Phase
2.5
5.0V
150
100
50
2.0
2.7V
1.5
1.0
0.5
0.0
Gain
0
1.E+00 1.E+401 1.E+02 1.E+03 1.E+04 1.E+05
3
5
6
7
8
-50
-25
0
25
50
75
100
10
10
10
10
10
10
Ambient Temperature [°C]
Frequency [Hz]
Figure 44. Voltage Gain・Phase vs Frequency
Figure 43. Slew Rate H-L vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
1.2
1600
1500
1400
1300
1200
1100
1000
900
LMR824FJ
LMR824FVJ
0.8
85°C
25°C
0.4
-40°C
LMR824F
800
0.0
85
2
3
4
5
6
0
25
50
75
100
125
150
Supply Voltage [V]
Ambient Temperature [°C]
Figure 46. Supply Current vs Supply Voltage
Figure 45. Power Dissipation vs Ambient
Temperature (Derating Curve)
6
5.5
5
1600
1500
1400
1300
1200
1100
1000
900
-40°C
4.5
4
25°C
85°C
5.0V
3.5
3
2.7V
2.5
2
800
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 47. Supply Current vs Ambient
Temperature
Figure 48. Maximum Output Voltage (High) vs
Supply Voltage (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
100
80
60
40
20
0
6
5
5.0V
85°C
25°C
4
3
-40°C
2.7V
2
1
0
-50
-25
0
25
50
75
100
2
3
4
5
6
Ambient Temperature [°C]
Supply Voltage [V]
Figure 49. Maximum Output Voltage (High) vs
Figure 50. Maximum Output Voltage (Low) vs
Ambient Temperature (RL=2kΩ)
Supply Voltage (RL=2kΩ)
120
100
80
60
40
20
0
30
25
20
15
10
5
-40°C
25°C
85°C
5.0V
2.7V
0
-50
-25
0
25
50
75
100
0
1
2
3
Ambient Temperature [°C]
Output Voltage [V]
Figure 51. Maximum Output Voltage (Low) vs
Figure 52. Output Source Current vs Output
Voltage (VDD=2.7V)
Ambient Temperature (RL=2kΩ)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
40
35
30
25
20
15
10
5
100
90
85°C
80
5.0V
25°C
70
60
50
40
-40°C
30
2.7V
20
10
0
0
-50
-25
0
25
50
75
100
0
1
2
3
Ambient Temperature [°C]
Output Voltage [V]
Figure 53. Output Source Current vs Ambient
Temperature
Figure 54. Output Sink Current vs Output
Voltage (VDD=2.7V)
100
90
80
70
60
50
40
30
20
10
0
4
3
2
1
85°C
5.0V
0
25°C
-40°C
-1
-2
-3
-4
2.7V
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 55. Output Sink Current vs Ambient
Temperature
Figure 56. Input Offset Voltage vs Supply
Voltage (VICM=VDD/2, EK=-VDD/2)
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
4
3
2
1
4
3
2
1
85°C
5.0V
2.7V
0
-1
-2
-3
-4
0
-40°C
25°C
-1
-2
-3
-4
-50
-25
0
25
50
75
100
-1
0
1
2
3
Ambient Temperature [°C]
Input Voltage [V]
Figure 58. Input Offset Voltage vs Input
Voltage (VDD=2.7V)
Figure 57. Input Offset Voltage vs Ambient
Temperature (VICM=VDD/2, EK=-VDD/2)
140
130
120
110
100
90
140
130
120
110
100
90
2.7V
85°C
25°C
5.0V
-40°C
80
80
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 59. Large Signal Voltage Gain vs
Supply Voltage
Figure 60. Large Signal Voltage Gain vs
Ambient Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
140
130
120
110
100
90
140
130
120
85°C
5.0V
110
25°C
100
2.7V
-40°C
90
80
80
2
3
4
5
6
-50
-25
0
25
50
75
100
Supply Voltage [V]
Ambient Temperature [°C]
Figure 61. Common-mode Rejection Ratio vs
Supply Voltage (VDD=2.7V)
Figure 62. Common-mode Rejection Ratio vs
Ambient Temperature
200
180
160
140
120
100
80
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5.0V
2.7V
60
40
20
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature [°C]
Ambient Temperature [°C]
Figure 63. Power Supply Rejection Ratio vs
Ambient Temperature (VDD=2.7V to 5.0V)
Figure 64. Slew Rate L-H vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Typical Performance Curves – continued
○LMR824xxx
3.0
2.5
2.0
100
80
60
40
20
0
200
Phase
150
100
50
5.0V
2.7V
1.5
1.0
0.5
0.0
Gain
0
103
104
105
106
107
108
-50
-25
0
25
50
75
100
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
Frequency [Hz]
Ambient Temperature [°C]
Figure 66. Voltage Gain・Phase vs Frequency
Figure 65. Slew Rate H-L vs Ambient
Temperature
(*)The data above are measurement values of a typical sample, it is not guaranteed.
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Application Information
NULL method condition for Test Circuit 1
VDD, VSS, EK, VICM Unit:V
Parameter
Calculation
VF
S1
S2
S3
VDD
5
VSS
0
EK
VICM
2.5
Input Offset Voltage
VF1
VF2
VF3
VF4
VF5
VF6
VF7
ON
ON
OFF
-2.5
-0.5
-2.1
1
Large Signal Voltage Gain
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
2.7
2.7
0
0
0
1.35
2
3
4
0
Common-mode Rejection Ratio
(Input Common-mode Voltage Range)
-1.35
-1.2
1.8
2.5
5.0
Power Supply Rejection Ratio
0
－ Calculation－
|VF1|
1+RF/RS
VIO
1. Input Offset Voltage (VIO)
=
[V]
ΔEK × (1+RF/RS)
2. Large Signal Voltage Gain (AV)
3. Common-mode Rejection Ratio (CMRR)
4. Power Supply Rejection Ratio (PSRR)
Av
=20Log
[dB]
|VF2-VF3|
ΔVICM × (1+RF/RS)
CMRR
=20Log
[dB]
|VF4 - VF5|
ΔVDD × (1+ RF/RS)
PSRR
=20Log
[dB]
|VF6 - VF7|
0.1µF
RF=50kΩ
500kΩ
0.01µF
SW1
VDD
EK
15V
RS=50Ω
RI=10kΩ
Vout
500kΩ
0.1µF
DUT
0.1µF
NULL
-15V
SW3
RL
VRL
RI=10kΩ
1000pF
RS=50Ω
50kΩ
VF
VICM
SW2
VSS
Figure 67. Test Circuit1
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Application Information - continued
Switch Condition for Test Circuit 2
SW No.
SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 SW10 SW11 SW12
Supply Current
OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF OFF
OFF ON OFF OFF ON OFF OFF ON OFF OFF ON OFF
OFF ON OFF OFF ON OFF OFF OFF OFF ON OFF OFF
OFF OFF ON OFF OFF OFF ON OFF ON OFF OFF ON
ON OFF OFF ON ON OFF OFF OFF ON OFF OFF ON
Maximum Output Voltage RL=10kΩ
Output Current
Slew Rate
Unity Gain Frequency
Input Voltage
VH
SW3
R2=100kΩ
SW4
●
VDD=3V
VL
t
－
Input Wave
SW1
Output Voltage
SW2
＋
SW8 SW9
SW10 SW11 SW12
SW5
SW6
SW7
SR=ΔV/Δt
90%
VH
R1=
1kΩ
VSS
ΔV
10%
RL
CL
-IN
+IN
Vo
VL
Δt
t
Output Wave
Figure 68. Test Circuit 2
Figure 69. Slew Rate Input and Output Wave
R2=100kΩ
R2=100kΩ
VDD
VDD
R1=1kΩ
R1=1kΩ
OUT1=0.5Vrms
OUT2
R1//R2
R1//R2
IN
VSS
VSS
100×OUT1
CS=20Log
OUT2
Figure 70. Test Circuit 3 (Channel Separation)
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Application Example
○Voltage Follower
Voltage gain is 0dB.
VDD
Using this circuit, the output voltage (VOUT) is configured
to be equal to the input voltage (VIN). This circuit also
stabilizes the output voltage (VOUT) due to high input
impedance and low output impedance. Computation for
output voltage (VOUT) is shown below.
VOUT
VIN
VOUT=VIN
VSS
Figure 71. Voltage Follower
○Inverting Amplifier
R2
VDD
For inverting amplifier, input voltage (VIN) is amplified by
a voltage gain and depends on the ratio of R1 and R2.
The out-of-phase output voltage is shown in the next
expression
R1
VIN
VOUT
VOUT=-(R2/R1)・VIN
This circuit has input impedance equal to R1.
R1// R2
VSS
Figure 72. Inverting Amplifier Circuit
○Non-inverting Amplifier
R1
R2
For non-inverting amplifier, input voltage (IN) is amplified
by a voltage gain, which depends on the ratio of R1 and
R2. The output voltage (OUT) is in-phase with the input
voltage (IN) and is shown in the expression below:
VDD
VOUT=(1 + R2/R1)・VIN
VOUT
Effectively, this circuit has high input impedance since its
input side is the same as that of the operational amplifier.
VIN
VSS
Figure 73. Non-invertinmplifier Circuit
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Power Dissipation
Power dissipation (total loss) indicates the power that the IC can consume at TA=25°C (normal temperature). As the IC
consumes power, it heats up, causing its temperature to rise above the ambient temperature. There is an allowable
temperature that the IC can handle, and this depends on the circuit configuration, manufacturing process, and consumable
power.
Power dissipation is determined by the allowable temperature within the IC (maximum junction temperature) and the thermal
resistance of the package used (heat dissipation capability). Maximum junction temperature is typically equal to the
maximum storage temperature. The heat generated through the consumption of power by the IC radiates from the mold
resin or lead frame of the package. Thermal resistance, represented by the symbol θJA°C/W, indicates this heat dissipation
capability. Similarly, the temperature of an IC inside its package can be estimated by thermal resistance.
Figure 74(a) shows the model of the thermal resistance of a package. The equation below shows how to compute for the
Thermal resistance (θJA), given the ambient temperature (TA), maximum junction temperature (TJmax), and power dissipation
(Pd).
θJA
=
(TJmax－TA) / Pd
°C/W
The derating curve in Figure 74(b) indicates the power that the IC can consume with reference to ambient temperature.
Power consumption of the IC begins to attenuate at certain temperatures. This gradient is determined by thermal resistance
(θJA), which depends on the chip size, power consumption, package, ambient temperature, package condition, wind velocity,
etc. This may also vary even when the same package is used. Thermal reduction curve indicates a reference value
measured at a specified condition. Figures 74(c), 74(d), and 74(e) show the example of the derating curves for LMR821G,
LMR822xxx, and LMR824xxx.
Power Dissipation of LSI [W]
Pdmax
θJA=(Tjmax-TA)/ Pd °C/W
P2
θJA2 < θJA1
Ambient Temperature, TA [ °C ]
θJA2
P1
TJmax
θJA1
Chip Surface Temperature, TJ [ °C ]
150
0
25
125
50
75
100
Ambient Temperature, TA [ °C ]
(b) Derating Curve
(a) Thermal Resistance
0.8
0.6
0.4
0.2
0.0
0.8
0.6
0.4
0.2
0.0
LMR822F (Note 42)
LMR822FJ (Note 41)
LMR821G (Note 41)
LMR822FV (Note 43)
LMR822FVT (Note 43)
LMR822FVM (Note 44)
LMR822FVJ (Note 44)
85
85
0
25
50
75
100
125
150
0
25
50
75
100
125
150
Ambient Temperature [°C]
(c) LMR821G
Ambient Temperature [°C]
(d) LMR822xxx
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1.2
LMR824FVJ (Note 47)
0.8
0.4
LMR824FJ (Note 46)
LMR824F (Note 45)
0.0
85
0
25
50
75
100
125
150
Ambient Temperature [°C]
(e) LMR824xxx
Figure 74. Thermal Resistance and Derating Curve
(Note 41)
5.4
(Note 42)
5.5
(Note 43)
5.0
(Note 44)
4.7
(Note 45)
4.5
(Note 46)
8.2
(Note 47)
6.8
Unit
When
using
mW/°C
the unit above TA=25°C, subtract the value above per °C. Power dissipation is the value
when FR4 glass epoxy board 70mm×70mm×1.6mm (copper foil area below 3%) is mounted.
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Datasheet
Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
A rise in temperature that causes the chip to exceed its power dissipation rating may result in deterioration of the
properties of the chip. The absolute maximum rating of the PD stated in this specification is when the IC is mounted on
a 70mm x 70mm x 1.6mm glass epoxy board. In case the absolute maximum rating is exceeded, increase the board
size and copper area to prevent exceeding the PD rating.
6.
7.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
In-rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
8.
9.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result to
IC damage. Avoid adjacent pins from being shorted to each other, especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in a very humid environment),
and unintentional solder bridge deposited in between pins during assembly.
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Operational Notes – continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When VSS > Pin A and VSS > Pin B, the P-N junction operates as a parasitic diode.
When VSS > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the VSS voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 75. Example of Monolithic IC Structure
VDD
12. Unused Circuits
When there are unused op-amps, it is recommended that they are
connected as in Figure 76, setting the non-inverting input terminal to a
potential within the –IN phase input voltage range (VICM).
Keep this potential
in VICM
VICM
13. Input Voltage
Applying VSS-0.3V to VDD+0.3V to the input terminal is possible without
causing deterioration of the electrical characteristics or destruction.
However, this does not ensure normal circuit operation. Please note that
the circuit operates normally only when the input voltage is within the
common mode input voltage range of the electric characteristics.
VSS
Figure 76. Example of Application
Circuit for Unused Op-Amp
14. Power Supply (Single/Dual)
The operational amplifiers operate as long as voltage is supplied between VDD and VSS. Therefore, the single supply
operational amplifiers can be used as dual supply operational amplifiers as well.
15. Output Capacitor
If a large capacitor is connected between the output pin and VSS pin, current from the charged capacitor will flow into
the output pin and may destroy the IC when the VCC pin is shorted to ground or pulled down to 0V. Use a capacitor
smaller than 0.1µF between output pin and VSS pin.
16. Oscillation by Output Capacitor
Pay attention to the oscillation by caused by the output capacitor and in designing an application of negative feedback
loop circuit with these ICs.
17. Latch-up
Be careful not to set the input voltage higher than VDD or lower than VSS because a peculiar latch-up state in CMOS
device might occur. In addition, protect the IC from any abormal noise.
18. Decoupling Capacitor
Insert a decoupling capacitor between VDD and VSS.
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Physical Dimension, Tape and Reel Information
Package Name
SSOP5
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Physical Dimension, Tape and Reel Information – continued
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT : mm)
PKG : SOP8
Drawing No. : EX112-5001-1
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Physical Dimension, Tape and Reel Information – continued
Package Name
SOP-J8
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Physical Dimension, Tape and Reel Information – continued
Package Name
SSOP-B8
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Physical Dimension, Tape and Reel Information – continued
Package Name
TSSOP-B8
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Physical Dimension, Tape and Reel Information – continued
Package Name
MSOP8
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Physical Dimension, Tape and Reel Information – continued
Package Name
TSSOP-B8J
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Datasheet
Physical Dimension, Tape and Reel Information – continued
Package Name
SOP14
(UNIT : mm)
PKG : SOP14
Drawing No. : EX113-5001
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Physical Dimension, Tape and Reel Information – continued
Package Name
SOP-J14
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Physical Dimension, Tape and Reel Information – continued
Package Name
TSSOP-B14J
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Datasheet
Marking Diagram
SSOP5(TOP VIEW)
SOP8(TOP VIEW)
Part Number Marking
Part Number Marking
LOT Number
1PIN MARK
LOT Number
SSOP-B8(TOP VIEW)
SOP-J8(TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
LOT Number
1PIN MARK
1PIN MARK
TSSOP-B8(TOP VIEW)
Part Number Marking
MSOP8(TOP VIEW)
Part Number Marking
LOT Number
LOT Number
1PIN MARK
1PIN MARK
TSSOP-B8J(TOP VIEW)
SOP14(TOP VIEW)
Part Number Marking
Part Number Marking
LOT Number
LOT Number
1PIN MARK
1PIN MARK
SOP-J14(TOP VIEW)
TSSOP-B14J (TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
LOT Number
1PIN MARK
1PIN MARK
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Datasheet
Marking Diagram - continued
Product Name
LMR821
Package Type
Marking
G
F
SSOP5
SOP8
L3
L822
FJ
SOP-J8
R822
FV
FVT
FVM
FVJ
F
SSOP-B8
TSSOP-B8
MSOP8
R822
LMR822
R822
R822
TSSOP-B8J
SOP14
R822
LMR824F
LMR824FJ
R824
LMR824
FJ
SOP-J14
TSSOP-B14J
FVJ
Land Pattern Data
All dimensions in mm
Land pitch
Land space
MIE
Land length
Land width
b2
PKG
e
≥ℓ 2
SSOP5
0.95
2.4
1.0
0.6
SOP8
SOP14
1.27
1.27
4.60
1.10
1.35
0.76
SOP-J8
SOP-J14
3.90
4.60
0.76
0.35
SSOP-B8
TSSOP-B8
TSSOP-B14J
0.65
1.20
MSOP8
0.65
0.65
2.62
3.20
0.99
1.15
0.35
0.35
TSSOP-B8J
SOP8, SOP-J8, SSOP-B8, MSOP8, TSSOP-B8, TSSOP-B8J,
SOP14, SOP-J14, TSSOP-B14J
SSOP5
e
e
MIE
b2
ℓ2
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Datasheet
Revision History
Date
Revision
Changes
18.Jan.2013
2.Aug.2013
15.Oct.2013
3.Dec.2013
10.Oct.2014
11.May.2015
001
002
003
004
005
006
New Release
LMR822F is added.
The Limit value change of LMR822F (MAX value change in Input Offset Voltage.)
LMR822FJ, LMR822FV, LMR822FVT, LMR822FVM, and LMR822FVJ added
LMR824F is added.
LMR824FJ, and LMR824FVJ are added.
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Daattaasshheeeett
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.001
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Daattaasshheeeett
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Datasheet
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Distribution Inventory
Part Number
Package
Unit Quantity
LMR821G
SSOP5
3000
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
3000
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