K3P5U1000D-DC [SAMSUNG]
MASK ROM;
| 型号： | K3P5U1000D-DC |
| 厂家： | 
SAMSUNG |
| 描述： | MASK ROM 有原始数据的样本ROM |
| 文件： | 总5页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
K3P5V(U)1000D-D(G)C
CMOS MASK ROM
16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM
FEATURES
GENERAL DESCRIPTION
· Switchable organization
2,097,152 x 8(byte mode)
1,048,576 x 16(word mode)
· Fast access time
The K3P5V(U)1000D-D(G)C is a fully static mask programma-
ble ROM fabricated using silicon gate CMOS process technol-
ogy, and is organized either as 2,097,152 x 8 bit(byte mode) or
as 1,048,576 x 16 bit(word mode) depending on BHE voltage
level.(See mode selection table)
Random Access : 100ns(Max.)
Page Access
: 30ns(Max.)
This device includes page read mode function, page read mode
allows 8 words (or 16 bytes) of data to read fast in the same
page, CE and A3 ~ A19 should not be changed.
8 Words / 16 Bytes page access
· Supply voltage : single +3.0V/ single +3.3V
· Current consumption
This device operates with 3.0V or 3.3V power supply, and all
inputs and outputs are TTL compatible.
Operating : 60mA(Max.)
Standby : 30mA(Max.)
· Fully static operation
· All inputs and outputs TTL compatible
· Three state outputs
· Package
-. K3P5V(U)1000D-DC : 42-DIP-600
-. K3P5V(U)1000D-GC : 44-SOP-600
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The K3P5V(U)1000D-DC is packaged in a 42-DIP and the
K3P5V(U)1000D-GC in a 44-SOP.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
1
2
A18
42
41
40
A19
A8
N.C
A18
A17
A7
N.C
A19
A8
1
2
44
43
42
41
A19
X
MEMORY CELL
MATRIX
(1,048,576x16/
2,097,152x8)
A17
A7
BUFFERS
AND
DECODER
.
.
.
.
.
.
.
.
3
A9
3
4
39 A10
A6
A5
4
A9
5
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
A11
A12
A6
40 A10
5
6
A4
A5
6
A11
A12
39
38
7
A3
A13
A14
A4
7
8
A2
Y
A3
8
37 A13
SENSE AMP.
9
A1
A15
A16
A14
36
A2
BUFFERS
AND
DECODER
9
10
11
12
13
14
15
16
A0
A1
A15
35
10
11
12
13
14
15
16
17
18
DATA OUT
BUFFERS
CE
VSS
OE
Q0
Q8
Q1
BHE
VSS
A0
A16
34
33
32
31
30
29
28
27
26
A3
DIP
SOP
CE
VSS
OE
Q0
BHE
VSS
A0~A2
A-1
Q15/A-1
Q7
Q15/A-1
Q7
.
.
.
Q14
Q6
Q8
Q14
Q6
CE
Q9 17
Q13
Q5
Q0/Q8
Q7/Q15
Q1
CONTROL
LOGIC
18
Q2
OE
Q9
Q13
Q5
19
Q10
Q12
Q2 19
BHE
20
21
Q3
23 Q4
22
Q10 20
25 Q12
Q11
VCC
Q4
24
Q3
21
Q11
22
VCC
23
Pin Name
A0 - A2
Pin Function
K3P5V(U)1000D-DC
Page Address Inputs
Address Inputs
K3P5V(U)1000D-GC
A3 - A19
Q0 - Q14
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Q15 /A-1
BHE
CE
Word/Byte selection
Chip Enable
Output Enable
Power
OE
VCC
VSS
N.C
Ground
No Connection
K3P5V(U)1000D-D(G)C
CMOS MASK ROM
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on Any Pin Relative to VSS
Temperature Under Bias
Storage Temperature
Symbol
VIN
Rating
Unit
-0.3 to +4.5
-10 to +85
-55 to +150
V
TBIAS
TStg
°C
°C
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA=0 to 70°C)
Item
Supply Voltage
Symbol
Min
2.7/3.0
0
Typ
3.0/3.3
0
Max
3.3/3.6
0
Unit
V
VCC
Supply Voltage
VSS
V
DC CHARACTERISTICS
Min
Max
60
Parameter
Symbol
Test Conditions
Unit
VCC=3.3V±0.3V
VCC=3.0V±0.3V
-
mA
mA
mA
mA
mA
mA
V
CE=OE=VIL,
all outputs open
Operating Current
ICC
50
Standby Current(TTL)
ISB1
ISB2
ILI
CE=VIH, all outputs open
CE=VCC, all outputs open
VIN=0 to VCC
500
30
Standby Current(CMOS)
Input Leakage Current
-
-
10
Output Leakage Current
Input High Voltage, All Inputs
Input Low Voltage, All Inputs
Output High Voltage Level
Output Low Voltage Level
ILO
VOUT=0 to VCC
10
VIH
VIL
2.0
-0.3
2.4
-
VCC+0.3
0.6
V
VOH
VOL
IOH=-400mA
-
V
IOL=2.1mA
0.4
V
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.
Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
MODE SELECTION
CE
H
OE
X
BHE
X
Q15/A-1
Mode
Data
High-Z
Power
X
X
Standby
Operating
Operating
Standby
Active
L
H
X
High-Z
H
Output
Q0~Q15 : Dout
Active
L
L
Q0~Q7 : Dout
Q8~Q14 : Hi-Z
L
Input
Operating
Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item
Output Capacitance
Input Capacitance
Symbol
Test Conditions
VOUT=0V
Min
Max
12
Unit
pF
COUT
CIN
-
-
VIN=0V
12
pF
NOTE : Capacitance is periodically sampled and not 100% tested.
K3P5V(U)1000D-D(G)C
CMOS MASK ROM
AC CHARACTERISTICS(TA=0°C to +70°C, VCC=3.3V/3.0V±0.3V, unless otherwise noted.)
TEST CONDITIONS
Item
Value
0.45V to 2.4V
10ns
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
1.5V
1 TTL Gate and CL=100pF
READ CYCLE
K3P5V(U)1000D-D(G)C10 K3P5V(U)1000D-D(G)C12
Item
Symbol
Unit
Min
Max
Min
Max
Read Cycle Time
tRC
tACE
tAA
100
120
ns
ns
ns
ns
ns
Chip Enable Access Time
Address Access Time
100
100
30
120
120
50
Page Address Access Time
Output Enable Access Time
tPA
tOE
30
50
Output or Chip Disable to
Output High-Z
tDF
tOH
20
20
ns
ns
Output Hold from Address Change
0
0
NOTE : Page Address is determined as below.
Word mode (BHE=VIH) : A0, A1, A2
Byte mode (BHE=VIL) : A-1, A0, A1, A2
K3P5V(U)1000D-D(G)C
CMOS MASK ROM
TIMING DIAGRAM
READ
ADD
A0~A19
A-1(*1)
ADD1
ADD2
tRC
tDF(*3)
tACE
tOE
CE
OE
tAA
tOH
DOUT
D0~D7
VALID DATA
VALID DATA
D8~D15(*2)
PAGE READ
CE
tDF(*3)
OE
ADD
A3~A19
ADD
1 st
2 nd
A0,A1,A2
A-1(*1)
3 rd
tAA
tPA
DOUT
D0~D7
VALID DATA
VALID DATA
VALID DATA
VALID DATA
D8~D15(*2)
NOTES :
*1. Byte Mode only. A-1 is Least Significant Bit Address.(BHE = VIL)
*2. Word Mode only.(BHE = VIH)
*3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or VOL level.
K3P5V(U)1000D-D(G)C
CMOS MASK ROM
PACKAGE DIMENSIONS
(Unit : mm/inch)
42-DIP-600
+0.10
-0.05
0.25
+0.004
-0.002
0.010
#42
#22
13.80±0.20
0.543±0.008
#1
#21
0~15°
3.91±0.20
0.154±0.008
52.82
2.080
MAX
5.08
0.200
MAX
52.42±0.20
2.064±0.008
3.1±0.30
0.122±0.012
0.46±0.10
0.018±0.004
1.27±.10
0.38
0.015
2.54
0.100
0.81
0.032
MIN
(
)
0.050±0.004
44-SOP-600
0~8°
#44
#23
16.04±0.30
12.60±0.20
0.631±0.012 0.496±0.008
0.80±0.20
0.031±0.008
#1
#22
+0.10
0.20
-0.05
0.008+0.004
-0.002
2.80±0.20
0.110±0.008
28.95
1.140
MAX
3.10
0.122
28.50±0.20
1.122±0.008
MAX
0.10 MAX
0.004 MAX
+0.100
-0.050
0.40
0.05
0.002
1.27
0.050
MIN
0.915
)
+0.004
-0.002
(
0.016
0.036
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