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KM23C64000BT-12 [SAMSUNG]

MASK ROM, 4MX16, 120ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44;
KM23C64000BT-12
型号： KM23C64000BT-12
厂家： SAMSUNG    SAMSUNG
描述：

MASK ROM, 4MX16, 120ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

有原始数据的样本ROM 光电二极管 内存集成电路
文件： 总4页 (文件大小：71K)
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KM23C64000BT  
CMOS MASK ROM  
64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
8,388,608 x 8(byte mode)  
4,194,304 x 16(word mode)  
· Fast access time : 100ns(Max.)  
· Supply voltage : single +5V  
· Current consumption  
Operating : 70mA(Max.)  
Standby : 100mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
The KM23C64000BT is a fully static mask programmable ROM  
fabricated using silicon gate CMOS process technology, and is  
organized either as 8,388,608 x 8 bit(byte mode) or as  
4,194,304 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
· Package : KM23C64000BT : 44-TSOP2-400  
The KM23C64000BT is packaged in a 44-TSOP2.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A21  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
A21  
A18  
A20  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
1
2
.
.
.
.
.
.
.
.
A19  
A8  
(4,194,304x16/  
8,388,608x8)  
A17  
A7  
3
DECODER  
4
A9  
A6  
A5  
A4  
A3  
A10  
A11  
A12  
5
6
Y
7
SENSE AMP.  
BUFFERS  
BUFFERS  
AND  
8
A13  
A14  
A15  
A2  
A1  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
DECODER  
A0  
A16  
A0  
CE  
VSS  
OE  
Q0  
TSOP2  
A-1  
BHE  
VSS  
.
.
.
Q15/A-1  
Q7  
CE  
Q8  
29 Q14  
28 Q6  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
Q1  
OE  
Q9  
Q13  
Q5  
27  
26  
25  
24  
23  
BHE  
Q2 19  
Q10 20  
Q12  
Q4  
Q3  
21  
Q11  
22  
VCC  
Pin Name  
A0 - A21  
Pin Function  
Address Inputs  
Data Outputs  
KM23C64000BT  
Q0 - Q14  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power (+5V)  
Ground  
OE  
VCC  
VSS  
KM23C64000BT  
CMOS MASK ROM  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
Rating  
Unit  
Remark  
Voltage on Any Pin Relative to VSS  
Temperature Under Bias  
Storage Temperature  
VIN  
-0.3 to +7.0  
-10 to +85  
-55 to +150  
V
-
-
-
TBIAS  
TSTG  
°C  
°C  
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the  
conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may  
affect device reliability.  
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA= 0 to 70°C)  
Item  
Min  
4.5  
0
Symbol  
VCC  
Typ  
5.0  
0
Max  
5.5  
0
Unit  
V
Supply Voltage  
Supply Voltage  
VSS  
V
DC CHARACTERISTICS  
Parameter  
Symbol  
Test Conditions  
Min  
Max  
70  
Unit  
Operating Current  
ICC  
ISB1  
ISB2  
ILI  
CE=OE=VIL, all outputs open  
CE=VIH, all outputs open  
CE=VCC, all outputs open  
VIN=0 to VCC  
-
mA  
mA  
mA  
mA  
mA  
V
Standby Current(TTL)  
-
-
1
Standby Current(CMOS)  
Input Leakage Current  
Output Leakage Current  
Input High Voltage, All Inputs  
Input Low Voltage, All Inputs  
Output High Voltage Level  
Output Low Voltage Level  
100  
10  
-
ILO  
VOUT=0 to VCC  
-
10  
VIH  
VIL  
2.2  
-0.3  
2.4  
-
VCC+0.3  
0.8  
-
V
VOH  
VOL  
IOH=-400mA  
V
IOL=2.1mA  
0.4  
V
NOTE : Minimum DC Voltage(VIL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.  
Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.  
MODE SELECTION  
CE  
OE  
BHE  
X
Q15/A-1  
Mode  
Data  
High-Z  
Power  
Standby  
Active  
H
X
X
X
Standby  
Operating  
Operating  
L
H
X
High-Z  
H
Output  
Q0~Q15 : Dout  
Active  
L
L
Q0~Q7 : Dout  
Q8~Q14 : High-Z  
L
Input  
Operating  
Active  
CAPACITANCE(TA=25°C, f=1.0MHz)  
Item  
Output Capacitance  
Input Capacitance  
Symbol  
Test Conditions  
VOUT=0V  
Min  
Max  
12  
Unit  
pF  
COUT  
CIN  
-
-
VIN=0V  
12  
pF  
NOTE : Capacitance is periodically sampled and not 100% tested.  
KM23C64000BT  
CMOS MASK ROM  
AC CHARACTERISTICS(TA= 0 to 70°C, VCC=5V±10%, unless otherwise noted.)  
TEST CONDITIONS  
Item  
Value  
Input Pulse Levels  
0.6V to 2.4V  
10ns  
Input Rise and Fall Times  
Input and Output timing Levels  
Output Loads  
0.8V and 2.0V  
1 TTL Gate and CL=100pF  
READ CYCLE  
Item  
KM23C64000BT-10  
KM23C64000BT-12  
Symbol  
Unit  
Min  
Max  
Min  
Max  
Read Cycle Time  
tRC  
tACE  
tAA  
100  
120  
ns  
ns  
ns  
ns  
Chip Enable Access Time  
Address Access Time  
Output Enable Access Time  
100  
100  
50  
120  
120  
60  
tOE  
Output or Chip Disable to  
Output High-Z  
tDF  
tOH  
20  
20  
ns  
ns  
Output Hold from Address Change  
0
0
TIMING DIAGRAM  
READ  
ADD  
ADD2  
ADD1  
A0~A21  
A-1(*1)  
tRC  
tDF(*3)  
tACE  
CE  
OE  
tOE  
tAA  
tOH  
DOUT  
D0~D7  
VALID DATA  
VALID DATA  
D8~D15(*2)  
NOTES :  
*1. Byte Mode only. A-1 is Least Significant Bit Address.(BHE = VIL)  
*2. Word Mode only.(BHE=VIH)  
*3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or VOL level.  
KM23C64000BT  
CMOS MASK ROM  
PACKAGE DIMENSIONS  
(Unit : mm/inch)  
44-TSOP2-400  
0~8°  
0.25  
0.010  
(
)
#44  
#23  
0.45 ~0.75  
0.018 ~ 0.030  
11.76±0.20  
0.463±0.008  
0.50  
)
(
0.020  
#1  
#22  
0.15 + 0.10  
1.00±0.10  
0.039±0.004  
1.20  
- 0.05  
+ 0.004  
0.006  
18.81  
0.741  
- 0.002  
MAX.  
MAX.  
0.047  
18.41±0.10  
0.725±0.004  
0.10  
0.004  
MAX  
0.80  
0.0315  
0.805  
0.032  
0.35±0.10  
0.014±0.004  
(
)

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