KS0078P [SAMSUNG]
34X120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC183;型号: | KS0078P |
厂家: | SAMSUNG |
描述: | 34X120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC183 驱动器 控制器 CD |
文件: | 总71页 (文件大小:558K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
KS0078 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology.
It can display 1, 2, or 4 lines with 5 × 8 or 6 × 8 dots format.
FUNCTIONS
• Character type dot matrix LCD driver & controller
• Internal driver : 34 common and 120 segment signal output
• Easy interface with 4-bit or 8-bit MPU
• Clock synchronized serial Interface
• 5 × 8 dot matrix possible
• 6 × 8 dot matrix possible
• Bi-directional shift function
• All character reverse display
• Display shift per line
• Voltage converter for LCD drive voltage : 13 V max (2 times / 3 times)
• Various instruction functions
• Automatic power on reset
FEATURES
• Internal Memory
- Character Generator ROM (CGROM) : 9,600 bits (240 characters × 5 × 8 dot)
- Character Generator RAM (CGRAM) : 64 x 8 bits (8 characters × 5 × 8 dot)
- Segment Icon RAM (SEGRAM) : 16 × 8 bits (96 icons max.)
- Display Data RAM (DDRAM) : 96 × 8 bits (96 characters max.)
• Low power operation
- Power supply voltage range : 2.7 ~ 5.5 V (VDD)
- LCD Drive voltage range : 3.0 ~ 13.0 V (VDD - V5)
• CMOS process
• Programmable duty cycle : 1/17, 1/33 (refer to Table 1.)
• Internal oscillator with an external resistor
• Bare chip available
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 1. Programmable duty cycles
5-dot font width
Display Line
Duty Ratio
Single-chip Operation
Numbers
Displayable characters
1 line of 48 characters
2 lines of 48 characters
4 lines of 24 characters
Possible icons
1
2
4
1/17
1/33
1/33
80
80
80
6-dot font width
Display Line
Duty Ratio
Single-chip Operation
Numbers
Displayable characters
1 line of 40 characters
2 lines of 40 characters
4 lines of 20 characters
Possible icons
1
2
4
1/17
1/33
1/33
96
96
96
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
OSC1 OSC2
IE
Oscillator
Power On Reset
(POR)
Timing Generator
RESET
IM
/ 7
8
/
Instruction
Register
Instruction
Decoder
RS/
CS
(IR)
System
COM0 -
COM33
34 bit
Shift
Display Data
E/
Interface
SCLK
Common
Driver
RAM (DDRAM)
96 x 8 bits
Serial
RW/
4 bit
SID
Address
Counter
Register
8 bit
7
/
7
/
/ 8
Data
8
/
8
/
DB4 -
DB7
Register
120 bit
Latch
120 bit
Shift
(DR)
/ 8
Input/
Segment
Driver
SEG1
-
DB3 -
DB1
Output
Buffer
Circuit
Register
SEG120
Busy
Flag
/ 3
/ 7
/ 8
/ 8
DB0/
SOD
Ch aracter
Generator
Ch aracter
SegmentRAM
(SEGRAM)
16 bytes
Cursor and
Generator
RAM(CGRAM)
64 b ytes
ROM(CGROM)
960 0 b its
Blink
LCD Driver
Voltage
Controller
Selector
Vci
C1
C2
/ 5
Voltage Converter
/ 5/6
V5OUT2
V5OUT3
Parallel / Serial Converter
and Smooth Scroll Circuit
V1 - V5
VDD
GND
(VSS)
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD CONFIGURATION
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ꢀ
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ꢀ
ꢀ
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ꢀ
ꢀ
ꢀ
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ꢀ
ꢀ
ꢀ
147 SEG42
146 SEG41
145 SEG40
144 SEG39
143 SEG38
142 SEG37
141 SEG36
140 SEG35
139 SEG34
138 SEG33
137 SEG32
136 SEG31
135 SEG30
134 SEG29
133 SEG28
132 SEG27
131 SEG26
130 SEG25
129 SEG24
128 SEG23
127 SEG22
126 SEG21
125 SEG20
124 SEG19
123 SEG18
122 SEG17
121 SEG16
120 SEG15
119 SEG14
118 SEG13
117 SEG12
116 SEG11
115 SEG10
114 SEG9
113 SEG8
112 SEG7
111 SEG6
110 SEG5
109 SEG4
108 SEG3
107 SEG2
106 SEG1
105 COM0
104 COM1
103 COM2
102 COM3
101 COM4
100 COM5
99 COM6
SEG79
SEG80
SEG81
SEG82
SEG83
SEG84
SEG85
SEG86
SEG87
1
2
3
4
5
6
7
8
9
ꢀ
ꢀ
ꢀ
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ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
SEG88 10
SEG89 11
SEG90 12
SEG91 13
SEG92 14
SEG93 15
SEG94 16
SEG95 17
SEG96 18
SEG97 19
SEG98 20
SEG99 21
SEG100 22
SEG101 23
SEG102 24
SEG103 25
SEG104 26
SEG105 27
SEG106 28
SEG107 29
SEG108 30
SEG109 31
SEG110 32
SEG111 33
SEG112 34
SEG113 35
SEG114 36
SEG115 37
SEG116 38
SEG117 39
SEG118 40
SEG119 41
SEG120 42
COM9 43
Y
X
(0, 0)
chip size : 5340 x 8740
PAD size :100 x 100
unit
: µm
COM10 44
COM11 45
COM12 46
COM13 47
COM14 48
COM15 49
COM16 50
COM25 51
COM26 52
COM27 53
COM28 54
COM29 55
COM30 56
COM31 57
COM32 58
COM33 59
98 COM7
97 COM8
96 COM17
95 COM18
94 COM19
93 COM20
92 COM21
91 COM22
90 COM23
89 COM24
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD LOCATION
COORDINATE
COORDINATE
COORDINATE
COORDINATE
PAD
NO.
PAD
PAD
NO.
PAD
PAD
NO.
PAD
PAD
NO.
PAD
NAME
NAME
NAME
NAME
X-
Y-
X-
Y-
X-
Y-
X-
Y-
D B 0 /
S O D
1
S E G79
-2504
3540
24
S E G 1 02
-2504
665
47
C O M 13
-2504
- 2 322
7 0
- 5 00
-4119
2
3
S E G 8 0
S E G 8 1
S E G 8 2
S E G 8 3
S E G 8 4
S E G 8 5
S E G 8 6
S E G 8 7
S E G 8 8
S E G 8 9
S E G 9 0
S E G 9 1
S E G 9 2
S E G 9 3
S E G 9 4
S E G 9 5
S E G 9 6
S E G 9 7
S E G 9 8
S E G 9 9
S E G 1 0
S E G 1 0
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
3 4 1
3 2 9
3 1 6
3 0 4
2 9 1
2 7 9
2 6 6
2 5 4
2 4 1
2 2 9
2 1 6
2 0 4
1 9 1
1 7 9
1 6 6
1 5 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
S E G 1 03
S E G 1 04
S E G 1 05
S E G 1 06
S E G 1 07
S E G 1 08
S E G 1 09
S E G 1 10
S E G 1 11
S E G 1 12
S E G 1 13
S E G 1 14
S E G 1 15
S E G 1 16
S E G 1 17
S E G 1 18
S E G 1 19
S E G 1 20
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
5 4 0
4 1 5
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
6 6
6 7
6 8
6 9
C O M 14
C O M 15
C O M 16
C O M 25
C O M 26
C O M 27
C O M 28
C O M 29
C O M 30
C O M 31
C O M 32
C O M 33
V D D
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
-2504
- 1 750
- 1 625
- 1 500
- 1 375
- 1 250
- 1 125
- 1 000
- 8 75
- 2 447
- 2 572
- 2 697
- 2 822
- 2 947
- 3 072
- 3 197
- 3 322
- 3 447
- 3 572
- 3 697
- 3 822
- 4 119
- 4 119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
7 1
7 2
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
8 1
8 2
8 3
8 4
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
D B 1
D B 2
- 3 75
- 2 50
- 1 25
0
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
-4119
- 3 822
- 3 697
- 3 572
- 3 447
4
2 9 0
D B 3
5
1 6 5
D B 4
6
4 0
D B 5
1 2 5
7
- 8 4
D B 6
2 5 0
8
- 2 09
- 3 34
- 4 59
- 5 84
- 7 09
- 8 34
- 9 59
- 1 084
- 1 209
- 1 334
- 1 459
- 1 584
- 1 822
- 1 947
- 2 072
- 2 197
D B 7
3 7 5
9
V c i
5 0 0
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
C 2
6 2 5
C 1
7 5 0
V S S 2
V 5 O U T 2
V 5 O U T 3
V 5
8 7 5
1 0 00
1 1 25
1 2 50
1 3 75
1 5 00
1 6 25
1 7 50
2504
2504
2504
2504
O S C 2
O S C 1
V 4
R E S E T
IM
V 3
1415
1 4 2
1 2 9
1 1 6
1 0 4
9 1 5
7 9 0
V 2
IE
V 1
C O M
9
V S S 1
C O M 24
C O M 23
C O M 22
C O M 21
C O M 10
C O M 11
C O M 12
R S / C S
R W /S I D
E /S C LK
- 7 50
- 6 25
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD COORDINATE CONTINUED
COORDINATE
COORDINATE
COORDINATE
COORDINATE
PAD
NO.
PAD
PAD
NO.
PAD
PAD
NO.
PAD
PAD
NO.
PAD
NAME
NAME
NAME
NAME
X-
Y-
X-
Y-
X-
Y-
X-
Y-
93
C O M 20
C O M 19
C O M 18
C O M 17
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
-3322
- 3 197
- 3 072
- 2 947
- 2 822
- 2 697
- 2 572
- 2 447
- 2 322
- 2 197
- 2 072
- 1 947
- 1 822
- 1 584
- 1 459
- 1 334
- 1 209
- 1 084
- 9 59
116
1 1 7
1 1 8
1 1 9
1 2 0
1 2 1
1 2 2
1 2 3
1 2 4
1 2 5
1 2 6
1 2 7
1 2 8
1 2 9
1 3 0
1 3 1
1 3 2
1 3 3
1 3 4
1 3 5
1 3 6
1 3 7
1 3 8
S E G 1 1
S E G 1 2
S E G 1 3
S E G 1 4
S E G 1 5
S E G 1 6
S E G 1 7
S E G 1 8
S E G 1 9
S E G 2 0
S E G 2 1
S E G 2 2
S E G 2 3
S E G 2 4
S E G 2 5
S E G 2 6
S E G 2 7
S E G 2 8
S E G 2 9
S E G 3 0
S E G 3 1
S E G 3 2
S E G 3 3
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
2504
-334
- 2 09
- 8 4
139
1 4 0
1 4 1
1 4 2
1 4 3
1 4 4
1 4 5
1 4 6
1 4 7
1 4 8
1 4 9
1 5 0
1 5 1
1 5 2
1 5 3
1 5 4
1 5 5
1 5 6
1 5 7
1 5 8
1 5 9
1 6 0
1 6 1
S E G 3 4
S E G 3 5
S E G 3 6
S E G 3 7
S E G 3 8
S E G 3 9
S E G 4 0
S E G 4 1
S E G 4 2
S E G 4 3
S E G 4 4
S E G 4 5
S E G 4 6
S E G 4 7
S E G 4 8
S E G 4 9
S E G 5 0
S E G 5 1
S E G 5 2
S E G 5 3
S E G 5 4
S E G 5 5
S E G 5 6
2504
2504
2504
2504
2504
2504
2504
2504
2504
2 1 87
2 0 62
1 9 37
1 8 12
1 6 87
1 5 62
1 4 37
1 3 12
1 1 87
1 0 62
9 3 7
2540
2 6 65
2 7 90
2 9 15
3 0 40
3 1 65
3 2 90
3 4 15
3 5 40
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
162
1 6 3
1 6 4
1 6 5
1 6 6
1 6 7
1 6 8
1 6 9
1 7 0
1 7 1
1 7 2
1 7 3
1 7 4
1 7 5
1 7 6
1 7 7
1 7 8
1 7 9
1 8 0
1 8 1
1 8 2
1 8 3
S E G 5 7
S E G 5 8
S E G 5 9
S E G 6 0
S E G 6 1
S E G 6 2
S E G 6 3
S E G 6 4
S E G 6 5
S E G 6 6
S E G 6 7
S E G 6 8
S E G 6 9
S E G 7 0
S E G 7 1
S E G 7 2
S E G 7 3
S E G 7 4
S E G 7 5
S E G 7 6
S E G 7 7
S E G 7 8
437
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
4 1 19
9 4
3 1 2
9 5
1 8 7
9 6
4 0
6 2
9 7
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
8
7
6
5
4
3
2
1
0
1 6 5
- 6 2
9 8
2 9 0
- 1 87
- 3 12
- 4 37
- 5 62
- 6 87
- 8 12
- 9 37
- 1 062
- 1 187
- 1 312
- 1 437
- 1 562
- 1 687
- 1 812
- 1 937
- 2 062
- 2 187
9 9
4 1 5
1 0 0
1 0 1
1 0 2
1 0 3
1 0 4
1 0 5
1 0 6
1 0 7
1 0 8
1 0 9
1 1 0
1 1 1
1 1 2
1 1 3
1 1 4
1 1 5
5 4 0
6 6 5
7 9 0
9 1 5
1 0 40
1 1 65
1 2 90
1 4 15
1 5 40
1 6 65
1 7 90
1 9 15
2 0 40
2 1 65
2 2 90
2 4 15
S E G 9 1
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
2
3
4
5
6
7
8
9
- 8 34
- 7 09
8 1 2
- 5 84
6 8 7
S E G 1 0
- 4 59
5 6 2
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DESCRIPTION
PAD (NO)
INPUT/
NAME
DESCRIPTION
INTERFACE
OUTPUT
VDD (60)
for logical circuit(+3V,+5V)
0V(GND)
VSS1,VSS2
(66,81)
-
V1-V5
Power supply Bias voltage level for LCD driving.
Power supply
(88-84)
Vci (78)
Input
Input voltage to the voltage converter to
generate LCD drive voltage(Vci = 1.0 -4.5V).
SEG1-SEG120
(106-183,
1-42)
COM0-COM33
(105-89,
Output
Segment output Segment signal output for LCD drive.
LCD
LCD
Output
Common output Common signal output for LCD drive.
43-59)
OSC1,OSC2
(61,62)
Input
(OSC1),
Output
(OSC2)
Input
Oscillator
When use internal oscillator, connect external
Rf resistor.
If external clock is used, connect it to OSC1.
External
resistor/oscillator
(OSC1)
C1,C2 (80,79)
External
To use the voltage converter(2 times /3 times),
External
capacitance input these pins must be connected to the external
capacitance.
capacitance
RESET (63)
IE (65)
Input
Input
Reset pin
Select pin
of
Initialized to Low
When IE = "High", Instruction set is
selected as Table 6.
-
-
instruction
set
When IE = "Low", Instruction set is selected as
Table 10.
V5OUT2(82)
V5OUT3(83)
Output
Two times
converter
output
The value of Vci is converted two times. To
use three times converter, the same
capacitance as that of C1-C2 should be
connected here.
V5
capacitance
Three times
converter
output
The value of Vci is converted three times.
V5
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢃꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DESCRIPTION (continued)
INPUT/
PAD (NO)
NAME
DESCRIPTION
INTERFACE
OUTPUT
Select Interface mode with the MPU.
In IM = "Low" : Serial mode,
IM (64)
Input
Interface mode
selection
-
In IM = "High" : 4-bit/8-bit bus mode.
Register select/
Chip select
In bus mode, used as register selection input.
In RS/CS = "High", Data register is selected. In
RS/CS = "Low", Instruction register is selected.
RS/CS (67)
Input
MPU
MPU
In serial mode, used as chip selection input.
In RS/CS = "Low", selected. When RS/CS =
"High", not selected.(Low access enable)
In bus mode, used as read/write selection input.
In RW/SID = "High", read operation. When
RW/SID = "Low", write operation.
RW/SID (68)
Input
Input
Read_write/
Serial input data
In serial mode, used for data input pin.
In bus mode, used as read_write enable signal.
In serial mode, used as serial clock input pin.
E/SCLK (69)
Read_write
enable/Serial
clock
MPU
MPU
In 8-bit bus mode, used as lowest bi-directional
data bit. During 4-bit bus mode, Open this pin.
DB0/SOD (70)
Input_Output/
Output
Data bus 0
bit/Serial output
data
In serial mode, used as serial data output pin. If
not in read operation, open this pin.
DB1-DB3
(71-73)
In 8-bit bus mode, used as low order bi-
directional data bus.
Input.
Data bus 1- 7
MPU
MPU
Output
During 4-bit bus mode or serial mode, open
these pins.
DB4-DB7
(74-77)
In 8-bit bus mode, used as high order bi-
directional data bus. In case of 4-bit bus mode,
used as both high and low order.
DB7 used for Busy Flag output.
During serial mode, open these pins.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢉꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FUNCTION DESCRIPTION
System Interface
This chip has all three kinds interface type with MPU : serial, 4-bit bus and 8-bit bus. Serial and bus(4-bit/8-bit) is selected by
IM input, and 4-bit bus and 8-bit bus is selected by DL bit in the instruction register.
During read or write operation, two 8-bit registers are used. one is data register (DR), the other is instruction register(IR).
The data register(DR) is used as temporary data storage place for being written into or read from DDRAM/CGRAM/SEGRAM,
target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done
automatically.
Hence, after MPU reads DR data, the data in the next DDRAM/CGRAM/SEGRAM address is transferred into DR
automatically. Also after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM/SEGRAM automatically.
The Instruction register(IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read instruction
data.
To select register, use RS/CS input pin in 4-bit/8-bit bus mode(IM = "High") or RS bit in serial mode(IM = "Low").
Table 2. Various kinds of operations according to RS and R/W bits.
RS
0
R/W
Operation
0
1
0
1
Instruction Write operation (MPU writes Instruction code into IR)
Read Busy flag(DB7) and address counter (DB0 ~ DB6)
Data Write operation (MPU writes data into DR)
Data Read operation (MPU reads data from DR)
0
1
1
Busy Flag (BF)
When BF = "High", it indicates that the internal operation is being processed. So during this time the next instruction cannot
be accepted. BF can be read, when RS = Low and R/W = High(Read Instruction Operation), through DB7 port.
Before executing the next instruction, be sure that BF is not High.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢊꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Display Data RAM (DDRAM)
DDRAM stores display data of maximum 96 × 8 bits (96 characters).
DDRAM address is set in the address counter (AC) as a hexadecimal number. (refer to Fig-1.)
ꢉꢊꢋ
ꢀꢁꢂ
ꢌꢊꢋ
ꢀꢁꢈ
ꢀꢁꢃ
ꢀꢁꢄ
ꢀꢁꢅ
ꢀꢁꢆ
ꢀꢁꢇ
Fig-1. DDRAM Address
1) Display of 5-dot font width character
♦ 5-dot 1 line display
In the case of 1 line display with 5-dot font, the address range of DDRAM is 00H ~ 5FH. (Refer to Fig-2)
ꢊꢋꢌꢍꢎꢏꢐ ꢍꢑꢌꢋꢒꢋꢑꢓ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢀꢀꢀꢀꢀ
ꢚꢛꢅꢅꢇꢈ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢁꢍ ꢁꢎ ꢁꢏ ꢁꢈ ꢁꢉ
ꢂꢈ ꢂꢉ ꢂꢊ ꢂꢋ ꢂꢌ
ꢀꢁꢂꢃꢆ
ꢊꢊꢔꢕꢖ ꢏꢗꢗꢘꢙꢌꢌꢌ
ꢚꢛꢅꢅꢇꢈ
ꢇꢈꢉꢃ
ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ
ꢇꢈꢉꢃꢊꢋ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ ꢁꢎ ꢁꢏ ꢁꢈ ꢁꢉ ꢁꢊ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢙꢝꢒ!
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀ
ꢁ ꢂ ꢃ ꢄ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢅ
ꢂꢉ ꢂꢊ ꢂꢋ ꢂꢌ ꢃꢀ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁꢂꢃꢆ
ꢀ
ꢁ ꢂ ꢃ ꢄ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢅꢌ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢁꢇ ꢁꢍ ꢁꢎ ꢁꢏ ꢁꢈ
ꢂꢏ ꢂꢈ ꢂꢉ ꢂꢊ ꢂꢋ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁꢂꢃꢆ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢔꢋ"ꢞꢒ!
Fig-2. 1-line X 48ch. display
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢋꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
♦ 5-dot 2 line display
In the case of 2 line display with 5-dot font, the address range of DDRAM is 00H ~ 2FH, 40H ~ 6FH. (refer to Fig-3)
ꢊꢋꢌꢍꢎꢏꢐ ꢍꢑꢌꢋꢒꢋꢑꢓ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢀꢀꢀꢀꢀꢀ
ꢁꢍ ꢁꢎ ꢁꢏ ꢁꢈ ꢁꢉ
ꢂꢈ ꢂꢉ ꢂꢊ ꢂꢋ ꢂꢌ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢊꢍ
ꢀꢀꢀꢀꢀꢀ
ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ
ꢅꢃ ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ
ꢅꢍ ꢅꢎ ꢅꢏ ꢅꢈ ꢅꢉ
ꢀꢀꢀꢀꢀꢀ
ꢆꢈ ꢆꢉ ꢆꢊ ꢆꢋ ꢆꢌ
ꢀꢁꢂꢏꢊ
ꢊꢊꢔꢕꢖ ꢏꢗꢗꢘꢙꢌꢌꢌ
ꢚꢛꢅꢅꢇꢈ
ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ
ꢚꢛꢅꢅꢇꢈ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢅ
ꢀꢀꢀꢀꢀꢀ
ꢁꢎ ꢁꢏ ꢁꢈ ꢁꢉ ꢁꢊ
ꢂꢉ ꢂꢊ ꢂꢋ ꢂꢌ ꢀꢀ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢊꢍ
ꢀꢀꢀꢀꢀꢀ
ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ ꢄꢅ
ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ ꢅꢍ
ꢅꢎ ꢅꢏ ꢅꢈ ꢅꢉ ꢅꢊ
ꢀꢀꢀꢀꢀꢀ
ꢆꢉ ꢆꢊ ꢆꢋ ꢆꢌ ꢄꢀ
ꢀꢁꢂꢏꢊ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢙꢝꢒ!
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ
ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ
ꢃꢃ ꢃꢄ ꢃꢆ ꢃꢇ ꢃꢈ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢀꢀꢀꢀꢀ
ꢂꢌ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢀꢀꢀꢀꢀꢀ
ꢁꢇ ꢁꢍ ꢁꢎ ꢁꢏ ꢁꢈ
ꢂꢏ ꢂꢈ ꢂꢉ ꢂꢊ ꢂꢋ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢊꢍ
ꢀꢀꢀꢀꢀꢀ
ꢆꢌ ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ
ꢅꢂ ꢅꢃ ꢅꢄ ꢅꢅ ꢅꢆ
ꢀꢀꢀꢀꢀꢀ
ꢅꢇ ꢅꢍ ꢅꢎ ꢅꢏ ꢅꢈ
ꢆꢏ ꢆꢈ ꢆꢉ ꢆꢊ ꢆꢋ
ꢀꢁꢂꢏꢊ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢔꢋ"ꢞꢒ!
Fig-3. 2-line X 48ch. display (5-dot font width)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢁꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
♦ 5-dot 4 line display
In the case of 4 line display with 5-dot font, the address range of DDRAM is 00H ~ 17H, 20H ~ 37H, 40H ~ 57H,
60H ~ 77H. (refer to Fig-4)
ꢓꢈꢔꢕꢖꢗꢘ ꢕꢙꢔꢈꢃꢈꢙꢚ
ꢎꢍ ꢎꢎ ꢎꢏ ꢎꢐ
ꢎꢒ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ
ꢃꢃ ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ
ꢅꢃ ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ
ꢀꢀꢀꢀꢀꢀ
ꢂꢀ ꢂꢁ ꢂꢂ ꢂꢃ ꢂꢄ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢃꢌ
ꢀꢀꢀꢀꢀꢀ
ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢊꢎ
ꢀꢀꢀꢀꢀꢀ
ꢆꢀ ꢆꢁ ꢆꢂ ꢆꢃ ꢆꢄ
ꢇꢃ ꢇꢄ ꢇꢅ ꢇꢆ ꢇꢇ
ꢀꢁꢂꢏꢊ
ꢓꢓꢋꢁꢛ ꢗꢜꢜꢅꢄꢔꢔꢔ
ꢝꢆꢒꢒꢞ
ꢇꢈꢉꢃꢊꢋ
ꢇꢈꢉꢃ
ꢎꢍ ꢎꢎ ꢎꢏ ꢎꢐ
ꢎꢒ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢀꢁꢂꢃ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢅ
ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢀꢀ
ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ ꢂꢀ
ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ ꢄꢀ
ꢇꢄ ꢇꢅ ꢇꢆ ꢇꢇ ꢆꢀ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢀꢀꢀꢀꢀ
ꢂꢁ ꢂꢂ ꢂꢃ ꢂꢄ ꢂꢅ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢃꢌ
ꢀꢀꢀꢀꢀꢀ
ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ ꢄꢅ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢊꢎ
ꢀꢀꢀꢀꢀꢀ
ꢆꢁ ꢆꢂ ꢆꢃ ꢆꢄ ꢆꢅ
ꢀꢁꢂꢏꢊ
ꢀꢁꢂꢃꢄꢅ ꢆꢇꢈꢂꢃ ꢉꢄꢂꢃꢊ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢎꢒ ꢎꢍ ꢎꢎ ꢎꢏ ꢎꢐ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢀꢀꢀꢀꢀ
ꢁꢇ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢁꢂ ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ
ꢀꢀꢀꢀꢀꢀ
ꢃꢂ ꢃꢃ ꢃꢄ ꢃꢅ ꢃꢆ
ꢅꢂ ꢅꢃ ꢅꢄ ꢅꢅ ꢅꢆ
ꢇꢂ ꢇꢃ ꢇꢄ ꢇꢅ ꢇꢆ
ꢃꢇ ꢂꢀ ꢂꢁ ꢂꢂ ꢂꢃ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢊꢎ
ꢀꢀꢀꢀꢀꢀ
ꢅꢇ ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ
ꢀꢀꢀꢀꢀꢀ
ꢇꢇ ꢆꢀ ꢆꢁ ꢆꢂ ꢆꢃ
ꢀꢁꢂꢏꢊ
ꢀꢁꢂꢃꢄꢅ ꢆꢇꢈꢂꢃ ꢋꢈꢌꢇꢃꢊ
Fig-4. 4-line X 24ch. display (5-dot font width)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) Display of 6-dot font width character
♦ 6-dot 1 line display
In the case of 1 line display with 6-dot font, the address range of DDRAM is 00H ~ 5FH. (refer to Fig-5)
ꢊꢋꢌꢍꢎꢏꢐ ꢍꢑꢌꢋꢒꢋꢑꢓ
ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀꢆ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢀꢀꢀꢀꢀ
ꢚꢛꢅꢅꢇꢈ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢀꢌ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ
ꢀꢀꢀꢀꢀꢀ
ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ
ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ
ꢀꢁꢂꢃꢆ
ꢊꢊꢔꢕꢖ ꢏꢗꢗꢘꢙꢌꢌꢌ
ꢚꢛꢅꢅꢇꢈ
ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ
ꢇꢈꢉꢃꢊꢋ ꢇꢈꢉꢃ
ꢀ
ꢁ ꢂ ꢃ ꢄ
ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀꢆ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢅ
ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ ꢁꢎ
ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ ꢂꢍ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁꢂꢃꢆ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢙꢝꢒ!
ꢀ
ꢁ ꢂ ꢃ ꢄ
ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀꢆ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢅꢌ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢀꢋ ꢀꢌ ꢁꢀ ꢁꢁ ꢁꢂ
ꢀꢀꢀꢀꢀꢀ
ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ
ꢀꢀꢀꢀꢀꢀ
ꢂꢂ ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ
ꢀꢁꢂꢃꢆ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢔꢋ"ꢞꢒ!
Fig-5. 1-line X 40ch. display
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
♦ 6-dot 2 line display
In the case of 2 line display with 6-dot font, the address range of DDRAM is 00H ~ 2FH, 40H ~ 6FH. (refer to Fig-6)
ꢊꢋꢌꢍꢎꢏꢐ ꢍꢑꢌꢋꢒꢋꢑꢓ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀꢆ ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢀꢌ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢀꢀꢀꢀꢀꢀ
ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ
ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ
ꢀꢁꢂꢄ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢀꢀꢀꢀꢀ
ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ
ꢄꢌ ꢅꢀ ꢅꢁ ꢅꢂ ꢅꢃ
ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ ꢅꢍ
ꢀꢀꢀꢀꢀꢀ
ꢆꢃ ꢆꢄ ꢆꢅ ꢆꢆ ꢆꢇ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢏꢊ
ꢊꢊꢔꢕꢖ ꢏꢗꢗꢘꢙꢌꢌꢌ
ꢚꢛꢅꢅꢇꢈ
ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ ꢇꢈꢉꢃ
ꢇꢈꢉꢃꢊꢋ
ꢚꢛꢅꢅꢇꢈ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀꢆ ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢅ
ꢀꢀꢀꢀꢀꢀ
ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢍ ꢁꢎ
ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ ꢂꢍ
ꢀꢁꢂꢄ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢀꢀꢀꢀꢀ
ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ ꢄꢅ
ꢀꢀꢀꢀꢀꢀ
ꢅꢀ ꢅꢁ ꢅꢂ ꢅꢃ ꢅꢄ
ꢅꢅ ꢅꢆ ꢅꢇ ꢅꢍ ꢅꢎ
ꢆꢄ ꢆꢅ ꢆꢆ ꢆꢇ ꢆꢍ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢏꢊ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢙꢝꢒ!
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀꢆ ꢀꢇ ꢀꢈ ꢀꢉ ꢁꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢂꢆ ꢂꢇ ꢂꢈ ꢂꢉ ꢃꢅ
ꢀꢁꢂꢅ
ꢀꢁꢂꢃ
ꢀꢀꢀꢀꢀꢀ
ꢂꢌ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢀꢋ ꢀꢌ ꢁꢀ ꢁꢁ ꢁꢂ
ꢀꢀꢀꢀꢀꢀ
ꢁꢃ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ
ꢂꢂ ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ
ꢀꢁꢂꢄ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢊꢎ
ꢀꢁꢂꢃꢌ
ꢀꢀꢀꢀꢀꢀ
ꢆꢌ ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ
ꢀꢀꢀꢀꢀꢀ
ꢄꢋ ꢄꢌ ꢅꢀ ꢅꢁ ꢅꢂ
ꢅꢃ ꢅꢄ ꢅꢅ ꢅꢆ ꢅꢇ
ꢆꢂ ꢆꢃ ꢆꢄ ꢆꢅ ꢆꢆ
ꢀꢁꢂꢊꢍ
ꢀꢁꢂꢏꢊ
ꢜꢕꢝꢒꢙꢘ ꢛꢞꢋꢝꢒ ꢔꢋ"ꢞꢒ!
Fig-6. 2-line X 40ch. display (6-dot font width)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
♦ 6-dot 4 line display
In the case of 4 line display with 6-dot font, the address range of DDARM is 00H ~ 17H, 20H ~ 37H, 40H ~ 57H,
60H ~ 77H. (refer to Fig-7)
ꢗꢈꢘꢙꢚꢛꢜ ꢙꢝꢘꢈꢃꢈꢝꢞ
ꢍꢒ ꢍꢓ ꢍꢔ ꢎꢖ
ꢍꢕ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢆ
ꢀꢀꢀꢀꢀꢀ
ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ
ꢀꢅ ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ
ꢂꢅ ꢃꢀ ꢃꢁ ꢃꢂ ꢃꢃ
ꢄꢅ ꢆꢀ ꢆꢁ ꢆꢂ ꢆꢃ
ꢀꢀꢀꢀꢀꢀ
ꢂꢀ ꢂꢁ ꢂꢂ ꢂꢃ ꢂꢄ
ꢀꢁꢂꢃꢅ
ꢀꢁꢂꢃꢇ
ꢀꢀꢀꢀꢀꢀ
ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ
ꢀꢁꢂꢈꢉ
ꢀꢁꢂꢈꢊ
ꢀꢀꢀꢀꢀꢀ
ꢇꢀ ꢇꢁ ꢇꢂ ꢇꢃ ꢇꢄ
ꢇꢅ ꢈꢀ ꢈꢁ ꢈꢂ ꢈꢃ
ꢀꢁꢂꢋꢈ
ꢗꢗꢋꢁ ꢛ!!ꢅꢄꢘꢘꢘ
"ꢆꢖꢖꢒꢓ
ꢌꢍꢎꢃꢈꢏ
ꢌꢍꢎꢃ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢍꢒ ꢍꢓ ꢍꢔ ꢎꢖ
ꢍꢕ
ꢀꢁꢂꢃ
ꢀꢀꢀꢀꢀꢀ
ꢀꢁ ꢀꢂ ꢀꢃ ꢀꢄ ꢀꢆ
ꢁꢀ ꢁꢁ ꢁꢂ ꢁꢃ ꢁꢄ
ꢃꢀ ꢃꢁ ꢃꢂ ꢃꢃ ꢃꢄ
ꢆꢀ ꢆꢁ ꢆꢂ ꢆꢃ ꢆꢄ
ꢈꢀ ꢈꢁ ꢈꢂ ꢈꢃ ꢈꢄ
ꢀꢁꢂꢄ
ꢀꢁꢂꢆ
ꢀꢀꢀꢀꢀꢀ
ꢂꢁ ꢂꢂ ꢂꢃ ꢂꢄ ꢂꢆ
ꢀꢁꢂꢃꢅ
ꢀꢁꢂꢃꢇ
ꢀꢀꢀꢀꢀꢀ
ꢄꢁ ꢄꢂ ꢄꢃ ꢄꢄ ꢄꢆ
ꢀꢁꢂꢈꢉ
ꢀꢁꢂꢈꢊ
ꢀꢀꢀꢀꢀꢀ
ꢇꢁ ꢇꢂ ꢇꢃ ꢇꢄ ꢇꢆ
ꢀꢁꢂꢋꢈ
ꢀꢁꢂꢃꢄꢅ ꢆꢇꢈꢂꢃ ꢉꢄꢂꢃꢊ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢍꢒ ꢍꢓ ꢍꢔ ꢎꢖ
ꢍꢕ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢆ
ꢀꢀꢀꢀꢀꢀ
ꢁꢈ ꢀꢀ ꢀꢁ ꢀꢂ ꢀꢃ
ꢀꢉ ꢀꢅ ꢁꢀ ꢁꢁ ꢁꢂ
ꢂꢉ ꢂꢅ ꢃꢀ ꢃꢁ ꢃꢂ
ꢄꢉ ꢄꢅ ꢆꢀ ꢆꢁ ꢆꢂ
ꢇꢉ ꢇꢅ ꢈꢀ ꢈꢁ ꢈꢂ
ꢀꢀꢀꢀꢀꢀ
ꢃꢈ ꢂꢀ ꢂꢁ ꢂꢂ ꢂꢃ
ꢀꢁꢂꢃꢅ
ꢀꢁꢂꢃꢇ
ꢀꢁꢂꢈꢉ
ꢀꢁꢂꢈꢊ
ꢀꢀꢀꢀꢀꢀ
ꢆꢈ ꢄꢀ ꢄꢁ ꢄꢂ ꢄꢃ
ꢀꢀꢀꢀꢀꢀ
ꢈꢈ ꢇꢀ ꢇꢁ ꢇꢂ ꢇꢃ
ꢀꢁꢂꢋꢈ
ꢀꢁꢂꢃꢄꢅ ꢆꢇꢈꢂꢃ ꢋꢈꢌꢇꢃꢊ
Fig-7. 4-line X 20ch. display (6-dot font width)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢇꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Timing Generation Circuit
Timing generation circuit generates clock signals for the internal operations.
Address Counter (AC)
Address Counter(AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR.
After writing into (reading from) DDRAM/CGRAM/SEGRAM, AC is automatically increased
(decreased) by 1. When RS = "Low" and R/W = "High", AC can be read through DB0~DB6
Cursor/Blink Control Circuit
It controls cursor/blink ON/OFF and black/white inversion at cursor position.
LCD Driver Circuit
LCD Driver circuit has 34 common and 120 segment signals for LCD driving.
Data from SEGRAM/CGRAM/CGROM is transferred to 120-bit segment latch serially, which is stored to 120-bit shift latch.
When each common is selected by 34-bit common register, segment data also output through segment driver from 100-bit segment
latch.
In 1-line display mode, COM0 ~ COM17 have 1/17 duty, and in 2-line or 4-line mode, COM0 ~ COM33 have 1/33 duty
ratio.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢈꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CGROM (Character Generator ROM)
CGROM has 5 × 8-dot 240 character pattern. (refer to Table 3)
Table 3. CGROM Character Code Table
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢃꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CGRAM (Character Generator RAM)
CGRAM has up to 5 × 8-dot 8 characters. By writing font data to CGRAM, user defined character can be used.
(Refer to Table 4)
Table 4. Relationship between Character Code(DDRAM) and Character Pattern(CGRAM)
1) 5 × 8 dot Character pattern
!ꢇꢗꢅꢗ"ꢃꢄꢅ !ꢙꢜꢄꢀꢓꢓꢋꢁꢛ ꢜꢗꢃꢗꢊ
!#ꢋꢁꢛ ꢗꢜꢜꢅꢄꢔꢔ
!#ꢋꢁꢛ ꢜꢗꢃꢗ
$ꢗꢃꢃꢄꢅꢚ
ꢚ%&'ꢄꢅ
ꢓꢞ ꢓ( ꢓꢑ ꢓꢐ ꢓꢏ ꢓꢎ ꢓꢍ ꢓꢒ ꢁꢑ ꢁꢐ ꢁꢏ ꢁꢎ ꢁꢍ ꢁꢒ
$ꢞ $( $ꢑ $ꢐ $ꢏ $ꢎ $ꢍ $ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
)
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢒ
ꢍ
ꢍ
ꢍ
ꢍ
ꢒ
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ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢉꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) 6 × 8 dot Character pattern
#ꢞꢏꢘꢏ$ꢒꢙꢘ #ꢑꢗꢙꢜꢊꢊꢔꢕꢖ ꢗꢏꢒꢏ!
#%ꢔꢕꢖ ꢏꢗꢗꢘꢙꢌꢌ
#%ꢔꢕꢖ ꢗꢏꢒꢏ
&ꢏꢒꢒꢙꢘꢓ
ꢓ'()ꢙꢘ
ꢊꢇ ꢊꢆ ꢊꢄ ꢊꢃ ꢊꢂ ꢊꢁ ꢊꢀ ꢊꢅ ꢕꢄ ꢕꢃ ꢕꢂ ꢕꢁ ꢕꢀ ꢕꢅ
&ꢇ &ꢆ &ꢄ &ꢃ &ꢂ &ꢁ &ꢀ &ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
*
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢀ
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+ꢀ +ꢅ
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-
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-
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ꢅ
ꢅ
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ꢅ
ꢅ
ꢅ
ꢀ
ꢀ
ꢀ
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ꢅ
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*
1. When BE(Blink Enable bit) = "High", blink is controlled by B1 and B0 bit.
In displaying 5-dot font width, when B1 = "1", enabled dots of P0 ~ P4 will blink, and
When B1 = "0" and B0 = "1", enabled dots in P4 will blink, when B1 = "0" and
B0 = "0", blink will not happen.
In displaying 6-dot font width, when B1 = "1", enabled dots of P0 ~ P5 will blink, and
When B1 = "0" and B0 = "1", enabled dots of P5 will blink, when B1 = "0" and
B0 = "0", blink will not happen.
2. "X" : Don't care
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢁꢊꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
SEGRAM (Segment Icon RAM)
SEGRAM has segment control data and segment pattern data. During 1-line display mode, COM0(COM17) makes
the data of SEGRAM enable to display icons. When used in 2/4-line display mode COM0(COM33) does that.
Its higher 2-bits are blinking control data, and lower 6-bits are pattern data. (refer to Table 5 and Fig-8)
Table 5. Relationship between SEGRAM address and display pattern
ꢀꢁꢂꢃꢄꢅ ꢆꢇꢇꢈꢉꢊꢊ
ꢀꢁꢂꢃꢄꢅ ꢇꢆꢋꢆ ꢇꢌꢊꢍꢎꢆꢏ ꢍꢆꢋꢋꢉꢈꢐ
ꢑꢒꢇꢓꢋ ꢔꢓꢐꢋ ꢕꢌꢇꢋꢖ
ꢄꢘ ꢄꢙ ꢄꢚ ꢄꢛ ꢜꢝ ꢜꢗ ꢜꢑ ꢜꢞ ꢜꢘ ꢜꢙ ꢜꢚ ꢜꢛ
ꢗꢒꢇꢓꢋ ꢔꢓꢐꢋ ꢕꢌꢇꢋꢖ
ꢜꢝ ꢜꢗ ꢜꢑ ꢜꢞ ꢜꢘ ꢜꢙ ꢜꢚ ꢜꢛ
ꢚ ꢛ ꢀꢚ ꢀꢙ ꢀꢘ ꢀꢞ ꢀꢑ ꢀꢗ
ꢚ ꢛ ꢀꢝ ꢀ" ꢀ# ꢀꢚꢛ ꢀꢚꢚ ꢀꢚꢙ
ꢚ ꢛ ꢀꢚꢘ ꢀꢚꢞ ꢀꢚꢑ ꢀꢚꢗ ꢀꢚꢝ ꢀꢚ"
ꢚ ꢛ ꢀꢚ# ꢀꢙꢛ ꢀꢙꢚ ꢀꢙꢙ ꢀꢙꢘ ꢀꢙꢞ
ꢚ ꢛ ꢀꢙꢑ ꢀꢙꢗ ꢀꢙꢝ ꢀꢙ" ꢀꢙ# ꢀꢘꢛ
ꢚ ꢛ ꢀꢘꢚ ꢀꢘꢙ ꢀꢘꢘ ꢀꢘꢞ ꢀꢘꢑ ꢀꢘꢗ
ꢚ ꢛ ꢀꢘꢝ ꢀꢘ" ꢀꢘ# ꢀꢞꢛ ꢀꢞꢚ ꢀꢞꢙ
ꢚ ꢛ ꢀꢞꢘ ꢀꢞꢞ ꢀꢞꢑ ꢀꢞꢗ ꢀꢞꢝ ꢀꢞ"
ꢚ ꢛ ꢀꢞ# ꢀꢑꢛ ꢀꢑꢚ ꢀꢑꢙ ꢀꢑꢘ ꢀꢑꢞ
ꢚ ꢛ ꢀꢑꢑ ꢀꢑꢗ ꢀꢑꢝ ꢀꢑ" ꢀꢑ# ꢀꢗꢛ
ꢚ ꢛ ꢀꢗꢚ ꢀꢗꢙ ꢀꢗꢘ ꢀꢗꢞ ꢀꢗꢑ ꢀꢗꢗ
ꢚ ꢛ ꢀꢗꢝ ꢀꢗ" ꢀꢗ# ꢀꢝꢛ ꢀꢝꢚ ꢀꢝꢙ
ꢚ ꢛ ꢀꢝꢘ ꢀꢝꢞ ꢀꢝꢑ ꢀꢝꢗ ꢀꢝꢝ ꢀꢝ"
ꢚ ꢛ ꢀꢝ# ꢀ"ꢛ ꢀ"ꢚ ꢀ"ꢙ ꢀ"ꢘ ꢀ"ꢞ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
ꢚ
ꢚ
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ꢚ ꢛ
ꢚ ꢛ
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ꢚ ꢛ
ꢚ ꢛ
ꢚ ꢛ
ꢚ ꢛ
ꢚ ꢛ
ꢚ ꢛ
!
!
!
!
!
!
!
!
!
!
!
!
!
!
ꢀꢚ ꢀꢙ ꢀꢘ ꢀꢞ ꢀꢑ
ꢀꢗ ꢀꢝ ꢀ" ꢀ# ꢀꢚꢛ
ꢀꢚꢚ ꢀꢚꢙ ꢀꢚꢘ ꢀꢚꢞ ꢀꢚꢑ
ꢀꢚꢗ ꢀꢚꢝ ꢀꢚ" ꢀꢚ# ꢀꢙꢛ
ꢀꢙꢚ ꢀꢙꢙ ꢀꢙꢘ ꢀꢙꢞ ꢀꢙꢑ
ꢀꢙꢗ ꢀꢙꢝ ꢀꢙ" ꢀꢙ# ꢀꢘꢛ
ꢀꢘꢚ ꢀꢘꢙ ꢀꢘꢘ ꢀꢘꢞ ꢀꢘꢑ
ꢀꢘꢗ ꢀꢘꢝ ꢀꢘ" ꢀꢘ# ꢀꢞꢛ
ꢀꢞꢚ ꢀꢞꢙ ꢀꢞꢘ ꢀꢞꢞ ꢀꢞꢑ
ꢀꢞꢗ ꢀꢞꢝ ꢀꢞ" ꢀꢞ# ꢀꢑꢛ
ꢀꢑꢚ ꢀꢑꢙ ꢀꢑꢘ ꢀꢑꢞ ꢀꢑꢑ
ꢀꢑꢗ ꢀꢑꢝ ꢀꢑ" ꢀꢑ# ꢀꢗꢛ
ꢀꢗꢚ ꢀꢗꢙ ꢀꢗꢘ ꢀꢗꢞ ꢀꢗꢑ
ꢀꢗꢗ ꢀꢗꢝ ꢀꢗ" ꢀꢗ# ꢀꢝꢛ
ꢚ
ꢚ
ꢚ
ꢚ
ꢚ
ꢚ
ꢛ
ꢚ
ꢚ ꢛ
ꢚ ꢛ
!
!
ꢀꢝꢚ ꢀꢝꢙ ꢀꢝꢘ ꢀꢝꢞ ꢀꢝꢑ
ꢀꢝꢗ ꢀꢝꢝ ꢀꢝ" ꢀꢝ# ꢀ"ꢛ
ꢚ ꢛ ꢀ"ꢑ ꢀ"ꢗ ꢀ"ꢝ ꢀ"" ꢀ"# ꢀ#ꢛ
ꢚ ꢛ ꢀ#ꢚ ꢀ#ꢙ ꢀ#ꢘ ꢀ#ꢞ ꢀ#ꢑ ꢀ#ꢗ
*
1. B1, B0 : Blinking control bit
Control Bit
Blinking Port
BE B1 B0
5-dot font width
No blink
No blink
D4
6-dot font width
No blink
No blink
D5
0
1
1
1
X
0
0
1
X
0
1
X
D4 ~ D0
D5 ~ D0
2. S1~S80 : Icon pattern ON/OFF in 5-dot font width
S1~S96 : Icon pattern ON/OFF in 6-dot font width
3. "X" : Don't care
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢋꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1) 5-dot font width (FW = 0)
ꢀ
ꢁ
ꢁ
ꢀ
ꢀ
ꢀ
ꢁ
ꢀ
ꢁ
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ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ
ꢂꢋꢈ ꢂꢋꢋ ꢂꢋꢌ ꢂꢋꢉ ꢂꢌꢊ
ꢂꢃꢃꢃꢂꢃꢃꢄꢂꢃꢃꢅꢂꢃꢃꢆꢂꢃꢃꢇ
ꢂꢃꢃꢈꢂꢃꢃꢋꢂꢃꢃꢌꢂꢃꢃꢉꢂꢃꢄꢊ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄ
S
E
G
1
S
E
G
5
S
E
G
7
S
E
G
8
S
E
G
1
S
E
G
1
S
E
G
2
S
E
G
3
S
E
G
4
S
E
G
7
S
E
G
7
S
E
G
7
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
ꢀꢀꢀ
ꢀꢀꢀ
6
0
1
1
7
8
9
1
1
1
1
2
1
1
1
1
5
2
3
4
6
0
7
8
9
2) 6-dot font width (FW = 1)
ꢀ
ꢀ
ꢁ
ꢁ
ꢀ
ꢀ
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ꢁ
ꢀ
ꢁ
ꢀ
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ꢀ
ꢀ
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ꢁ
ꢁ
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ꢁ
ꢀ
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ꢁ
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ꢁ
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ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢀ
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ꢁ
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ꢁ
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ꢁ
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ꢁ
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ꢁ
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ꢁ
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ꢁ
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ꢀ
ꢂꢃ ꢂꢄ ꢂꢅ ꢂꢆ ꢂꢇ ꢂꢈ
ꢂꢉꢃ ꢂꢉꢄ ꢂꢉꢅ ꢂꢉꢆ ꢂꢉꢇ ꢂꢉꢈ
ꢂꢃꢊꢉꢂꢃꢃꢊꢂꢃꢃꢃꢂꢃꢃꢄꢂꢃꢃꢅꢂꢃꢃꢆꢂꢃꢃꢇꢂꢃꢃꢈꢂꢃꢃꢋꢂꢃꢃꢌꢂꢃꢃꢉꢂꢃꢄꢊ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃꢄꢅ
S
E
G
1
S
E
G
5
S
E
G
6
S
E
G
9
S
E
G
9
S
E
G
9
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
2
S
E
G
3
S
E
G
4
S
E
G
9
S
E
G
9
S
E
G
9
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
S
E
G
1
ꢀꢀꢀ
ꢀꢀꢀ
1
5
6
0
1
1
2
3
4
1
1
1
1
1
2
1
1
1
9
3
4
0
1
2
5
9
0
6
7
8
Fig-8. Relationship between SEGRAM and segment display
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢁꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INSTRUCTION DESCRIPTION
OUTLINE
To overcome the speed difference between internal clock of KS0078 and MPU clock, KS0078 performs internal operation by
storing control information to IR or DR. The internal operation is determined according to the signal from MPU, composed of
read/write and data bus. (refer to Table 6/10) Instruction can be divided largely four kinds,
(1) KS0078 function set instructions ( set display methods, set data length, etc.)
(2) address set instructions to internal RAM
(3) data transfer instructions with internal RAM
(4) others .
The address of internal RAM is automatically increased or decreased by 1.
When IE = "High", KS0078 is operated according to Instruction Set 1(Table 6) and
when IE = "Low", KS0078 is operated according to Instruction Set 2(Table 10).
* Note : During internal operation, Busy Flag (DB7) is read High. Busy Flag check must precede the next instruction.
When you make a MPU program with checking the Busy Flag(DB7), it must be necessary 1/2Fosc for executing the
next instruction by falling E signal after the Busy Flag(DB7) goes to “Low”.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(1) INSTRUCTION DESCRIPTION 1 (IE = "High")
Table 6. Instruction Set 1
Execution
Time
Instruction RE
Instruction Code
Description
(fosc =
R
S
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
270 kHz)
Clear
Write "20H" to DDRAM. and set
DDRAM address to "00H" from AC.
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1.53ms
1.53ms
Display
Return
Set DDRAM address to "00H" from AC
and return cursor to its original position
if shifted. The contents of DDRAM are
not changed.
Home
0
1
X
Power
Down
Mode
Set power down mode bit.
PD = "1" :power down mode set,
PD = "0" :power down mode disable
Assign cursor moving direction.
I/D = "1" : increment,
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
PD
39µs
39µs
I/D = "0" : decrement
Entry
Mode
Set
and display shift enable bit.
S = "1" : make display shift of the
enabled lines by the DS4
-DS1 bits in the Shift Enable
instruction.
0
I/D
S
S = "0":display shift disable
Segment bi-direction function.
BID = "1" : Seg120 → Seg1,
BID = "0" : Seg1 → Seg120.
Set display/cursor/blink on/off
D = "1" : display on,
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
BID
D = "0" : display off,
Display
ON/OFF
Control
D
C
B
39µs
C = "1" : cursor on,
C = "0" : cursor off,
B = "1" : blink on,
B = "0" : blink off.
Assign font width, black/white inverting
of cursor, and 4-line display mode
control bit.
FW = "1" : 6-dot font width,
FW = "0" : 5-dot font width,
B/W = "1" : black/white inverting of
cursor enable,
Extended
function
set
1
0
0
0
0
0
0
1
FW B/W NW
39µs
B/W = "0" : black/white inverting of
cursor disable
NW = "1" : 4-line display mode,
NW = "0" : 1-line or 2-line display
mode.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(Table 6. continued)
Execution
Instruction Code
Instruction RE
Cursor
Description
Time
(fosc =
R
S
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
270 kHz)
Cursor or display shift.
S/C = "1" : display shift,
S/C = "0" : cursor shift,
R/L = "1" : shift to right,
or
0
0
0
0
0
0
0
1
1
S/C R/L
X
X
39µs
39µs
Display
Shift
R/L = "0" : shift to left.
(when DH = "1")
Determine the line for display shift .
DS1 = "1/0": 1st line display shift
enable/disable
DS2 = "1/0": 2nd line display shift
enable/disable
Shift
1
0
0
0
0
DS4 DS3 DS2 DS1
Enable
DS3 = "1/0": 3rd line display shift
enable/disable
DS4 = "1/0": 4th line display shift
enable/disable.
(when DH = "0")
Determine the line for horizontal smooth
scroll.
HS1 = "1/0" : 1st line dot scroll
enable/disable
HS2 = "1/0" : 2nd line dot scroll
enable/disable
Scroll
1
0
0
0
0
0
1
HS4 HS3 HS2 HS1
39µs
Enable
HS3 = "1/0" : 3rd line dot scroll
enable/disable
HS4 = "1/0" : 4th line dot scroll
enable/disable.
Set interface data length
(DL = "1" : 8-bit, DL = "0" : 4-bit),
numbers of display line when
NW = "0",
(N = "1" : 2-line, N = "0" : 1-line),
extension register, RE("0"),
shift/scroll enable
DH = "1" : display shift enable
DH = "0" : dot scroll enable.
reverse bit
0
0
0
0
0
0
0
0
0
1
1
DL
N
N
RE(0) DH REV
39µs
39µs
Function
Set
REV = "1" : reverse display,
REV = "0" : normal display.
Set DL, N, RE("1") and
CGRAM/SEGRAM blink enable (BE)
BE = " 1/0" : CGRAM/SEGRAM
1
DL
RE(1) BE
0
blink enable/disable
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(Table 6. continued)
Execution
Instruction Code
Instruction RE
Description
Time
(fosc =
R
S
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
270 kHz)
Set
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
39µs
39µs
39µs
39µs
CGRAM
Address
Set
1
X
X AC3 AC2 AC1 AC0 Set SEGRAM address in address counter.
SEGRAM
Address
Set
0
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter.
DDRAM
Address
Set
1
X
SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 Set the quantity of horizontal dot scroll.
Scroll
Quantity
Read
Can be known whether during internal
operation or not by reading BF. The
contents of address counter can also be
read.
Busy
X
0
1
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
0µs
flag and
Address
BF = “1” : busy state,
BF = “0” : ready state.
Write data into internal RAM
(DDRAM / CGRAM / SEGRAM).
Write
X
1
1
0
1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
43µs
43µs
Data
Read
X
Read data from internal RAM
Data
(DDRAM / CGRAM / SEGRAM).
* Note : 1. When an MPU program with Busy Flag(DB7) checking is made, 1/2 fosc (is necessary) for executing
the next instruction by the “E” signal after the Busy Flag (DB7) goes to “Low”.
2. “X” Don’t care
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢇꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1) Display Clear
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H"
into AC (address counter). Return cursor to the original status, hence, bring the cursor to the left edge on first line
of the display. Make entry mode increment (I/D = "1").
2) Return Home : (RE = 0)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂ
Return Home is cursor return home instruction.
Set DDRAM address to "00H" into the address counter. Return cursor to its original
site and return display to its original status, if shifted.
Contents of DDRAM does not change.
3) Power Down Mode Set : (RE = 1)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢁ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢃꢄ
Power down mode enable bit set instruction.
When PD = "High", it makes KS0078 suppress current consumption except the current needed for
data storage by executing next three functions.
1. make the output value of all the COM/SEG ports VDD
2. make the COM/SEG output value of extension driver VDD by setting D output to "High"
and M output to "Low"
3. disable voltage converter to remove the current through the divide resistor of power
supply.
This instruction can be used as power sleep mode.
When PD = "Low", power down mode becomes disabled.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢈꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4) Entry Mode Set
♦ (RE = 0)
ꢔꢛ
ꢔ./ ꢊ+ꢇ ꢊ+ꢆ ꢊ+ꢄ ꢊ+ꢃ ꢊ+ꢂ ꢊ+ꢁ ꢊ+ꢀ ꢊ+ꢅ
ꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢅ
Set the moving direction of cursor and display.
I/D : Increment / decrement of DDRAM address (cursor or blink)
When I/D = "High", cursor/blink moves to right and DDRAM address is increased by 1.
When I/D = "Low", cursor/blink moves to left and DDRAM address is decreased by 1.
* CGRAM/SEGRAM operates the same as DDRAM, when read from or write to CGRAM/SEGRAM.
When S = "High", after DDRAM write, the display of enabled line by DS1 - DS4 bits
in the Shift Enable instruction is shifted to the right (I/D = "0") or to the
left(I/D = "1"). But it will seem as if the cursor does not move.
When S = "Low", or DDRAM read, or CGRAM/SEGRAM read/write operation, shift of display
like this function is not performed.
♦ (RE = 1)
ꢋꢆ
ꢋ-. ꢓ*ꢞ ꢓ*( ꢓ*ꢑ ꢓ*ꢐ ꢓ*ꢏ ꢓ*ꢎ ꢓ*ꢍ ꢓ*ꢒ
ꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢁ
Set the data shift direction of segment in the application set.
BID : Data Shift Direction of Segment
When BID = "Low", segment data shift direction is set to normal order from SEG1 to SEG120.
When BID = "High", segment data shift direction is set to reverse from SEG120 to SEG1.
By using this instruction, the efficiency of application board area can be raised.
* The BID setting instruction is recommended to be set at the same time level of function set instruction.
* DB1 bit must be set to "1".
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢃꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5) Display ON/OFF Control ( RE = 0 )
ꢁꢂ
ꢁꢃꢄ ꢅꢆꢇ ꢅꢆꢈ ꢅꢆꢉ ꢅꢆꢊ ꢅꢆꢋ ꢅꢆꢌ ꢅꢆꢍ ꢅꢆꢎ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢅ
ꢀ
ꢊ
#
+
Control display/cursor/blink ON/OFF 1 bit register.
D : Display ON/OFF control bit
When D = "High", entire display is turned on.
When D = "Low", display is turned off, but display data is remained in DDRAM.
C : Cursor ON/OFF control bit
When C = "High", cursor is turned on.
When C = "Low", cursor is disappeared in current display, but I/D register remains its data.
B : Cursor Blink ON/OFF control bit
When B = "High", cursor blink is on, that performs alternate between all the high data and
display character at the cursor position. If fosc has 270 kHz frequency, blinking has 370 ms interval.
When B = "Low", blink is off.
6) Extended Function Set ( RE = 1 )
ꢀꢁ ꢀꢂꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂꢃ ꢄꢅꢃ ꢆꢃ
FW : Font Width control
When FW = "High", display character font width is assigned to 6-dot and execution time becomes
6/5 times than that of 5-dot font width.
The user font, specified in CGRAM, is displayed into 6-dot font width, bit-5 to bit-0,including the
leftmost space bit of CGRAM.(refer to Fig-9)
When FW = "Low", 5-dot font width is set.
B/W : Black/White Inversion enable bit
When B/W = "High", black/white inversion at the cursor position is set. In this case C/B bit of display
ON/OFF control instruction becomes don't care condition. If fosc has frequency of 270 kHz, inversion
has 370 ms intervals.
NW : 4 Line mode enable bit
When NW = "High", 4 line display mode is set. In this case N bit of function set instruction becomes
don't care condition.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢉꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
6-bit
6-bit
s
p
a
c
e
CGRAM
CGROM
8
8
character
character
b
b
i
t
font
ꢀꢁ
ont
i
t
(6-dot)
(5-dot)
(CGRAM)
(CGROM)
Fig-9. 6-dot font width CGROM/CGRAM
7) Cursor or Display Shift (RE = 0)
ꢀꢁ
ꢀꢂꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢂꢃꢄ ꢅꢃꢆ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢇ
ꢇ
Without writing or reading of display data, shift right/left cursor position or display.
This instruction is used to correct or search display data.(Refer to Table 7)
During 2-line mode display, cursor moves to the 2nd line after 48th digit of 1st line.
In 4-line mode, cursor moves to the next line, only after every 24th digit of the current line.
Note that display shift is performed simultaneously in all the line enabled by DS1 -
DS4 in the Shift Enable instruction.
When displayed data is shifted repeatedly, each line shifted individually.
When display shift is performed, the contents of address counter are not changed.
During low power consumption mode, display shift may not be performed normally.
Table 7. Shift patterns according to S/C and R/L bits
S/C
0
R/L
0
Operation
Shift cursor to the left, ADDRESS COUNTER is decreased by 1
Shift cursor to the right, ADDRESS COUNTER is increased by 1
Shift all the display to the left, cursor moves according to the display
Shift all the display to the right, cursor moves according to the display
0
1
1
0
1
1
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢄꢊꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
8) Shift/Scroll Enable (RE = 1)
♦ (DH = 0)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂꢃꢄ
ꢂꢃꢅ
ꢂꢃꢆ
ꢂꢃꢁ
HS : Horizontal Scroll per Line Enable
This instruction makes valid dot shift by a display line unit.
HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is performed individually in each line.
If the line in 1-line display mode or the 1st line in 2-line display mode is to be scrolled, set HS1 and HS2 to "High".
If the 2nd line scroll is needed in 2-line mode, set HS3 and HS4 to "High". (refer to Table 8)
♦ (DH = 1)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂꢃꢄ
ꢂꢃꢅ
ꢂꢃꢆ
ꢂꢃꢁ
DS : Display Shift per Line Enable
This instruction selects shifting line to be shifted according to each line mode in display shift right/left instruction.
DS1, DS2, DS3 and DS4 indicate each line to be shifted, and each shift is performed individually in each line.
If DS1 and DS2 is set to "High" (enable) in 2 line mode, only the 1st line is shifted
and the 2nd line is not shifted. When only DS1 = "High", only the half of the 1st line is shifted. If all the DS bits
(DS1 to DS4) are set to "Low" (disable), no display is shifted.
Table 8. Relationship between DS and COM signal
Enable bit
Enabled common signals
during shift
Description
HS1/DS1
HS2/DS2
HS3/DS3
HS4/DS4
COM1 ~ COM8
COM9 ~ COM16
COM17 ~ COM24
COM25 ~ COM32
The part of display line that corresponds to enabled
common signal can be shifted.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢋꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
9) Function Set
♦ (RE = 0)
ꢂꢅ
ꢂꢆꢇ
ꢀꢈꢉ
ꢀꢈꢊ
ꢀꢈꢋ
ꢀꢈꢌ
ꢀꢈꢍ
ꢀꢈꢎ
ꢀꢈꢏ
ꢀꢁ
ꢀꢈꢐ
ꢂꢃꢄ
ꢅꢆ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂꢃ
ꢄ
ꢇꢀꢈ
DL : Interface data length control bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU. Hence, DL is a signal to select
8-bit or 4-bit bus mode.
In 4-bit bus mode, it is required to transfer 4-bit data by two times.
N : Display line number control bit
It is variable only when NW bit of extended function set instruction is Low.
When N = "Low", it means 1-line display mode.
When N = "High", 2-line display mode is set.
When NW = "High", N bit is invalid, it means 4-line mode independent of N bit.
RE : Extended function registers enable bit
At this instruction, RE must be "Low".
DH : Display shift enable selection bit.
When DH = "High", enable display shift per line.
When DH = "Low", enable smooth dot scroll.
This bit can be accessed only when IE pin input is "High".
REV : Reverse enable bit
When REV = "High", all the display data are reversed. i.e. all the white dots become
black and black dots become white.
When REV = "Low", the display mode set normal display.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢁꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
♦ (RE = 1)
ꢑꢇ
ꢑꢒꢓ
ꢔꢐꢌ
ꢔꢐꢆ
ꢔꢐꢎ
ꢔꢐꢍ
ꢔꢐꢏ
ꢔꢐꢊ
ꢔꢐꢃ
ꢐꢈ
ꢔꢐꢋ
ꢋ
ꢇꢈ
ꢂ
ꢂ
ꢂ
ꢂ
ꢃ
ꢄꢅ
ꢆ
ꢉꢃꢊ
DL : Interface data length control bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU. Hence, DL is a signal to select
8-bit or 4-bit bus mode.
When 4-bit bus mode, it is required to transfer 4-bit data twice.
N : Display line number control bit
It is variable only when NW bit of extended function set instruction is Low.
When N = "Low", 1-line display mode is set.
When N = "High", 2-line display mode is set.
When NW = "High", N bit is invalid, it means 4-line mode independent of N bit.
RE : Extended function registers enable bit
When RE = "High", extended function set registers, SEGRAM address set registers, BID bit, HS/DS bits of
shift/scroll enable instruction and BE bits of function set register can be accessed.
BE : CGRAM/SEGRAM data blink enable bit
If BE is "High", It makes user font of CGRAM and segment of SEGRAM blinking. The quantity of blink is
assigned the highest 2 bit of CGRAM/SEGRAM.
10) Set CGRAM Address (RE = 0)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢁ
ꢇꢈꢉ ꢇꢈꢄ ꢇꢈꢅ ꢇꢈꢆ ꢇꢈꢁ ꢇꢈꢀ
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
11) Set SEGRAM Address (RE = 1)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢁ
ꢂ
ꢂ
ꢃꢄꢅ
ꢃꢄꢆ
ꢃꢄꢁ
ꢃꢄꢀ
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
12) Set DDRAM Address (RE = 0)
ꢇꢋ
ꢇꢌꢍ
ꢄꢎꢏ
ꢄꢎꢐ
ꢄꢎꢑ
ꢄꢎꢒ
ꢄꢎꢓ
ꢄꢎꢔ
ꢄꢎꢃ
ꢄꢎꢂ
ꢈ
ꢈ
ꢇ
ꢀꢁꢂ
ꢀꢁꢃ
ꢀꢁꢄ
ꢀꢁꢅ
ꢀꢁꢆ
ꢀꢁꢇ
ꢀꢁꢈ
Set DDRAM address to AC.
This instruction makes DDRAM data available from MPU.
In 1-line display mode (N = 0, NW = 0), DDRAM address is from "00H" to "5FH".
In 2-line display mode (N = 1, NW = 0), DDRAM address in the 1st line is from "00H" to "2FH",
and DDRAM address in the 2nd line is from "40H" to "6FH".
In 4-line display mode (NW = 1), DDRAM address is from "00H" to "13H" in the 1st line, from
"20H" to "37H" in the 2nd line, from "40H" to "57H" in the 3rd line and from "60H" to "77H"
in the 4th line.
13) Set Scroll Quantity (RE = 1)
ꢄꢅꢆ
ꢌ
ꢄꢅꢇ
ꢎ
ꢄꢅꢈ
ꢁꢏꢈ
ꢄꢅꢉ
ꢁꢏꢉ
ꢄꢅꢊ
ꢁꢏꢊ
ꢄꢅꢋ
ꢁꢏꢋ
ꢄꢅꢌ
ꢁꢏꢌ
ꢄꢅꢍ
ꢁꢏꢍ
ꢀꢁ
ꢍ
ꢀꢂꢃ
ꢍ
Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to Table 9).
In this case of KS0078 can show hidden areas of DDRAM by executing smooth scroll
from 1 to 48 dots.
Table 9. Scroll quantity according to HDS bits
SQ5
SQ4
SQ3
SQ2
SQ1
SQ0
Function
No shift
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
1
1
:
0
1
0
1
:
shift left by 1-dot
shift left by 2-dot
shift left by 3-dot
:
1
1
0
1
1
X
1
X
1
X
1
X
shift left by 47-dot
shift left by 48-dot
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
14) Read Busy Flag & Address
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢖ
ꢍ
#$
ꢁ%ꢕ
ꢁ%ꢑ
ꢁ%ꢐ
ꢁ%ꢏ
ꢁ%ꢎ
ꢁ%ꢍ
ꢁ%ꢖ
This instruction shows whether KS0078 is in internal operation or not. If the resultant
BF is High, the internal operation is in progress and you have to wait until BF to
be Low, which by then the next instruction can be performed. In this instruction you can read
the value of address counter.
15) Write data to RAM
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢁ
ꢄꢆ
ꢄꢇ
ꢄꢈ
ꢄꢉ
ꢄꢊ
ꢄꢋ
ꢄꢌ
ꢄꢍ
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.
The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address
set instruction : DDRAM address set, CGRAM address set, SEGRAM address set.
RAM set instruction can also determines the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according
to the entry mode.
16) Read data from RAM
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢌ
ꢌ
ꢄꢆ
ꢄꢇ
ꢄꢈ
ꢄꢉ
ꢄꢊ
ꢄꢋ
ꢄꢌ
ꢄꢍ
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.
The selection of RAM is set by the previous address set instruction. If address set instruction
of RAM is not performed before this instruction, the data that read first is invalid, as the
direction of AC is not determined. If you read RAM data several times without RAM address
set instruction before read operation, the correct RAM data can be obtained from
the second, but the first data would be incorrect, as there is no time margin to transfer
RAM data. In DDRAM read operation, cursor shift instruction plays the same role as
DDRAM address set instruction : it also transfer RAM data to output data register.
After read operation address counter is automatically increased/decreased by 1 according
to the entry mode. After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In case of RAM write operation, AC is increased/decreased by 1 as in read operation after this. In this
time, AC indicates the next address position, but the previous data can only be read by read instruction.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(2) INSTRUCTION DESCRIPTION 2 (IE = "LOW")
Table 10. Instruction Set 2
Execution
Time
Instruction Code
Instruction RE
Description
(fosc =
R
S
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
270 kHz)
Clear
Write "20H" to DDRAM. and set DDRAM
address to "00H" from AC.
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1.53ms
Display
Set DDRAM address to "00H" from AC
Return
Home
and return cursor to its original position if
shifted. The contents of DDRAM are not
changed.
X
1.53ms
Assign cursor moving direction.
I/D = "1" : increment,
Entry
Mode
Set
I/D = "0" : decrement.
X
0
0
0
0
0
0
0
1
I/D
S
39µs
and display shift enable bit.
S = "1" :make entire display shift of all
lines during DDRAM write,
S = "0":display shift disable
Set display/cursor/blink on/off
D = "1" : display on,
D = "0" : display off,
Display
ON/OFF
Control
0
0
0
0
0
0
0
1
D
C
B
39µs
C = "1" : cursor on,
C = "0" : cursor off,
B = "1" : blink on,
B = "0" : blink off.
Assign font width, black/white inverting of
cursor, and 4-line display mode control bit.
FW = "1" : 6-dot font width,
FW = "0" : 5-dot font width,
B/W = "1" : black/white inverting of
cursor enable,
Extended
function
set
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
FW B/W NW
39µs
39µs
B/W = "0" : black/white inverting of
cursor disable
NW = "1" : 4-line display mode,
NW = "0" : 1-line or 2-line display mode
Cursor or display shift.
Cursor
or
S/C = “1” : display shift,
S/C R/L
X
X
S/C = “0” : cursor shift,
Display
Shift
R/L = “1” : shift to right,
R/L = “0” : shift to left
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢇꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(Table 10. continued)
Execution
Instruction RE
Instruction Code
Description
Time
(fosc =
R
S
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
270 kHz)
Determine the line for horizontal smooth
scroll.
HS1 = "1/0" : 1st line dot scroll
enable/disable
HS2 = "1/0" : 2nd line dot scroll
enable/disable
Scroll
Enable
1
0
0
0
0
0
1
HS4 HS3 HS2 HS1
39µs
HS3 = "1/0" : 3rd line dot scroll
enable/disable
HS4 = "1/0" : 4th line dot scroll
enable/disable
Set interface data length
DL = "1" : 8-bit,
DL = "0" : 4-bit
numbers of display line when NW = "0",
N = "1" : 2-line,
N = "0" : 1-line
0
1
0
0
0
0
0
0
0
0
1
1
DL
N
N
RE(0)
X
X
39µs
39µs
Function
Set
extension register, RE("0"),
Set DL, N, RE("1") and
CGRAM/SEGRAM blink enable (BE)
BE = " 1/0" : CGRAM/SEGRAM
DL
RE(1) BE
0
blink enable/disable
Set
CGRAM
Address
Set
0
1
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
39µs
39µs
39µs
39µs
Set SEGRAM address in address
counter.
X
X AC3 AC2 AC1 AC0
SEGRAM
Address
Set
AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address in address counter.
DDRAM
Address
Set
X
QC5 QC4 QC3 QC2 QC1 QC0
Set the quantity of horizontal dot scroll.
Scroll
Quantity
Read
Can be known whether during internal
operation or not by reading BF. The
contents of address counter can also be
read.
Busy
X
0
1
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
0µs
flag and
Address
BF = “1” : busy state,
BF = “0” : ready state.
Write data into internal RAM
(DDRAM / CGRAM / SEGRAM).
Write
Data
Read
Data
X
X
1
1
0
1
D7 D6 D5
D7 D6 D5
D4 D3 D2 D1
D4 D3 D2 D1
D0
D0
43µs
43µs
Read data from internal RAM
(DDRAM / CGRAM / SEGRAM).
* Note : 1. When an MPU program with Busy Flag(DB7) checking is made, 1/2 fosc (is necessary) for executing
the next instruction by the “E” signal after the Busy Flag (DB7) goes to “Low”.
2. “X” Don’t care
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢈꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
1) Display Clear
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set
DDRAM address to "00H" into AC (address counter). Return cursor to the original status,
hence, bring the cursor to the left edge on first line of the display.
And entry mode is set to increment mode (I/D = "1").
2) Return Home
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢎ
Return Home is cursor return home instruction.
Set DDRAM address to "00H" into the address counter. Return cursor to its original
site and return display to its original status, if shifted.
Contents of DDRAM does not change.
3) Entry Mode Set
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢐꢂꢄ
ꢁ
Set the moving direction of cursor and display.
I/D : Increment / decrement of DDRAM address (cursor or blink)
When I/D = "High", cursor/blink moves to right and DDRAM address is increased by 1.
When I/D = "Low", cursor/blink moves to left and DDRAM address is decreased by 1.
* CGRAM/SEGRAM operates identically to the DDRAM, when reading from or writing to CGRAM/SEGRAM.
When S = "High", after DDRAM write, the entire display of all lines is shifted to
the right (I/D = "0") or to the left(I/D = "1").
does not moving.
But it will seem as if the cursor
When S = "Low", or DDRAM read, or CGRAM/SEGRAM read/write operation, shift of entire
display is not performed.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢃꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4) Display ON/OFF Control ( RE = 0 )
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢇ
ꢄ
ꢈ
Control display/cursor/blink ON/OFF 1 bit register.
D : Display ON/OFF control bit
When D = "High", entire display is turned on.
When D = "Low", display is turned off, but display data is remained in DDRAM.
C : Cursor ON/OFF control bit
When C = "High", cursor is turned on.
When C = "Low", cursor is disappeared in current display, but I/D register remains its data.
B : Cursor Blink ON/OFF control bit
When B = "High", cursor blink is on, that performs alternate between all the high data and
display character at the cursor position. If fosc has 270 kHz frequency, blinking has 370 ms interval.
When B = "Low", blink is off.
5) Extended Function Set ( RE = 1 )
ꢑꢇ
ꢑꢒꢓ
ꢔꢐꢌ
ꢔꢐꢆ
ꢔꢐꢎ
ꢔꢐꢍ
ꢔꢐꢏ
ꢔꢐꢊ
ꢔꢐꢃ
ꢔꢐꢋ
ꢎ
ꢎ
ꢎ
ꢎ
ꢎ
ꢎ
ꢍ
ꢏꢄ
ꢆꢃꢄ
ꢐꢄ
FW : Font Width control
When FW = "High", display character font width is assigned to 6-dot and execution time
becomes 6/5 times than that of 5-dot font width.
The user font, specified in CGRAM, is displayed into 6-dot font width, bit-5 to bit-0,including
the leftmost space bit of CGRAM.(Refer to Fig-10)
When FW = "Low", 5-dot font width is set.
B/W : Black/White Inversion enable bit
When B/W = "High", black/white inversion at the cursor position is set. In this case C/B bit
of display ON/OFF control instruction becomes don't care condition. If fosc has frequency of
270 kHz, inversion has 370 ms intervals.
NW : 4 Line mode enable bit
When NW = "High", 4 line display mode is set. In this case N bit of function set instruction
becomes don't care condition.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢉꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
6-bit
6-bit
s
p
a
c
e
CGRAM
CGROM
character
font
8
8
character
b
b
i
t
font
i
t
(6-dot)
(5-dot)
(CGRAM)
(CGROM)
Fig-10. 6-dot font width CGROM/CGRAM
6) Cursor or Display Shift (RE = 0)
ꢅꢉ
ꢅꢊꢋ
ꢂꢌꢍ
ꢂꢌꢎ
ꢂꢌꢏ
ꢂꢌꢐ
ꢂꢌꢑ
ꢂꢌꢒ
ꢂꢌꢁ
ꢂꢌꢀ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢁꢂꢎ
ꢀꢂꢏ
ꢐ
ꢐ
Shift right/left cursor position or display, without writing or reading of display data.
This instruction is used to correct or search display data.(Refer to Table 7)
During 2-line mode display, cursor moves to the 2nd line after 48th digit of 1st line.
In 4-line mode, cursor moves to the next line, only after every 24th digit of the current line.
Note that display shift is performed simultaneously in all the line.
When displayed data is shifted repeatedly, each line shifted individually.
When display shift is performed, the contents of address counter are not changed.
Table 11. Shift patterns according to S/C and R/L bits
S/C
0
R/L
0
Operation
Shift cursor to the left, ADDRESS COUNTER is decreased by 1
Shift cursor to the right, ADDRESS COUNTER is increased by 1
Shift all the display to the left, cursor moves according to the display
Shift all the display to the right, cursor moves according to the display
0
1
1
0
1
1
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢅꢊꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
7) Scroll Enable (RE = 1)
ꢑꢇ
ꢋ
ꢑꢒꢓ
ꢋ
ꢔꢐꢌ
ꢋ
ꢔꢐꢆ
ꢋ
ꢔꢐꢎ
ꢋ
ꢔꢐꢍ
ꢃ
ꢔꢐꢏ
ꢕꢇꢍ
ꢔꢐꢊ
ꢕꢇꢏ
ꢔꢐꢃ
ꢕꢇꢊ
ꢔꢐꢋ
ꢕꢇꢃ
HS : Horizontal Scroll per Line Enable
This instruction makes valid dot shift by a display line unit.
HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is
performed individually in each line.
If the line in 1-line display mode or the 1st line in 2-line display
mode is to be scrolled, set HS1 and HS2 to "High". If the 2nd line scroll is needed in 2-line mode,
set HS3 and HS4 to "High". (refer to Table 8)
8) Function Set
c (RE = 0)
ꢇꢋ
ꢇꢌꢍ
ꢄꢎꢏ
ꢄꢎꢐ
ꢄꢎꢑ
ꢄꢎꢒ
ꢄꢎꢓ
ꢄꢎꢔ
ꢄꢎꢃ
ꢕ
ꢄꢎꢂ
ꢕ
ꢏꢐ
ꢈ
ꢈ
ꢈ
ꢈ
ꢇ
ꢍꢌ
ꢎ
ꢑꢈꢒ
DL : Interface data length control bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU.
So to speak, DL is a signal to select
8-bit or 4-bit bus mode.
In 4-bit bus mode, it is required to transfer 4-bit data by two times.
N : Display line number control bit
It is variable only when NW bit of extended function set instruction is Low.
When N = "Low", 1-line display mode is set.
When N = "High", 2-line display mode is set.
When NW = "High", N bit is invalid, t means 4-line mode independent of N bit.
RE : Extended function registers enable bit
At this instruction, RE must be "Low".
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢋꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
d (RE = 1)
ꢑꢇ
ꢑꢒꢓ
ꢔꢐꢌ
ꢔꢐꢆ
ꢔꢐꢎ
ꢔꢐꢍ
ꢔꢐꢏ
ꢔꢐꢊ
ꢔꢐꢃ
ꢐꢈ
ꢔꢐꢋ
ꢋ
ꢁꢒ
ꢎ
ꢎ
ꢎ
ꢎ
ꢍ
ꢅꢑ
ꢐ
ꢓꢍꢔ
DL : Interface data length control bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU.
Hence, DL is a signal to select 8-bit or 4-bit bus mode.
In 4-bit bus mode, it is required to transfer 4-bit data twice.
N : Display line number control bit
It is variable only when NW bit of extended function set instruction is Low.
When N = "Low", 1-line display mode is set.
When N = "High", 2-line display mode is set.
When NW = "High", N bit is invalid, 4-line mode independent of N bit.
RE : Extended function registers enable bit
When RE = "High", extended function set registers, SEGRAM address set registers, HS bits
of scroll enable instruction and BE bits of function set register can be accessed.
BE : CGRAM/SEGRAM data blink enable bit
If BE is "High", It makes user font of CGRAM and segment of SEGRAM blinking. The quantity
of blink is assigned the highest 2 bit of CGRAM/SEGRAM.
9) Set CGRAM Address (RE = 0)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢁ
ꢇꢈꢉ
ꢇꢈꢄ
ꢇꢈꢅ
ꢇꢈꢆ
ꢇꢈꢁ
ꢇꢈꢀ
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
10) Set SEGRAM Address (RE = 1)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢀ
ꢀ
ꢁ
ꢊ
ꢊ
ꢇꢈꢅ
ꢇꢈꢆ
ꢇꢈꢁ
ꢇꢈꢀ
Set SEGRAM address to AC.
This instruction makes SEGRAM data available from MPU.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢁꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
11) Set DDRAM Address (RE = 0)
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢍ
ꢍ
ꢌ
ꢎꢏꢇ
ꢎꢏꢈ
ꢎꢏꢉ
ꢎꢏꢊ
ꢎꢏꢋ
ꢎꢏꢌ
ꢎꢏꢍ
Set DDRAM address to AC.
This instruction makes DDRAM data available from MPU.
In 1-line display mode (N = 0, NW = 0), DDRAM address is from "00H" to "5FH".
In 2-line display mode (N = 1, NW = 0), DDRAM address in the 1st line is from "00H" to "2FH",
and DDRAM address in the 2nd line is from "40H" to "6FH".
In 4-line display mode (NW = 1), DDRAM address is from "00H" to "17H" in the 1st line, from
"20H" to "37H" in the 2nd line, from "40H" to "57H" in the 3rd line and from "60H" to "77H"
in the 4th line.
12) Set Scroll Quantity (RE = 1)
ꢑꢇ
ꢑꢒꢓ
ꢔꢐꢌ
ꢔꢐꢆ
ꢔꢐꢎ
ꢔꢐꢍ
ꢔꢐꢏ
ꢔꢐꢊ
ꢔꢐꢃ
ꢔꢐꢋ
ꢍ
ꢍ
ꢌ
ꢎ
ꢁꢏꢈ
ꢁꢏꢉ
ꢁꢏꢊ
ꢁꢏꢋ
ꢁꢏꢌ
ꢁꢏꢍ
Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to
Table 12). In this case of KS0078 execute dot smooth scroll from 1 to 48 dots.
Table 12. Scroll quantity according to HDS bits
SQ5
SQ4
SQ3
SQ2
SQ1
SQ0
Function
No shift
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
1
1
:
0
1
0
1
:
shift left by 1-dot
shift left by 2-dot
shift left by 3-dot
:
1
1
0
1
1
X
1
X
1
X
1
X
shift left by 47-dot
shift left by 48-dot
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
13) Read Busy Flag & Address
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢍ
ꢌ
ꢅꢑ
ꢒꢓꢇ
ꢒꢓꢈ
ꢒꢓꢉ
ꢒꢓꢊ
ꢒꢓꢋ
ꢒꢓꢌ
ꢒꢓꢍ
This instruction shows whether KS0078 is in internal operation or not. If the resultant BF is High, it means the internal
operation is in progress and should wait until BF to become “Low”.
which by then the next instruction can be performed. In this instruction value of address counter can also be read.
14) Write data to RAM
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢀ
ꢁ
ꢄꢆ
ꢄꢇ
ꢄꢈ
ꢄꢉ
ꢄꢊ
ꢄꢋ
ꢄꢌ
ꢄꢍ
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.
The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set instruction : DDRAM
address set, CGRAM address set, SEGRAM address set. RAM set instruction can also determines the AC direction to
RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
15) Read data from RAM
ꢀꢁ
ꢀꢂꢃ
ꢄꢅꢆ
ꢄꢅꢇ
ꢄꢅꢈ
ꢄꢅꢉ
ꢄꢅꢊ
ꢄꢅꢋ
ꢄꢅꢌ
ꢄꢅꢍ
ꢌ
ꢌ
ꢄꢆ
ꢄꢇ
ꢄꢈ
ꢄꢉ
ꢄꢊ
ꢄꢋ
ꢄꢌ
ꢄꢍ
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.
The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not performed before
this instruction, the data that read first is invalid, as the direction of AC is not determined. If the RAM data is read several
times without RAM address set instruction before read operation, the correct RAM data from
the second, but the first data would be incorrect, as there is no time margin to transfer RAM data. In case of DDRAM read
operation, cursor shift instruction plays the same role as DDRAM address set instruction : it also transfer RAM data to output
data register. After read operation address counter is automatically increased/decreased by 1 according to the entry mode.
After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In case of RAM write operation, AC is increased/decreased by 1 like read operation after this. In this time, AC indicates the next
address position, but the previous data can only be read by read instruction.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTERFACE WITH MPU
KS0078 can transfer data in bus mode (4-bit or 8-bit) or serial mode with MPU. Hence, both types of 4 or 8-bit MPU can be used.
In case of 4-bit bus mode, data transfer is performed by twice to transfer 1 byte data.
(1) When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus.
At first higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then lower 4-bit (in case of 8-bit
bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed by twice. Busy Flag outputs "High" after
the second transfer is ended.
(2) When interfacing data length are 8-bit, transfer is performed at a time through 8 ports, from DB0 to DB7.
(3) If IM is set to "Low", serial transfer mode is set.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Interface with MPU in Bus Mode
1) Interface with 8-bits MPU
If 8-bits MPU is used, KS0078 can connect directly with that.
In this case, port E, RS, R/W and DB0 to DB7 need to interface each other.
Example of timing sequence is shown below.
ꢀꢁ
ꢀꢂꢃ
ꢎ
ꢎꢏꢐꢑꢒꢏꢓꢔ
ꢕꢖꢗꢏꢓꢔ
ꢔꢕꢖꢗꢘꢕꢙꢚ ꢛꢜꢗꢘꢙꢖꢝꢛꢕ
$ ꢅꢘꢕꢙ
ꢄꢒꢓꢒ
ꢄꢒꢓꢒ
ꢄꢅꢆ
ꢅꢏꢐꢑ
ꢅꢏꢐꢑ
ꢎ ꢁ!ꢀ"ꢛ!ꢎ#
ꢎ ꢁ!ꢀ"ꢛ!ꢎ#
ꢅꢘꢕꢙ ꢚꢔꢓꢗ ꢛꢜꢑꢝꢞ
ꢅꢘꢕꢙ ꢚꢔꢓꢗ ꢛꢜꢑꢝꢞ
ꢅꢘꢕꢙ ꢚꢔꢓꢗ ꢛꢜꢑꢝꢞ
Fig 11. Example of 8-bit Bus Mode Timing Sequence
2) Interface with 4-bits MPU
If 4-bits MPU is used, KS0078 can connect directly with this.
In this case, port E, RS, R/W and DB4 to DB7 need to interface each other. The transfer is performed by twice.
Example of timing sequence is shown below.
RS
R/W
E
Internal
Internal operation
signal
No
DB7
D7
D3
Busy
AC3
Busy
AC3
D7
D3
INSTRUCTION
Busy Flag Check
Busy Flag Check
INSTRUCTION
Fig 12. Example of 4-bit Bus Mode Timing Sequence
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢇꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Interface with MPU in Serial Mode
When IM port input is "Low", serial interface mode is started. At this time, all three ports, SCLK (synchronizing transfer clock),
SID (serial input data), and SOD (serial output data), are used. If KS0078 is to be used with other chips, chip select port
(CS) can be used.
By setting CS to "Low", KS0078 can receive SCLK input. If CS is set to "High", KS0078 reset the internal transfer counter.
Before transfer real data, start byte has to be transferred. It is composed of succeeding 5 "High" bits, read write control bit
(R/W), register selection bit (RS), and end bit that indicates the end of start byte. Whenever succeeding 5 "High" bits are
detected by KS0078, it makes serial transfer counter reset and ready to receive next information.
The next input data are register selection bit that determine which register will be used, and read write control bit that
determine the direction of data. Then end bit is transferred, which must have "Low" value to show the end of start byte.
(Refer to Fig 13. Fig 14)
(1) Write Operation (R/W = 0)
After start byte is transferred from MPU to KS0078, 8-bit data is transferred which is divided into 2 bytes, each byte has 4 bit's
real data and 4 bit's partition token data. For example, if real data is "10110001" (D0 - D7), then serially transferred data
becomes "1011 0000 0001 0000" where 2nd and 4th 4 bits must be "0000" for safe transfer.
To transfer several bytes continuously without changing RS bit and R/W bit, start byte transfer is needed only at first starting
time. i.e., after first start byte is transferred, real data succeeding can be transferred.
(2) Read Operation (R/W = 1)
After start byte is transferred to KS0078, MPU can receive 8-bit data through the SOD port at a time from the LSB. Wait time
is needed to insert between start byte and data reading, as internal reading from RAM requires some delay.
Continuous data reading is possible such as serial write operation. It also needs only one start bytes, only if you insert some
delay between reading operations of each byte. During the reading operation, KS0078 observes succeeding 5 "High" from
MPU. If it is detected, KS0078 restarts serial operation at once and ready to receive RS bit. So in continuous reading
operation, SID port must be "Low".
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢈꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢀꢍꢊ ꢆꢄꢅꢈꢗꢖ .ꢅꢈꢃꢄ /ꢕꢄꢅꢗꢃꢈꢙꢚ
! ꢆ
ꢀ0ꢚꢕ%ꢃꢊ
ꢌ
ꢋ
ꢊ
ꢉ
ꢈ
ꢇ
ꢆ
ꢎ
ꢏ ꢌꢍ ꢌꢌ ꢌꢋ ꢌꢊ ꢌꢉ ꢌꢈ ꢌꢇ ꢌꢆ ꢌꢎ ꢌꢏ ꢋꢍ ꢋꢌ ꢋꢋ ꢋꢉ ꢋꢉ
ꢆ ! ꢉ ꢝ
ꢀ0ꢚꢕ%ꢃꢊ
ꢆ 0 ꢓ
ꢀ0ꢚꢕ%ꢃꢊ
ꢍ
ꢄꢍ ꢄꢌ ꢄꢋ ꢄꢊ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ
ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐꢐꢀꢂꢃꢐꢐꢀꢁꢐ
ꢄꢉ ꢄꢈ ꢄꢇ ꢄꢆ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕ
$ꢝ%ꢘꢓ ꢄꢒꢑꢒ
ꢁꢑꢒꢓꢑꢔꢕꢖ ꢅꢗꢑꢘ
ꢁꢗꢕꢜ"ꢓꢝꢕꢔ#ꢔꢕꢖ
ꢅꢔꢑ ꢚꢑꢓꢔꢕꢖ
'((ꢘꢓ ꢄꢒꢑꢒ
ꢋ&ꢕꢞ ꢅꢗꢑꢘ
ꢌ&ꢚꢑ ꢅꢗꢑꢘ
ꢀꢎꢊ ꢆꢄꢅꢈꢗꢖ ꢋꢄꢗꢜ /ꢕꢄꢅꢗꢃꢈꢙꢚ
! ꢆ
ꢀ0ꢚꢕ%ꢃꢊ
ꢌ
ꢋ
ꢊ
ꢉ
ꢈ
ꢇ
ꢆ
ꢎ
ꢏ ꢌꢍ ꢌꢌ ꢌꢋ ꢌꢊ ꢌꢉ ꢌꢈ ꢌꢇ
ꢆ ! ꢉ ꢝ
ꢀ0ꢚꢕ%ꢃꢊ
ꢆ 0 ꢓ
ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐ ꢐꢌꢐꢐꢀꢂꢃꢐꢐꢀꢁꢐꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ ꢐꢍꢐ
ꢀ0ꢚꢕ%ꢃꢊ
ꢆ / ꢓ
ꢄꢍ ꢄꢌ ꢄꢋ ꢄꢊ ꢄꢉ ꢄꢈ ꢄꢇ ꢄꢆ
ꢀ/%ꢃꢕ%ꢃꢊ
ꢅꢛꢚꢗ )!ꢒꢖꢂ
ꢀꢘꢒꢞ ꢄꢒꢑꢒ
ꢁꢑꢒꢓꢑꢔꢕꢖ ꢅꢗꢑꢘ
ꢁꢗꢕꢜ"ꢓꢝꢕꢔ#ꢔꢕꢖ
ꢅꢔꢑ ꢚꢑꢓꢔꢕꢖ
$ꢝ%ꢘꢓ
ꢄꢒꢑꢒ
'((ꢘꢓ
ꢄꢒꢑꢒ
Fig 13. Timing Diagram of Serial Data Transfer
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢃꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢀꢁꢂ ꢃꢄꢅꢆꢇꢅꢈꢄꢈꢉ ꢊꢋꢇꢆꢌ ꢍꢎꢌꢋꢏꢆꢇꢄꢅ
ꢐ ꢃ ꢑ ꢒ
ꢐ ꢓ ꢔ
ꢃꢒꢔꢑ
ꢃꢒꢔꢑ
ꢁꢑꢒꢓꢑ
*ꢗꢑꢘ
ꢌꢚꢑ *ꢗꢑꢘ ꢋꢕꢞ *ꢗꢑꢘ
+ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢌ,
ꢌꢚꢑ *ꢗꢑꢘ ꢋꢕꢞ *ꢗꢑꢘ
+ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢋ,
ꢌꢚꢑ *ꢗꢑꢘ ꢋꢕꢞ *ꢗꢑꢘ
+ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢊ,
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢌ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢋ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢊ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
ꢀꢕꢂ ꢃꢄꢅꢆꢇꢅꢈꢄꢈꢉ ꢖꢌꢏꢗ ꢍꢎꢌꢋꢏꢆꢇꢄꢅ
ꢃꢒꢔꢑ
ꢃꢒꢔꢑ
ꢃꢒꢔꢑ
ꢐ ꢃ ꢑ ꢒ
ꢐ ꢓ ꢔ
ꢁꢑꢒꢓꢑ
*ꢗꢑꢘ
ꢄꢒꢑꢒ
ꢓꢘꢒꢞꢊ
ꢄꢒꢑꢒ
ꢓꢘꢒꢞꢌ
ꢄꢒꢑꢒ
ꢓꢘꢒꢞꢋ
ꢐ ꢍ ꢔ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢊ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢌ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
ꢙꢕꢚꢑꢓꢛꢜꢑꢔꢝꢕꢋ
ꢘ-ꢘꢜꢛꢑꢔꢝꢕ ꢑꢔ.ꢘ
Fig 14. Timing Diagram of Continuous Data Transfer
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢉꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION INFORMATION ACCORDING TO LCD PANEL
1) LCD Panel : 48 character x 1 line format (5-dot font,1/17 duty)
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢁꢂꢆ
ꢀꢁꢂꢇ
ꢀꢁꢂꢈ
ꢀꢁꢂꢉ
ꢀꢁꢂꢊ
ꢓꢔꢔꢔꢔ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢓꢔꢔꢔꢓ
ꢓꢓꢓꢓꢔ
ꢓꢓꢓꢓꢔ
ꢔꢔꢔꢔꢓ
ꢔꢔꢔꢔꢔ
ꢓꢔꢔꢔꢓ
ꢔꢓꢓꢓꢔ
ꢔꢓꢓꢓꢔ
ꢔꢔꢔꢔꢔ
ꢔꢓꢓꢓꢔ
ꢔꢓꢓꢓꢔ
ꢔꢓꢓꢓꢔ
ꢓꢓꢓꢓꢓ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢓ
ꢔꢔꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢔ
ꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓ
ꢔꢔꢔ
ꢓꢓꢓ
ꢓꢓꢓ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢓ
ꢓꢓꢓ
ꢀꢁꢂꢃꢉ
ꢋꢀꢁꢂꢌꢍ
ꢕꢖꢗꢘꢙ
ꢚꢚꢚꢚꢚ
ꢎꢏꢐꢃ
ꢎꢏꢐꢄ
ꢎꢏꢐꢅ
ꢎꢏꢐꢆ
ꢎꢏꢐꢇ
ꢎꢏꢐꢈ
ꢎꢏꢐꢉ
ꢎꢏꢐꢊ
ꢎꢏꢐꢑ
ꢎꢏꢐꢃꢌ
ꢒ
ꢀ
ꢀ
ꢀ
ꢇꢈꢀꢀꢉꢊ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢎꢏꢐꢃꢃꢊ
ꢎꢏꢐꢃꢃꢑ
ꢎꢏꢐꢃꢄꢌ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢈ
ꢀꢁꢂꢃꢇ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢃꢅ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢃ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢑ
ꢀ
2) LCD Panel : 48 character x 2 line format (5-dot font, 1/33 duty)
ꢓꢔꢔꢔꢔ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢓꢔꢔꢔꢓ
ꢓꢓꢓꢓꢔ
ꢓꢓꢓꢓꢔ
ꢔꢔꢔꢔꢓ
ꢔꢔꢔꢔꢔ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢓ
ꢔꢔꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢔ
ꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢔꢔꢔ
ꢀꢁꢂꢃ
ꢀꢁꢂꢄ
ꢀꢁꢂꢅ
ꢀꢁꢂꢆ
ꢀꢁꢂꢇ
ꢀꢁꢂꢈ
ꢀꢁꢂꢉ
ꢀꢁꢂꢊ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓ
ꢓꢓꢓ
ꢓꢓꢓ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢓ
ꢓꢓꢓ
ꢓꢔꢔꢔꢓ
ꢔꢓꢓꢓꢔ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢔ
ꢓꢔꢔꢔꢓ
ꢓꢓꢓꢓꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓ
ꢔꢓꢓ
ꢓꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢀꢁꢂꢃꢉ
ꢀꢁꢂꢃꢊ
ꢀꢁꢂꢃꢑ
ꢀꢁꢂꢄꢌ
ꢀꢁꢂꢄꢃ
ꢀꢁꢂꢄꢄ
ꢀꢁꢂꢄꢅ
ꢀꢁꢂꢄꢆ
ꢕꢖꢗꢘꢙ
ꢀꢁꢂꢅꢅ
ꢋꢀꢁꢂꢌꢍ
ꢎꢏꢐꢃ
ꢎꢏꢐꢄ
ꢎꢏꢐꢅ
ꢎꢏꢐꢆ
ꢎꢏꢐꢇ
KS0078
ꢀ
ꢀ
ꢀ
ꢒ
ꢀ
ꢎꢏꢐꢃꢃꢊ
ꢎꢏꢐꢃꢃꢑ
ꢎꢏꢐꢃꢄꢌ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢅꢄ
ꢀꢁꢂꢅꢃ
ꢀꢁꢂꢅꢌ
ꢀꢁꢂꢄꢑ
ꢀꢁꢂꢄꢊ
ꢀꢁꢂꢄꢉ
ꢀꢁꢂꢄꢈ
ꢀꢁꢂꢄꢇ
ꢀ
ꢀꢁꢂꢃꢈ
ꢀꢁꢂꢃꢇ
ꢀꢁꢂꢃꢆ
ꢀꢁꢂꢃꢅ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢃ
ꢀꢁꢂꢃꢌ
ꢀꢁꢂꢑ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢆꢊꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) LCD Panel : 24 character x 4 line format (5-dot font, 1/33 bias)
ꢓꢔꢔꢔꢔ
ꢀꢁꢂꢃ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢓ
ꢔꢔꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢔ
ꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢅ
ꢓꢔꢔꢔꢓ
ꢀꢁꢂꢆ
ꢓꢓꢓꢓꢔ
ꢀꢁꢂꢇ
ꢓꢓꢓꢓꢔ
ꢀꢁꢂꢈ
ꢔꢔꢔꢔꢓ
ꢀꢁꢂꢉ
ꢔꢔꢔꢔꢔ
ꢀꢁꢂꢊ
ꢔꢔꢔꢔꢔ
ꢀꢁꢂꢑ
ꢔꢔꢔ
ꢓꢓꢓ
ꢓꢓꢓ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢓ
ꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢌ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢃ
ꢔꢔꢔꢔꢓ
ꢀꢁꢂꢃꢄ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢅ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢆ
ꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓ
ꢀꢁꢂꢃꢇ
ꢀꢁꢂꢃꢈ
ꢓꢔꢔꢔꢓ
ꢀꢁꢂꢃꢉ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢔꢓꢓꢓꢔ
ꢀꢁꢂꢃꢊ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢑ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢌ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢃ
ꢔꢓꢓꢓꢔ
ꢓꢔꢔꢔꢓ
ꢓꢓꢓꢓꢓ
ꢀꢁꢂꢄꢄ
KS0078 ꢀꢁꢂꢄꢅ
ꢀꢁꢂꢄꢆ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢇ
ꢔꢓꢓ
ꢓꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢈ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢉ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢊ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢑ
ꢔꢓꢓꢓꢓ
ꢀꢁꢂꢅꢌ
ꢔꢔꢔꢔꢔ
ꢀꢁꢂꢅꢃ
ꢓꢓꢓꢓꢓ
ꢀꢁꢂꢅꢄ
ꢕꢖꢗꢘꢙ
ꢀꢁꢂꢅꢅ
ꢋꢀꢁꢂꢌꢍ
ꢎꢏꢐꢃ
ꢎꢏꢐꢄ
ꢎꢏꢐꢅ
ꢎꢏꢐꢆ
ꢎꢏꢐꢇ
ꢒ
ꢎꢏꢐꢃꢃꢊ
ꢎꢏꢐꢃꢃꢑ
ꢎꢏꢐꢃꢄꢌ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢋꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4) LCD Panel : 20 character x 4 line format (6-dot font, 1/33 bias)
ꢓꢓꢔꢔꢔꢔ
ꢀꢁꢂꢃ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢓ
ꢔꢔꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢔ
ꢓꢓꢓ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢅ
ꢓꢓꢔꢔꢔꢓ
ꢀꢁꢂꢆ
ꢓꢓꢓꢓꢓꢔ
ꢀꢁꢂꢇ
ꢓꢓꢓꢓꢓꢔ
ꢀꢁꢂꢈ
ꢓꢔꢔꢔꢔꢓ
ꢀꢁꢂꢉ
ꢓꢔꢔꢔꢔꢔ
ꢀꢁꢂꢊ
ꢓꢔꢔꢔꢔꢔ
ꢀꢁꢂꢋ
ꢔꢔꢔ
ꢓꢓꢓ
ꢓꢓꢓ
ꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢔꢔꢓ
ꢓꢓꢓ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢌ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢃ
ꢓꢔꢔꢔꢔꢓ
ꢀꢁꢂꢃꢄ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢅ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢆ
ꢓꢔꢔꢔꢔꢔ
ꢓꢓꢓꢓꢓꢓ
ꢀꢁꢂꢃꢇ
ꢀꢁꢂꢃꢈ
ꢓꢓꢔꢔꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢀꢁꢂꢃꢉ
ꢓꢔꢓꢓꢓꢔ
ꢀꢁꢂꢃꢊ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢃꢋ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢌ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢃ
ꢓꢔꢓꢓꢓꢔ
ꢀꢁꢂꢄꢄ
ꢓꢓꢔꢔꢔꢓ
ꢓꢓꢓꢓꢓꢓ
ꢀꢁꢂꢄꢅ
KS0078 ꢀꢁꢂꢄꢆ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢇ
ꢔꢓꢓ
ꢓꢔꢓ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢓꢔ
ꢓꢔꢓ
ꢔꢓꢓ
ꢓꢓꢓ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢈ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢉ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢊ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢄꢋ
ꢓꢔꢓꢓꢓꢓ
ꢀꢁꢂꢅꢌ
ꢓꢔꢔꢔꢔꢔ
ꢀꢁꢂꢅꢃ
ꢓꢓꢓꢓꢓꢓ
ꢀꢁꢂꢅꢄ
ꢕꢖꢗꢘꢙꢚ
ꢀꢁꢂꢅꢅ
ꢍꢀꢁꢂꢌꢎ
ꢏꢐꢑꢃ
ꢏꢐꢑꢄ
ꢏꢐꢑꢅ
ꢏꢐꢑꢆ
ꢏꢐꢑꢇ
ꢏꢐꢑꢈ
ꢒ
ꢏꢐꢑꢃꢃꢊ
ꢏꢐꢑꢃꢃꢋ
ꢏꢐꢑꢃꢄꢌ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢁꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INITIALIZING
1) Initializing by Internal Reset Circuit
When the power is turned on, KS0078 is initialized automatically by power on reset circuit.
During the initialization, the following instructions are executed, and BF(Busy Flag) is kept "High"(busy state) to the end
of initialization.
c Display Clear instruction
Write "20H" to all DDRAM
d Set Functions instruction
DL = 1 : 8-bit bus mode
N
= 1 : 2-line display mode
RE = 0 : Extension register disable
BE = 0 : CGRAM/SEGRAM blink OFF
DH = 0 : Horizontal scroll enable
REV = 0 : Normal display (Not reversed display)
e Control Display ON/OFF instruction
D = 0 : Display OFF
C = 0 : Cursor OFF
B = 0 : Blink OFF
f Set Entry Mode instruction
I/D = 1 : Increment by 1
S
= 0 : No entire display shift
BID = 0 : Normal direction segment port
g Set Extension Function instruction
FW = 0 : 5-dot font width character display
B/W = 0 : Normal cursor (8th line)
NW = 0 : Not 4-line display mode, 2-line mode is set because of N("1")
h Enable Shift instruction
HS = 0000 : Scroll per line disable
DS = 0000 : Shift per line disable
i Set scroll Quantity instruction
SQ = 000000 : Not scroll
2) Initializing by Hardware RESET input
When RESET pin = "Low", KS0078 can be initialized like the case of power on reset.
During the power on reset operation, this pin is ignored.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INITIALIZING BY INSTRUCTION
1) 8-bit interface mode
Power on
Condition: 270 kHz
Wait for more than 20 ms
after VDD rises to 4.5V
(DL=“1”)
Function set
0
1
0
1
4-bit interface
8-bit interface
1-line mode
2-line mode
DL
N
DB4
DB1 DB0
DB3 DB2
RS RW DB7 DB6 DB5
DL
(1)
0
0
0
0
1
N
0
x
x
Wait for more than 39
s
µ
0
1
0
1
0
1
display off
display on
cursor off
D
C
B
Dsplay ON/OFF Control
DB4
0
DB1 DB0
DB3 DB2
RS RW
DB6 DB5
DB7
0
cursor on
blink off
blink on
0
0
0
0
D
C
B
1
Wait for more than 39
s
µ
Clear Dsplay
ꢀ ꢀ
DB4
0
DB1
0
RS RW DB7 DB6 DB5
DB3 DB2
DB0
1
0
0
0
0
0
0
0
Wait for more than
0
1
0
1
decrement mode
increment mode
entire shift off
Entry Mode Set
I/D
S
DB4
0
DB1
I/D
RS RW DB7 DB6 DB5
DB3 DB2
DB0
S
0
0
0
0
0
1
0
entire shift on
Initialization end
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) 4-bit interface mode
Power on
Condition: 270 kHz
Wait for more than 20 ms
after VDD rises to 4.5V
(DL=“0”)
Function set
0
1
0
1
4-bit interface
8-bit interface
1-line mode
2-line mode
DL
N
DB4
DB1 DB0
DB3 DB2
RS RW DB7 DB6 DB5
DL
(0)
0
0
0
0
1
x
x
x
x
Wait for more than 39µs
Function set
DB4
DB1
RS RW DB7 DB6 DB5
DB3 DB2
DB0
x
x
x
x
x
x
x
x
0
0
0
0
0
0
x
1
x
0
x
N
µ
Wait for more than 39
s
0
1
0
1
0
1
display off
display on
cursor off
D
C
B
Dsplay ON/OFF Control
DB4
DB1 DB0
DB3 DB2
RS RW DB7 DB6 DB5
cursor on
blink off
blink on
x
x
x
x
x
x
x
x
0
0
0
0
0
1
0
0
0
D
C
B
Wait for more than 39µs
Clear Dsplay
DB4
DB1 DB0
RS RW DB7 DB6 DB5
DB3 DB2
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
0
1
Wait for more than 1.53ms
0
1
0
1
Entry ModeSet
decrement mode
increment mode
entire shift off
I/D
S
DB4
DB1
RS RW DB7 DB6 DB5
DB3 DB2
DB0
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
1
0
0
entire shift on
I/D
S
Initialization end
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE
1) IE = "Low"
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ꢉꢊꢋ ꢉꢊꢌ ꢉꢊꢍ ꢉꢊꢄ ꢉꢊꢅ ꢉꢊꢆ ꢉꢊꢁ ꢉꢊꢀ
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ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢇꢇꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢎꢏ ꢃꢐꢑꢒꢓ ꢔꢕꢒꢕ ꢒꢖ ꢄꢄꢀꢗꢘ ꢙ ꢃꢐꢑꢒꢓ ꢚ
ꢀꢁ
ꢀꢃ
ꢍ
ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢀꢁꢂꢀꢃꢄ
ꢌ
ꢍ
ꢌ
ꢍ
ꢌ
ꢍ
ꢌ
ꢍ
ꢌ
ꢌꢍꢏ ꢃꢐꢑꢒꢓ ꢔꢕꢒꢕ ꢒꢖ ꢄꢄꢀꢗꢘ ꢙ ꢃꢐꢑꢒꢓ ꢛ
ꢀꢁ
ꢌ
ꢀꢃ
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) IE = "High"
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
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ꢑꢒꢓ ꢓꢔꢕꢖꢗꢔ
ꢘ ꢒꢙꢋꢚꢔꢙꢑꢑꢗꢔꢈ
ꢋꢈ
ꢁ
ꢋꢃ
ꢀ
ꢌꢄꢉ ꢌꢄꢍ ꢌꢄꢎ ꢌꢄꢏ ꢌꢄꢐ ꢌꢄꢑ ꢌꢄꢁ ꢌꢄꢀ
ꢀ
ꢁ
ꢀ
ꢁ
ꢀ
ꢀ
ꢁ
ꢀ
ꢏꢏꢒ ꢂ#$%ꢕꢔꢙ$ ꢈꢖꢕ ꢜ ꢋ&'(ꢀ()* ꢌ '(ꢁ()
ꢆꢇꢉꢆꢊꢋꢌ
ꢍꢆꢎꢎꢏꢐ
ꢑꢒꢓ ꢓꢔꢕꢖꢗꢔ
ꢘ ꢒꢙꢋꢚꢔꢙꢑꢑꢗꢔꢈ
ꢋꢈ
ꢀ
ꢋꢃ
ꢀ
ꢌꢄꢉ ꢌꢄꢍ ꢌꢄꢎ ꢌꢄꢏ ꢌꢄꢐ ꢌꢄꢑ ꢌꢄꢁ ꢌꢄꢀ
ꢀ
ꢀ
ꢁ
ꢁ
ꢁ
ꢀ
ꢁ
ꢀ
ꢏꢎꢒ ꢂ#$%ꢕꢔꢙ$ ꢈꢖꢕ ꢜ ꢋ&'(ꢁ()
ꢆꢇꢉꢆꢊꢋꢌ
ꢍꢆꢎꢎꢏꢐ
ꢑꢒꢓ ꢓꢔꢕꢖꢗꢔ
ꢘ ꢒꢙꢋꢚꢔꢙꢑꢑꢗꢔꢈ
ꢋꢈ
ꢀ
ꢋꢃ
ꢀ
ꢌꢄꢉ ꢌꢄꢍ ꢌꢄꢎ ꢌꢄꢏ ꢌꢄꢐ ꢌꢄꢑ ꢌꢄꢁ ꢌꢄꢀ
ꢀ
ꢀ
ꢁ
ꢁ
ꢁ
ꢁ
ꢀ
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢋꢂꢃꢁ
KS0078
ꢉꢇꢏ ꢁ%ꢑ&ꢒꢂꢁ-ꢐꢖ## ()ꢕ*#ꢓ ꢙ ꢄꢁꢉ./ꢌ/01ꢄꢁꢊꢂꢋꢂꢌ./ꢍ/0
ꢀꢁ ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢔ ꢋꢑꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢍ
ꢍ
ꢍ
ꢉꢆꢏ 2 )-ꢒꢑꢖ) ꢁꢓꢒ ꢙ ꢀ(./ꢍ/0
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢔ ꢋꢑꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢀꢁ
ꢍ
ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢌ
ꢍ
ꢌ
ꢍ
ꢉ,ꢏ ꢞ ꢐ!ꢖꢐ ꢖꢐ ꢄꢑ!"#ꢕ$ ꢁ%ꢑ&ꢒ ꢙ ꢄꢑ!"#ꢕ$ !%ꢑ&ꢒ ꢒꢖ #ꢓ&ꢒ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢋꢑꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢀꢁ
ꢍ
ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢍ
ꢝ
ꢝ
ꢉꢎꢏ ꢞ ꢐ!ꢖꢐ ꢖꢐ ꢄꢑ!"#ꢕ$ ꢁ%ꢑ&ꢒ ꢙ ꢄꢑ!"#ꢕ$ !%ꢑ&ꢒ ꢒꢖ #ꢓ&ꢒ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢋꢑꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢀꢁ
ꢍ
ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢍ
ꢝ
ꢝ
ꢈꢍꢏ ꢞ ꢐ!ꢖꢐ ꢖꢐ ꢄꢑ!"#ꢕ$ ꢁ%ꢑ&ꢒ ꢙ ꢄꢑ!"#ꢕ$ !%ꢑ&ꢒ ꢒꢖ #ꢓ&ꢒ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢀꢁ
ꢍ
ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢍ
ꢝ
ꢝ
ꢈꢌꢏ ꢞ ꢐ!ꢖꢐ ꢖꢐ ꢄꢑ!"#ꢕ$ ꢁ%ꢑ&ꢒ ꢙ ꢄꢑ!"#ꢕ$ !%ꢑ&ꢒ ꢒꢖ #ꢓ&ꢒ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢄꢒꢍꢑꢊꢊꢐꢍꢓ
ꢀꢁ
ꢍ
ꢀꢃ ꢄꢅꢆ ꢄꢅꢇ ꢄꢅꢈ ꢄꢅꢉ ꢄꢅꢊ ꢄꢅꢋ ꢄꢅꢌ ꢄꢅꢍ
ꢍ
ꢍ
ꢍ
ꢍ
ꢌ
ꢌ
ꢍ
ꢝ
ꢝ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢁꢂꢃꢁ
KS0078
ꢑꢙ% ꢃꢉꢋ'ꢈꢐ *ꢓ+ꢉ
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
!
ꢑꢘ% ,'ꢐ-ꢋꢌꢓꢐ ꢀꢉꢋ ( ꢃꢁ./ꢛ/01ꢃꢁ2./ꢚ/0
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
ꢚ
ꢚ
ꢛ
ꢚ
ꢚ
ꢑꢞ% &'ꢈꢊꢓꢈ ꢓꢈ ꢜꢌꢊꢍꢎꢆꢏ ꢀꢖꢌꢔꢋ ( ꢜꢌꢊꢍꢎꢆꢏ ꢊꢖꢌꢔꢋ ꢋꢓ ꢈꢌ)ꢖꢋ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
ꢚ
ꢚ
!
!
ꢑꢑ% &'ꢈꢊꢓꢈ ꢓꢈ ꢜꢌꢊꢍꢎꢆꢏ ꢀꢖꢌꢔꢋ ( ꢜꢌꢊꢍꢎꢆꢏ ꢊꢖꢌꢔꢋ ꢋꢓ ꢈꢌ)ꢖꢋ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
ꢚ
ꢚ
!
!
ꢑꢗ% ꢃꢉꢋ'ꢈꢐ *ꢓ+ꢉ
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
!
ꢑꢝ% ,'ꢐ-ꢋꢌꢓꢐ ꢀꢉꢋ ( ꢃꢁ./ꢛ/01ꢃꢁ2./ꢛ/0
ꢀꢁꢂꢀꢃꢄꢅ
ꢆꢀꢇꢇꢈꢉ
ꢊꢋꢌ ꢌꢍꢎꢏꢐꢍ
ꢑ ꢋꢒꢄꢓꢍꢒꢊꢊꢐꢍ
ꢃꢀ
ꢛ
ꢃ$ ꢜ ꢝ ꢜ ꢗ ꢜ ꢑ ꢜ ꢞ ꢜ ꢘ ꢜ ꢙ ꢜ ꢚ ꢜ ꢛ
ꢛ
ꢛ
ꢛ
ꢚ
ꢚ
ꢚ
ꢛ
ꢛ
ꢛ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢄꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ꢛ) *ꢈꢅ+ꢆꢇꢄꢅ ꢐꢌꢆ # ꢖ%ꢀ'ꢁ'ꢂ
ꢂꢈꢉꢂꢊꢋꢌ
ꢍꢂꢀꢀꢎꢏ
ꢆꢄꢐ ꢐꢅꢑꢒꢓꢅ
ꢔ ꢄꢕꢋꢖꢅꢕꢆꢆꢓꢅ
ꢖꢐ
ꢞ
ꢖꢊ
ꢞ
ꢔꢘꢙ
ꢞ
ꢔꢘꢚ ꢔꢘꢛ
ꢔꢘꢜ
ꢁ
ꢔꢘꢝ ꢔꢘꢕ
ꢔꢘꢁ ꢔꢘꢞ
ꢞ
ꢁ
ꢁ
ꢁ
ꢞ
ꢞ
ꢛ$ %ꢅꢆꢋ& "ꢄꢗꢌ ꢐꢌꢆ # ꢘꢓꢔꢀ'ꢁ'ꢂ
ꢖꢐ
ꢞ
ꢖꢊ
ꢞ
ꢔꢘꢙ
ꢞ
ꢔꢘꢚ ꢔꢘꢛ
ꢔꢘꢜ
ꢞ
ꢔꢘꢝ ꢔꢘꢕ
ꢔꢘꢁ ꢔꢘꢞ
ꢞ
ꢞ
ꢞ
ꢁ
ꢁ
ꢁ
ꢚꢞ ꢃ(ꢌꢏꢋ ꢔꢇꢉꢎ(ꢏ&
ꢗ
ꢖꢐ
ꢞ
ꢖꢊ
ꢞ
ꢔꢘꢙ
ꢞ
ꢔꢘꢚ ꢔꢘꢛ
ꢔꢘꢜ
ꢞ
ꢔꢘꢝ ꢔꢘꢕ
ꢔꢘꢁ ꢔꢘꢞ
ꢞ
ꢞ
ꢞ
ꢞ
ꢞ
ꢁ
ꢚꢁ ꢊꢋꢇꢆꢌ ꢔꢏꢆꢏ ꢆꢄ ꢔꢔꢖ!" # ꢊꢋꢇꢆꢌ
ꢘ
ꢖꢐ
ꢁ
ꢖꢊ
ꢞ
ꢔꢘꢙ
ꢞ
ꢔꢘꢚ ꢔꢘꢛ
ꢔꢘꢜ
ꢞ
ꢔꢘꢝ ꢔꢘꢕ
ꢔꢘꢁ ꢔꢘꢞ
ꢁ
ꢞ
ꢞ
ꢞ
ꢁ
ꢞ
ꢚꢕ ꢊꢋꢇꢆꢌ ꢔꢏꢆꢏ ꢆꢄ ꢔꢔꢖ!" # ꢊꢋꢇꢆꢌ
ꢓ
ꢖꢐ
ꢁ
ꢖꢊ
ꢞ
ꢔꢘꢙ ꢔꢘꢚ
ꢔꢘꢛ
ꢞ
ꢔꢘꢜ ꢔꢘꢝ
ꢔꢘꢕ ꢔꢘꢁ
ꢔꢘꢞ
ꢁ
ꢞ
ꢁ
ꢞ
ꢁ
ꢞ
ꢞ
ꢚꢝ ꢊꢋꢇꢆꢌ ꢔꢏꢆꢏ ꢆꢄ ꢔꢔꢖ!" # ꢊꢋꢇꢆꢌ
ꢔ
ꢖꢐ
ꢁ
ꢖꢊ
ꢞ
ꢔꢘꢙ
ꢞ
ꢔꢘꢚ ꢔꢘꢛ
ꢔꢘꢜ ꢔꢘꢝ
ꢔꢘꢕ ꢔꢘꢁ
ꢔꢘꢞ
ꢞ
ꢁ
ꢞ
ꢞ
ꢞ
ꢁ
ꢞ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢅꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FRAME FREQUENCY
1) 1/17 duty cycle
ꢏꢑꢒꢓꢔꢕ ꢖꢕꢒꢕꢗꢘꢓꢙꢔ ꢚꢕꢛꢓꢙꢜ
ꢀ
ꢁ
ꢂ
ꢃ
000 ꢀꢆ
ꢀꢇ
ꢀ
ꢁ
ꢂ
000 ꢀꢆ
ꢀꢇ
VDD
ꢛꢃ
ꢝ
#1ꢖꢀ
ꢛꢍ
ꢛꢎ
ꢃ ꢖꢗꢘꢙꢚ
ꢃ ꢖꢗꢘꢙꢚ
Item
Display Font Width
5-dot font width
240 clocks
66.2Hz
6-dot font width
288 clocks
55.1Hz
1-line selection period
Frame frequency
* fosc = 270 kHz (1 clock = 3.7ꢂ)
2) 1/33 duty cycle
ꢁꢓꢔꢕꢖꢗ ꢘꢗꢔꢗꢙꢚꢕꢛꢖ ꢜꢗꢝꢕꢛꢞ
ꢚ
ꢙ
ꢘ
ꢞ
333 ꢘꢙ ꢘꢘ
ꢚ
ꢙ
ꢘ
333 ꢘꢙ ꢘꢘ
VDD
ꢙꢍ
ꢛ
&4ꢅꢚ
ꢙꢊ
ꢙꢉ
ꢍ ꢏꢕꢖꢗꢘ
ꢍ ꢏꢕꢖꢗꢘ
Item
Display Font Width
5-dot font width
120 clocks
68.2Hz
6-dot font width
144 clocks
56.8Hz
1-line selection period
Frame frequency
* fosc = 270 kHz (1 clock = 3.7ꢂ)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢈꢆꢂꢃꢁ
KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
POWER SUPPLY FOR DRIVING LCD PANEL
1) When an external power supply is used
ꢔꢄꢄ
ꢔꢄꢄ
ꢔꢌ
ꢔꢋ
ꢔꢊ
ꢔꢉ
ꢔꢈ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢍ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢔꢕꢕ
2) When an internal booster is used
(Boosting twice)
(Boosting three times)
VDD
VDD
VCI
VDD
VCI
VDD
+
+
R
R
GND
GND
V1
V2
V3
V4
V5
V1
V2
V3
V4
V5
-
-
R
R
C1
C1
-
-
R0
R0
µ
F
µ
1 F
1
C2
C2
+
+
R
R
R
R
V5OUT2
V5OUT3
V5OUT2
V5OUT3
-
µ
F
1
+
-
-
Can be detached
If not using
µ
Can be detached
If not using
1
F
1µF
+
+
powr down mode
powr down mode
*
1. Boosted output voltage should not exceed the maximum value (13 V) of the LCD driving voltage.
Especially, a voltage of over 4.3V should not be input to the reference voltage
(Vci) when boosting three times.
2. A voltage of over 5.5V should not be input to the reference voltage (Vci) when boosting
twice.
3. The value of resistance, according to the number of lines, duty ratio and the bias, is
shown below. (Refer to Table 13)
Table 13. Duty Ratio and Power Supply for LCD Driving
Item
Data
Number of lines
Duty ration
BIas
1
1/17
1/5
R
2 or 4
1/33
1/6.7
R
Divided resistance
R
R0
R
2.7R
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE RATE
Characteristic
Power Supply Voltage (1)
Power Supply Voltage (2)
Input Voltage
Symbol
VDD
Value
-0.3 to +7.0
Unit
V
VLCD
VIN
VDD -15.0 to VDD +0.3
-0.3 to VDD +0.3
-30 to +85
V
V
Operating Temperature
Storage Temperature
TOPR
TSTG
°C
°C
-55 to +125
* Voltage greater than above may damage to the circuit (VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5)
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = 2.7V to 5.5V, Ta=-30 to +85°C)
Characteristic
Operating Voltage
Supply Current
Symbol
VDD
Condition
Min
2.7
-
Typ
-
Max
5.5
Unit
V
-
IDD
Internal oscillation or external clock.
0.15
0.3
mA
(VDD=3.0V,fosc=270KHz)
Input Voltage (1)
(Except OSC1)
VIH1
VIL1
-
0.7VDD
-
VDD
0.2VDD
0.6
VDD=2.7 to 3.0
VDD=3.0 to 5.5
-
-0.3
-
-
-0.3
-
Input Voltage (2)
(OSC1)
VIH2
VIL2
0.7VDD
-
VDD
0.2VDD
-
V
V
V
-
-
-
Output Voltage (1)
(DB0 to DB7)
VOH1
VOL1
VOH2
VOL1
VdCOM
VdSEG
IIL
IOH=-0.1mA
IOL=0.1 mA
0.75VDD
-
-
-
0.2VDD
-
Output Voltage(2)
(except DB0 to DB7)
Voltage Drop
0.8VDD
-
IO=-40 µA
IO=40 µA
-
-
-
0.2VDD
1
-
-
V
IO= ± 0.1mA
-
1
Input Leakage Current
Low Input Current
VIN=0V to VDD
-1
-10
-
1
µA
IIN
VIN=0V, VDD=3V
(PULL UP)
-50
-120
Internal Clock
(external Rf)
fOSC
190
270
350
KHz
Rf=91kΩ ± 2%
(VDD=5V)
External Clock
fEC
125
45
-
270
50
-
410
55
0.2
-
KHz
%
duty
tR, tF
VOUT2
-
µs
V
Voltage Converter Out2
(Vci = 4.5V)
-3.0
-4.2
Ta = 25 °C, C=1 µF,
IOUT = 0.25mA,
fOSC=270KHz
Voltage Converter Out3
(Vci = 2.7V)
VOUT3
-4.3
-5.1
-
Voltage Converter Input
LCD Driving Voltage
Vci
-
1.0
3.0
3.0
-
-
-
4.5
VLCD
VDD-V5
1/5 Bias
13.0
13.0
V
1/6.7 Bias
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
(VDD = 4.5 to 5.5V, Ta=-30 to +85 °C)
Mode
Item
Symbol
Min
Typ
Max
Unit
E Cycle Time
tc,
500
-
-
E Rise / Fall Time
E Pulse Width (High, Low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Setup Time
tR, tF
tw
-
230
40
10
60
10
500
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
20
-
ns
(1) Write Mode
(refer to Fig-15)
tsu1
tH1
tsu2
tH2
tc
-
-
-
Data Hold Time
-
E Cycle Time
-
E Rise / Fall Time
tR,tF
tw
20
E Pulse Width (High, Low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Output Delay Time
Data Hold Time
230
40
10
-
-
ns
(2) Read Mode
(refer to Fig-16)
tsu
tH
-
-
tD
160
tDH
5
-
Serial Clock Cycle Time
Serial Clock Rise/Fall Time
Serial Clock Width (High, Low)
Chip Select Setup Time
Chip Select Hold Time
Serial Input Data Setup Time
Serial Input Data Hold Time
Serial Output Data Delay Time
Serial Output Data Hold Time
tc
0.5
-
20
µs
tR,tF
tw
50
200
60
20
100
100
-
-
(3) Serial
tsu1
tH1
tsu2
tH2
tD
-
Interface Mode
(refer to Fig-17)
-
ns
-
-
160
-
tDH
5
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
(continued)
(VDD=2.7 to 4.5V, Ta=-30 to +85 °C)
Mode
Item
Symbol
Min
Typ
Max
Unit
E Cycle Time
tc,
1000
-
-
E Rise / Fall Time
E Pulse Width (High, Low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Setup Time
tR, tF
tw
-
450
60
20
195
10
1000
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
25
-
ns
(4) Write Mode
(refer to Fig-15)
tsu1
th1
tsu2
tH2
tc
-
-
-
Data Hold Time
-
E Cycle Time
-
E Rise / Fall Time
tR,tF
tw
25
E Pulse Width (High, Low)
R/W and RS Setup Time
R/W and RS Hold Time
Data Output Delay Time
Data Hold Time
450
60
20
-
-
ns
(5) Read Mode
(refer to Fig-16)
tsu
tH
-
-
tD
360
tDH
5
-
Serial Clock Cycle Time
Serial Clock Rise/Fall Time
Serial Clock Width (High, Low)
Chip Select Setup Time
Chip Select Hold Time
Serial Input Data Setup Time
Serial Input Data Hold Time
Serial Output Data Delay Time
Serial Output Data Hold Time
tc
1
20
µs
tR,tF
tw
-
50
400
60
20
200
200
-
-
(6) Serial
tsu1
tH1
tsu2
tH2
tD
-
Interface Mode
(refer to Fig-17)
-
ns
-
-
360
-
tDH
5
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
VIH1
VIL1
RS
R/W
E
tH1
tsu1
VIL1
VIL1
tH1
tw
tF
VIH1
VIL1
VIH1
VIL1
VIL1
tH2
tSU2
tR
VIH1
VIL1
VIH1
VIL1
Valid Data
tc
DB0~DB7
Fig-15. Write Mode
VIH1
VIL1
RS
R/W
tH
tSU
VIH1
VIH1
tH
tW
tF
VIH1
VIL1
VIH1
E
VIL1
VIL1
tDH
tR
tD
VOH1
VOL1
VOH1
Valid Data
VOL1
DB0~DB7
tC
Fig-16. Read Mode
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KS0078
34COM/120SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
tC
CS
VIL1
tSU1
VIL1
tW
tW
tH1
tR
tF
VIH1
VIL1
VIH1
VIL1
VIH1
VIL1
VIH1
VIL1
SCLK
SID
tH2
tSU2
tDH
tD
VOH1
VOL1
SOD
Fig-17. Serial Interface Mode
Reset Timing
(VDD = 2.7 to 5.5V, Ta = -30 to +85ꢃ)
Item
Symbol
tRES
Min
10
Typ
-
Max
-
Unit
ms
Reset low level width
(Refer to Fig-18)
tRES
RESET
VIL1
VIL1
Fig-18. Reset Timing Diagram
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