KS86P4004-32SOP [SAMSUNG]
Microcontroller, 8-Bit, UVPROM, SAM87RI CPU, 10MHz, CMOS, PDSO32;
| 型号： | KS86P4004-32SOP |
| 厂家： | 
SAMSUNG |
| 描述： | Microcontroller, 8-Bit, UVPROM, SAM87RI CPU, 10MHz, CMOS, PDSO32 可编程只读存储器 微控制器 光电二极管 |
| 文件： | 总34页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
KS86C4004/P4004/C4104/P4104
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.
A address/data bus architecture and a large number of bit-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.
KS86C4004/C4104 MICROCONTROLLER
The KS86C4004/C4104 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is
built around the powerful SAM87Ri CPU core. The KS86C4004/C4104 is a versatile microcontroller, with its A/D
converter and a zero-crossing detection capability it can be used in a wide range of general purpose applications.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The KS86C4004/C4104 has 4-Kbytes of
program memory on-chip (ROM) and 208-bytes of general purpose register area RAM.
Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core:
— Four configurable I/O ports (KS86C4004: 22 pins, KS86C4104: 16 pins)
— Six interrupt sources with one vector and one interrupt level
— Two 8-bit timer/counter with various operating modes
— Analog to digital converter (KS86C4004: 8-bit, 8-channel, KS86C4104: 10-bit, 5-channel)
— One zero cross detection module
The KS86C4004/C4104 microcontroller is ideal for use in a wide range of electronic applications requiring simple
timer/counter, PWM, ADC, ZCD and capture functions. KS86C4004 is available in a 30-pin SDIP and a 32-pin
SOP package. KS86C4104 is available in a 24-pin SDIP and a 24-pin SOP package.
OTP
The KS86P4004/P4104 is an OTP (one time programmable) version of the KS86C4004/C4104 microcontroller.
The KS86P4004/P4104 has on-chip 4-Kbyte one-time programmable EEPROM instead of masked ROM. The
KS86P4004/P4104 is fully compatible with the KS86C4004/C4104, in function, in D.C. electrical characteristics
and in pin configuration.
1-1
PRODUCT OVERVIEW
KS86C4004/P4004/C4104/P4104
FEATURES
CPU
Timer/Counter
•
SAM87Ri CPU core
•
•
One 8-bit basic timer for watchdog function
One 8-bit timer/counter with three operating
modes (10-bit PWM 1ch)
Memory
•
•
4-Kbyte internal program memory (ROM)
208-byte general purpose register area (RAM)
•
One 8-bit timer/counter for the zero-crossing
detection circuit
Zero-Crossing Detection Circuit
Instruction Set
•
Zero-crossing detection circuit that generates a
digital signal in synchronism with an AC signal
input
•
•
41 instructions
IDLE and STOP instructions added for
power-down modes.
Buzzer Frequency Range
200 Hz to 20 kHz signal can be generated
Instruction Execution Time
600 ns at 10 MHz f (minimum)
•
•
OSC
Operating Temperature Range
Interrupts
° °
– 40 C to + 85 C
•
•
6 interrupt sources with one vector and one level
interrupt structure
Operating Voltage Range
2.7 V to 5.5 V
•
Oscillation Frequency
•
•
•
1 MHz to 10 MHz external crystal oscillator
Maximum 10 MHz CPU clock
4 MHz RC oscillator
OTP Interface Protocol Spec
Serial OTP
•
Package Types
General I/O
•
•
30-pin SDIP, 32-pin SOP for KS86C4004/P4004
24-pin SDIP, 24-pin SOP for KS86C4104/P4104
•
Four I/O ports (22 pins for KS86C4004,
16 pins for KS86C4104)
•
Bit programmable ports
A/D Converter
•
•
•
Eight analog input pins
8-bit conversion resolution (KS86C4004)
10-bit conversion resolution (KS86C4104)
1-2
KS86C4004/P4004/C4104/P4104
PRODUCT OVERVIEW
BLOCK DIAGRAM
P1.0-P1.3
P0.0-P0.7
PORT 0
/ZCD,BUZ,T0,CLO
PORT 1
BASIC
TIMER
X
IN
OSC
X
OUT
I/O PORT I/O and
P2.0-P2.3
INTERRUPT CONTROL
/INT0-INT1
/ADC6-ADC7
PORT 2
PORT 3
T0(PWM)
TIMER 0
TIMER 1
ADC
P1.1/BUZ
SAM87RI CPU
P3.0-P3.5
/ADC0-ADC5
ADC0
-ADC7
P1.0/
ZCD
ZCD
208-BYTE
REGISTER FILE
4-KB ROM
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
KS86C4004/P4004/C4104/P4104
PIN ASSIGNMENTS
V
X
1
2
3
4
5
6
7
8
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
V
DD
SS
IN
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
X
OUT
TEST
P0.1
P0.0
RESET
KS86C4004
30-SDIP
(Top View)
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
P1.0 / ZCD
P1.1 / BUZ
9
10
11
12
13
14
15
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7
AV
AV
ref
SS
Figure 1-2. Pin Assignment Diagram (30-Pin SDIP Package)
1-4
KS86C4004/P4004/C4104/P4104
PRODUCT OVERVIEW
V
X
SS
IN
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
P0.2
X
OUT
TEST
P0.1
P0.0
RESET
P0.3
P0.4
P0.5
P0.6
P0.7
NC
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7
KS86C4004
32-SOP
(Top View)
NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
10
11
12
13
14
15
16
AV
SS
AV
ref
Figure 1-3. Pin Assignment Diagram (32-Pin SOP Package)
1-5
PRODUCT OVERVIEW
KS86C4004/P4004/C4104/P4104
V
V
X
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
DD
SS
IN
P0.2
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
AV
X
OUT
TEST
P0.1
P0.0
RESET
KS86C4104
24-SDIP
(Top View)
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
10
11
12
ref
AV
SS
Figure 1-4. Pin Assignment Diagram (24-Pin SDIP Package)
1-6
KS86C4004/P4004/C4104/P4104
PRODUCT OVERVIEW
V
X
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
V
DD
SS
IN
P0.2
X
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
OUT
TEST
P0.1
P0.0
RESET
KS86C4104
24-SOP
(Top View)
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
10
11
12
AV
AV
ref
SS
Figure 1-5. Pin Assignment Diagram (24-Pin SOP Package)
1-7
PRODUCT OVERVIEW
KS86C4004/P4004/C4104/P4104
PIN DESCRIPTIONS
Table 1-1. KS86C4004/C4104 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Share
Pins
Bit-programmable I/O port for normal input or
push-pull, open-drain output. Pull-up resistors are
assignable by software.
P0.0-P0.7
I/O
E-2
P1.0-P1.3
I/O
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
assignable by software. Port 1 pins can also be
used as alternative functions.
F
D
D
D
ZCD
BUZ
T0(PWM)
CLO
P2.0-P2.3
P3.0-P3.5
I/O
I/O
–
Bit-programmable I/O port for Schmitt trigger
input or push-pull, open drain output. Pull up
resistors are assignable by software. Port 2 can
also be used as external interrupt, A/D input.
E
E-1
INT0–INT1
ADC6–ADC7
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
assignable by software. Port 3 pins can also be
used as A/D converter input.
F
ADC0–ADC5
X , X
IN OUT
Crystal/ceramic, or RC oscillator signal for
system clock.
–
–
INT0–INT1
RESET
I
I
I
External interrupt input.
E
B
–
P2.0–P2.1
System RESET signal input pin.
–
–
TEST
Test signal input pin (for factory use only: must be
connected to VSS
)
V
V
–
–
Voltage input pin and ground
–
–
–
–
DD, SS
AVREF, AV
A/D converter reference voltage input and ground
SS
ZCD
BUZ
T0
I
O
I/O
O
I
Zero crossing detector input
F
D
D
D
P1.0
P1.1
P1.2
P1.3
200 Hz–20 kHz frequency output for buzzer sound
Timer 0 capture input or 10-bit PWM output
System clock output port
CLO
ADC0–ADC7
A/D converter input
F
E-1
P3.0–P3.5
P2.2–P2.3
NOTE: Port 0.7, P1.3, P2.1–P2.3 and P3.5 is not available in KS86C4104/P4104 .
1-8
KS86C4004/P4004/C4104/P4104
PRODUCT OVERVIEW
PIN CIRCUITS
V
DD
DD
V
P-CHANNEL
P CHANNEL
-
DATA
IN
OUT
N-CHANNEL
N CHANNEL
-
OUTPUT
DISABLE
Figure 1-6. Pin Circuit Type A
Figure 1-8. Pin Circuit Type C
V
DD
PULL-UP
RESISTOR
V
DD
PULL-UP
RESISTOR
RESISTOR
P-CHANNEL
IN/OUT
ENABLE
DATA
CIRCUIT
TYPE C
IN
OUTPUT
DISABLE
DATA
Figure 1-7. Pin Circuit Type B
Figure 1-9. Pin Circuit Type D
1-9
PRODUCT OVERVIEW
KS86C4004/P4004/C4104/P4104
V
DD
V
DD
V
V
DD
DD
PULL-UP
RESISTOR
PULL-UP
RESISTOR
PNE
PNE
PULL-UP
ENABLE
PULL-UP
ENABLE
-
P CH
-
P CH
DATA
IN/OUT
DATA
IN/OUT
-
N CH
-
N CH
OUTPUT
DISABLE
OUTPUT
DISABLE
INPUT
INPUT
Figure 1-10. Pin Circuit Type E
Figure 1-10. Pin Circuit Type E-2
V
DD
V
DD
V
DD
PULL-UP
RESISTOR
PULL-UP
PNE
RESISTOR
PULL-UP
ENABLE
PULL-UP
ENABLE
-
P CH
V
DD
DATA
DATA
CIRCUIT
TYPE C
IN/OUT
IN/OUT
OUTPUT
DISABLE
-
N CH
OUTPUT
DISABLE
DIGITAL
INPUT
DIGITAL INPUT
ANALOG INPUT
ANALOG
INPUT
Figure 1-11. Pin Circuit Type E-1
Figure 1-12. Pin Circuit Type F
1-10
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
13 ELECTRICAL DATA
OVERVIEW
In this section, the following KS86C4004/C4104 electrical characteristics are presented in tables and graphs:
— Absolute maximum ratings
— D.C. electrical characteristics
— A.C. electrical characteristics
— Oscillator characteristics
— Oscillation stabilization time
— Operating Voltage Range
— Schmitt trigger input characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a RESET
— A/D converter electrical characteristics
— Zero-crossing detector
— Zero Crossing Waveform Diagram
13-1
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
Table 13-1. Absolute Maximum Ratings
°
(TA = 25 C)
Parameter
Symbol
Conditions
Rating
Unit
VDD
Supply voltage
–
– 0.3 to + 6.5
V
VI
VO
IOH
– 0.3 to VDD + 0.3
Input voltage
Output voltage
Output current
All input ports
V
V
– 0.3 to VDD + 0.3
– 18
All output ports
One I/O pin active
mA
high
All I/O pins active
One I/O pin active
– 60
+ 30
IOL
Output current
mA
low
Total pin current for ports 1, 2, 3
+ 100
Total pin current for ports 0
–
+ 200
TA
°
C
Operating
– 40 to + 85
temperature
TSTG
°
C
Storage
–
– 65 to + 150
temperature
Table 13-2. DC Electrical Characteristics
°
°
(TA = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)
Parameter
Input high
Symbol
Conditions
VDD= 2.7 to 5.5 V
Min
Typ
Max
Unit
VIH1
0.8 VDD
VDD
Ports 1,2,3, and
–
V
voltage
RESET
VIH2
VIH3
0.7 VDD
VDD –0.1
–
Port 0
XIN and XOUT
VIL1
VDD= 2.7 to 5.5 V
0.2 VDD
Input low
voltage
Ports 1,2,3, and
–
V
RESET
VIL2
VIL3
0.3 VDD
Port 0
XIN and XOUT
0.1
–
VOH
VOL1
VOL2
IOH = – 1 mA
VDD= 4.5 to 5.5 V
VDD= 4.5 to 5.5 V
VDD= 4.5 to 5.5 V
VDD – 1.0
–
Output high
voltage
–
V
V
ports 0, 1, 2, 3
IOL = 15 mA
port 0
Output low
voltage
0.4
0.4
2.0
2.0
IOL = 4 mA
port 1,2,3
13-2
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
Table 13-2. DC Electrical Characteristics (Continued)
(TA = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)
°
°
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
ILIH1
All inputs except ILIH2 VIN = VDD
Input high leakage
current
–
–
1
µA
ILIH2
ILIL1
XIN, XOUT
VIN = VDD
VIN = 0 V
20
Input low leakage
current
All inputs except
ILIL2 and RESET
–
–
– 1
µA
ILIL2
ILOH
XIN, XOUT
All outputs
VIN = 0 V
– 20
2
VOUT = VDD
VOUT = 0 V
VDD = 5 V
VDD = 3 V
Output high
leakage current
–
–
–
–
µA
µA
kW
ILOL
RP
Output low
leakage current
All outputs
– 2
70
VIN = 0 V
Ports 0–3
Pull-up resistors
Supply current
30
47
30
–
280
7.5
350
15
IDD1
Run mode
mA
VDD = 5 V ± 10%
10 MHz CPU clock
8 MHz CPU clock
3
2
6
5
VDD = 3 V ± 10%
VDD = 5 V ± 10%
IDD2
Idle mode
10 MHz CPU clock
8 MHz CPU clock
Stop mode
0.7
0.1
2.5
5
VDD = 3 V ± 10%
VDD = 5 V ± 10%
VDD = 3 V ± 10%
IDD3
µA
NOTE: D.C. electrical values for Supply current (I
DD1
to I ) do not include current drawn through internal pull-up
DD3
resisters, output port drive current, ZCD and ADC.
13-3
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
Table 13-3. AC Electrical Characteristics
°
°
(TA = –20 C to + 85 C, VDD = 2.7 V to 5.5 V)
Parameter
Symbol
tINTH
tINTL
Conditions
Min
Typ
Max
Unit
,
Interrupt input
high, low width
–
200
–
ns
Port 2
VDD = 5V ± 10%
tRSL
–
input
low width
ZCD noise filter
–
1
–
µs
Input
VDD = 5V ± 10%
1
t
CPU
t
t
NF1H
NF1L
t
RSL
t
NF2
0.8 V
DD
0.2 V
DD
NOTE: The unit t
means one CPU clock period.
CPU
Figure 13-1. Input Timing Measurement Points
13-4
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
Table 13-4. Oscillator Characteristics
°
°
(T = – 40 C to + 85 C)
A
Oscillator
Clock Circuit
Test Condition
DD = 4.5 to 5.5 V
Min
Typ
Max
Unit
Main crystal or
ceramic
1
1
–
–
10
8
MHz
V
V
X
X
IN
DD = 2.7 to 4.5 V
C1
C2
OUT
External clock
1
1
–
–
10
8
V
DD = 4.5 to 5.5 V
DD = 2.7 to 4.5 V
X
X
IN
V
OUT
VDD = 4.75 to 5.25 V
R = 8.2K
RC oscillator
–
4
–
X
X
IN
(P1.3/
CLO)
R
OUT
Table 13-5. Oscillation Stabilization Time
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V)
°
°
A
Oscillator
Main crystal
Main ceramic
Test Condition
Min
–
Typ
Max
Unit
fOSC > 1.0 MHz
–
–
20
10
ms
Oscillation stabilization occurs when VDD is equal
to the minimum oscillator voltage range.
–
XIN input high and low width (tXH, tXL
)
External clock
(main system)
25
–
–
500
–
ns
tWAIT when released by a reset (1)
16
Oscillator
stabilization
ms
2
/fOSC
–
tWAIT when released by an interrupt (2)
wait time
–
–
NOTES:
1.
f
is the oscillator frequency.
OSC
t
2. The duration of the oscillator stabilization wait time,
in the basic timer control register, BTCON.
, when it is released by an interrupt is determined by the
settings
WAIT
13-5
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
CPU CLOCK
10 MHz
8 MHz
4 MHz
3 MHz
2 MHz
1 MHz
1
2
2.7 3
4
5
5.5
6
7
SUPPLY VOLTAGE (V)
Figure 13-2. Operating Voltage Range
V
out
V
DD
A = 0.2 V
B = 0.4 V
DD
DD
C = 0.6 V
DD
DD
D = 0.8 V
V
SS
V
in
A
B
C
D
0.3 V
0.7 V
DD
DD
Figure 13-3. Schmitt Trigger Input Characteristics Diagram
13-6
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
Table 13-6. Data Retention Supply Voltage in Stop Mode
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5V)
°
°
A
Parameter
Symbol
Conditions
Stop mode
Min
Typ
Max
Unit
VDDDR
Data retention
supply voltage
2.0
–
5.5
V
IDDDR
Stop mode; VDDDR = 2.0 V
Data retention
supply current
–
0.1
5
µA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
INTERNAL
IDLE MODE
RESET
(BASIC TIMER
ACTIVE)
STOP MODE
DATA RETENTION
V
DD
MODE
NORMAL
V
DDDR
OPERATING
MODE
EXECUTION OF
STOP
RESET
0.8 V
DD
0.2 V
t
DD
WAIT
NOTE: tWAIT is the same as 4096 x 16 x 1/f
OSC
Figure 13-4. Stop Mode Release Timing When Initiated by a RESET
13-7
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
Table 13-7. A/D Converter Electrical Characteristics (KS86C4004)
°
°
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V, VSS = 0 V)
KS86C4004: 8-bit ADC
A
Parameter
Symbol
Test Conditions
VDD = 5.12 V
Min
Typ
Max
Unit
Total accuracy
–
–
LSB
± 2
Integral linearity
error
ILE
CPU clock = 10 MHz
AVREF = 5.12 V
–
± 1.5
AVSS = 0 V
Differential
linearity error
DLE
EOT
EOB
tCON
VIAN
–
– 1
– 1
–
± 1
± 2
Offset error of
top
Offset error of
bottom
± 2
Conversion
time(1)
fcpu = 10 MHz
5
–
ms
V
AVSS
AVREF
Analog input
voltage
–
–
–
–
–
RAN
Analog input
impedance
2
–
–
MW
V
AVREF
AVSS
IADIN
VDD
ADC reference
voltage
2.5
VSS
–
VSS + 0.3
ADC reference
ground
–
V
AVREF = VDD = 5 V
Analog input
current
–
–
–
10
3
mA
conversion time = 5 ms
IADC
AVREF = VDD = 5 V
ADC block
current (2)
1
mA
nA
conversion time = 5 ms
AVREF = VDD = 3 V
0.5
100
1.5
500
conversion time = 5 ms
AVREF = VDD = 5 V
Power down mode
–
NOTES:
1. “Conversion time” is the time required from the moment a conversion operation starts until it ends.
2.
I
is operating current during A/D conversion.
ADC
13-8
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
Table 13-8. A/D Converter Electrical Characteristics (KS86C4104)
°
°
(T = – 40 C to + 85 C, VDD = 2.7 V to 5.5 V, VSS = 0 V)
KS86C4104: 10-bit ADC
A
Parameter
Resolution
Symbol
Test Conditions
Min
–
Typ
10
–
Max
–
Unit
bit
VDD = 5.12 V
Total accuracy
–
LSB
± 3
Integral linearity
error
ILE
CPU clock = 10 MHz
AVREF = 5.12 V
–
± 2
AVSS = 0 V
Differential
linearity error
DLE
EOT
EOB
tCON
–
± 1
± 0.5
–
± 1
± 3
± 2
–
Offset error of
top
Offset error of
bottom
Conversion time
(1)
10-bit conversion
20
ms
(3)
50 x 4/ fOSC
VIAN
AVSS
AVREF
Analog input
voltage
–
–
–
–
–
–
V
MW
V
RAN
Analog input
impedance
2
–
AVREF
VDD
Analog
2.5
reference
voltage
AVSS
IADIN
VSS
–
VSS + 0.3
10
Analog ground
–
–
–
V
AVREF = VDD = 5 V
Analog input
current
mA
conversion time = 20 ms
IADC
AVREF = VDD = 5 V
Analog block
current (2)
1
3
mA
mA
nA
conversion time = 20 ms
AVREF = VDD = 3 V
0.5
100
1.5
500
conversion time = 20 ms
AVREF = VDD = 5 V
when power down mode
NOTES:
1. "Conversion time" is the time required from the moment a conversion operation starts until it ends.
2.
I
is operating current during A/D conversion.
ADC
OSC
3.
f
is the main oscillator clock.
13-9
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
Table 13-9. Zero Crossing Detector
°
°
(T = – 40 C to + 85 C, VDD = 4.5 V to 5.5 V, VSS = 0 V)
A
Parameter
Symbol
Test Conditions
AC connection
c = 0.1 mF
Min
Typ
Max
Unit
VZC
Zero-crossing
detection input
voltage
1.0
–
3.0
Vp-p
Zero-crossing
detection accuracy
–
–
–
mV
Hz
± 150
VAZC
fZC = 60 Hz
(sine wave)
VDD = 5 V
fOSC = 10 MHz
Zero-crossing
detection input
frequency
–
40
200
fZC
1/f
ZC
V
V
AC Input
AZC
AZ(P-P)
ZCINT
Figure 13-5. Zero Crossing Waveform Diagram
13-10
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
70
60
50
40
V
= 5.5 V
DD
V
V
= 5.0 V
= 4.5 V
DD
DD
I
(mA)
OL
30
20
10
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
(V)
3.5
4.0
4.5
5.0
5.5
V
OL
Figure 13-6. IOL vs. VOL (P0, TA = 25 °C)
13-11
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
50
40
30
20
10
0
V
= 5.5 V
DD
V
= 5.0 V
DD
I
(mA)
OL
V
= 4.5 V
DD
0.0
0.5
1.0
1.5
2.0
2.5
3.0
(V)
3.5
4.0
4.5
5.0
5.5
V
OL
Figure 13-7. IOL vs. VOL (P1–P3, TA = 25 °C)
13-12
KS86C4004/P4004/C4104/P4104
ELECTRICAL DATA
36
32
-
-
28
24
20
16
12
-
-
-
-
-
I
OH
(mA)
V
DD
= 5.5 V
V
DD
= 5.0 V
8
4
-
-
V
= 4.5 V
DD
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
(V)
3.5
4.0
4.5
5.0
5.5
V
OH
Figure 13-8. IOH vs. VOH (P0, TA = 25 °C)
13-13
ELECTRICAL DATA
KS86C4004/P4004/C4104/P4104
24
20
16
12
-
-
-
-
I
OH
(mA)
V
= 5.5 V
DD
8
4
-
-
V
= 5.0 V
DD
V
= 4.5 V
4.0
DD
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
(V)
3.5
4.5
5.0
5.5
V
OH
Figure 13-9. IOH vs. VOH (P1–P3, TA = 25 °C)
13-14
KS86C4004/P4004/C4104/P4104
MECHANICAL DATA
14 MECHANICAL DATA
OVERVIEW
The KS86C4004/C4104 is available in a 30-pin SDIP package (Samsung: 30-SDIP-400) and a 32-pin SOP
package (32-SOP-450A), a 24-pin SDIP package (24-SDIP-300) and a 24-pin SOP package (24-SOP-375).
Package dimensions are shown in Figures 14-1, 14-2, 14-3, and 14-4.
#30
#16
0-15 °
30-SDIP-400
#1
#15
27.88 MAX
27.48 ± 0.2
0.56
± 0.1
1.778
(1.30)
1.12 ± 0.1
: Dimensions are in millimeters.
NOTE
Figure 14-1. 30-Pin SDIP Package Dimensions
14-1
MECHANICAL DATA
KS86C4004/P4004/C4104/P4104
0~8°
#32
#17
32-SOP-450A
#1
#16
+0.10
- 0.05
0.20
19.90 ± 0.2
0.10 MAX
1.27
(0.43)
0.40 ± 0.1
Dimensions are in millimeters.
NOTE:
Figure 14-2. 32-SOP-450A Package Dimensions
14-2
KS86C4004/P4004/C4104/P4104
MECHANICAL DATA
#24
#13
°
0-15
24-SDIP-300
23.35 MAX
#1
#12
22.95
± 0.2
0.46
0.89
± 0.1
± 0.1
(1.69)
1.778
:
Dimensions are in millimeters.
NOTE
Figure 14-3. 24-SDIP-300 Package Dimensions
14-3
MECHANICAL DATA
KS86C4004/P4004/C4104/P4104
0-8°
#24
#13
24-SOP-375
#1
#12
+0.10
- 0.05
0.15
15.74 MAX
15.34
± 0.2
0.10 MAX
1.27
(0.69)
0.38
± 0.1
: Dimensions are in millimeters.
NOTE
Figure 14-4. 24-SOP-375 Package Dimensions
14-4
KS86C4004/P4004/C4104/P4104
KS86P4004/P4104 OTP
15 KS86P4004/P4104 OTP
OVERVIEW
The KS86P4004/P4104 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the
KS86C4004/C4104 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is
accessed by serial data format.
The KS86P4004/P4104 is fully compatible with the KS86C4004/C4104 , both in function and in pin configuration.
Because of its simple programming requirements, the KS86P4004/P4104 is ideal for use as an evaluation chip
for the KS86C4004/C4104 .
V
/V
X
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
V
V
DD/ DD
1
2
3
4
5
6
7
8
SS SS
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
IN
X
OUT
V
/TEST
PP
P0.1
P0.0
RESET/ RESET
P0.7
KS86P4004
30-SDIP
(Top View)
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7
9
10
11
12
13
14
15
AV
AV
ref
SS
NOTE: The bolds indicate an OTP pin name.
Figure 15-1. Pin Assignment Diagram (30-Pin SDIP Package)
15-1
KS86P4004/P4104 OTP
KS86C4004/P4004/C4104/P4104
V
/V
SS SS
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
V
DD/ DD
X
IN
OUT
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
X
V
/TEST
P0.1
P0.0
PP
KS86P4004
32-SOP
(Top View)
RESET/ RESET
P0.7
NC
NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7
10
11
12
13
14
15
16
AV
SS
AV
ref
NOTE: The bolds indicate an OTP pin name.
Figure 15-2. Pin Assignment Diagram (32-Pin SOP Package)
15-2
KS86C4004/P4004/C4104/P4104
KS86P4004/P4104 OTP
V
V
/V
X
24
23
22
21
20
19
18
17
16
15
14
13
V
V
1
2
3
4
5
6
7
8
SS SS
DD/ DD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AV
AV
SS
IN
X
OUT
/TEST
PP
P0.1
P0.0
KS86P4104
24-SDIP
(Top View)
RESET/ RESET
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
10
11
12
ref
NOTE: The bolds indicate an OTP pin name.
Figure 15-3. Pin Assignment Diagram (24-Pin SDIP Package)
15-3
KS86P4004/P4104 OTP
KS86C4004/P4004/C4104/P4104
V
/V
X
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
V
V
SS SS
DD/ DD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AV
AV
IN
X
OUT
V
PP
/TEST
P0.1
P0.0
KS86P4104
24-SOP
(Top View)
RESET/ RESET
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
9
10
11
12
ref
SS
NOTE: The bolds indicate an OTP pin name.
Figure 15-4. Pin Assignment Diagram (24-Pin SOP Package)
15-4
KS86C4004/P4004/C4104/P4104
KS86P4004/P4104 OTP
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
Pin Name
During Programming
I/O
Pin Name
Pin No.
Function
P0.3
SDAT
KS86P4004: 28 (30)
KS86P4104: 22 (22)
I/O
Serial data pin (output when reading, Input
when writing) Input and push-pull output
port can be assigned
P0.2
SCLK
KS86P4004: 29 (31)
KS86P4104: 23 (23)
I/O
I
Serial clock pin (input only pin)
V
(TEST)
TEST
4
Power supply pin for EPROM cell writing (indicates
that OTP enters into the writing mode). When 12.5
V is applied, OTP is in writing mode and when 5 V
is applied, OTP is in reading mode. (Option)
PP
7
I
I
Chip Initialization
RESET
RESET
V
/V
V
/V
KS86P4004: 30 (32) / 1
KS86P4104: 24 (24) / 1
Logic power supply pin.
DD SS
DD SS
NOTE: ( ) means the SOP OTP pin number.
Table 15-2. Comparison of KS86P4004/P4104 and KS86C4004/C4104 Features
Characteristic
KS86P4004/P4104
4-Kbyte EPROM
2.7 V to 5.5 V
KS86C4004/C4104
Program Memory
4-Kbyte mask ROM
2.7 V to 5.5 V
Operating Voltage (V
)
DD
V
DD
= 5 V, V (TEST) = 12.5 V
PP
OTP Programming Mode
Pin Configuration
30 SDIP/32 SOP/24 SDIP/24 SOP
EPROM Programmability
User Program 1 time
Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
PP
(TEST) pin of the KS86P4004/P4104, the EPROM programming mode is
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins
listed in Table 15-3 below.
Table 15-3. Operating Mode Selection Criteria
V
DD
REG/MEM
R/W
MODE
VPP
(TEST)
ADDRESS
(A15-A0)
5 V
5 V
0
0
0
1
0000H
0000H
0000H
0E3FH
1
0
1
0
EPROM read
EPROM program
EPROM verify
12.5 V
12.5 V
12.5 V
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
15-5
KS86P4004/P4104 OTP
KS86C4004/P4004/C4104/P4104
NOTES
15-6
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