M470L3224HU0 [SAMSUNG]
DDR SDRAM Product Guide; DDR SDRAM产品指南
| 型号： | M470L3224HU0 |
| 厂家： | 
SAMSUNG |
| 描述： | DDR SDRAM Product Guide |
| 文件： | 总10页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
General Information
DDR SDRAM
DDR SDRAM Product Guide
December 2007
Memory Division
December 2007
General Information
DDR SDRAM
A. DDR SDRAM Component Ordering Information
1
2
3
4
5
6
7
8
9
10
11
K 4 H X X X X X X X - X X X X
SAMSUNG Memory
DRAM
Speed
Temperature & Power
Package Type
Revision
Product
Density & Refresh
Organization
Interface (VDD, VDDQ)
Bank
1. SAMSUNG Memory : K
8. Revision
M : 1st Gen.
J
: 11st Gen.
A : 2nd Gen.
B : 3rd Gen.
C : 4th Gen.
D : 5th Gen.
E : 6th Gen.
N : 14th Gen.
2. DRAM : 4
3. Product
F
: 7th Gen.
H : DDR SDRAM
G : 8th Gen.
H : 9th Gen.
4. Density & Refresh
28 : 128Mb, 4K/64ms
56 : 256Mb, 8K/64ms
51 : 512Mb, 8K/64ms
9. Package Type
T
: TSOP II
U : TSOP II (Lead-free)*1
V : sTSOP II (Lead-free)*1
Z
1G:
2G:
1Gb, 8K/64ms
2Gb, 8K/64ms
N : sTSOP II
G : FBGA
: FBGA (Lead-free)*1
L
: TSOP II (Lead-free & Halogen-free)*1
H : FBGA (Lead-free & Halogen-free)*1
5. Organization
: FBGA for 64Mb DDR (Lead-free & Halogen-free)*1
: sTSOP II (Lead-free & Halogen-free)*1
F
6
04 : x 4
06 : x 4 Stack
07 : x 8 Stack
08 : x 8
Note 1: All of Lead-free or Halogen-free product are in
compliance with RoHS
16 : x16
10. Temperature & Power
C : Commercial Temp.( 0°C ~ 70°C) & Normal Power
L : Commercial Temp.( 0°C ~ 70°C) & Low Power
I : Industrial Temp.( -40°C ~ 85°C) & Normal Power
P : Industrial Temp.( -40°C ~ 85°C) & Low Power
6. Bank
3 : 4 Banks
11. Speed
7. Interface ( VDD, VDDQ)
CC : DDR400 (200MHz @ CL=3, tRCD=3, tRP=3)
B3 : DDR333 (166MHz @ CL=2.5, tRCD=3, tRP=3)*1
A2 : DDR266 (133MHz @ CL=2 , tRCD=3, tRP=3)
B0 : DDR266 (133MHz @ CL=2.5, tRCD=3, tRP=3)
8 : SSTL-2 (2.5V, 2.5V)
Note 1: "B3" has compatibility with "A2" and "B0"
December 2007
General Information
DDR SDRAM
B. DDR SDRAM Component Product Guide
*1
*2
Package & Power
&
Density
Bank
Part Number
Org.
Interface Refresh
Power (V)
Package
Avail.
*3
Speed
LCCC/CB3
LLCC/LB3
66pinTSOPII
60ball FBGA
66pinTSOPII
60ball FBGA
60ball FBGA
60ball FBGA
66pinTSOPII
60ball FBGA
66pinTSOPII
66pinTSOPII
66pinTSOPII
66pinTSOPII
60ball FBGA
66pinTSOPII
60ball FBGA
66pinTSOPII
60ball FBGA
Now
CS
64Mb N-die
4Banks K4H641638N
K4H560438H
4M x 16
SSTL_2 4K/64m
2.5 ± 0.2V
FCCC/CB3
FLCC/LB3
UCA2/CB0
ULA2/LB0
64M x 4
ZCCC/CB3
ZLCC/LB3
UCCC/CB3
ULCC/LB3
*4
256Mb H-die
4Banks K4H560838H
K4H561638H
32M x 8 SSTL_2 8K/64m
Now
2.5 ± 0.2V
2.5 ± 0.2V
2.5 ± 0.2V
ZCCC/CB3
ZLCC/LB3
UCCC/CB3
ULCC/LB3
16M x 16
ZCCC/CB3
ZLCC/LB3
LCB3/CB0
LLB3/LB0
K4H560438J
4Banks K4H560838J
K4H561638J
64M x 4
CS
CS
CS
LCCC/CB3
LLCC/LB3
*4
256Mb J-die
32M x 8 SSTL_2 8K/64m
16M x 16
LCCC/CB3
LLCC/LB3
UCB0
ULB0
K4H510438D
4Banks K4H510838D
K4H511638D
128M x 4
ZCCC
ZLCC
UCCC/CB3
ULCC/LB3
*4
512Mb D-die
64M x 8 SSTL_2 8K/64m
Now
ZCCC/CB3
ZLCC/LB3
UCCC/CB3
ULCC/LB3
32M x 16
ZCCC/CB3
ZLCC/LB3
Note 2 :
Note 1 :
Note 3 :
U
V
Z
: TSOP II (Lead-free)
: sTSOP II (Lead-free)
: FBGA (Lead-free)
C
L
Commercial Temperature, Normal Power
Commercial Temperature, Low Power
133Mhz
166Mhz
200Mhz
CL = 2
DDR266(A2)
-
-
CL = 2.5 DDR266(B0) DDR333(B3)
CL = 3
-
- Commercial Temp. (0°C <Ta< 70°C)
L
H
F
6
: TSOP II (Lead-free & Halogen-free)
: FBGA (Lead-free & Halogen-free)
: FBGA for 64Mb DDR (Lead-free & Halogen-free)
: sTSOP II (Lead-free & Halogen-free)
-
-
DDR400(CC)
- "B3" has compatibility with "A2" and "B0"
Note 4 :
DDR400
DDR333/266
VDD/VDDQ 2.6V ± 0.1V 2.5V ± 0.2V
December 2007
General Information
DDR SDRAM
C. Industrial temp DDR SDRAM Component Product Guide
Package*1 & Power*2 & Speed*3
Density
Bank
Part Number
Org.
Interface Refresh
Power (V)
Package
Avail.
UICC/IB3/IB0
UPCC/PB3/PB0
66pinTSOPII
*4
256Mb H-die
4Banks K4H561638J
4Banks K4H561638J
16M x 16 SSTL_2 8K/64m
16M x 16 SSTL_2 8K/64m
Now
2.5 ± 0.2V
2.5 ± 0.2V
ZIB3/IB0
ZPB3/PB0
60ball FBGA
66pinTSOPII
66pinTSOPII
60ball FBGA
66pinTSOPII
60ball FBGA
LICC/IB3
LPCC/PB3
*4
*4
256Mb J-die
512Mb D-die
CS
UIB3/IB0
UPB3/PB0
K4H510838D
4Banks
64M x 8
ZIB3/IB0
ZPB3/PB0
SSTL_2 8K/64m
32M x 16
Now
2.5 ± 0.2V
UIB3/IB0
UPB3/PB0
K4H511638D
ZIB3/IB0
ZPB3/PB0
Note 2 :
Note 1 :
Note 3 :
: TSOP II (Lead-free)
: sTSOP II (Lead-free)
: FBGA (Lead-free)
U
V
Z
I
Industrial Temperature, Normal Power
Industrial Temperature, Low Power
133Mhz
166Mhz
200Mhz
P
CL = 2
DDR266(A2)
-
-
CL = 2.5 DDR266(B0) DDR333(B3)
CL = 3
- "B3" has compatibility with "A2" and "B0"
-
- Industrial Temp. (-40°C <Ta< 85°C)
L
H
F
6
: TSOP II (Lead-free & Halogen-free)
: FBGA (Lead-free & Halogen-free)
: FBGA for 64Mb DDR (Lead-free & Halogen-free)
: sTSOP II (Lead-free & Halogen-free)
-
-
DDR400(CC)
Note 4 :
DDR400
DDR333/266
VDD/VDDQ 2.6V ± 0.1V 2.5V ± 0.2V
December 2007
General Information
DDR SDRAM
D. DDR SDRAM Module Ordering Information
1
2
3
4
5
6
7
8
9
10
11
12
M X X X L X X X X X X X - X X X
Speed
Power
Memory Module
DIMM Configuration
PCB revision & Type
Package
Data bits
Feature
Component Revision
Composition Component
Depth
Refresh, # of Banks in Comp. & Interface
1. Memory Module : M
7. Composition Component
0
3
4
8
9
: x 4
: x 8
: x16
: x 4 Stack
: x 8 Stack
2. DIMM Configuration
3 : DIMM
4 : SODIMM
8. Component Revision
3. Data Bits
M : 1 s t G e n .
B : 3 r d G e n .
D : 5 t h G e n .
F : 7 t h G e n .
H : 9 t h G e n .
A : 2nd Gen.
C : 4th Gen.
E : 6th Gen.
G : 8th Gen
J : 11th Gen.
68 : x64 184pin Unbuffered DIMM
81 : x72 184pin ECC unbuffered DIMM
83 : x72 184pin Registered DIMM
12 : x72 184pin Low Profile Registered DIMM
70 : x64 200pin Unbuffered SODIMM
63 : x64 172pin Micro DIMM
9. Package
U : TSOP II*1 (Lead-Free)
V : sTSOP II*1 (Lead-Free)
Z
:
:
:
T
N
G
TSOP II (400mil)
sTSOP
FBGA
4. Feature
: FBGA*1 (Lead-Free)
(Note 1 : All of Lead-free product are in compliance with RoHS)
L : DDR SDRAM (2.5V VDD)
10. PCB Revision & Type
5. Depth
0
2
S
: Mother PCB
: 2nd Rev.
: Reduced layer PCB
1 : 1st Rev.
3 : 3rd Rev.
16 : 16M
32 : 32M
64 : 64M
28 : 128M
56 : 256M
51 : 512M
17 : 16M (for 128Mb/512Mb)
33 : 32M (for 128Mb/512Mb)
65 : 64M (for 128Mb/512Mb)
29 : 128M (for 128Mb/512Mb)
57 : 256M (for 512Mb)
11. Temp & Power
C
L
: Commercial Temp.( 0°C ~ 70°C) & Normal Power
: Commercial Temp.( 0°C ~ 70°C) & Low Power
6. Refresh, # of Banks in comp. & Interface
1
2
:
:
4K/ 64ms Ref., 4Banks & SSTL-2
8K/ 64ms Ref., 4Banks & SSTL-2
12. Speed
CC : DDR400 (200MHz @ CL=3, tRCD=3, tRP=3)
B3 : DDR333 (166MHz @ CL=2.5, tRCD=3, tRP=3)
A2 : DDR266 (133MHz @ CL=2 , tRCD=3, tRP=3)
B0 : DDR266 (133MHz @ CL=2.5, tRCD=3, tRP=3)
December 2007
General Information
DDR SDRAM
E. DDR SDRAM Module Product Guide
Den-
sity
Comp.
Version
Internal
Banks
External
Banks
PKG*1
Org.
Part Number
Speed
Composition
Voltage
Feature
Avail.
184Pin DDR Unbuffered DIMM
M368L3223HUS
M368L3223JUS
M368L6423HUN
M368L6423JUN
CCC/CB3
CCC/CB3
CCC/CB3
CCC/CB3
CCC/CB3
32Mx 8
32Mx 8
64Mx 8
64Mx 8
64Mx 8
*
*
*
*
*
8pcs
256Mb H-die
256Mb J-die
256Mb H-die
256Mb J-die
512Mb D-die
32Mx 64 256MB
64Mx 64 512MB
1
SS,1250mil
DS,1250mil
Now
Now
8pcs
2.5
16pcs
16pcs
8pcs
4
66pin
TSOP(II)
*3
± 0.2V
1
2
*2
SS,1250mil
DS,1250mil
Now
Now
M368L6523DUS
M368L2923DUN
*2
128Mx 64
1GB
CCC/CB3
64Mx 8
*
16pcs
512Mb D-die
184Pin DDR Low Profile Registered DIMM
M312L6420HUS
M312L6420JUS
CB0
CB0
64Mx 4
*
18pcs
256Mb H-die
66pin
TSOP(II)
DS,1200mil
Now
64Mx 4
*
18pcs
256Mb J-die
64Mx 72 512MB
1
60ball
FBGA
*2
CCC/CB3
CB0
64Mx 8
128Mx 4
64Mx 8
*
*
*
9pcs
512Mb D-die
512Mb D-die
512Mb D-die
SS,1125mil
DS,1200mill
DS,1125mil
Now
Now
Now
M312L6523DZ3
M312L2920DUS
2.5
4
*3
± 0.2V
66pin
TSOP(II)
*2
18pcs
18pcs
1
2
128Mx 72
1GB
60ball
FBGA
*2
CCC/CB3
M312L2923DZ3
200Pin DDR SODIMM
M470L3224HU0
M470L3224JU0
CB3
CB3
CB3
16Mx 16
16Mx 16
32Mx 16
*
*
*
8pcs
8pcs
8pcs
256Mb H-die
256Mb J-die
512Mb D-die
32Mx 64 256MB
64Mx 64 512MB
Now
66pin
TSOP(II)
2.5
4
2
DS,1250mi
*2
*3
Now
Now
M470L6524DU0
M470L2923DV0
± 0.2V
54pin
sTSOP(II)
*2
128Mx 64
1GB
CB3
64Mx 8
*
16pcs
512Mb D-die
Note 3 :
Note 1 : (All of DDR DIMMs can support Lead-free)
U : TSOP II (Lead-Free)
DDR400
2.6V ± 0.1V
DDR333/266
V : sTSOP II (Lead-Free)
Z : FBGA
(Lead-Free)
VDD/VDDQ
2.5V ± 0.2V
Note 2 : All of DDR components support both Leaded and Lead-free. And 256Mb H-die, J-
die and 512Mb D-die Lead-free is default PKG Type.
December 2007
General Information
DDR SDRAM
F. Package Dimension
Unit : mm
#66
#34
#1
#33
(1.50)
+0.075
- 0.035
0.125
22.22 ± 0.10
(10°)
0.10 MAX
[
(10°)
± 0.08
0.65TYP
[0.65 ± 0.08]
0.075 MAX
[
0.30
(0.71)
0.25TYP
NOTE
1. ( ) IS REFERENCE
2. [ ] IS ASS’Y OUT QUALITY
(0° ∼ 8°)
66Pin TSOP(II) Package Dimension
December 2007
General Information
DDR SDRAM
60Ball FBGA (For 64Mb)
Units : Millimeters
8.00 ± 0.10
A
#A1 MARK
0.80 x 8 = 6.40
0.80
8.0 0 ± 0.10
1.60
#A1
B
9
8
7
6
5
4
3
2
1
(Datum A)
(Datum B)
A
B
C
D
E
F
G
H
J
K
L
M
0.32 ± 0.05
1.10 ± 0.10
60 - ∅ 0.45 SOLDER BALL
(Post Reflow 0.50 ± 0.05)
M
A B
∅0.20
TOP VIEW
BOTTOM VIEW
60Ball FBGA (For 256Mb)
Units : Millimeters
8.00 ± 0.10
A
#A1 MARK
0.80 x 8 = 6.40
0.80
8.0 0 ± 0.10
1.60
#A1
B
9
8
7
6
5
4
3
2
1
(Datum A)
(Datum B)
A
B
C
D
E
F
G
H
J
K
L
M
ENCAPSULANT AREA
0.35 ± 0.05
1.10 ± 0.10
60 - ∅ 0.45 SOLDER BALL
(Post Reflow 0.50 ± 0.05)
M
A B
∅0.20
TOP VIEW
BOTTOM VIEW
December 2007
General Information
DDR SDRAM
60Ball FBGA (For 512Mb)
10.00 ± 0.10
A
0.80 x8 = 6.40
10.00 ± 0.10
#A1 MARK(option)
3.20
(Datum A)
(Datum B)
1.60
4
B
0.80
#A1
9
8
7
6
5
3 2 1
A
B
C
D
E
F
G
H
J
K
L
M
1.20 MAX
(0.90)
(0.90)
WINDOW MOLD AREA
(1.80)
4-CORNER MARK(option)
60-∅0.45 ± 0.05
0.20M
A B
Top view
Bottom view
December 2007
General Information
DDR SDRAM
For further information,
semiconductor@samsung.com
December 2007
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