S3C8249XX-TW [SAMSUNG]
Microcontroller, 8-Bit, MROM, SAM8 CPU, 10MHz, CMOS, PQFP80, TQFP-80;
| 型号： | S3C8249XX-TW |
| 厂家： | 
SAMSUNG |
| 描述： | Microcontroller, 8-Bit, MROM, SAM8 CPU, 10MHz, CMOS, PQFP80, TQFP-80 |
| 文件： | 总33页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Among the major CPU features are:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned
to specific interrupt levels.
S3C8248/C8245/P8245/C8247/C8249/P8249 MICROCONTROLLER
The S3C8248/C8245/P8245/C8247/C8249/P8249
single-chip CMOS microcontroller are fabricated
using the highly advanced CMOS process, based on
Samsung’s newest CPU architecture.
— Six programmable I/O ports, including five 8-bit
ports and one 5-bit port, for a total of 45 pins.
— Eight bit-programmable pins for external
interrupts.
The S3C8248, S3C8245, S3C8247, S3C8249 are a
microcontroller with a 8K-byte, 16K-byte, 24K-byte.
32K-byte mask-programmable ROM embedded
respectively.
— One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
— Two 8-bit timer/counter and two 16-bit
timer/counter with selectable operating modes.
The S3P8245 is a microcontroller with a 16K-byte
one-time-programmable ROM embedded.
The S3P8249 is a microcontroller with a 32K-byte
one-time-programmable ROM embedded.
— Watch timer for real time.
— 8-input A/D converter
— Serial I/O interface
The S3C8248/C8245/P8245/C8247/C8249/P8249
is versatile microcontroller for camera, LCD and
ADC application, etc. They are currently available in
80-pin TQFP and 80-pin QFP package
Using a proven modular design approach, Samsung
engineers have successfully developed the
S3C8248/C8245/P8245/C8247/C8249/P8249 by
integrating the following peripheral modules with the
powerful SAM8 core:
OTP
The S3P8245/P8249 are OTP (One Time Programmable) version of the S3C8245/C8249 microcontroller. The
S3P8245 microcontroller has an on-chip 16K-byte one-time-programmable EPROM instead of a masked ROM.
The S3P8249 microcontroller has an on-chip 32K-byte one-time-programmable EPROM instead of a masked
ROM. The S3P8245 is comparable to the S3P8245, both in function and in pin configuration.
The S3P8249 is comparable to the S3P8249, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
FEATURES
Memory
45 I/O Pins
45 configurable I/O pins
Basic Timer
•
•
•
•
•
ROM: 32K-byte (S3C8249/P8249)
ROM: 16K-byte (S3C8245/P8245)
RAM: 1056-Byte (S3C8249/P8249, S3C8247)
RAM: 544-Byte (S3C8245/P8245, S3C8248)
Data memory mapped I/O
•
•
•
Overflow signal makes a system reset.
Watchdog function
8-Bit Timer/Counter A
Oscillation Sources
•
•
•
Programmable 8-bit timer
Interval, capture, PWM mode
Match/capture, overflow interrupt
•
•
•
Crystal, ceramic, RC (main)
Crystal for subsystem clock
Main system clock frequency 1-10 MHz
(3 MHz at 1.8 V, 10 MHz at 2.7 V)
Subsystem clock frequency: 32.768 kHz
CPU clock divider (1/1, 1/2, 1/8, 1/16)
8-Bit Timer/Counter B
•
•
Programmable 8-bit timer
Carrier frequency generator
•
•
16-Bit Timer/Counter 0
Two Power-Down Modes
•
•
Programmable 16-bit timer
Match interrupt generates
•
•
Idle (only CPU clock stops)
Stop (System clock stops)
16-Bit Timer/Counter 1
Interrupts
•
•
6 level 8 vector 8 internal interrupt
2 level 8 vector 8 external interrupt
•
•
•
Programmable 16-bit timer
Interval, capture, PWM mode
Match/capture, overflow interrupt
Watch Timer
Voltage Detector
•
•
•
Real-time and interval time measurement
Clock generation for LCD
Four frequency outputs for buzzer sound
•
Programmable detection voltage
(2.2 V, 2.4 V, 3.0 V, 4.0 V)
En/Disable S/W selectable
•
Instruction Execution Times
LCD Controller/Driver
•
•
400 ns at 10 MHz (main)
122 us at 32.768 kHz (subsystem)
•
•
•
Maximum 16-digit LCD direct drive capability
Display modes: static, 1/2 duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
Operating Temperature Range
-40 °C to 85 °C
Operating Voltage Range
1.8 V to 5.5 V
Package Type
A/D Converter
•
•
•
Eight analog input channels
50 ms conversion speed at 1 MHz fADC clock
•
•
10-bit conversion resolution
8-Bit Serial I/O Interface
•
•
80-pin QFP
80-pin TQFP
•
•
•
•
8-bit transmit/receive mode
8-bit receive mode
LSB-first/MSB-first transmission selectable
Internal/external clock source
S3C8249’s ROM version device
S3C8247 (ROM 24K-byte)
S3C8245’s ROM version device
S3C8248 (ROM 8K-byte)
•
Voltage Booster
•
•
•
•
LCD display voltage supply
S/W control en/disable
3.0 V drive
1-2
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
BLOCK DIAGRAM
XIN XTIN
RESET
BUZ/P1.4
TAOUT/TAPWM/P3.1
TACLK/P3.2
XOUT XTOUT
8-Bit
Timer/
Counter A
Voltage
Detector
TACAP/P3.3
VVLDREF
8-Bit
Timer/
Counter B
OSC/
RESET
Basic
Timer
Watch
Timer
TBPWM/P3.0
CB
CA
Voltage
Booster
16-Bit
Timer/
Counter 0
VLC0-VLC2
COM0-COM3
T1CAP/P1.0
LCD
Driver
16-Bit
Timer/
Counter 1
I/O Port and Interrupt Control
T1CLK/P1.1
T1OUT/T1PWM/P1.2
SEG0-SEG15
SEG16-SEG31
P0.0-P0.7/
INT0-INT7
I/O Port 0
I/O Port 1
P1.0-P1.7
SAM88 RC CPU
SI/P1.7
Serial I/O
Port
SO/P1.5
SCK/P1.6
AVREF
AVSS
A/D
Converter
I/O Port 4
I/O Port 5
P4.0-P4.7
P5.0-P5.7
P2.0-P2.7/
ADC0-ADC7
544/1056 Byte
Register File
16/32-Kbyte
ROM
I/O Port 2
I/O Port 3
P3.0-P3.4
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
SEG26/P5.2
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
VDD
9
SEG1
SEG0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
S3C8248/C8245
/C8247/C8249
COM3
COM2
COM1
COM0
VLC2
VLC1
VLC0
CA
CB
VSS
XOUT
XIN
TEST
XTIN
XTOUT
RESET
(80-QFP-1420C)
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
AVSS
AVREF
P2.7/ADC7/VVLDREF
P2.6/ADC6
P2.5/ADC5
Figure 1-2. S3C8248/C8245/C8247/C8249 Pin Assignments (80-QFP)
1-4
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1
2
3
4
5
6
7
8
SEG26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
S3C8248/C8245
/C8247/C8249
9
10
11
12
13
14
15
16
17
18
19
20
P3.3/TACAP/SDAT
P3.4/SCLK
VLC2
VLC1
VLC0
V
DD
SS
OUT
IN
(80-TQFP-1212)
V
X
CA
CB
AVSS
AVREF
P2.7/ADC7/VVLDREF
P2.6/ADC6
P2.5/ADC5
X
TEST
XTIN
XTOUT
RESET
P0.0/INT0
Figure 1-3. S3C8248/C8245/C8247/C8249 Pin Assignments (80-TQFP)
1-5
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
PIN DESCRIPTIONS
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Share
Pins
Numbers (note)
P0.0–P0.7
I/O
I/O port with bit programmable pins;
Schmitt trigger input or output mode
selected by software; software assignable
pull-up. P0.0–P0.7 can be used as inputs
for external interrupts INT0–INT7
D–4
20–27
INT0–INT7
(with noise filter and interrupt control).
P1.0–1.7
I/O
I/O port with bit programmable pins; Input
or output mode selected by software;
Open-drain output mode can be selected
by software; software assignable pull-up.
Alternately P1.0–P1.7 can be used as SI,
SO, SCK, BUZ, T1CAP, T1CLK, T1OUT,
T1PWM
E–2
28-35
SI, SO, SCK,
BUZ, T1CAP
T1CLK
T1OUT
T1PWM
P2.0–P2.7
P3.0–P3.4
I/O
I/O
I/O port with bit programmable pins;
normal input and AD input or output
mode selected by software; software
assignable pull-up.
F–10
F–18
36–42,
43
ADC0–ADC6
VVLDREF
(ADC7)
I/O port with bit programmable pins. Input
or push-pull output with software
assignable pull-up. Alternately P3.0–P3.3
can be used as TACAP, TACLK, TAOUT,
TAPWM, TBPWM
D–2
7–11
TACAP
TACLK
TAOUT
TAPWM
TBPWM
P4.0–P4.7
P5.0–P5.7
I/O
I/O
I/O port with bit programmable pins.
Push-pull or open drain output and input
with software assignable pull-up.
P4.0–P4.7 can alternately be used as
outputs for LCD SEG
H–14
H–14
71–78
79–6
SEG16–SEG23
Have the same characteristic as port 4
SEG24–SEG31
1-6
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions (Continued)
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Share
Pins
Numbers (note)
ADC0–ADC6
ADC7
I
A/D converter analog input channels
F–10
F–18
36–42
43
P2.0–P2.6
P2.7
AVREF
–
–
A/D converter reference voltage
A/D converter ground
–
–
44
45
–
–
AVSS
INT0–INT7
RESET
I
I
External interrupt input pins
D–4
B
20–27
19
P0.0–P0.7
–
System reset pin
(pull-up resistor: 250 kW)
TEST
I
0 V: Normal MCU operating
5 V: Test mode
–
16
–
12 V: for OTP writing
SDAT, SCLK
VDD, VSS
O
–
Serial OTP interface pins; serial data
and clock
D–2
–
10, 11
12, 13
P3.3, P3.4
–
Power input pins for CPU operation
(internal) and Power input for OTP
Writing
XOUT, XIN
–
Main oscillator pins
–
14, 15
–
SCK, SO, SI
VVLDREF
I/O
I
Serial I/O interface clock signal
E–2
33–35
43
P1.5–P1.7
P2.7
Voltage detector reference voltage
input
F–18
TACAP
I
Timer A Capture input
D–2
D–2
D–2
D–2
E–2
E–2
E–2
H
10
9
P3.3
P3.2
P3.1
P3.0
P1.0
P1.1
P1.2
–
TACLK
I
Timer A External clock input
Timer A output and PWM output
Timer B PWM output
TAOUT/TAPWM
TBPWM
O
O
I
8
7
T1CAP
Timer 1 Capture input
28
T1CLK
I
Timer 1 External clock input
Timer 1 output and PWM output
LCD common signal output
LCD segment output
29
T1OUT/T1PWM
COM0–COM3
SEG0–SEG15
SEG16–SEG23
SEG24–SEG31
VLC0–VLC2
O
O
O
O
O
O
30
51–54
55–70
71–78
79–6
48–50
H
–
LCD segment output
H–14
H–14
–
P4.0–P4.7
P5.0–P5.7
–
LCD Segment output
LCD power supply
BUZ
O
0.5, 1, 2 or 4 kHz frequency output for
buzzer sound with 4.19 MHz main
system clock or 32768 Hz subsystem
clock
E–2
32
P1.4
CA, CB
–
Capacitor terminal for voltage booster
–
46–47
–
1-7
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
PIN CIRCUITS
VDD
VDD
Pull-up
Enable
P-Channel
I/O
Data
Circuit
Type C
Output
Disable
In
Figure 1-6. Pin Circuit Type D-2 (P3)
Figure 1-4. Pin Circuit Type B (RESET)
VDD
V
DD
VDD
Pull-up
Enable
I/O
Data
P-Channel
Out
Pin Circuit
Type C
Data
Output
Disable
N-Channel
Output
Disable
Noise
Filter
Ext.INT
Input
Normal
Figure 1-7. Pin Circuit Type D-4 (P0)
Figure 1-5. Pin Circuit Type C
1-8
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
VDD
VDD
Open drain
Enable
VDD
Pull-up
Resistor
Pull-up
Enable
P-CH
Data
Output
Disable
Circuit
Type C
Data
I/O
I/O
N-CH
ADC & VLD
Enable
Output
Disable
Data
VLDREF
To ADC
Schmitt Trigger
Figure 1-8. Pin Circuit Type E-2 (P1)
Figure 1-10. Pin Circuit Type F-18 (P2.7/VLDREF
)
VDD
VLC2
VLC1
Pull-up
Enable
Data
Circuit
Output
Disable
Type C
SEG/
COM
Out
I/O
ADCEN
Data
VLC0
To ADC
Figure 1-9. Pin Circuit Type F-10 (P2.0–P2.6)
Figure 1-11. Pin Circuit Type H (SEG/COM)
1-9
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
VLC2
VLC1
SEG
Output
Disable
VLC0
Figure 1-12. Pin Circuit Type H-4
VDD
VDD
Open Drain EN
Data
Pull-up
Enable
LCD Out EN
SEG
Circuit
Type H-4
Output
Disable
Figure 1-13. Pin Circuit Type H-14 (P4, P5)
1-10
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19 ELECTRICAL DATA
OVERVIEW
In this chapter, S3C8248/C8245/C8247/C8249 electrical characteristics are presented in tables and graphs.
The information is arranged in the following order:
— Absolute maximum ratings
— Input/output capacitance
— D.C. electrical characteristics
— A.C. electrical characteristics
— Oscillation characteristics
— Oscillation stabilization time
— Data retention supply voltage in stop mode
— Serial I/O timing characteristics
— A/D converter electrical characteristics
19-1
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
Table 19-1. Absolute Maximum Ratings
°
(TA= 25 C)
Parameter
Symbol
Conditions
Rating
– 0.3 to +6.5
Unit
VDD
Supply voltage
V
VI
– 0.3 to VDD + 0.3
Input voltage
VO
IOH
– 0.3 to VDD + 0.3
– 18
Output voltage
Output current high
One I/O pin active
mA
All I/O pins active
One I/O pin active
– 60
+ 30
IOL
Output current low
Total pin current for port
+ 100
°
C
TA
Operating temperature
Storage temperature
– 40 to + 85
TSTG
– 65 to + 150
Table 19-2. D.C. Electrical Characteristics
(TA = -40 C to + 85 C, VDD = 1.8 V to 5.5 V)
°
°
Parameter
Symbol
Conditions
CPU = 10 MHz
fCPU
Min
Typ
Max
Unit
VDD
f
Operating voltage
2.7
–
5.5
V
1.8
0.8 VDD
VDD-0.1
–
–
–
–
–
5.5
= 3 MHz
VIH1
VIH2
VIL1
VIL2
All input pins except VIH2
XIN XT
VDD
Input high voltage
Input low voltage
,
IN
All input pins except VIL2
XIN XT
0.2 VDD
0.1
,
IN
19-2
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
Table 19-2. D.C. Electrical Characteristics (Continued)
(TA = -40 C to + 85 C, VDD = 1.8 V to 5.5 V)
°
°
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VOH
VDD = 5 V; IOH = -1 mA
All output pins
VDD–1.0
Output high voltage
–
–
0.4
3
V
VOL
VDD = 5 V; IOL = 2 mA
All output pins
Output low voltage
–
–
–
–
ILIH1
VIN = VDD
Input high leakage
current
uA
All input pins except I
LIH2
ILIH2
ILIL1
VIN = VDD, XIN XT
20
-3
,
IN
VIN = 0 V
All input pins except I
Input low leakage
current
–
–
LIL2
ILIL2
VIN = 0 V, XIN XT ,
-20
,
IN
RESET
ILOH
ILOL
VOUT = VDD
Output high
leakage current
–
–
–
–
3
-3
All I/O pins and output pins
VOUT = 0 V
Output low leakage
current
All I/O pins and output pins
°
Rosc1
Oscillator feed
back resistors
800
1000
1200
kW
VDD = 5.0 V T = 25 C
A
XIN = VDD, XOUT = 0 V
RL1
RL2
Pull-up resistor
25
110
0.9
50
210
1.0
100
310
1.1
VIN = 0 V; VDD = 5 V ±10 %
°
Port 0,1,2,3,4,5 TA = 25 C
VIN = 0 V; VDD = 5 V ±10%
°
TA=25 C, RESET only
VLC0 out voltage
VLC0
V
TA = 25 °C, (1/3 bias mode)
TA = 25 °C, (1/2 bias mode)
(Booster run mode)
1.4
1.5
–
1.7
VLC1 out voltage
VLC1
2VLC0 - 0.1
2VLC0
0.1
+
+
TA = 25 °C (1/2 and 1/3
(Booster run mode)
bias mode)
VLC2 out voltage
VLC2
VDC
3VLC0 - 0.1
–
3VLC0
0.1
–
TA = 25 °C (1/3 bias mode)
(Booster run mode)
VDD = VLC2 = 3 V
(VLCD-COMi)
COM output
voltage deviation
mV
± 60
± 120
IO = ± 15 mA (i = 0-3)
VDs
VDD = VLC2 = 3 V
(VLCD-SEGi)
SEG output
voltage deviation
–
± 60
± 120
IO = ± 15 mA (i = 0-31)
19-3
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
Table 19-2. D.C. Electrical Characteristics (Concluded)
°
°
(T = -40 C to + 85 C, VDD = 1.8 V to 5.5 V)
A
Parameter
Symbol
Conditions
VDD = 5 V ± 10 %
Min
Typ
Max
Unit
Supply current (1)
IDD1
(2)
–
12
25
mA
10 MHz crystal oscillator
3 MHz crystal oscillator
VDD = 3 V ± 10 %
4
3
10
8
10 MHz crystal oscillator
3 MHz crystal oscillator
Idle mode: VDD = 5 V ± 10 %
10 MHz crystal oscillator
1
3
5
IDD2
–
10
3 MHz crystal oscillator
Idle mode: VDD = 3 V± 10 %
10 MHz crystal oscillator
1.5
1.2
4
3
3 MHz crystal oscillator
0.5
20
1.5
40
IDD3
IDD4
IDD5
Sub operating: main-osc stop
VDD = 3 V ± 10 %
–
–
–
uA
32768 Hz crystal oscillator
Sub idle mode: main-osc stop
VDD = 3 V ± 10 %
7
14
32768 Hz crystal oscillator
Main stop mode : sub-osc
stop VDD = 5 V ± 10 %
1
3
2
VDD = 3 V ± 10 %
0.5
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors or external output current loads.
2.
I
and I
include a power consumption of subsystem oscillator.
DD1
DD2
DD4
3.
I
and I
are the current when the main system clock oscillation stop and the subsystem clock is used.
DD3
And does not include the LCD and Voltage booster and voltage level detector
I is the current when the main and subsystem clock oscillation stop.
DD5
4.
5. Voltage booster’s operating voltage range is 2.0 V to 5.5 V. The range of 1.8 V to 2.0 V could be referenced
in page 17-4.
19-4
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
In case of S3C8248/C8245, the characteristic of VOH and VOL is differ with the characteristic of S3C8247/C8249
like as following. Other characteristics are same each other.
Table 19-3. D.C Electrical Characteristics of S3C8248/C8245
°
°
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VOH1
VDD = 5 V; IOH = -1 mA
VDD-1.0
Output high voltage
–
–
V
All output pins except VOH2
VOH2
VOL1
VDD = 5 V; IOH = -6 mA
VDD-0.7
–
Port 3.0 only in S3C8248/C8245
VDD = 5 V; IOL = 2 mA
All output pins except VOL2
Output low voltage
–
0.4
0.7
VOL2
VDD = 5 V; IOH = 12 mA
Port 3.0 only in S3C8248/C8245
19-5
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
Table 19-4. A.C. Electrical Characteristics
°
°
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
P0.0–P0.7, VDD = 5 V
Interrupt input
high, low width
(P0.0–P0.7)
tINTH,
tINTL
200
–
ns
VDD = 5 V
RESET input low
width
tRSL
1
–
–
us
NOTE: User must keep more large value then min value.
tTIL
tTIH
0.8 VDD
0.2 VDD
0.2 VDD
Figure 19-1. Input Timing for External Interrupts (Ports 0)
t
RSL
RESET
0.2 V
DD
Figure 19-2. Input Timing for RESET
19-6
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
Table 19-5. Input/Output Capacitance
°
°
(TA = -40 C to +85 C, VDD = 0 V )
Parameter
Input
capacitance
Symbol
Conditions
Min
Typ
Max
Unit
CIN
f = 1 MHz; unmeasured pins
are returned to VSS
–
–
10
pF
COUT
CIO
Output
capacitance
I/O capacitance
Table 19-6. Data Retention Supply Voltage in Stop Mode
°
°
(TA = -40 C to + 85 C)
Parameter
Symbol
VDDDR
Conditions
Min
Typ
–
Max
Unit
Data retention
supply voltage
2
5.5
V
IDDDR
VDDDR = 2 V
Data retention
supply current
–
–
3
uA
RESET
Occurs
Oscillation
Stabilization
Time
Stop Mode
Normal
Operating Mode
Data Retention Mode
V
DD
V
DDDR
Execution of
STOP Instrction
RESET
0.2 VDD
t
WAIT
NOTE:
tWAIT is the same as 4096 x 16 x 1/fxx
Figure 19-3. Stop Mode Release Timing Initiated by RESET
19-7
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
Oscillation
Stabilization Time
Idle Mode
Stop Mode
Data Retention Mode
VDD
VDDDR
Normal
Execution of
STOP Instruction
Operating Mode
Interrupt
0.2 VDD
t
WAIT
NOTE:
tWAIT is the same as 4096 x 16 x BT clock
Figure 19-4. Stop Mode (Main) Release Timing Initiated by Interrupts
Oscillation
Stabilization Time
Idle Mode
Stop Mode
Data Retention Mode
VDD
VDDDR
Normal
Execution of
STOP Instruction
Operating Mode
Interrupt
0.2 VDD
tWAIT
NOTE:
When the case of select the fxx/128 for basic timer input
clock before enter the stop mode.
tWAIT = 128 x 16 x (1/32768) = 62.5 ms
Figure 19-5. Stop Mode (Sub) Release Timing Initiated by Interrupts
19-8
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
Table 19-7. A/D Converter Electrical Characteristics
= 1.8 V to 5.5 V, VSS = 0 V)
(T = - 40 °C to +85 °C, V
A
DD
Parameter
Resolution
Symbol
Conditions
Min
–
Typ
10
–
Max
Unit
bit
–
VDD = 5 V
Total accuracy
–
LSB
±3
AVREF = 5 V
AVSS = 0 V
Integral Linearity
Error
ILE
–
–
±2
±1
Differential Linearity
Error
DLE
Offset Error of Top
EOT
EOB
±1
±3
±2
Offset Error of
Bottom
±0.5
Conversion time (1)
tCON
VIAN
RAN
–
–
–
–
AVSS
2
40
–
–
AVREF
–
fxx
V
Analog input voltage
Analog input
impedance
1000
Mohm
AVREF
VDD
Analog reference
voltage
–
2.5
–
V
AVSS
IADIN
IADC
VSS
–
VSS + 0.3
Analog ground
Analog input current
Analog block
–
–
–
1
AVREF = VDD = 5 V
AVREF = VDD = 5 V
10
3
uA
–
mA
(2)
current
AVREF = VDD = 3 V
0.5
1.5
AVREF = VDD = 5 V
100
500
nA
When power down mode
NOTES:
1. 'Conversion time' is the time required from the moment a conversion operation starts until it ends.
2. is an operating current during A/D conversion.
I
ADC
19-9
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
Table 19-8. Synchronous SIO Electrical Characteristics
°
°
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V, VSS = 0 V, fxx = 10 MHz oscillator)
Parameter
SCK Cycle time
Symbol
Conditions
Min
Typ
Max
Unit
tCYC
–
200
–
–
ns
tSCKH
tSCKL
tOD
Serial Clock High Width
Serial Clock Low Width
–
–
–
60
60
–
–
–
–
–
–
Serial Output data delay
time
50
tID
tIH
Serial Input data setup
time
–
–
40
–
–
–
–
Serial Input data Hold
time
100
t
CYC
t
SCKL
tSCKH
SCK
0.8 VDD
0.2 VDD
tID
tIH
0.8 VDD
0.2 VDD
SI
Input Data
t
OD
SO
Output Data
Figure 19-6. Serial Data Transfer Timing
19-10
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
Table 19-9. Main Oscillator Frequency (fOSC1
)
°
°
(T = -40 C to +85 C, V
= 1.8 V to 5.5 V)
DD
A
Oscillator
Crystal
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Crystal oscillation frequency
1
–
10
MHz
XIN
XOUT
C1
C2
Ceramic
External clock
RC
Ceramic oscillation
frequency
1
1
–
–
2
10
10
MHz
MHz
MHz
X
IN
XOUT
C1
C2
XIN input frequency
X
IN
XOUT
r = 35 kW, VDD = 5 V
XIN
XOUT
R
Table 19-10. Main Oscillator Clock Stabilization Time (tST1
)
°
°
(TA = -40 C to +85 C, VDD = 4.5 V to 5.5 V)
Oscillator
Crystal
Test Condition
Min
Typ
Max
Unit
VDD = 4.5 V to 5.5 V
–
–
10
ms
Stabilization occurs when VDD is equal to the minimum
oscillator voltage range.
Ceramic
–
–
4
ms
XIN input high and low level width (tXH, tXL)
External clock
50
–
–
ns
NOTE: Oscillation stabilization time (t
) is the time required for the CPU clock to return to its normal oscillation
ST1
frequency after a power-on occurs, or when Stop mode is ended by a RESET signal.
The RESET should therefore be held at low level until the t time has elapsed
ST1
19-11
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
1 / f
OSC1
t
t
XH
XL
V
V
– 0.5
X
DD
IN
0.4 V
Figure 19-7. Clock Timing Measurement at XIN
Table 19-11. Sub Oscillator Frequency (fOSC2
)
°
°
(TA = -40 C + 85 C, VDD = 1.8 V to 5.5 V)
Oscillator
Clock Circuit
Test Condition
Min
Typ
32.768
Max
Unit
Crystal
Crystal oscillation frequency
32
35
kHz
XTIN XTOUT
C1 = 22 pF,
R = 39 KW
C2 = 33 pF
R
XTIN and XTOUT are connected
C1
C2
with R and C by soldering.
Table 19-12. Sub Oscillator(crystal) Stabilization Time (tST2
)
°
(TA = 25 C)
Oscillator
Test Condition
VDD = 4.5 V to 5.5 V
Min
Typ
Max
Unit
normal mode
–
250
500
ms
VDD = 1.8 V to 3.0 V
VDD = 4.5 V to 5.5 V
VDD = 1.8 V to 3.0 V
–
–
–
–
–
2
2
s
s
strong mode
250
500
ms
NOTE: Oscillation stabilization time (t
) is the time required for the oscillator to it’s normal oscillation when stop mode is
ST2
released by interrupts. The value Typ and Max are measured by buzzer output signal after stop release.
For example in voltage range of 4.5 V to 5.5 V of normal mode, we can see the buzzer output signal within 400 ms
at our test condition.
19-12
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
fCPU
B
10 MHz
8 MHZ
A
3 MHZ
1 MHz
1
2
3
4
5
6
7
1.8
2.7
Supply Voltage (V)
5.5
Minimum instruction clock = 1/4 x oscillator frequency
Figure 19-8. Operating Voltage Range
19-13
S3C8248/C8245/P8245/C8247/C8249/P8249
MECHANICAL DATA
20 MECHANICAL DATA
OVERVIEW
The S3C8248/C8245/C8247/C8249 microcontroller is currently available in 80-pin-QFP/TQFP package.
23.90 ± 0.30
0-8
20.00 ± 0.20
+ 0.10
0.15 - 0.05
0.10 MAX
80-QFP-1420C
#80
#1
0.35 + 0.10
0.05 MIN
0.80
0.15 MAX
(0.80)
2.65 ± 0.10
3.00 MAX
0.80 ± 0.20
NOTE
:
Dimensions are in millimeters.
Figure 20-1. Package Dimensions (80-QFP-1420C)
20-1
MECHANICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
14.00 BSC
12.00 BSC
0-7
0.09-0.20
80-TQFP-1212
#80
#1
0.17-0.27
0.08 MAX
0.05-0.15
(1.25)
0.50
M
1.00
± 0.05
1.20 MAX
NOTE: Dimensions are in millimeters.
Figure 20-2. Package Dimensions (80-TQFP-1212)
20-2
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
21 S3P8245/P8249 OTP
OVERVIEW
The S3P8245/P8249 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the
S3C8248/C8245/C8247/C8249 microcontroller. It has an on-chip OTP ROM instead of a masked ROM. The
EPROM is accessed by serial data format.
The S3P8245/P8249 is fully compatible with the S3C8248/C8245/C8247/C8249, both in function and in pin
configuration. Because of its simple programming requirements, the S3P8245/P8249 is ideal as an evaluation
chip for the S3C8248/C8245/C8247/C8249.
21-1
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
SEF26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
1
2
3
4
5
6
7
8
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
VDD
9
SEG1
SEG0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
S3P8245/P8249
COM3
COM2
COM1
COM0
VLC2
VLC1
VLC0
CA
CB
80-QFP
VSS
XOUT
XIN
VPP/TEST
XTIN
(Top View)
XTOUT
RESET
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
AVSS
AVREF
P2.7/ADC7/VVLDREF
P2.6/ADC6
P2.5/ADC5
Figure 21-1. Pin Assignments (80-QFP)
21-2
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
Table 21-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
Pin Name
P2.0
During Programming
I/O
Pin Name
SDAT
Pin No.
Function
10
I/O
Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
11
16
I
I
P2.1
VPP
SCLK
TEST
Serial clock pin. Input only pin.
Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing mode).
When 12.5 V is applied, OTP is in writing mode
and when 5 V is applied, OTP is in reading
mode. (Option)
19
I
RESET
RESET
Chip Initialization
VDD/VSS
VDD/VSS
12/13
–
Logic power supply pin. VDD should be tied to
+5 V during programming.
Table 21-2. Comparison of S3P8245/P8249 and S3C8248/C8245/C8247/C8249 Features
Characteristic
Program Memory
Operating Voltage (VDD
S3P8245/P8249
16K/32K-byte EPROM
S3C8248/C8245/C8247/C8249
16K/32K-byte mask ROM
1.8 V to 5.5 V
)
1.8 V to 5.5 V
OTP Programming Mode
VDD = 5 V, VPP (TEST) = 12.5 V
Pin Configuration
80-QFP/80-TQFP
80-QFP/80-TQFP
EPROM Programmability
User Program 1 time
Programmed at the factory
21-3
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (TEST) pin of the S3P8245/P8249, the EPROM programming mode is
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins
listed in Table 21-3 below.
Table 21-3. Operating Mode Selection Criteria
VDD
VPP (TEST)
Address(A15–A0)
R/W
Mode
EPROM read
REG/MEM
5 V
5 V
0
0
0
1
0000H
0000H
0000H
0E3FH
1
0
1
0
12.5 V
12.5 V
12.5 V
EPROM program
EPROM verify
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
Table 21-4. D.C Electrical Characteristics
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V)
°
°
Parameter
Symbol
Conditions
fCPU = 10 MHz
All input pins except VIH2, 3
Min
Typ
Max
Unit
VDD
2.7
–
5.5
V
Operating voltage
1.8
–
–
–
–
–
5.5
VDD
VIH1
VIH2
VIH3
VIL1
VIL2
0.8 VDD
0.8 VDD
VDD- 0.1
–
Input high
voltage
Port 4,5
VLCD2 ³ VDD
XIN, XTIN
VDD
All input pins except VIL2
XIN, XTIN
VDD
0.2 VDD
0.1
Input low voltage
VDD = 5 V; IOH = -1 mA
All output pins
VOH
VOL
VDD = 5 V; IOL = 2 mA
All output pins
VDD -1.0
–
–
–
–
Output high voltage
Output low voltage
0.4
21-4
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
Table 21-4. D.C. Electrical Characteristics (Continued)
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V)
°
°
Parameter
Symbol
Conditions
VIN = VDD
Min
Typ
Max
Unit
ILIH1
–
–
3
20
-3
Input high leakage
current
All input pins except I
LIH2
LIL2
ILIH2
ILIL1
ILIL2
VIN = VDD
XIN XT
,
IN
VIN = 0 V
All input pins except I
–
–
Input low leakage
current
VIN = 0 V
-20
uA
XIN XT RESET
,
,
IN
ILOH
ILOL
VOUT = VDD
–
–
–
–
3
-3
Output high
leakage current
All I/O pins and Output pins
VOUT = 0 V
Output low leakage
current
All I/O pins and Output pins
°
Rosc1
800
1000
1200
Oscillator feed
back resistors
kW
VDD = 5.0 V T = 25 C
A
XIN = VDD, XOUT = 0 V
RL1
RL2
25
110
0.9
50
210
1.0
100
310
1.1
Pull-up resistor
VIN = 0 V; VDD = 5 V ±10 %
°
Port 0,1,2,3,4,5 TA = 25 C
V
IN
= 0 V; V
= 5 V ±10%
DD
°
TA=25 C, RESET only
VLC0 out voltage
VLC0
V
TA = 25 °C (1/3 bias mode)
(Booster run mode)
1.4
1.5
–
1.7
TA = 25 °C (1/2 bias mode)
TA = 25 °C
VLC1 out voltage
(Booster run mode)
VLC1
2VLC0 - 0.1
2VLC0
0.1
+
+
VLC2 out voltage
VLC2
VDC
3VLC0 - 0.1
–
–
3VLC0
0.1
TA = 25 °C
(Booster run mode)
VDD = VLC2 = 3 V
(VLC-COMi)
mV
COM output
voltage deviation
± 60
± 120
IO = ± 15 mA (1 = 0–3)
VDs
VDD = VLC2 = 3 V
(VLC-COMi)
–
SEG output
voltage deviation
± 60
± 120
IO = ± 15 mA (1 = 0–3)
21-5
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
Table 21-4. D.C. Electrical Characteristics (Concluded)
°
°
(T = -40 C to + 85 C, VDD = 1.8 V to 5.5 V)
A
Parameter
Symbol
Conditions
VDD = 5 V ± 10 %
Min
Typ
Max
Unit
Supply current (1)
IDD1
(2)
–
12
25
mA
10 MHz crystal oscillator
4
3
10
8
3 MHz crystal oscillator
VDD = 3 V ± 10 %
10 MHz crystal oscillator
1
3
5
3 MHz crystal oscillator
Idle mode: VDD = 5 V ± 10 %
10 MHz crystal oscillator
IDD2
10
1.5
1.2
4
3
3 MHz crystal oscillator
Idle mode: VDD = 3 V± 10 %
10 MHz crystal oscillator
0.5
20
1.5
40
3 MHz crystal oscillator
IDD3
IDD4
IDD5
–
–
–
uA
Sub operating: main-osc stop
VDD = 3 V ± 10 %
32768 Hz crystal oscillator
7
14
Sub idle mode: main-osc stop
VDD = 3 V ± 10 %
32768 Hz crystal oscillator
1
3
2
Main stop mode : sub-osc
stop VDD = 5 V ± 10 %
VDD = 3 V ± 10 %
0.5
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors or external output current loads.
2.
3.
4.
I
and I
include a power consumption of subsystem oscillator.
DD
DD2
I
and I
are the current when the main system clock oscillation stop and the subsystem clock is used.
DD4
DD3
I
is the current when the main and subsystem clock oscillation stop.
DD5
21-6
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
case of S3P8245, the characteristic of VOH and VOL is differ with the characteristic of S3P8249 like as bellow.
Other characteristics are same each other.
Table 21-5. D.C Electrical Characteristics of S3C8248/C8245
°
°
(TA = -40 C to +85 C, VDD = 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VOH1
VDD = 5 V; IOH = -1 mA
VDD-1.0
–
–
V
Output high voltage
All output pins except VOH2
VOH2
VOL1
VDD = 5 V; IOH = -6 mA
Port 3.0 only in S3P8245
VDD-0.7
–
VDD = 5 V; IOL = 2 Ma
All output pins except VOL2
–
0.4
0.7
Output low voltage
VOL2
VDD = 5 V; IOH = 12 mA
Port 3.0 only in S3P8245
21-7
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
fCPU
B
10 MHz
8 MHZ
A
3 MHZ
1 MHz
1
2
3
4
5
6
7
1.8
2.7
Supply Voltage (V)
5.5
Minimum instruction clock = 1/4 x oscillator frequency
Figure 21-2. Operating Voltage Range
21-8
相关型号：
©2020 ICPDF网 联系我们和版权申明