S3P80F9 [SAMSUNG]
S3C8-SERIES MICROCONTROLLERS; S3C8系列单片机
| 型号： | S3P80F9 |
| 厂家： | 
SAMSUNG |
| 描述： | S3C8-SERIES MICROCONTROLLERS |
| 文件： | 总34页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.
S3C80F7/C80F9/C80G7/C80G9 Microcontroller
The S3C80F7/C80F9/C80G7/C80G9 single-chip CMOS microcontroller is fabricated using a highly advanced
CMOS process and is based on Samsung's newest CPU architecture.
The S3C80F9/C80G9 is the microcontroller which has 32-Kbyte mask-programmable ROM and S3C80F7/C80G7
is the microcontroller which has 24-Kbyte mask-programmable ROM.
The S3P80F9/P80G9 is the microcontroller which has 32-Kbyte one-time-programmable EPROM and
S3P80F7/P80G7 is the microcontroller which has 24-Kbyte one-time-programmable EPROM.
Using a proven modular design approach, Samsung engineers developed S3C80F7/C80F9/C80G7/C80G9 by
integrating the following peripheral modules with the powerful SAM87 RC core:
— Internal LVD circuit and 16 bit-programmable pins for external interrupts.
— One 8-bit basic timer for oscillation stabilization and watchdog function (system reset).
— One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes.
— One 8-bit counter with auto-reload function and one-shot or repeat control.
The S3C80F7/C80F9/C80G7/C80G9 is a versatile general-purpose microcontroller which is especially suitable
for use as remote transmitter controller. It is currently available in a 32-pin SOP, 42-pin SDIP and 44-pin QFP
package.
1-1
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
FEATURES
CPU
Carrier Frequency Generator
·
SAM87RC CPU core
·
One 8-bit counter with auto-reload function and
one-shot or repeat control (Counter A)
Memory
Back-up mode
·
·
·
32-Kbyte internal ROM (S3C80F9/C80G9)
: 0000H–7FFFH
·
·
When VDD is lower than VLVD, the chip enters
Back-up mode to block oscillation and reduce
the current consumption.
24-Kbyte internal ROM (S3C80F7/C80G7)
: 0000H–5FFFH
In S3C80G7/C80G9, this function is disabled
when operating state is “STOP mode”.
Data memory: 272-byte RAM (318 register)
When RESET pin is lower than Input Low
Instruction Set
Voltage (VIL), the chip enters Back-up mode to
·
·
78 instructions
block oscillation and reduce the current
consumption.
IDLE and STOP instructions added for power-
down modes
Low Voltage Detect Circuit
Instruction Execution Time
500 ns at 8-MHz fOSC (minimum)
·
·
Low voltage detect to get into Back-up mode.
·
Low level detect voltage
- S3C80F7/C80F9: 2.20 V (Typ) ± 200mV
- S3C80G7/C80G9: 1.90 V (Typ) ± 200mV
Interrupts
·
22 interrupt sources with 16 vector and 7 level.
Operating Temperature Range
I/O Ports
°
°
·
–40 C to + 85 C
·
·
·
Three 8-bit I/O ports (P0–P2), one 8-bit output
port(P4) and 6-bit port (P3) for a total of 38 bit-
programmable pins.(44-QFP)
Operating Voltage Range
·
·
1.7V to 5.0V at 4 MHz fOSC (S3C80G7/C80G9)
2.0V to 5.0V at 8 MHz fOSC (S3C80F7/C80F9)
Three 8-bit I/O ports (P0–P2), one 8-bit output
port(P4) and 4-bit port (P3) for a total of 36 bit-
programmable pins.(42-SDIP)
Package Type
Three 8-bit I/O ports (P0–P2) and one 2-bit I/O
port (P3) for a total of 26-bit programmable pins.
(32-SOP)
·
·
·
44-pin QFP-1010B
42-pin SDIP
32-pin SOP
Timers and Timer/Counters
·
·
·
One programmable 8-bit basic timer (BT) for
oscillation stabilization control or watchdog timer
(software reset) function
One 8-bit timer/counter (Timer 0) with three
operating modes; Interval mode, Capture and
PWM mode.
One 16-bit timer/counter (Timer1) with two
operating modes; Interval mode and Capture.
1-2
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
BLOCK DIAGRAM
P0.0-0.3 (INT0-INT3)
P0.4-P0.7 (INT4)
P1.0-P1.7
TEST
LVD
Port 0
Port 1
VDD
RESET
MAIN
OSC
XIN
P2.0-2.3 (INT5-INT8)
P2.4-2.7 (INT9)
Port 2
Port 3
Port 4
XOUT
I/O Port and Interrupt
Control
8-Bit
Basic
Timer
P3.0-T0PWM/
T0CAP/(T1CAP)
P3.1-REM/(T0CK)
P3.2/(T0CK)
P3.3/(T1CAP)
P3.4-3.5
8-Bit
Timer/
Counter
SAM87RC
CPU
16-Bit
Timer/
Counter
P4.0-4.7
317-Bytes
Register
File
32K-Bytes
ROM
Carrier
Registor
(Counter A)
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PIN ASSIGNMENTS
P4.3
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P4.2
P4.1
P4.0
1
2
3
4
5
6
7
8
P0.7/INT4
P0.6/INT4
P0.5/INT4
P0.4/INT4
P0.3/INT3
P0.2/INT2
P0.1/INT1
P0.0/INT0
P4.4
P4.5
P4.6
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P4.7
P3.3/T1CAP
P2.0/INT5
P2.1/INT6
P2.2/INT7
P2.3/INT8
P2.4/INT9
S3C80F7/C80F9
/C80G7/C80G9
(Top View)
P3.0/T0PWM/T0CAP/SDAT
9
R3.1/REM/SCLK
VDD
10
11
12
13
14
15
16
17
18
19
20
21
VSS
XOUT
XIN
TEST
42-SDIP
P2.5/INT9
P2.6/INT9
RESET
P2.7/INT9
P1.0
P3.2/T0CK
Figure 1-2. Pin Assignment Diagram (42-Pin SDIP Package)
1-4
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
P1.3
P1.2
P1.1
P4.7
P3.3/T1CAP
P3.2/T0CK
P1.0
P2.7/INT9
P3.5
22
21
20
19
18
17
16
15
14
13
12
P0.4/INT4
P0.5/INT4
P0.6/INT4
P0.7/INT4
P4.3
34
35
36
37
38
39
40
41
42
43
44
S3C80F7/C80F9
/C80G7/C80G9
(Top View)
P4.2
P4.1
P4.0
(44-QFP)
P2.0/INT5
P2.1/INT6
P2.2/INT7
P3.4
RESET
Figure 1-3. Pin Assignment Diagram (44-Pin QFP Package)
1-5
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
VDD
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VSS
XIN
XOUT
1
2
3
4
5
6
7
8
P3.1/REM/T0CK/SCLK
P3.0/T0PWM/T0CAP/T1CAP/SDAT
P2.4/INT9
P2.3/INT8
P2.2/INT7
P2.1/INT6
P2.0/INT5
P0.7/INT4
P0.6/INT4
P0.5/INT4
P0.4/INT4
P0.3/INT3
P0.2/INT2
P0.1/INT1
P0.0/INT0
TEST
P2.5/INT9
P2.6/INT9
RESET
P2.7/INT9
P1.0
S3C80F7/C80F9
/C80G7/C80G9
(Top View)
9
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
10
11
12
13
14
15
16
32-SOP
Figure 1-4. Pin Assignment Diagram (32-Pin SOP Package)
1-6
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
Table 1-1. Pin Descriptions of 44-QFP and 42-SDIP
Pin
Pin
Pin Description
Circuit 42 Pin 44 Pin
Shared
Names
Type
Type
No.
No.
Functions
P0.0–P0.7
I/O
I/O port with bit-programmable pins.
Configurable to input or push-pull output
mode. Pull-up resistors can be assigned
by software. Pins can be assigned
individually as external interrupt inputs
with noise filters, interrupt enable/
disable, and interrupt pending control.
SED & R circuit built in P0 for STOP
releasing.
1
34–41 30–37
Ext. INT
(INT0 - 4)
P1.0–P1.7
I/O
I/O
I/O port with bit-programmable pins.
Configurable to input mode or output
mode. Pin circuits are either push-pull or
n-channel open-drain type.
2
1
20
16
–
24–30 20–26
P2.0–P2.3
P2.4–P2.7
I/O port with bit-programmable pins.
Configurable to input or push-pull output
mode. Pull-up resistors can be assigned
by software. Pins can be assigned
individually as external interrupt inputs
with noise filters, interrupt enable/
disable, and interrupt pending control.
SED & R circuit built in P2 for STOP
releasing.
4–8,
16, 17
19
42–44
1,2,
10,11,
15
Ext. INT
(INT5–9)
P3.0
P3.1
I/O
2-bit I/O port with bit-programmable pins.
Configurable to input mode, push-pull
output mode, or n-channel open-drain
output mode. Input mode with pull-up
resistors can be assigned by software.
The two port 3 pins have high current
drive capability
3
4
9–10
3–4
T0PWM/ T0CAP
REM
P3.2–P3.3
P3.4–P3.5
P4.0–P4.7
I
C-MOS Input port with pull-up resistors
5
6
7
21
22
17
18
(T0CK)
(T1CAP)
O
O
Open drain output port for high current
drive
None
13–14
–
–
8- bit-programmable output pins.
Configurable to open drain output port or
push-pull output port.
1–3
42,23
31-33
41–38
27–29
19
XIN, XOUT
RESET
–
I
System clock input and output pins
–
8
13,14
18
7,8
12
–
–
System reset signal input pin and back-
up mode input.
TEST
I
Test signal input pin (for factory use only;
must be connected to VSS.)
–
15
9
–
VDD
VSS
–
–
Power supply input pin
Ground pin
–
–
11
12
5
6
–
–
1-7
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 1-2. Pin Descriptions of 32-SOP
Pin
Names
Pin
Type
Pin Description
Circuit
Type
32 Pin
No.
Shared
Functions
P0.0–P0.7
I/O
I/O port with bit-programmable pins.
Configurable to input or push-pull output
mode. Pull-up resistors are assignable by
software. Pins can be assigned individually as
external interrupt inputs with noise filters,
interrupt enable/ disable, and interrupt pending
control. SED & R circuit built in P0 for STOP
releasing.
1
17–24
Ext. INT
P1.0–P1.7
I/O
I/O
I/O port with bit-programmable pins.
Configurable to input mode or output mode.
Pin circuits are either push-pull or n-channel
open-drain type.
2
1
9–16
–
P2.0–P2.3
P2.4–P2.7
I/O port with bit-programmable pins.
Configurable to input or push-pull output
mode. Pull-up resistors can be assigned by
software. Pins can be assigned individually as
external interrupt inputs with noise filters,
interrupt enable/disable, and interrupt pending
control. SED & R circuit built in P2 for STOP
releasing.
25–28
Ext. INT
29,5, 6,8
P3.0
P3.1
I/O
2-bit I/O port with bit-programmable pins.
Configurable to input mode, push-pull output
mode, or n-channel open-drain output mode.
Input mode with pull-up resistors can be
assigned by software. The two port 3 pins
have high current drive capability.
3
4
30,31
T0PWM/
T0CAP/T1CAP
REM/T0CK
XIN, XOUT
RESET
–
I
System clock input and output pins
–
8
2,3
7
–
–
System reset signal input pin and back-up
mode input.
TEST
I
Test signal input pin (for factory use only;
–
4
–
must be connected to V ).
SS
VDD
VSS
–
–
Power supply input pin
Ground pin
–
–
32
1
–
–
1-8
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
PIN CIRCUITS
VDD
Pull-up
Resistor
Pull-up
Enable
VDD
Data
Input/
Output
Output
Disable
VSS
External
Interrupt
Noise
Filter
Stop release
Stop
Figure 1-5. Pin Circuit Type 1 (Port 0 and Port2)
1-9
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PIN CIRCUITS (Continued)
VDD
Pull-up
Resistor
Pull-up
Enable
VDD
Data
Input/
Output
Open-Drain
Output Disable
VSS
Normal
Input
Noise
Filter
Figure 1-6. Pin Circuit Type 2 (Port 1)
1-10
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
PIN CIRCUITS (Continued)
VDD
Pull-up
Resistor
Pull-up
Enable
P3CON.2
VDD
M
U
X
Port 3.0 Data
T0_PWM
Data
P3.0/T0PWM
T0CAP/(T1CAP)
Open-Drain
Output Disable
VSS
P3.0 Input
P3CON.2,6,7
M
U
X
T0CAP/(T1CAP)
Noise filter
Figure 1-7. Pin Circuit Type 3 (P3.0)
1-11
PRODUCT OVERVIEW
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PIN CIRCUITS (Continued)
VDD
Pull-up
Resistor
Pull-up
Enable
P3CON.5
VDD
M
U
X
Port 3.1 Data
CAOF(CACON.0)
Carrier On/Off (P3.7)
Data
P3.1/REM/(T0CK)
Open-Drain
Output
Disable
VSS
P3.1 Input
P3CON.5,6,7
M
U
X
T0CK
Noise filter
Figure 1-8. Pin Circuit Type 4 (P3.1) Circuit
VDD
Pull-up
Resistor
Input
M
U
X
T0CK : P3.2
T1CAP: P3.3
Figure 1-9. Pin Circuit Type 5 (P3.2, P3.3)
1-12
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
PRODUCT OVERVIEW
PIN CIRCUITS (Continued)
Output
Data
VSS
Figure 1-10. Pin Circuit type 6 (P3.4, P3.5)
VDD
Data
Output
Open-Drain
Output Disable
VSS
Figure 1-11. Pin Circuit type 7 (Port 4)
VDD
Pull-up
Resistor
RESET
Figure 1-12. Pin Circuit type 8 (RESET)
1-13
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
14 ELECTRICAL DATA 1 (S3C80F7/C80F9)
OVERVIEW
In this section, S3C80F7/C80F9 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:
— Absolute maximum ratings
— D.C. electrical characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by an external interrupt
— Stop mode release timing when initiated by a Reset
— I/O capacitance
— A.C. electrical characteristics
— Input timing for external interrupts
— Input timing for RESET
— Oscillation characteristics
— Oscillation stabilization time
14-1
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 14-1. Absolute Maximum Ratings
(T = 25 °C)
A
Parameter
Symbol
Conditions
Rating
Unit
VDD
Supply voltage
Input voltage
–
–
– 0.3 to + 6.5
V
VIN
VO
– 0.3 to V
DD
+ 0.3
+ 0.3
V
V
– 0.3 to V
DD
Output voltage
Output current High
All output pins
IOH
One I/O pin active
– 18
mA
All I/O pins active
One I/O pin active
– 60
+ 30
IOL
Output current Low
mA
Total pin current for ports 0, 1, and 2
+ 100
+ 40
Total pin current for port 3
–
TA
Operating
temperature
– 40 to + 85
°C
°C
TSTG
Storage temperature
–
– 65 to + 150
Table 14-2. D.C. Electrical Characteristics
(T = – 40 °C to + 85 °C, V
= 2.0 V to 5.0 V)
A
DD
Symbol
VDD
Parameter
Conditions
FOSC = 8 MHz
Min
Typ
Max
Unit
Operating Voltage
2.0
–
5.0
V
(Instruction clock = 2 MHz)
VIH1
All input pins except VIH2
and VIH3
0.8 VDD
VDD
Input High
voltage
–
V
V
V
VIH2
VIH3
VIL1
0.85 VDD
VDD – 0.3
0
VDD
VDD
RESET
XIN
All input pins except VIL2
and VIL3
0.2 VDD
Input Low voltage
–
VIL2
VIL3
0.2 VDD
0.3
RESET
XIN
VOH1
VDD = 2.4 V IOH = – 6 mA
VDD – 0.7
Output High
voltage
°
Port 3.1 only, TA = 25 C
VOH2
VDD = 2.4 V, IOH = – 2.2mA VDD 0.7
–
P3.0, P2.0–2.3
°
TA = 25 C
14-2
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Table 14-2. D.C. Electrical Characteristics (Continued)
(TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VOH3
VDD = 2.4 V,IOH = – 1 mA
VDD 1.0
–
Output High
voltage
–
–
V
Port0, Port1, P2.4-2.7 and Port4
°
TA = 25 C
VOL1
VDD = 2.4 V, IOL = 12 mA, port
Output Low
voltage
–
0.4
0.4
0.5
0.5
V
°
3.1 only, T = 25 C
A
VOL2
VDD = 2.4 V, IOL = 5 mA
P3.0, P3.4-3.5, P2.0-2.3
°
TA = 25 C
VOL3
IOL = 2mA
0.4
–
1
1
Port 0, Port1, P2.4-2.7 and Port4
°
TA = 25 C
ILIH1
VIN = VDD
All input pins except X and
IN
XOUT
Input High
leakage current
–
–
µA
µA
ILIH2
ILIL1
VIN = VDD, XIN and XOUT
20
VIN = 0 V
Input Low
–
– 1
leakage current
All input pins except XIN, XOUT
and RESET
,
ILIL2
VIN = 0 V
– 20
XIN and XOUT
ILOH
ILOL
RL1
VOUT = VDD
All output pins
VOUT = 0 V
Output High
leakage current
–
–
–
–
1
µA
µA
kW
Output Low
leakage current
– 1
95
All output pins
VIN = 0 V, VDD = 2.4 V
Pull-up resistors
44
55
°
TA = 25 C, Ports 0–2, P3.2–3.3
14-3
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 14-2. D.C. Electrical Characteristics (Continued)
(T = – 40 °C to + 85 °C, V = 2.0 V to 5.0 V)
A
DD
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IDD1
Supply current
(note)
Operating mode
VDD = 5.0 V
–
6
11
mA
8 MHz crystal
4 MHz crystal
4.5
1.8
9
IDD2
Idle mode
3.5
VDD = 5.0 V
8 MHz crystal
4 MHz crystal
1.6
18
3.0
25
IDD3
Stop mode; VDD = 5.0 V
–
uA
VDD = 3.6 V
VDD = 2.4 V
VDD = 0.7 V
12
4.5
1
15
8
1.5
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
Table 14-3. Characteristics of Low Voltage Detect circuit
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Hysteresys Voltage of
–
–
100
300
mV
DV
LVD (Slew Rate of LVD)
VLVD
Low level detect voltage
–
2.00
2.20
2.40
V
Table 14-4. Data Retention Supply Voltage in Stop Mode
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VDDDR
Data retention supply
voltage
–
1.0
–
5.0
V
IDDDR
VDDDR = 1.0 V
Stop mode
Data retention supply
current
–
–
1
µA
14-4
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Idle Mode
(Basic Timer Active)
Stop Mode
Data Retention Mode
VDD
Normal
Operating
Mode
VDDDR
Execution of
STOP Instrction
EXT INT
0.8VDD
0.2VDD
tWAIT
Figure 14-1. Stop Mode Release Timing When Initiated by an External Interrupt
Reset
Occur
Oscillation Stabilization Time
Stop Mode
Normal
Operating
Mode
VDD
Execution of
STOP Instrction
RESET
NOTE
tWAIT
:
tWAIT is the same as 4096 x 16 x 1/fOSC.
Figure 14-2. Stop Mode Release Timing When Initiated by a RESET
14-5
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Reset
Occur
Oscillation Stabilization Time
Stop Mode
Normal
Operating
Mode
Back-up Mode
VDD
VLVD
VDDDR
tWAIT
Execution of
STOP Instrction
Data Retention Time
NOTE
:
tWAIT is the same as 4096 x 16 x 1/fOSC.
Figure 14-3. Stop Mode Release Timing When Initiated by a LVD
Table 14-5. Input/Output Capacitance
(TA = – 40 °C to + 85 °C , VDD = 0 V)
Parameter
Input
Symbol
Conditions
Min
Typ
Max
Unit
CIN
f = 1 MHz; unmeasured pins
–
–
10
pF
are connected to V
capacitance
SS
COUT
CIO
Output
capacitance
I/O capacitance
Table 14-6. A.C. Electrical Characteristics
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
tINTH
tINTL
Conditions
Min
Typ
Max
Unit
Interrupt input,
High, Low width
P0.0–P0.7, P2.3–P2.0
200
300
–
ns
,
VDD
= 5.0 V
tRSL
RESET input Low
width
Input
1000
–
–
VDD
= 5.0 V
14-6
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
tINTL
tINTH
0.8 VDD
DD
0.2 V
NOTE
:
The unit tCPU means one CPU clock period.
Figure 14-4. Input Timing for External Interrupts (Port 0, P2.3–P2.0)
Reset
Occur
Oscillation Stabilization Time
Back-up Mode
(Stop Mode)
Normal
Operating
Mode
Normal Operating Mode
VDD
RESET
tWAIT
NOTE
:
tWAIT is the same as 4096 x 16 x 1/fOSC.
Figure 14-5. Input Timing for RESET
14-7
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 14-7. Oscillation Characteristics
(T = – 40 °C + 85 °C)
A
Oscillator
Crystal
Clock Circuit
Conditions
Min
Typ
Max
Unit
CPU clock oscillation
frequency
1
–
8
MHz
XIN
C1
C2
OUT
X
Ceramic
CPU clock oscillation
frequency
1
1
–
–
8
8
MHz
MHz
XIN
C1
C2
XOUT
X
IN
input frequency
External clock
XIN
External
Clock
Open Pin
XOUT
Table 14-8. Oscillation Stabilization Time
(T = – 40 °C + 85 °C, VDD = 4.5 V to 5.0 V)
A
Oscillator
Test Condition
fOSC > 400 kHz
Min
Typ
Max
Unit
Main crystal
–
–
20
ms
Oscillation stabilization occurs when VDD is
equal to the minimum oscillator voltage range.
XIN input High and Low width (tXH, tXL)
Main ceramic
–
–
–
10
ms
External clock
(main system)
25
–
500
–
ns
216/fOSC
tWAIT when released by a reset (1)
Oscillator
stabilization
wait time
ms
tWAIT when released by an interrupt (2)
–
–
–
ms
NOTES:
1.
f
is the oscillator frequency.
OSC
2. The duration of the oscillation stabilization time (t
in the basic timer control register, BTCON.
) when it is released by an interrupt is determined by the setting
WAIT
14-8
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Instruction
Clock
fOSC
(Main Oscillator
Frequency)
A
2 MHz
8 MHz
6 MHz
4 MHz
1.25 MHz
1.0 MHz
500 kHz
250 kHz
100 kHz
400 kHz
6
7
1
2
3
4
5
Supply Voltage (V)
Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16)
A: 2.0 V, 8 MHz
Figure 14-6. Operating Voltage Range of S3C80F9
14-9
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
15 ELECTRICAL DATA 2 (S3C80G7/C80G9)
OVERVIEW
In this section, S3C80G7/C80G9 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:
— Absolute maximum ratings
— D.C. electrical characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by an external interrupt
— Stop mode release timing when initiated by a Reset
— I/O capacitance
— A.C. electrical characteristics
— Input timing for external interrupts
— Input timing for RESET
— Oscillation characteristics
— Oscillation stabilization time
15-1
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 15-1. Absolute Maximum Ratings
(T = 25 °C)
A
Parameter
Symbol
Conditions
Rating
Unit
VDD
Supply voltage
Input voltage
–
–
– 0.3 to + 6.5
V
VIN
VO
– 0.3 to V
DD
+ 0.3
+ 0.3
V
V
– 0.3 to V
DD
Output voltage
Output current High
All output pins
IOH
One I/O pin active
– 18
mA
All I/O pins active
One I/O pin active
– 60
+ 30
IOL
Output current Low
mA
Total pin current for ports 0, 1, and 2
+ 100
+ 40
Total pin current for port 3
–
TA
Operating
temperature
– 40 to + 85
°C
°C
TSTG
Storage temperature
–
– 65 to + 150
Table 15-2. D.C. Electrical Characteristics
(T = – 40 °C to + 85 °C, V
= 2.0 V to 5.0 V)
A
DD
Symbol
VDD
Parameter
Conditions
FOSC = 4 MHz
Min
Typ
Max
Unit
Operating Voltage
1.7
–
5.0
V
(Instruction clock = 1 MHz)
VIH1
All input pins except VIH2
and VIH3
0.8 VDD
VDD
Input High
voltage
–
V
V
V
VIH2
VIH3
VIL1
0.85 VDD
VDD – 0.3
0
VDD
VDD
RESET
XIN
All input pins except VIL2
and VIL3
0.2 VDD
Input Low voltage
–
VIL2
VIL3
0.2 VDD
0.3
RESET
XIN
VOH1
VDD = 2.4 V IOH = – 6 mA
VDD – 0.7
VDD– 0.7
Output High
voltage
°
Port 3.1 only, TA = 25 C
VOH2
VDD = 2.4 V, IOH = – 2.2mA
P3.0, P2.0–2.3
°
TA = 25 C
15-2
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Table 15-2. D.C. Electrical Characteristics (Continued)
(TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VOH3
VDD = 2.4 V,IOH = – 1 mA
VDD 1.0
–
Output High
voltage
–
–
V
Port0, Port1, P2.4–2.7 and Port4
°
TA = 25 C
VOL1
VDD = 2.4 V, IOL = 12 mA, port
Output Low
voltage
–
0.4
0.4
0.5
0.5
V
°
3.1 only, T = 25 C
A
VOL2
VDD = 2.4 V, IOL = 5 mA
P3.0, P3.4–3.5, P2.0–2.3
°
TA = 25 C
VOL3
IOL = 2mA
0.4
–
1
1
Port 0, Port1, P2.4–2.7 and Port4
°
TA = 25 C
ILIH1
VIN = VDD
All input pins except X and
IN
XOUT
Input High
leakage current
–
–
µA
µA
ILIH2
ILIL1
VIN = VDD, XIN and XOUT
20
VIN = 0 V
Input Low
–
– 1
leakage current
All input pins except XIN, XOUT
and RESET
,
ILIL2
VIN = 0 V
– 20
XIN and XOUT
ILOH
ILOL
RL1
VOUT = VDD
All output pins
VOUT = 0 V
Output High
leakage current
–
–
–
–
1
µA
µA
kW
Output Low
leakage current
– 1
95
All output pins
VIN = 0 V, VDD = 2.4 V
Pull-up resistors
44
55
°
TA = 25 C, Ports 0–2, P3.2–3.3
15-3
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 15-2. D.C. Electrical Characteristics (Continued)
(T = – 40 °C to + 85 °C, V = 2.0 V to 5.0 V)
A
DD
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IDD1
IDD2
IDD3
Supply current
(note)
Operating mode
VDD = 5.0 V
–
4.5
9
mA
4 MHz crystal
Idle mode
VDD = 5.0 V
1.6
1
3.0
6
4 MHz crystal
Stop mode;
VDD = 5.0 V
–
uA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
Table 15-3. Characteristics of Low Voltage Detect circuit
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Hysteresys Voltage of
–
–
100
300
mV
DV
LVD (Slew Rate of LVD)
VLVD
Low level detect voltage
–
1.70
1.90
2.10
V
Table 15-4. Data Retention Supply Voltage in Stop Mode
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
VDDDR
Data retention supply
voltage
–
1.0
–
5.0
V
IDDDR
VDDDR = 1.0 V
Stop mode
Data retention supply
current
–
–
1
µA
15-4
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Idle Mode
(Basic Timer Active)
Stop Mode
Data Retention Mode
VDD
Normal
Operating
Mode
VDDDR
Execution of
STOP Instrction
EXT INT
0.8VDD
0.2VDD
tWAIT
Figure 15-1. Stop Mode Release Timing When Initiated by an External Interrupt
Reset
Occur
Oscillation Stabilization Time
Stop Mode
Normal
Operating
Mode
VDD
Execution of
STOP Instrction
RESET
NOTE
tWAIT
:
tWAIT is the same as 4096 x 16 x 1/fOSC.
Figure 15-2. Stop Mode Release Timing When Initiated by a RESET
15-5
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 15-5. Input/Output Capacitance
(TA = – 40 °C to + 85 °C , VDD = 0 V)
Parameter
Input
Symbol
Conditions
Min
Typ
Max
Unit
CIN
f = 1 MHz; unmeasured pins
–
–
10
pF
are connected to V
capacitance
SS
COUT
CIO
Output
capacitance
I/O capacitance
Table 15-6. A.C. Electrical Characteristics
(T = – 40 °C to + 85 °C)
A
Parameter
Symbol
tINTH
tINTL
Conditions
Min
Typ
Max
Unit
Interrupt input,
High, Low width
P0.0–P0.7, P2.3–P2.0
200
300
–
ns
,
VDD
= 5.0 V
tRSL
RESET input Low
width
Input
1000
–
–
VDD
= 5.0 V
15-6
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
tINTL
tINTH
0.8 VDD
DD
0.2 V
NOTE
:
The unit tCPU means one CPU clock period.
Figure 15-3. Input Timing for External Interrupts (Port 0, P2.3–P2.0)
Reset
Occur
Oscillation Stabilization Time
Back-up Mode
(Stop Mode)
Normal
Operating
Mode
Normal Operating Mode
VDD
RESET
tWAIT
NOTE
:
tWAIT is the same as 4096 x 16 x 1/fOSC.
Figure 15-4. Input Timing for RESET
15-7
ELECTRICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
Table 15-7. Oscillation Characteristics
(T = – 40 °C + 85 °C)
A
Oscillator
Crystal
Clock Circuit
Conditions
Min
Typ
Max
Unit
CPU clock oscillation
frequency
1
–
4
MHz
XIN
C1
C2
OUT
X
Ceramic
CPU clock oscillation
frequency
1
1
–
–
4
4
MHz
MHz
XIN
C1
C2
XOUT
X
IN
input frequency
External clock
XIN
External
Clock
Open Pin
XOUT
Table 15-8. Oscillation Stabilization Time
(T = – 40 °C + 85 °C, V
A
= 4.5 V to 5.0 V)
DD
Oscillator
Test Condition
Min
Typ
Max
Unit
fOSC > 400 kHz
Main crystal
–
–
20
ms
Oscillation stabilization occurs when VDD is
equal to the minimum oscillator voltage range.
XIN input High and Low width (tXH, tXL)
Main ceramic
–
–
–
10
ms
External clock
(main system)
25
–
500
–
ns
216/fOSC
tWAIT when released by a reset (1)
Oscillator
stabilization
wait time
ms
tWAIT when released by an interrupt (2)
–
–
–
ms
NOTES:
1.
f
is the oscillator frequency.
OSC
2. The duration of the oscillation stabilization time (t
in the basic timer control register, BTCON.
) when it is released by an interrupt is determined by the setting
WAIT
15-8
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
ELECTRICAL DATA
Instruction
Clock
fOSC
(Main Oscillator
Frequency)
2 MHz
8 MHz
6 MHz
4 MHz
1.25 MHz
A
1.0 MHz
500 kHz
250 kHz
100 kHz
400 kHz
6
7
1
2
3
4
5
Supply Voltage (V)
Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16)
A: 1.7 V, 4 MHz
Figure 15-6. Operating Voltage Range of S3C80G9
15-9
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
MECHANICAL DATA
16 MECHANICAL DATA
OVERVIEW
The S3C80F7/C80F9/C80G7/C80G9 microcontroller is currently available in a 32-pin SOP, 42-pin SDIP and 44-
pin QFP package.
0-8
#32
#17
32-SOP-450A
+ 0.10
0.25 - 0.05
#1
#16
20.30 MAX
19.90 ± 0.20
0.10 MAX
1.27
(0.43)
0.40 ± 0.10
NOTE: Dimensions are in millimeters.
Figure 16-1. 32-Pin SOP Package Dimension
16-1
MECHANICAL DATA
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
#42
#22
0-15
42-SDIP-600
#1
#21
39.50 MAX
39.10 ± 0.20
0.50 ± 0.10
1.00 ± 0.10
1.78
(1.77)
NOTE: Dimensions are in millimeters.
Figure 16-2. 42-Pin SDIP Package Dimension
16-2
S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632)
MECHANICAL DATA
13.20 ± 0.30
10.00 ± 0.20
0-8
+ 0.10
- 0.05
0.15
0.10 MAX
44-QFP-1010B
#44
+ 0.10
0.35 - 0.05
#1
0.05 MIN
0.80
(1.00)
0.15 MAX
2.05 ± 0.10
2.30 MAX
NOTE: Dimensions are in millimeters.
Figure 16-3. 44-Pin SQFP Package Dimension
16-3
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