LA76070 [SANYO]
NTSC Color Television IC; NTSC彩色电视IC
| 型号： | LA76070 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | NTSC Color Television IC |
| 文件： | 总27页 (文件大小：306K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENN5844
Monolithic Linear IC
LA76070
NTSC Color Television IC
Overview
Package Dimensions
The LA76070 is an NTSC color television IC. In addition
to providing IIC bus control based rationalization of IC
control and the adjustment manufacturing process
associated with the TV tube itself, it also includes all
functions actually required in mass-produced television
sets. As such, it is an extremely practical bus control IC.
unit: mm
3128-DIP52S
[LA76070]
52
27
* The LA7840/41 or LA7845N/46N is recommended as the vertical output
IC for use with this product.
1
26
46.0
Functions
2
• I C bus control, VIF, SIF, Y, C, and deflection
integrated on a single chip.
0.75
0.48
1.05
1.78
SANYO: DIP52S
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
V4 max
V26 max
I21 max
Pd max
Topr
Conditions
Rating
9.6
Unit
V
Maximum power supply voltage
9.6
25
V
Maximum power supply current
Allowable power dissipation
Operating temperature
mA
W
Ta ≤ 65°C*
1.3
–10 to +65
–55 to +150
°C
°C
Storage temperature
Tstg
Note: *Provided on a printed circuit board: 83.2 × 86.0 × 1.6 mm, material: Bakelite
Operating Conditions at Ta = 25°C
Parameter
Symbol
V4
Conditions
Rating
7.6
Units
V
Recommended power supply voltage
Recommended power supply current
Operating power supply voltage range
Operating power supply current range
V26
7.6
V
I21
19
mA
V
V4 op
V26 op
121 op
7.3 to 7.9
7.3 to 7.9
16 to 25
V
mA
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
70999 RM (OT) No. 5844-1/27
LA76070
Electrical Characteristics at Ta = 25°C, V = V4 = V26 = 7.6 V, I = I21 = 19 mA
CC
CC
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
[Circuit Voltages and Currents]
Horizontal power supply voltage
IF power supply current (V4)
HVCC
7.2
7.6
46
8.0
V
I4 (IFICC
)
IF AGC: 5 V
38
54
mA
Video, chroma,
and vertical power supply current (V26)
I26 (YCVICC
)
79.5
93.5
107.5
mA
[VIF Block]
AFT output voltage with no signal
Video output voltage with no signal
APC pull-in range (U)
VAFTn
VOn
With no input signal
With no input signal
2.8
4.7
1.0
1.0
7.7
0
3.8
4.9
4.8
5.1
Vdc
Vdc
MHz
MHz
Vdc
Vdc
dBµ
dBµ
Vdc
Vdc
fPU
After APC and PLL DAC adjustment
After APC and PLL DAC adjustment
CW = 91 dBµ, DAC = 0
CW = 91 dBµ, DAC = 63
DAC = 0
APC pull-in range (L)
fPL
Maximum RF AGC voltage
Minimum RF AGC voltage
RF AGC Delay Pt (@DAC = 0)
RF AGC Delay Pt (@DAC = 63)
Maximum AFT output voltage
Minimum AFT output voltage
AFT detection sensitivity
Video output amplitude
Synchronization signal tip level
Input sensitivity
VRFH
VRFL
RFAGC0
RFAGC63
VAFTH
VAFTL
VAFTS
VO
8.2
0.2
9.0
0.4
96
DAC = 63
86
7.6
1.2
CW = 93 dBµ, variable frequency
CW = 93 dBµ, variable frequency
CW = 93 dBµ, variable frequency
93 dBµ, 87.5% Video MOD
93 dBµ, 87.5% Video MOD
Output at –3 dB
6.2
0.5
33
6.5
0.9
25
2.0
2.6
43
2.5
2
17 mV/kHz
1.8
2.4
2.2
2.8
46
Vp-p
Vdc
dBµ
VOtip
Vi
Video-to-sync ratio (@100 dBµ)
Differential gain
V/S
100 dBµ, 87.5% Video MOD
93 dBµ, 87.5% Video MOD
93 dBµ, 87.5% Video MOD
CW = 93 dBµ
2.4
55
3.0
10
DG
%
deg
dB
Differential phase
DP
2
10
Video signal-to-noise ratio
920 kHz beat level
S/N
58
I920
V3.58 MHz/V920 kHz
–50
dB
[Video and Switching Block]
External video gain
AUXG
AUXS
AUXC
INTO
Stair step, 1 V p-p
Stair step, 1 V p-p
4.2 MHz, 1Vp-p
5.5
–0.2
60
6.0
0.0
6.5
dB
Vdc
dB
External video sync signal tip voltage
External video crosstalk
Internal video output level
[SIF Block]
+0.2
93 dBµ, 87.5% Video MOD
–0.1
0.0
+0.1
Vp-p
FM detector output voltage
FM limiting sensitivity
SOADJ
SLS
464
50
474
484 mVrms
Output at –3 dB
Output at –3 dB
50
dBµ
Hz
FM detector output bandwidth
SF
100 k
FM detector output total
harmonic distortion
STHD
FM = ±25 kHz
AM = 30 %
0.5
%
AM rejection ratio
SAMR
SSN
40
60
dB
dB
SIF signal-to-noise ratio
[Audio Block]
Maximum gain
AGMAX
ARANGE
AF
1 kHz
–2.5
60
0.0
67
+2.5
+3.0
0.5
dB
dB
dB
dB
dB
dB
Adjustment range
Frequency characteristics
Muting
20 kHz
–3.0
75
AMUTE
ATHD
ASN
20 kHz
Total harmonic distortion
Signal-to-noise ratio
[Chroma Block]
1 kHz, 400 m Vrms, Vo1: MAX
DIN.Audio
65
75
ACC amplitude characteristics 1
ACC amplitude characteristics 2
B-Y/Y amplitude ratio
Color control characteristics 1
Color control characteristics 2
ACCM1
ACCM2
CLRBY
CLRMN
CLRMM
Input: +6 dB/0 dB, 0 dB = 40 IRE
Input: –14 dB/0 dB
0.8
0.7
100
1.6
33
1.0
1.0
125
1.8
40
1.2
1.1
140
2.1
50
times
times
%
Color MAX/NOM
Color MAX/MIN
times
dB
Continued on next page.
No. 5844-2/27
LA76070
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Color control sensitivity
CLRSE
TINCEN
TINMAX
TINMIN
TINSE
RB
1
2
4
–3
60
%/bit
deg
deg
deg
Tint center
TINT NOM
–15
30
Tint control maximum
TINT MAX
TINT MIN
45
Tint control minimum
–60
0.7
–45
–30
Tint control sensitivity
2.0 deg/bit
0.95
Demodulator output ratio R-Y/B-Y
Demodulator output ratio G-Y/B-Y
Demodulator angle B-Y/R-Y
Demodulator angle G-Y/B-Y
Killer operating point
0.75
0.28
92
0.85
0.33
99
GB
0.38
107
ANGBR
ANGGB
KILL
deg
deg
dB
227
–42
–350
350
237
–37
247
0 dB = 40 IRE
–30
Chrominance VCO free-running frequency
Chrominance pull-in range (+)
Chrominance pull-in range (–)
Auto-flesh characteristic 73°
Auto-flesh characteristic 118°
Auto-flesh characteristic 163°
[Video Block]
CVCOF
PULIN+
PULIN–
AF 073
AF 118
AF 163
Deviation from 3.579545 MHz
+350
Hz
Hz
–350
20
Hz
5
–7
10
0
deg
deg
deg
+7
–20
–10
–5
Overall video gain
(Contrast set to maximum)
CONT63
CONT32
CONT0
Yf0
10
–7.5
–17
12
–6.0
–14
–3.5
–20
14
–4.5
–11
0.0
dB
dB
dB
dB
dB
Contrast adjustment characteristic
(Normal/maximum)
Contrast adjustment characteristic
(Minimum/maximum)
Video frequency characteristic
Trap & D = 0
–6.0
Chrominance trap level
Trap & D = 1
Ctrap
DC propagation
ClampG
YDLY
95
100
430
13
105
%
ns
Y delay, f0 = 1
Maximum black stretching gain
(normal)
BKSTmax
Sharp16
Sharp31
Sharp0
6
4
20
8
IRE
dB
dB
dB
V
6
Sharpness adjustment range (max)
(min)
9.0
–6.0
1.4
11.5
–3.5
1.6
14.0
–1.0
1.8
Horizontal/vertical blanking output level
[OSD Block]
RGBBLK
OSD fast switch threshold
Red RGB output level
Green RGB output level
Blue RGB output level
FSTH
0.9
220
220
220
1.2
250
250
250
1.7
280
280
280
V
ROSDH
GOSDH
BOSDH
IRE
IRE
IRE
Analog OSD R output level
gain matching
RRGB
LRRGB
GRGB
LGRGB
BRGB
1.5
45
1.9
50
2.3
60
Ratio
%
Linearity
Analog OSD G output level
gain matching
1.5
45
1.9
50
2.3
60
Ratio
%
Linearity
Analog OSD B output level
gain matching
1.5
45
1.9
50
2.3
60
Ratio
%
Linearity
LBRGB
[RGB Output (cutoff and drive) Block]
Brightness control (normal)
High brightness (maximum)
Low brightness (minimum)
BRT64
BRT127
BRT0
2.1
15
2.65
20
3.2
25
V
IRE
IRE
–25
–20
–15
Continued on next page.
No. 5844-3/27
LA76070
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
2.1
2.45
max
3.2
(minimum)
Vbias0
Vbias127
Vbiassns
RBout127
Gout127
RBout0
2.65
3.0
4
V
V
Cutoff control
(Bias control)
(maximum)
Resolution
3.55
mV/Bit
Vp-p
Vp-p
dB
2.9
2.4
9
Maximum output
Drive adjustment
[Deflection Block]
Output attenuation
7
11
Sync separator sensitivity
Ssync
∆fH
3
15600
±400
0
8
13
IRE
Hz
Hz
V
Horizontal free-running frequency
deviation
15734
15850
Horizontal pull-in range
fH PULL
V Hsat
Horizontal output pulse saturation
voltage
0.06
0.4
Horizontal output pulse phase
HPHCEN
9.5
10.5
±2
11.5
µs
µs
Horizontal position adjustment range
HPHrange
4 bits
Horizontal position adjustment
maximum variability
HPHstep
VXRAY
530
ns
V
X-ray protection circuit operating
voltage
0.54
0.64
0.74
[Vertical screen Size Adjustment]
Vertical ramp output amplitude @32
Vertical ramp output amplitude @0
Vertical ramp output amplitude @63
[Vertical screen Position Adjustment]
Vertical ramp DC voltage @32
Vertical ramp DC voltage @0
Vsize32
Vsize0
VSIZE: 100000
VSIZE: 000000
VSIZE: 111111
0.47
0.13
0.80
0.82
0.48
1.15
1.17
0.83
1.50
Vp-p
Vp-p
Vp-p
Vsize63
Vdc32
Vdc0
VDC: 100000
VDC: 000000
VDC: 111111
3.6
3.2
4.0
3.8
3.4
4.2
4.0
3.6
4.4
Vdc
Vdc
Vdc
Vertical ramp DC voltage @63
Vdc63
No. 5844-4/27
LA76070
LA76070 BUS: Initial Conditions
Initial test conditions
Register
Initial test conditions
Register
(continued)
T Enable
0 HEX
1 HEX
0 HEX
0 HEX
4 HEX
0 HEX
0 HEX
20 HEX
Video SW
PLL Tuning
Audio Mute
0 HEX
40 HEX
1 HEX
20 HEX
0 HEX
20 HEX
0 HEX
0 HEX
20 HEX
00 HEX
00 HEX
00 HEX
0 HEX
7F HEX
7F HEX
0 HEX
40 HEX
0 HEX
40 HEX
0 HEX
0 HEX
0 HEX
10 HEX
0 HEX
40 HEX
0 HEX
40 HEX
0 HEX
4 HEX
10 HEX
0 HEX
0 HEX
00 HEX
Video Mute
Sync Kill
AFC Gain
APC Det Adjust
Horizontal Phase
IF AGC SW
V CD Mode
Vertical DC
Vertical Kill
Col Kill
AFT Defeat
RF AGC Delay
Vertical Size
Red Bias
Green Bias
Blue Bias
Blanking Defeat
Red Drive
Blue Drive
Color Difference Mode Enable
Brightness Control
Contrast Test Enable
Contrast Control
Trap & Delay Enable SW
Auto Flesh
Black Stretch Defeat
Sharpness Control
Tint Test Enable
Tint Control
Color Test Enable
Color Control
Vertical Test
Video Level
FM Level
BNI Enable
Audio SW
Volume Control
No. 5844-5/27
LA76070
LA76070 BUS: Control Register Descriptions
Control register descriptions
Bits
Register name
T Enable
General descriptions
Disable the Test SW & enable Video Mute SW
Disable video outputs
1
1
1
1
3
1
1
6
1
7
1
6
1
6
1
1
6
7
7
7
1
6
1
6
1
7
1
7
1
1
1
5
1
7
1
7
3
3
5
1
1
6
Video Mute
Sync Kill
Force free-run mode
AFC Gain
Select horizontal first loop gain
Align sync to flyback phase
Disable IF and RF AGC
Disable AFT output
Horizontal Phase
IF AGC SW
AFT Defeat
RF AGC Delay
Video SW
Align RF AGC threshold
Select Video Signal (INT/EXT)
Align IF VCO frequency
Disable audio outputs
PLL Tuning
Audio Mute
APC Det Adjust
V Count Down Mode
Vertical DC
Align AFT crossover
Select vertical countdown mode
Align vertical DC bias
Vertical Kill
Disable vertical output
Color Kill
Enable Color Killer
Vertical Size
Red Bias
Align vertical amplitude
Align Red OUT DC level
Align Green OUT DC level
Align Blue OUT DC level
Disable RGB output blanking
Align Red OUT AC level
Enable drive DAC test mode
Align Blue OUT AC level
Enable color difference mode
Customer brightness control
Enable Contrast DAC test mode
Customer Contrast control
Select luma filter mode
Green Bias
Blue Bias
Blanking Defeat
Red Drive
Drive Test
Blue Drive
Color Difference Mode Enable
Brightness Control
Contrast Test
Contrast Control
Trap & Delay-SW
Auto Flesh Enable
Black Stretch Defeat
Sharpness Control
Tint Test
Enable autoflesh function
Disable black stretch
Customer sharpness control
Enable tint DAC test mode
Customer tint control
Tint Control
Color Test
Enable color DAC test mode
Customer color control
Color Control
Vertical Test
Video Level
Select vertical DAC test modes
Align IF video level
FM Level
Align WBA output level
BNI Enable
Enable black noise inverter
Select Audio Signal (INT/EXT)
Customer volume control
Audio SW
Volume Control
No. 5844-6/27
LA76070
LA76070 BUS: Control Register Truth Table
Control register truth table
Register name
T Enable
0 HEX
Test Enable
Active
1 HEX
Test Disable
Mute
Audio Mute
Video Mute
Active
Mute
Sync Kill
Sync active
Slow
Sync Killed
Fast
AFC Gain
IF AGC SW
AGC active
AFT active
BNI active
Standard
Vrt active
3.58 trap
AF Off
AGC Defeat
AFT Defeat
BNI Defeat
Non-Stand
Vrt Killed
8.00 APF
AF On
AFT Defeat
BNI Enable
Count Down Mode
Vertical Kill
F0 Select
Auto Flesh Enable
Overload Enable
Tint DAC Test
Color DAC Test
Contrast DAC Test
Drive DAC Test
Black Stretch Defeat
Blanking Defeat
Color Diff Mode Enable
Vertical Test
Ovld Off
Normal
Ovld On
Test Mode
Test Mode
Test Mode
Test Mode
Blk Str Off
No Blank
C Diff Mode
Ver Size Test
Normal
Normal
Normal
Blk Str On
Blanking
RGB Mode
Normal
No. 5844-7/27
LA76070
LA76070 Bit Map (‘96.08.01)
IC address: BAH (101111010)
Sub address
D0....D7
$00
MSB
DA0
DATA
DA3
*
LSB
DA7
DA1
DA2
DA4
DA5
DA6
*
*
*
T_Enable
*
Vid_Mute
Sync_Kill
0
(tr0)
0
1
H_Phase
0
$01
*
*
*
*
AFC Gain
(tr1)
0
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
$02
IFAGC SW
AFT DEF
0
RF_AGC_Delay
(tr2)
0
1
0
1
1
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
$03
VIDEO SW
PLL TUNING
(tr3)
0
1
0
$04
*
Aud_Mute
APC DET ADJUST
(tr4)
1
0
$05
V CD MODE
*
Ver_dc
(tr5)
0
0
$06
Ver_kill
Col_kill
0
Ver_Size
(tr6)
0
0
$07
*
R_Bias
(tr7)
0
0
0
1
1
1
0
$08
*
*
G_Bias
(tr8)
0
$09
B_Bias
(tr9)
0
$0A
BLK_DEF
R_Drive
(tr10)
$0B
0
1
Drv_Test
B_Drive
(tr11)
$0C
0
1
Bright
0
C_Diff
(tr12)
$0D
0
Cot_Test
Contrast
0
(tr13)
$0E
0
1
A Fresh
0
0
Black ST
0
0
Sharpness
0
Trap & D_SW
(tr14)
$0F
0
0
Tint
0
Tint_Test
(tr15)
$10
0
1
0
0
0
Col_Test
Color
0
(tr16)
$11
0
1
0
0
0
V_test
0
*
*
*
*
*
(tr17)
$12
0
FM LEVEL
0
VIDEO LEVEL
(tr18)
$13
1
N/I SW
0
0
0
0
1
0
0
VOLUME
0
0
0
AUDIO SW
0
(tr19)
0
No. 5844-8/27
LA76070
Measurement Conditions at Ta = 25°C, V = V4 = V26 = 7.6 V, I = I = 19 mA
CC
CC
21
Measurement
point
Parameter
Symbol
Input signal
Measurement method
Bus conditions
[Circuit Voltages and Currents]
Horizontal power supply voltage
Apply a 19mA current to pin 21 and
measure the pin 21 voltage at that time
HVCC
I4
Initial conditions
Initial conditions
Initial conditions
21
4
Apply a voltage of 7.6 V to pin 4 and
measure (in mA) the DC current that flows into the IC.
(Apply 5 V to the IF AGC.)
IF power supply current (pin 4)
No signal
(IFICC
)
Video/vertical power supply current
(pin 26)
I26
(DEFICC
Apply a voltage of 7.6 V to pin 26 and
measure (in mA) the DC current that flows into the IC
26
)
No. 5844-9/27
LA76070
VIF Block Input Signals and Measurement Conditions
1. All input signals are applied to PIF IN (pin 10) as shown in the measurement circuit diagrams.
2. The input signal voltage values are all the value of VIF IN (pin 10) as shown in the measurement circuit diagrams.
3. The table below lists the input signals and their levels.
Input signal
Waveform
Condition
SG1
45.75 MHz
SG2
SG3
SG4
42.17 MHz
41.25 MHz
Variable frequency
45.75 MHz
87.5 % video modulation
10-step staircase waveform
(Subcarrier: 3.58 MHz)
SG5
SG6
SG7
45.75 MHz
87.5 % video modulation
Sweep signal
(APL: 50 IRE
Sweep signal level: 40 IRE)
45.75 MHz
87.5 % video modulation
Flat field signal
4. Perform the following D/A converter adjustments in the order listed before testing.
Item
APC DAC
PLL DAC
Measurement point
Input signal
No signal, IF.AGC.DEF = 1
SG1, 93 dBµ
Adjustment
13
13
Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible
Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible
Video
45
SG7, 93 dBµ
Set up the DAC value so that the pin 45 output level is as close to 2.0 V p-p as
possible
No. 5844-10/27
LA76070
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
[VIF Block]
Measure the pin 13 DC voltage when
IF.AGC. DEF is "1"
After performing the adjustments
described in section 4
AFT output voltage with no signal
Video output voltage with no signal
VAFTn
VOn
No signal
No signal
13
45
Measure the pin 45 DC voltage when
IF.AGC. DEF is "1"
After performing the adjustments
described in section 4
Connect an oscilloscope to pin 45 and modify
the SG4 signal to be a frequency above 45.75
MHz so that the PLL circuit becomes unlocked.
(Beating will occur in this state.) Gradually
lower the SG4 frequency and measure the
frequency at which the PLL circuit locks.
Similarly, modify the frequency to a value
below 45.75 MHz so that the PLL circuit
becomes unlocked. Gradually raise the SG4
frequency and measure the frequency at which
the PLL circuit locks.
SG4
93 dBµ
After performing the adjustments
described in section 4
APC pull-in range (U), (L)
fPU, fPL
45
SG1
91 dBµ
Set the RF AGC DAC to 0 and measure the pin After performing the adjustments
Maximum RF AGC voltage
Minimum RF AGC voltage
VRFH
VRFL
6
6
6 DC voltage
described in section 4
SG1
91 dBµ
Set the RF AGC DAC to 63 and measure the
pin 6 DC voltage
After performing the adjustments
described in section 4
Set the RF AGC DAC to 0 and determine the
input level such that the pin 6 DC voltage
becomes 3.8 V ±0.5 V
RF AGC Delay Pt
(@DAC = 0)
After performing the adjustments
described in section 4
RFAGC0
RFAGC63
VAFTH
SG1
SG1
6
6
Set the RF AGC DAC to 63 and determine the
input level such that the pin 4 DC voltage
becomes 3.8 V ±0.5 V
RF AGC Delay Pt
(@DAC = 63)
After performing the adjustments
described in section 4
Set the SG4 signal frequency to 44.75 MHz
and input that signal. Measure the pin 13 DC
voltage at that time.
SG4
93 dBµ
After performing the adjustments
described in section 4
Maximum AFT output voltage
Minimum AFT output voltage
13
13
Set the SG4 signal frequency to 46.75 MHz
and input that signal. Measure the pin 13 DC
voltage at that time.
SG4
93 dBµz
After performing the adjustments
described in section 4
VAFTL
Modify the SG4 frequency to determine the
SG4
frequency deviation (∆f) such that the pin
After performing the adjustments
described in section 4
AFT detection sensitivity
VAFTS
13
93 dBµz 13 DC voltage changes from 2.5 V to 5.0 V.
VAFTS = 2500/∆f [mV/kHz]
SG7
93 dBµ
Observe pin 45 with an oscilloscope and
measure the p-p value of the waveform
After performing the adjustments
described in section 4
Video output amplitude
VO
45
45
SG1
93 dBµ
After performing the adjustments
described in section 4
Synchronization signal tip level
VOtip
Measure the pin 45 DC voltage
Observe pin 45 with an oscilloscope and measure
the peak-to-peak value of the waveform. Next,
gradually lower the input level to determine the input
level such that the output becomes –3 dB below the
video signal amplitude VO.
After performing the adjustments
described in section 4
Input sensitivity
Vi
SG7
45
45
Observe pin 45 with an oscilloscope and
determine the value of the Vy/Vs ratio by
measuring the peak-to-peak value of the sync
waveform (Vs) and the peak-to-peak value of the
luminance signal (Vy).
SG7
100 dBµ
After performing the adjustments
described in section 4
Video-to-sync ratio (@ 100 dBµ)
V/S
SG5
93 dBµ
After performing the adjustments
described in section 4
Differential gain
DG
DP
Measure pin 45 with a vectorscope
Measure pin 45 with a vectorscope
45
45
SG5
93 dBµ
After performing the adjustments
described in section 4
Differential phase
Pass the noise voltage that occurs on pin
45 through a 10 kHz to 4 MHz bandpass filter,
measure that voltage (Vsn) with an rms
voltmeter. Use that value to calculate 20 × log
(1.43/Vsn).
SG1
93 dBµ
After performing the adjustments
described in section 4
Video signal-to-noise ratio
S/N
45
Input SG1 at 93 dBµ and measure the pin
12 DC voltage (V12).Mix three signals: SG1 at
87 dBµ, SG2 at 82 dBµ, and SG3 at 63 dBµ,
and input that signal to VIF IN. Now, apply the
V12 voltage to pin 12 using an external power
supply. Measure the difference between the
3.58 MHz component and the 920 kHz
SG1
SG2
SG3
After performing the adjustments
described in section 4
920 kHz beat level
I920
45
component with a spectrum analyzer.
No. 5844-11/27
LA76070
Video Switch Block - Input Signals and Measurement Conditions
1. Unless otherwise indicated, these measurements are to be performed with no signal applied to PIF IN (pin 10) and
with the D/A converter IF.ACG.SW set to "1".
2. The table below lists the input signals and their labels.
Input signal
Waveform
Condition
10-step staircase waveform
1 V p-p
SG8
4.2 MHz
1 Vp-p
SG9
Measurement
point
Parameter
Symbol
AUXG
Input signal
Measurement procedure
Bus conditions
[VIF Block]
Observe pin 42 with an oscilloscope, measure
the peak-to-peak value of the waveform, and
perform the following calculation.
Pin 1
SG8
External video gain
VIDEO.SW = "1"
42
42
AUXG = 20 × log (Vp-p) [dB]
Observe pin 42 with an oscilloscope and
measure the synchronizing signal tip voltage
in the waveform.
Determine the voltage difference between this
measured value and synchronizing signal tip
level (VOtip) measured in the VIF block.
External video sync signal tip
voltage
Pin 1
SG8
AUXS
VIDEO.SW = "1"
VIDEO.SW = "0"
Measure the 4.2 MHz component in the pin 42
signal with a spectrum analyzer.Convert this
measurement to a V peak-to-peak value and
perform the following calculation.
Pin 1
SG8
External video crosstalk
Internal video output level
AUXC
INT0
42
42
AUXG = 20 × log (1.4/Vp-p) [dB]
Observe pin 45 with an oscilloscope and
measure the peak-to-peak value of the
waveform. Determine the difference between
this measured value and the video output
amplitude (VO) measured in the VIF block.
After performing the adjustments
described in section 4
IF. AGC. SW = "0"
Pin 10
SG7
(VIF block)
93 dBµ
VIDEO. SW = "0"
No. 5844-12/27
LA76070
SIF Block (FM Block) - Input Signals and Measurement Conditions
Unless otherwise indicated, set up the following conditions for each of the following measurements.
1. Bus control condition: IF.AGC.DEF = 1
2. SW: IF1 = off
3. Apply the input signal to pin 49 and use a 4.5 MHz carrier signal.
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
Adjust the DAC (FM.LEVEL) so that the pin 7
FM detector output 1kHz component is as
close to 474 mV rms as possible, and
90 dBµ,
fm = 1 kHz,
FM detector output voltage
SOADJ
7
FM = ±25 kHz measure the output at that time in mV rms.
Record this measurement as SV1.
Determine the input level (in dBµ) such that
fm = 1 kHz,
FM limiting sensitivity
SLS
SF
the pin 7 FM detector output 1kHz component
FM = ±25 kHz
FM.LEVEL = adjusted value
FM.LEVEL = adjusted value
FM.LEVEL = adjusted value
7
7
7
is –3 dB down from the SV1 value
Determine the modulation frequency
90 dBµ,
FM detector output bandwidth
bandwidth (Hz) that is –3 dB or higher relative
FM = ±25 kHz
to the pin 7 FM detector output SV1 value
90 dBµ,
FM detector output total harmonic
distortion
Determine the total harmonic distortion in the
fm = 1 kHz,
STHD
pin 7 FM detector output 1kHz component
FM = ±25 kHz
Measure the pin 7 FM detector output 1kHz
90 dBµ,
fm = 1 kHz,
AM = 30%
component (in mV rms).
AM rejection ratio
SAMR
SSN
Record this measured value as SV2 and
perform the following calculation.
SAMR = 20 × log (SV1/SV2) [dB]
FM.LEVEL = adjusted value
FM.LEVEL = adjusted value
7
7
Set SW1:IF1 to the "ON"
Measure the pin 7 noise level (in mV rms).
Record this measured value as SV3 and
perform the following calculation.
SSN = 20 × log (SV1/SV3) [dB]
90 dBµ,
CW
SIF signal-to-noise ratio
Audio Block - Input Signals and Test Conditions
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
Measure the output pin 1kHz component
(V1: mV rms) and perform the following
400m Vrms calculation.
AGMAX = 20 × log (V1/400) [dB]
1 kHz, CW
VOLUME = "111111"
AUDIO.MUTE = "0"
Maximum gain
AGMAX
51
Measure the output pin 1kHz component
(V2: mV rms) and perform the following
400m Vrms calculation.
AGMAX = 20 × log (V1/V2) [dB]
1 kHz, CW
VOLUME = "000001"
AUDIO.MUTE = "0"
Variability range
ARANGE
AF
51
51
Measure the output pin 20kHz component
20 kHz, CW (V3: mV rms) and perform the following
400m Vrms calculation.
VOLUME = "111111"
AUDIO.MUTE = "0"
Frequency characteristics
AF = 20 × log (V3/V1) [dB]
Measure the output pin 20kHz component
20 kHz, CW (V4: mV rms) and perform the following
400m Vrms calculation.
VOLUME = "000000"
AUDIO.MUTE = "0"
Muting
AMUTE
ATHD
ASN
51
51
AMUTE = 20 × log (V3/V4) [dB]
1 kHz, CW
400m Vrms output pin 1kHz component
Measure the noise level (DIN.AUDIO) on
Determine the total harmonic distortion in
VOLUME = "111111"
AUDIO.MUTE = "0"
Total harmonic distortion
Signal-to-noise ratio
the output pin (V5: mV rms) and perform the
following calculation.
VOLUME = "111111"
AUDIO.MUTE = "0"
No signal
51
ASN = 20 × log (V1/V5) [dB]
No. 5844-13/27
LA76070
Chrominance Block - Input Signals and Measurement Conditions
Unless otherwise indicated, set up the following conditions for each of the following measurements.
1. VIF and SIF blocks: No signal
2. Deflection block: Input a horizontal and vertical composite synchronizing signal, and assure that the deflection block
is locked to the synchronizing signal. (Refer to the “Deflection Block - Input Signals and Measurement Conditions”
section.)
3. Bus control conditions: All conditions set to the initial conditions unless otherwise specified.
4. Y input: No signal
5. C input: The C1IN input (pin 40) must be used.
6. The following describes the method for calculating the demodulation angle.
B-Y axis angle = tan-1 (B (0)/B (270) + 270°
R-Y axis angle = tan-1 (R (180)/R (90) + 90°
G-Y axis angle = tan-1 (G (270)/G (180) + 180°
R-Y axis
B-Y axis
G-Y axis
7. The following describes the method for calculating the AF angle.
BR ... The ratio between the B-Y and R-Y demodulator outputs.
θ ...... ANGBR: The B-Y/R-Y demodulation angle
R-Y/B-Y × BR-Cosθ
AFXXX = tan-1
]
[
Sinθ
8. Attach a TV crystal externally to pin 15.
No. 5844-14/27
LA76070
Chrominance Input Signals
C-1
X IRE signal (L-X)
C-2
C-3
C-4
(However, if a frequency is specified that frequency must be used.)
C-5
No. 5844-15/27
LA76070
Measurement
point
Parameter
[Chroma Block]
Symbol
Input signal
Measurement procedure
Bus and other conditions
Bout
Measure the output amplitudes when the
chrominance signal input is 0 dB and when
that input is +6 dB and calculate the ratio.
ACCM1 = 20 × log (+6 dBdata/0dBdata)
C-1
0 dB
+6 dB
ACC amplitude characteristic 1
ACC amplitude characteristic 2
ACCM1
ACCM2
30
Bout
Measure the output amplitude when the
chrominance signal input is –14 dB and
calculate the ratio.
C-1
–14 dB
30
30
ACCM2 = 20 × log (–14 dBdata/0dBdata)
YIN: L77
C-1:
No signal
Measure the Y output level
(Record this measurement as V1)
Next, input a signal to CIN, and (with YIN a
sync-only signal) measure the output level.
(Record this measurement as V2)
B-Y/Y amplitude ratio
CLRBY
C-2
Calculate CLRBY from the following formula.
CLRBY = 100 × (V2/V1) + 15%
TR24:
Measure V1: the output amplitude when the
color control is maximum, and V2: the output
amplitude when the color control is nominal.
Calculate CLRMN as V1/V2.
Saturation
01111111
Saturation
01000000
Color control characteristic 1
Color control characteristic 2
Color control sensitivity
CLRMN
CLRMN
CLRSE
C-3
C-3
C-3
30
30
Measure V3: the output amplitude when the
color control is minimum. Calculate CLRMM
as CLRMN = 20 × log (V1/V3).
TR28:
Saturation
00000000
Measure V4: the output amplitude when the
color control is 90, and V5: the output amplitude Saturation
when the color control is 38. Calculate CLRSE 01011010
from the following formula.
CLRSE = 100 × (V4 – V5)/(V2 × 52)
TR24:
30
30
30
Saturation
00100110
Measure all sections of the output waveform
and calculate the B-Y axis angle
TR23: Tint
00111111
Tint center
TINCEN
TINMAX
C-1
C-1
Measure all sections of the output waveform,
calculate the B-Y axis angle, and calculate
TINMAX from the following formula.
TR23: Tint
01111111
Tint control maximum
TINMAX = <the B-Y axis angle> – TINCEN
Measure all sections of the output waveform,
calculate the B-Y axis angle, and calculate
TINMIN from the following formula.
TR23: Tint
00000000
Tint control minimum
Tint control sensitivity
TINMIN
TINSE
C-1
C-1
30
30
TINMIN = <the B-Y axis angle> – TINCEN
Measure A1: the angle when the tint control is 85,
and A2: the angle when the tint control is 42,
and calculate TINSE from the following formula.
TINSE = (A1 – A2) /43
TR23: Tint
01010101
00101010
30
28
Measure Vb: the BOUT output amplitude,
and Vr: the ROUT output amplitude.
Determine RB = Vr/Vb.
TR24:
Saturation
01000000
Demodulation output ratio
R-Y/B-Y
RB
GB
C-3
C-3
TR24:
Saturation
01000000
Demodulation output ratio
G-Y/B-Y
Measure Vg: the GOUT output amplitude and
determine GB = Vg/Vb
29
Continued on next page.
No. 5844-16/27
LA76070
Continued from preceding page.
Measurement
point
Parameter
Symbol
ANGBR
Input signal
C-1
Measurement procedure
Bus and other conditions
Measure the BOUT and ROUT output levels,
calculate the angles of the B-Y and R-Y axes,
and determine ANGBR as
30
28
Demodulation angle B-Y/R-Y
<the R-Y angle> – <the B-Y angle>.
Measure the GOUT output level, calculate the
angle of the G-Y axis, and determine ANGBG
as <the G-Y angle> – <the B-Y angle>
Demodulation angle B-Y/G-Y
Killer operating point
ANGBG
KILL
C-1
C-3
29
30
15
Gradually lower the input signal level, and
measure the input signal level at the point the
output level falls under 150 mV p-p
Measure the oscillator frequency f, and
determine CVCOF from the following formula.
CVCOF = f – 3579545 (Hz)
Chrominance VCO free-running
frequency
CIN
No signal
CVCOF
Gradually lower the input signal subcarrier
frequency starting from 3.57545 MHz +
2000 Hz, and measure the frequency when
the output waveform locks
Chrominance pull-in range (+)
Chrominance pull-in range (–)
PULIN +
PULIN –
C–1
C–1
30
Gradually raise the input signal subcarrier
frequency starting from 3.57545 MHz –
2000 Hz, and measure the frequency when the
output waveform locks
30
30
28
30
28
30
28
With Auto Flesh = 0, measure the level that
corresponds to 73° for the BOUT and ROUT
output waveforms, and calculate the angle
AF073A.
With Auto Flesh = 1, determine the angle
AF073B in the same way.
TR22:
Auto flesh:
0*******
TR22:
Auto flesh:
1*******
Auto flesh characteristic 73°
Auto flesh characteristic 118°
Auto flesh characteristic 163°
AF073
AF118
AF163
C–4
C–4
C–4
Calculate AF073 from the following formula.
AF073 = AF073B – AF073A
With Auto Flesh = 0, measure the level that
corresponds to 118° for the BOUT and ROUT
output waveforms, and calculate the angle
AF118A.
With Auto Flesh = 1, determine the angle
AF118B in the same way.
TR22:
Auto flesh:
0*******
TR22:
Auto flesh:
1*******
Calculate AF118 from the following formula.
AF118 = AF118B – AF118A
With Auto Flesh = 0, measure the level that
corresponds to 163° for the BOUT and ROUT
output waveforms, and calculate the angle
AF163A.
With Auto Flesh = 1, determine the angle
AF163B in the same way.
TR22:
Auto flesh:
0*******
TR22:
Auto flesh:
1*******
Calculate AF163 from the following formula.
AF163 = AF163B – AF163A
No. 5844-17/27
LA76070
Video Block - Input Signals and Measurement Conditions
• C IN input signal * chrominance burst signal: 40 IRE
• Y IN input signal 100 IRE: 714 mV
*0 IRE signal (L-0): Standard NTSC synchronizing signal
XIRE signal (L-X)
CW signal (L-CW)
Black stretch 0 IRE signal (L-BK)
• R/G/B input signal
RGB input signal 1 (O-1)
RGB input signal 2 (O-2)
No. 5844-18/27
LA76070
Measurement
point
Bus conditions and
input signals
Parameter
[Video Block]
Symbol
Input signal
Measurement procedure
Measure the output signal 50 IRE amplitude
(CNTHB V p-p) and calculate CONT127 as
20 × log (CNTHB/0.357).
Overall video gain
(contrast: maximum)
Contrast max
1111111
CONT127
CONT63
CONT0
L–50
L–50
L–50
30
30
30
Contrast adjustment
characteristics
(normal/maximum)
Measure the output signal 50 IRE amplitude
(CNTCB V p-p) and calculate CONT63 as
20 × log (CNTCB/CNTHB).
Contrast center
0111111
Contrast adjustment
characteristics
(minimum/maximum)
Measure the output signal 50 IRE amplitude
(CNTLB V p-p) and calculate CONT0 as
20 × log (CNTLB/CNTHB).
Contrast min
0000000
Video frequency characteristics
30
Brightness min
0000000
Contrast max
1111111
Measure the output signal 0 IRE DC level
(BRTPL V)
L–0
DC propagation
ClampG
YDLY
30
30
30
Measure the output signal 0 IRE DC level
(DRVPH V) and the 100 IRE amplitude (DRVH 0000000
V p-p), and calculate ClampG as
100 × (1 + (DRVPH - BRTPL)/DRVH).
Brightness min
L–100
Contrast max
1111111
Y delay
Measure the output signal 0 IRE DC level at
point A when the black stretch function is
defeated (off). Record this value as BKST1 (V).
BKST defeat on (1)
Measure the output signal 0 IRE DC level at
point A when the black stretch is enabled (on). BKST defeat off (0)
Record this value as BKST2 (V).
Maximum black stretching gain
BKSTmax
L–BK
Calculate BKSTmax from the following formula.
BKSTmax = 2 × 50 × (BKST1 – BKST2)/ CNTHB
L–CW
30
30
Sharpness (peaking)
L–CW
L–CW
L–100
Horizontal/vertical blanking
output level
Measure the output signal blanking period DC
level. Record that value as RGBBLK V.
RGBBLK
No. 5844-19/27
LA76070
Measurement
point
Bus conditions and
input signals
Parameter
[OSD Block]
Symbol
Input signal
Measurement procedure
Apply a voltage to pin 36 and determine the pin
36 voltage when the output signal switches to
the OSD signal
L–0
O–2
OSD fast switch threshold
Red RGB output level
FSTH
Pin 35: Apply O-2
30
28
Measure the output signal 50 IRE amplitude
(CNTCR V p-p)
ROSDH
L–50
L–0
O–2
Measure the OSD output amplitude
(OSDHR V p-p)
Pin 36: 2.0 V
Pin 33: Apply O-2
Calculate ROSDH as 50 × (OSDHR/CNTCR)
Measure the output signal 50 IRE amplitude
(CNTCG V p-p)
Green RGB output level
Blue RGB output level
GOSDH
L–50
29
30
L–0
O–2
Measure the OSD output amplitude
(OSDHG V p-p)
Pin 36: 2.0 V
Pin 34: Apply O-2
Calculate GOSDH as 50 × (OSDHG/CNTCG)
Measure the output signal 50 IRE amplitude
(CNTCB V p-p)
BOSDH
L–50
L–0
O–2
Measure the OSD output amplitude
(OSDHB V p-p)
Pin 36: 2.0 V
Pin 35: Apply O-2
Calculate BOSDH as 50 × (OSDHB/CNTCB)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
section in the input signal O-1) in the output
signal and record those values as RGBLR and
RGBHR V p-p, respectively
L–0
O–1
Pin 36: 2.0 V
Pin 33: Apply O-1
Analog OSD R output level
28
29
30
Gain matching
Linearity
RRGB
Calculate RRGB as RGBLR/CNTCR
LRRGB
Calculate LRRGB as 100 × (RGBLR/RGBHR)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
section in the input signal O-1) in the output
signal and record those values as RGBLG and
RGBHG V p-p, respectively
L–0
O–1
Pin 36: 2.0 V
Pin 34: Apply O-1
Analog OSD G output level
Gain matching
Linearity
GRGB
Calculate GRGB as RGBLG/CNTCG
LGRGB
Calculate LGRGB as 100 × (RGBLG/RGBHG)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
section in the input signal O-1) in the output
signal and record those values as RGBLB and
RGBHB V p-p, respectively
L–0
O–1
Pin 36: 2.0 V
Pin 35: Apply O-1
Analog OSD B output level
Gain matching
Linearity
BRGB
Calculate BRGB as RGBLB/CNTCB
LBRGB
Calculate LBRGB as 100 × (RGBLB/RGBHB)
Measurement
point
Bus conditions and
input signals
Parameter
Symbol
Input signal
Measurement procedure
[RGB Output Block] (Cutoff and Drive Blocks)
Measure the output signal 0 IRE DC levels for
the R output (28), G output (29), and B output
(30). Record these values as BRTPCR,
BRTPCG, and BRTPCB V, respectively.
28
29
30
Contrast max
1111111
BRT63
L–0
Brightness control (normal)
Calculate BRT63 as
(BRTPCR + BRTPCG + BRTPCB)/3
(max)
(min)
BRT127
BRT0
Measure the output signal 0 IRE DC levels for
the B output (30). Record this value as BRTPHB. 1111111
Brightness max
Calculate BRT127 as
50 × (BRTPHB
– BRTPCB)/CNTHB
30
Measure the output signal 0 IRE DC levels for
the B output (30). Record this value as BRTPLB. 0000000
Brightness min
Calculate BRT0 as
50
× (BRTPLB – BRTPCB)/CNTHB
No. 5844-20/27
LA76070
Measurement
point
Parameter
Symbol
Input signal
L–50
Measurement procedure
Bus and other conditions
[RGB Output Block] (Cutoff and Drive Blocks)
(minimum)
(maximum)
Vbias0
Measure the output signal 0 IRE DC levels for
the R output (pin 28), G output (pin 29), and B
output (pin 30). Record these values as Vbias0
*(V).Here, * is R, G, and B, respectively.
Contrast max
1111111
Vbias127
R bias max
1111111
G bias max
1111111
B bias max
1111111
Contrast max
1111111
Bias (cutoff) control
Measure the output signal 0 IRE DC levels for
the R output (pin 28), G output (pin 29), and B
output (pin 30). Record these values as
Vbias128*(V). Here, * is R, G, and B,
respectively.
28
29
30
R bias:
1010000
G bias:
1010000
B bias:
1010000
Contrast max
1111111
Measure the output signal 0 IRE DC levels for
the R output (pin 28), G output (pin 29), and B
output (pin 30). Record these values as
BAS80*.
Here, * is R, G, and B, respectively.
Bias (cutoff) control resolution
Vbiassns
R bias:
0110000
G bias:
0110000
B bias:
0110000
Contrast max
1111111
Measure the output signal 0 IRE DC levels for
the R output (pin 28), G output (pin 29), and B
output (pin 30). Record these values as
BAS48*(V).
Here, * is R, G, and B, respectively.
Vbiassns* = (BAS80* – BAS48*)/32
Drive adjustment: Maximum output RGBout127
Contrast max
1111111
Brightness min
0000000
Measure the output signal 100 IRE amplitudes
for the R output (pin 28), G output (pin 29), and
B output (pin 30). Record these values as
DRVH* (V p-p).
Here, * is R, G, and B, respectively.
28
29
30
Output attenuation
RGBout0
Contrast max
1111111
L–100
Measure the output signal 100 IRE amplitudes
for the R output (pin 28), G output (pin 29), and
B output (pin 30). Record these values as
DRVL* (V p-p).
Brightness min
0000000
R drive min
0000000
B drive min
0000000
Here, * is R, G, and B, respectively.
RGBout0* = 20 × log (DRVH*/DRVL*)
No. 5844-21/27
LA76070
Deflection Block - Input Signals and Measurement Conditions
Unless otherwise indicated, set up the following conditions for each of the following measurements.
1. VIF and SIF blocks: No signal
2. C input: No signal
3. SYNC input: Horizontal and vertical composite synchronizing signal (40 IRE and other conditions, such as timing,
must conform to the FCC broadcast standards.)
Caution: The burst and chrominance signals must not be below the pedestal level.
4. Bus control conditions: All conditions set to the initial conditions unless otherwise specified.
5. The delay between the rise of the horizontal output (the pin 23 output) and the rise of the F.B.P IN (the pin 24 input)
must be 9 µs.
6. Unless otherwise specified, pin 25 (the X-ray protection circuit input) must be connected to ground.
Caution:
Perform the following operation if horizontal pulse output has stopped.
1. The bus data T_ENABLE bit must be temporarily set to 0 and then set to 1.
(If the X-ray protection circuit operates, an IC internal latch circuit will be set. To reset that latch circuit, the
T_ENABLE bit must be temporarily set to 0, even if there is no horizontal output signal being output.)
Notes on Video Muting
If horizontal pulse output has stopped, perform the operation described in item 1. above and then set the video mute bit
set to 0.
(This is because the video mute bit is forcibly set to the mute setting when the T_ENABLE bit is set to 0 or when the X-
ray protection circuit operates. This also applies when power is first applied.)
Measurement
point
Parameter
[Deflection Block]
Symbol
Ssync
∆fH
Input signal
Measurement procedure
Bus conditions
SYNC IN: Gradually lower the level of the synchronizing
horizontal and signal input to Y IN (pin 37) and measure the
Sync separator circuit sensitivity
vertical
level of the synchronizing signal at the point
37
synchronizing synchronization is lost
signal
Connect a frequency counter to the pin 23
output (Hout) and measure the horizontal free-
running frequency.
Calculate the deviation from the following formula.
∆fH = <measured value> – 15.734 kHz
Horizontal free-running
frequency deviation
SYNC IN:
No signal
23
37
23
SYNC IN:
horizontal and
vertical
synchronizing
signal
Monitor the horizontal synchronizing signal input
to Y IN (pin 37) and the pin 23 output (Hout),
and measure the pull-in range by modifying the
horizontal synchronizing signal frequency
Horizontal pull-in range
fH PULL
V Hsat
SYNC IN:
horizontal and
vertical
synchronizing
signal
Horizontal pulse output
saturation voltage
Measure the voltage during the low-level period
in the pin 23 horizontal output pulse
No. 5844-22/27
LA76070
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
Measure the delay between the rise of the pin
23 horizontal output pulse and the fall of the Y
IN horizontal synchronizing signal
SYNC IN:
horizontal and
vertical
synchronizing
signal
23
37
Horizontal output pulse phase
HPHCEN
Measure the delay between the rise of the pin
23 horizontal output pulse and the fall of the Y
IN horizontal synchronizing signal when
HPHASE is set to 0 and when it is set to 7,
and calculate the difference between those
SYNC IN: measurements and HPHCEN
horizontal and
vertical
synchronizing
signal
Hphase:
000
Hphase:
111
23
37
Horizontal position adjustment
range
HPHrange
Measure the delay between the rise of the pin
23 horizontal output pulse and the fall of the
SYNC IN horizontal synchronizing signal as
HPHASE is set to each value from 0 to 7, and
calculate the amount of the change at each step.
SYNC IN: Find the step size with the largest change.
horizontal and
Hphase:
000
to
Hphase:
111
23
37
Horizontal position adjustment
maximum deviation
HPHstep
vertical
synchronizing
signal
SYNC IN:
horizontal and
vertical
synchronizing
Connect a DC voltage source to pin 25 and
gradually increase the voltage starting at 0 V.
Measure the pin 25 DC voltage at the point that
23
25
X-ray protection circuit
operating voltage
VXRAY
the pin 23 horizontal pulse output stops.
signal
No. 5844-23/27
LA76070
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
[Vertical screen Size Adjustment]
Monitor the pin 17 vertical ramp output and
measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
and
Vertical ramp output amplitude
@32
Vsize32
17
17
17
vertical
synchronizing
signal
Monitor the pin 17 vertical ramp output and
measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
and
vertical
synchronizing
signal
Vertical ramp output amplitude
@0
VSIZE:
0000000
Vsize0
Monitor the pin 17 vertical ramp output and
measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
and
vertical
synchronizing
signal
VSIZE:
1111111
Vertical ramp output amplitude
@63
Vsize63
No. 5844-24/27
LA76070
Measurement
point
Parameter
Symbol
Input signal
Measurement procedure
Bus conditions
[Vertical screen Position Adjustment]
Monitor the pin 17 vertical ramp output and
measure the voltage at line 142
SYNC IN:
horizontal
and
vertical
synchronizing
signal
Vertical ramp DC voltage @32
Vertical ramp DC voltage @0
Vertical ramp DC voltage @63
Vdc32
17
17
17
Monitor the pin 17 vertical ramp output and
measure the voltage at line 142
SYNC IN:
horizontal
and
vertical
synchronizing
signal
Vdc0
VDC: 0000000
Monitor the pin 17 vertical ramp output and
measure the voltage at line 142
SYNC IN:
horizontal
and
vertical
synchronizing
signal
Vdc63
VDC: 1111111
No. 5844-25/27
LA76070
No. 5844-26/27
LA76070
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of July, 1999. Specifications and information herein are subject to
change without notice.
PS No. 5844-27/27
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