LC73701M [SANYO]

SERIAL INTERFACE DIALLER; 串行接口拨号器
LC73701M
型号: LC73701M
厂家: SANYO SEMICON DEVICE    SANYO SEMICON DEVICE
描述:

SERIAL INTERFACE DIALLER
串行接口拨号器

晶体 电信集成电路 光电二极管
文件: 总11页 (文件大小:113K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CMOS LSI  
No. 5561  
LC73701M  
Serial Interface Dialler  
• The dial pulse make ratio can be specified to be either  
33 or 39%.  
• Wide operating voltage range  
Overview  
The LC73701M is a DTMP/pulse output dual-system  
dialer CMOS LSI for use in push-button telephones. It  
provides an on-chip serial interface and operates under the  
control of data sent over that serial interface. The  
LC73701M can be easily controlled by the system CPU  
using this dedicated interface.  
Pulse mode: V = 1.5 to 5.5 V  
DD  
DTMF mode: V = 2.0 to 5.5 V  
DD  
Package Dimensions  
unit: mm  
Functions  
3095-MFP18  
• Functions as a dialer that is controlled over a serial  
interface.  
[LC73701M]  
• The built-in oscillator circuit (f  
= 4.19 MHz) can use  
OSC  
either a crystal oscillator or a ceramic resonator as its  
oscillator element.  
• The adoption of a high-precision (±0.04%) DTMF  
signal frequency divider circuit allows a ceramic  
resonator to be used as the oscillator element.  
• The buffer memory can store up to 32 digits of 5-bit  
data.  
• Mode change and pause commands can also be stored as  
data in the buffer memory.  
• Pauses can be inserted automatically on mode changes  
(auto-pause).  
• A pause can be cancelled during that pause.  
• The mode change function supports changing from pulse  
to tone (single direction).  
SANYO: MFP18  
• Generates all 16 DTMF signals.  
• The pulse dialer output can be turned on or off  
arbitrarily.  
• The pulse dialer output circuit can be selected to be  
either an n-channel open drain or a complementary  
circuit.  
• The pulse dialer muting function can be turned on or off  
arbitrarily.  
• A redial function is provided.  
• Flash operation is supported. (Data can be received  
during flash operation.)  
• The flash time can be switched to be either 277 or 707  
ms.  
• The pause time can be switched to be either 2 or 4  
seconds.  
• Hooking pause operation is supported. (1.2 s or 801 ms)  
• The dial pulse rate can be specified to be either 10 pps  
or 20 pps.  
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters  
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN  
53197HA(OT) No. 5561-1/11  
LC73701M  
Pin Assignment  
DTMF  
VSS  
Pin Functions  
Pin No.  
1
Pin  
I/O  
I
Pin function  
CE  
Set high when data is valid. This signal is also used when DTMF signals are issued consecutively in DTMF mode. The last  
DTMF signal is output until CE goes low.  
2
3
CK  
NC  
I
Data acquisition clock. Data is acquired on the rising edge of this signal.  
4
DATA  
RES  
I
I
Input for the 8-bit data.  
5
Reset input. Apply a low level to this input to reset dialer operation when, for example, power is first applied.  
Outputs a high level during dialer operation, including during pauses. This is a complementary output.  
6
BUSYOUT  
OSCI  
OSCO  
VSS  
O
I
7
Oscillator circuit connections. Connect either a crystal or ceramic 4.194304 MHz oscillator element to these pins.  
8
O
9
Power supply  
10  
11  
12  
13  
14  
15  
16  
17  
18  
VDD  
BMR  
I
Make ratio switching input. High: 33%, Low: 39%  
NC  
TEST  
DTMF  
MUTE2  
MUTE  
MUTE1  
DP  
I
LSI internal test pin. This pin either must be left open or must be tied low during normal operation.  
DTMF output. This is an npn emitter-follower output.  
O
O
O
O
O
DTMF mute output. This is an n-channel open-drain output.  
DP and DTMF mute output. This is an n-channel open-drain output.  
DP mute output. This is an n-channel open-drain output.  
DP output. This can be either an n-channel open-drain output or a complementary output.  
Unused inputs must always be tied to an appropriate logic level, i.e. either ground or VDD  
.
No. 5561-2/11  
LC73701M  
Block Diagram  
RAM  
5 bits × 32 digits  
No. 5561-3/11  
LC73701M  
Input Code Table  
WRITE  
TO RAM  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Data interpretation and notes  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
YES  
NO  
KEY D  
KEY 1  
KEY 2  
KEY 3  
KEY 4  
KEY 5  
KEY 6  
KEY 7  
KEY 8  
KEY 9  
KEY 0  
KEY *  
KEY #  
KEY A  
KEY B  
KEY C  
Illegal value  
NO  
Illegal value  
NO  
PAUSE clear (Only valid during a pause.)  
NO  
FLASH (707 or 277 ms)  
NO  
STOP (Forced termination of a the current dialing operation.)  
NO  
RD (redial)  
NO  
MUTE ST  
NO  
MUTE END  
NO  
ON-HOOK  
NO  
OFF-HOOK  
YES  
YES  
MODE-CH (Pulse to tone single-direction change)  
PAUSE (Pause for either 2.0 or 4.0 seconds.)  
X : Don’t care  
Only bits D0 to D4 are written to RAM.  
Mode Settings Command Table  
D7  
X
D6  
MODE  
(1)  
D5  
D4  
D3  
D2  
D1  
D0  
TEST  
(0)  
DPSEL  
(0) N-CH OD  
(0) CMP  
PAUSE  
(0) 4.0 s  
(1) 2.0 s  
FLASH  
P/T  
DPR  
X
(0) 707.0 ms  
(1) 277.3 ms  
(0) Tone  
(1) Pulse  
(0) 20 pps  
(1) 10 pps  
X
(1)  
(0)  
Flash time  
Hooking pause time  
707.0 ms..................800.8 ms  
277.3 ms..................1.23 s  
Note that a hooking pause of 804.7 ms is also inserted automatically on a DP-off operation.  
No. 5561-4/11  
LC73701M  
Mode Settings at Power On  
When power is first applied, the initial settings listed in the table below are established according to the state of the BMR  
pin.  
BMR PIN  
DPSEL  
PAUSE  
(0) 4.0 s  
(0) 4.0 s  
FLASH  
P/T  
DPR  
H (33.3%) (0) N-CH OD  
L (39.2%) (0) N-CH OD  
(0) 707.0 ms  
(0) 707.0 ms  
(1) Pulse  
(0) Tone  
(1) 10 pps  
(1) 10 pps  
Specifications  
Absolute Maximum Ratings at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
Parameter  
Maximum supply voltage  
Symbol  
DD max  
Conditions  
Ratings  
–0.3 to +6.5  
–0.3 to VDD +0.3  
–0.3 to VDD +0.3  
180  
Unit  
V
V
Maximum input voltage  
Maximum output voltage  
Allowable power dissipation  
Minimum load resistance  
Operating temperature  
Storage temperature  
VIN max  
V
VOUT max  
V
Pd max  
L min  
Ta 70°C  
Between the DTMF and the VSS pins  
mW  
k
R
1
Topr  
Tstg  
–30 to +70  
–40 to +125  
°C  
°C  
Allowable Operating Ranges at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
1.5  
max  
5.5  
VDDP  
VDDT  
VIHS  
VIH  
VILS  
VIL  
Pulse mode  
V
V
V
V
V
V
%
Supply voltage  
DTMF mode  
2.0  
0.8 VDD  
0.7 VDD  
VSS  
5.5  
VDD  
CK and CE input pins  
Input high-level voltage  
Input low-level voltage  
Oscillator pin rating  
Input pins other than CK and CE  
CK and CE input pins  
VDD  
0.2 VDD  
0.3 VDD  
+1.4  
Input pins other than CK and CE  
Center frequency = 4.194304 MHz  
VSS  
f
–1.4  
RS  
100  
Electrical Characteristics at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
max  
0.5  
In dial pulse output mode, output open  
DD = 3.0 V : VDD  
IDDP  
IDDT  
0.3  
0.5  
mA  
mA  
V
In DTMF output mode, output open,  
VDD = 3.0 V: VDD  
1.0  
Quiescent current drain  
Standby mode, output open  
IDD(ST)  
1
µA  
V
DD = 1.5 to 5.5 V : VDD  
Memory retention voltage  
Memory retention current  
VDR  
IDR  
Between VDD and VSS: VDD  
VDD = 1.0 V : VDD  
1
V
0.5  
1
µA  
VIH = VDD, VDD = 5.5 V : DATA, CK, CE,  
BMR, RS  
IIHI  
µA  
µA  
VIL = VSS, VDD = 5.5 V : DATA, CK, CE,  
BMR, RS  
Input pin current  
IILI  
–1  
–1  
IIHIT  
IILIT  
VIH = VDD, VDD = 5.5 V : TEST  
VIL = VSS, VDD = 5.5 V : TEST  
160  
330  
1
µA  
µA  
VOH = VDD, VDD = 5.5 V, when the output is  
off: BUSYOUT  
Output pin leakage current  
IOFF  
VOH1  
VOH2  
µA  
V
VDD = 1.5 V, IOH = –250 µA : BUSYOUT  
VDD = 5.5 V, IOH = –1 mA : BUSYOUT, DP,  
MUTE1, MUTE2, MUTE  
VDD –0.5  
V
V
V
V
DD –1  
Output pin voltage  
VDD = 1.5 V, IOL = 250 µA : BUSYOUT, DP,  
MUTE1, MUTE2, MUTE  
VOL1  
0.4  
0.4  
VDD = 5.5 V, IOL = 1 mA : BUSYOUT, DP,  
MUTE1, MUTE2, MUTE  
VOL2  
No. 5561-5/11  
LC73701M  
Dialer Input Format  
The serial data is input starting with the LSB.  
T1 must be at least 6.5 µs (When an external clock is supplied to OSC1.)  
If an oscillator element is used, T1 depends on the oscillator startup time for that oscillator element.  
*: For example, for ceramic oscillators, T1 will be about 1 ms (V = 3.0 to 5.5 V).  
DD  
T2 and T3 must be at least 1.0 µs.  
Serial Data Sequential Input Format  
Point when the DTMF output for KEY32 goes off  
KEY1 to KEY31 are guaranteed by the DTMF output time.  
*: Continuous input is limited to dial data. Continuous input of mode setting commands is not possible.  
Mode Settings Format  
Don’t care  
A06518  
No. 5561-6/11  
LC73701M  
Timing Charts  
(1) Pulse mode  
(2) Tone mode  
DTMF output  
DP output  
AC Characteristics at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
max  
When the D3 mode setting code is low (0)  
When the D3 mode setting code is high (1)  
4.0  
s
s
Pause time  
TAP  
2.0  
DTMF output time  
TMFON  
100.6  
114.0  
109.9  
707.0  
277.3  
800.8  
1.23  
200  
ms  
ms  
ms  
ms  
ms  
ms  
s
For the first and later digits  
DTMF inter-digit pause time  
Flash time  
TMFOFF  
For the last digit  
When the D2 mode setting code is low (0)  
When the D2 mode setting code is high (1)  
When the D2 mode setting code is low (0)  
When the D2 mode setting code is high (1)  
VDD = 3.5 V, RL = 10 k  
TFL  
Hooking pause time  
THKP  
Low tone amplitude  
Tone output ratio  
VOR  
165  
1
240  
3
mVrms  
dB  
dBCR  
%DIS  
V
DD = 2.0 to 5.5 V, RL = 10 k  
DD = 2.0 to 5.5 V, RL = 10 k  
2
Tone output distortion  
V
10  
%
Pulse Output at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
DPR  
H
BMR  
Dial pulse rate  
9.97 PPS  
Pre-digit pause  
33.3 + 10 ms  
39.2 + 10 ms  
16.7 + 10 ms  
19.7 + 10 ms  
Inter-digit pause  
839.0 ms  
Make ratio  
33.3%  
H
L
H
9.97 PPS  
844.9 ms  
39.2%  
L
H
L
19.93 PPS  
19.93 PPS  
571.6 ms  
33.3%  
L
574.6 ms  
39.2%  
DTMF Output Frequencies at Ta = 25°C, f  
= 4.194304 MHz  
OSC  
Output frequency (Hz)  
Input  
Deviation (%)  
Rating  
697  
LC73701  
697.2  
R1  
R2  
R3  
R4  
C1  
C2  
C3  
C4  
+0.027  
–0.016  
–0.023  
+0.029  
+0.036  
–0.018  
–0.009  
+0.018  
770  
769.9  
852  
851.8  
941  
941.3  
1209  
1336  
1477  
1633  
1209.4  
1335.8  
1476.9  
1633.3  
No. 5561-7/11  
LC73701M  
Internal Pin Circuits  
Pin No.  
Pin  
Internal circuit  
1
2
CE  
CK  
4
5
DATA  
RES  
11  
BMR  
6
BUSYOUT  
DP  
18  
7
8
OSCI  
OSCO  
15  
16  
17  
MUTE2  
MUTE  
MUTE1  
13  
TEST  
Continued on next page.  
No. 5561-8/11  
LC73701M  
Continued from preceding page.  
Pin No.  
Pin  
Internal circuit  
14  
DTMF  
18  
DP  
Notes:  
(1) The LC73701M output ports are initialized to the following states when power is first applied.  
BUSYOUT and DP pins: Low  
DTMF, MUTE1, MUTE, and MUTE2 pins: High-impedance  
OSC0 pin: High  
(2) The following methods can be used to forcibly terminate dial output.  
1. STOP command input  
Output ports: The DP and MUTE1 pins hold their previous states, all others are initialized.  
Redialing is possible after a STOP command is input. However, this requires that a dialing operation had been  
performed previously.  
2. Applying a low-level pulse (of at least 1 µs) to the RES pin.  
The operation is identical to that of the STOP command.  
However, redialing is not possible after this hardware reset.  
3. ON-HOOK command input  
The DP pin goes low, thus releasing the telephone line (circuit). Redialing is possible after an ON-HOOK  
command is input. However, if this dialing operation is performed, although DTMF signals will be output, since  
the DP is low dial pulses will not be output. (Since the LSI performs a redial operation internally, the BUSYOUT  
pin will go high and the associated muting signal will also be output.)  
4. OFF-HOOK command input  
A hooking pause will be inserted automatically after the OFF-HOOK command input. Redialing is possible.  
5. FLASH command input  
A hooking pause will be inserted automatically after the FLASH command input. Redialing is possible.  
(3) The MUTE ST and MUTE END commands  
These commands allows the MUTE1 pin to be controlled arbitrarily. The other muting outputs cannot be controlled  
explicitly.  
The figure below shows the timing.  
When a MUTE ST command is input, the MUTE1 pin goes low. During this low period, inputting pulse dial data  
will not cause the MUTE1 pin to return to the high level. That is, the low level is held until the next MUTE END  
command is input.  
No. 5561-9/11  
LC73701M  
(4) The ON-HOOK and OFF-HOOK commands  
These commands allows the DP pin to be controlled arbitrarily. The figure below shows the timing.  
A hooking pause is inserted automatically when the OFF-HOOK command is input. The DP pin goes low when an  
ON-HOOK command is input. During this low period, inputting pulse dial data will not cause the DP pin to return to  
the high level. (Since the LSI performs a redial operation internally, the BUSYOUT pin will go high.) That is, the  
low level is held until the next OFF-HOOK command is input.  
(5) The redial command  
The redial operation re-outputs the dial data in the LC73701M’s internal buffer memory. This buffer memory (redial  
memory) can hold up to 32 digits of dialing data. This means that if 33 or more digits of dialing data are input, earlier  
data will be overwritten starting with the thirty-third digit. After the following operations, the LC73701M will  
perform a redial operation if a redial command is input.  
1. When a flash command is input after dialing data has been input  
2. When an STOP command is input after dialing data has been input  
3. When an ON-HOOK command is input after dialing data has been input  
4. When an OFF-HOOK command is input after dialing data has been input  
(6) Mode settings  
The break/make ratio (BMR) is switched between 33% and 39% by the BMR pin. The BMR pin is initialized after  
power is first applied as shown in the table below.  
BMR PIN  
DPSEL  
PAUSE  
(0) 4.0 s  
(0) 4.0 s  
FLASH  
P/T  
DPR  
H (33.3%) (0) N-CH OD  
L (39.2%) (0) N-CH OD  
(0) 707.0 ms  
(0) 707.0 ms  
(1) Pulse  
(0) Tone  
(1) 10 pps  
(1) 10 pps  
Settings other than BMR (i.e. DPR, P/T, FLASH, PAUSE, and DPSEL) are switched using mode commands. The  
information set by mode setting commands is stored internally by the LSI. Set the desired mode before inputting dial  
data. When dial data is written to the buffer memory, the P/T register data is attached to that dial data.  
(7) Output pins during dialing and the redial operation  
See the table below. The terms ON and OFF in the table below refer to the on or off state of the n-channel open drain  
output transistor.  
DP  
ON (L)  
MUTE1  
MUTE, MUTE2  
OFF  
BUSYOUT  
Redial memory  
Readout is illegal  
Readout is illegal  
Readout allowed  
Readout allowed  
Readout allowed  
Readout allowed  
Readout allowed  
Power on  
OFF  
L
L
L
L
RES pin  
ON (L)  
*1 OFF  
OFF  
STOP command  
ON-HOOK command  
OFF-HOOK command  
MUTE-ST command  
MUTE-END command  
*2 OFF (H)  
*3 OFF  
OFF  
ON (L)  
Retains the previous state  
OFF  
OFF (H)  
Retains the previous state  
OFF  
*4  
H
L
L
Retains the previous state  
Retains the previous state  
ON  
OFF  
OFF  
OFF  
Notes: *2 Turned off during dialing. However, since this command takes priority after an OFF-HOOK command is input, the on state is retained.  
*1, 3: Turned off during dialing. However, since this command takes priority after a MUTE-ST command is input, the on state is retained.  
*4: Since a hooking pause is inserted automatically, this output goes high during that operation.  
No. 5561-10/11  
LC73701M  
(8) CE input format (When an oscillator element is used.)  
The figure below shows the CE timing.  
Although in the timing shown in the previous figure, T1 depends on the oscillator element startup time, here, this  
time does not need to be provided in the T1 period as long as it can be provided by the T4 period. For example,  
assume that the oscillator startup time when a ceramic oscillator is used is about 1 ms (when V = 3.0 to 5.5 V). In  
DD  
this case, this time must be provided by either setting T1 = 1 ms, or by setting T4 = 1 ms. However, note that T1  
must be 6.5 µs or greater and T4 must be 1 µs or greater.  
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace  
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of  
which may directly or indirectly cause injury, death or property loss.  
Anyone purchasing any products described or contained herein for an above-mentioned use shall:  
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and  
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all  
damages, cost and expenses associated with such use:  
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on  
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees  
jointly or severally.  
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for  
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied  
regarding its use or any infringements of intellectual property rights or other rights of third parties.  
This catalog provides information as of May, 1997. Specifications and information herein are subject to change  
without notice.  
No. 5561-11/11  

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