LC75348M [SANYO]
Single-Chip Electronic Volume and Tone Control System; 单芯片电子音量和音调控制系统
| 型号： | LC75348M |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Single-Chip Electronic Volume and Tone Control System |
| 文件： | 总21页 (文件大小：216K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENN7308
CMOS IC
LC75348, 75348M
Single-Chip Electronic Volume and
Tone Control System
Overview
Package Dimensions
unit: mm
The LC75348 and LC75348M are electronic volume and
tone control ICs that provide volume, balance, 2-band
equalizer, input gain control, and input switching
functions while requiring a minimal number of external
components.
3196-DIP30SD
[LC75348]
27.0
30
16
15
Functions
• Volume: 81 levels: 0 dB to –79 dB (in 1 dB steps) and
–∞.
1
The left and right channels are controlled independently,
allowing a balance function to be implemented.
• Bass: Peaking characteristics bass control with ±20 dB
range in 2 dB steps.
0.95
0.48
• Treble: Shelving characteristics treble control with ±10
dB range in 2 dB steps.
(1.04)
1.78
SANYO: DIP30SD
• Selector: One of 4 inputs can be selected for both left
and right channels.
• Input gain: Input signal amplification from 0 to +30 dB
(in 2 dB steps)
3216-MFP30SD
[LC75348M]
30
16
Features
• Built-in buffer amplifiers reduce the number of external
components required.
• Fabricated in a silicon gate CMOS process for minimal
switching noise from built-in switches and minimal
switching noise even when there is no input signal.
• Built-in zero cross circuits minimize switching noise
when input signals are present.
1
15
0.15
15.2
• Built-in V /2 reference voltage generator circuit.
• All functions are controlled from serial data. Supports
the CCB bus.
DD
(0.6)
0.4
1.0
SANYO: MFP30SD
•
•
CCB is a trademark of SANYO ELECTRIC CO., LTD.
CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
13103RM (OT) No. 7308 -1/21
LC75348, 75348M
Specifications
Absolute Maximum Ratings at Ta = 25°C, V = 0 V
SS
Parameter
Maximum supply voltage
Symbol
DD max
Conditions
Ratings
Unit
V
V
VDD
11
Maximum input voltage
V
IN max
All input pins
VSS – 0.3 to VDD + 0.3
V
Ta ≤ 75°C, Independent IC
LC75348
Allowable power dissipation
Pd max
450
mW
Ta ≤ 75°C, Mounted on a PCB
LC75348M
Operating temperature
Storage temperature
Topr
Tstg
–30 to +75
°C
°C
–40 to +125
Pin Assignment
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
LC75348
LC75348M
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
No. 7308 -2/21
LC75348, 75348M
Allowable Operating Ranges at Ta = –30 to +75°C, V = 0 V
SS
Ratings
typ
Parameter
Supply voltage
Symbol
Conditions
Unit
min
4.5
max
10
VDD
VIH
VDD
V
V
High-level input voltage
Low-level input voltage
Input voltage amplitude
Input pulse width
Setup time
CL, DI, CE
CL, DI, CE
2.7
VSS
VSS
1
10
1.0
VIL
V
VIN
CE, DI, CL, L1 to L4, R1 to R4, LIN, RIN
VDD
Vp-p
µs
tøW
tsetup
thold
fopg
CL
CL, DI, CE
CL, DI, CE
CL
1
µs
Hold time
1
µs
Operating frequency
500
kHz
Electrical Characteristics at Ta = 25°C, V = 9 V, V = 0 V
DD
SS
Ratings
typ
Parameter
Symbol
Pin name
Conditions
Unit
min
max
[Input Block]
Maximum input gain
Step resolution
Gin max
Gstep
Rin
30
2
dB
dB
Input resistance
L1, L2, L3, L4, R1, R2, R3, R4
LSELO, RSELO
50
kΩ
Clipping level
Vcl
THD = 1.0%, f = 1 kHz
2.50
Vrms
kΩ
Output load resistance
[Volume Control Block]
Input resistance
Rl
LSELO, RSELO
10
Rin
LIN, RIN
50
1
kΩ
Step resolution
Vstep
dB
[Treble Band Equalizer Control Block]
Control range
Geq
Estep
Rfeed
max. boost/cut
max. boost/cut
±8
1
±10
2
±12
3
dB
dB
kΩ
Step resolution
Internal feedback resistance
[Bass Band Equalizer Control Block]
Control range
51.7
Geq
Estep
Rfeed
±18
1
±20
2
±22
3
dB
dB
kΩ
Step resolution
Internal feedback resistance
[Overall Characteristics]
66.6
V
IN = 1 Vrms, f = 1 kHz,
All controls flat overall
IN = 1 Vrms, f = 1 kHz,
Total harmonic distortion
Crosstalk
THD
CT
0.01
%
V
Rg = 1 kΩ
80
dB
All controls flat overall
All controls flat overall
IHF – A
Output noise voltage
VN
6
µV
Maximum attenuation
Current drain
Vomin
IDD
IIH
All controls flat overall
VDD – VSS = +10 V
–80
40
dB
mA
µA
µA
High-level input current
Low-level input current
CL, DI, CE: VIN = 10 V
CL, DI, CE: VIN = 0 V
10
IIL
–10
No. 7308 -3/21
LC75348, 75348M
Equivalent Circuit
µCOM
4
3
2
1
30
29
28
27
5
26
ROUT
LOUT
LBASS2
RBASS2
25
6
0.1µF
0.1µF
0.1µF
3.7kΩ
f0 = 100Hz
0.1µF
24
RBASS1
3.7kΩ
f0 = 100Hz
7
LBASS1
2700pF
23
RTRE
8
2700pF
LTRE
22
RIN
9
LIN
1µF
1µF
21
RSELO
10
LSELO
11
12
13
14
15
16
17
18
19
20
No. 7308 -4/21
LC75348, 75348M
Control System Timing and Data Format
The stipulated serial data must be input to the CL, DI, and CE pins to control the LC75348 and LC75348M. The data
structure has a total of 40 bits, of which 8 bits are address and 32 bits are data.
CE
B0 B1 B2 B3 A0 A1 A2 A3
D0
D1 D2 D3 D4 D5
D25 D26 D27 D28 D29 D30 D31
DI
CL
1µs 1µs 1µs
min min min
CE
CL
1µs min
1µs min
DI
1µs ≤ TDEST
• Address code (B0 to A3)
The data has an 8-bit address code, which allows this IC to be used with the SANYO CCB serial bus.
B0
0
B1
1
B2
0
B3
0
A0
0
A1
0
A2
0
A3
1
Address code (LSB)
(82HEX)
• Control code allocation
Input switching control
(L1, L2, L3, L4,
R1, R2, R3, R4)
D0
0
D1
0
D2
0
D3
0
Operation
L1 (R1) ON
L2 (R2) ON
L3 (R3) ON
L4 (R4) ON
1
0
0
0
0
1
0
0
1
1
0
0
No. 7308 -5/21
LC75348, 75348M
Input gain control
D4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Operation
0 dB
+2 dB
+4 dB
+6 dB
+8 dB
+10 dB
+12 dB
+14 dB
+16 dB
+18 dB
+20 dB
+22 dB
+24 dB
+26 dB
+28 dB
+30 dB
No. 7308 -6/21
LC75348, 75348M
Volume control
D8
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
D9
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
D10
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
D11
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
D12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
D13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Operation
0 dB
–1 dB
–2 dB
–3 dB
–4 dB
–5 dB
–6 dB
–7 dB
–8 dB
–9 dB
–10 dB
–11 dB
–12 dB
–13 dB
–14 dB
–15 dB
–16 dB
–17 dB
–18 dB
–19 dB
–20 dB
–21 dB
–22 dB
–23 dB
–24 dB
–25 dB
–26 dB
–27 dB
–28 dB
–29 dB
–30 dB
–31 dB
–32 dB
–33 dB
–34 dB
–35 dB
–36 dB
–37 dB
–38 dB
–39 dB
–40 dB
–41 dB
–42 dB
–43 dB
–44 dB
–45 dB
–46 dB
–47 dB
–48 dB
–49 dB
–50 dB
Continued on next page.
No. 7308 -7/21
LC75348, 75348M
Continued from preceding page.
D8
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
D9
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
D10
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
D11
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
D12
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
D13
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D14
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Operation
–51 dB
–52 dB
–53 dB
–54 dB
–55 dB
–56 dB
–57 dB
–58 dB
–59 dB
–60 dB
–61 dB
–62 dB
–63 dB
–64 dB
–65 dB
–66 dB
–67 dB
–68 dB
–69 dB
–70 dB
–71 dB
–72 dB
–73 dB
–74 dB
–75 dB
–76 dB
–77 dB
–78 dB
–79 dB
–∞
Treble control
D16
1
D17
0
D18
1
D19
0
Operation
+10 dB
0
0
1
0
+8 dB
+6 dB
+4 dB
+2 dB
0 dB
1
1
0
0
0
1
0
0
1
0
0
0
0
0
0
0
1
0
0
1
–2 dB
–4 dB
–6 dB
–8 dB
–10 dB
0
1
0
1
1
1
0
1
0
0
1
1
1
0
1
1
No. 7308 -8/21
LC75348, 75348M
Bass control
D20
0
D21
1
D22
0
D23
1
D24
0
Operation
+20 dB
+18 dB
+16 dB
+14 dB
+12 dB
+10 dB
+8 dB
1
0
0
1
0
0
0
0
1
0
1
1
1
0
0
0
1
1
0
0
1
0
1
0
0
0
0
1
0
0
1
1
0
0
0
+6 dB
0
1
0
0
0
+4 dB
1
0
0
0
0
+2 dB
0
0
0
0
0
0 dB
1
0
0
0
1
–2 dB
0
1
0
0
1
–4 dB
1
1
0
0
1
–6 dB
0
0
1
0
1
–8 dB
1
0
1
0
1
–10 dB
–12 dB
–14 dB
–16 dB
–18 dB
–20 dB
0
1
1
0
1
1
1
1
0
1
0
0
0
1
1
1
0
0
1
1
0
1
0
1
1
Zero cross control
Channel selection
D25
0
Operation
Data is written according to zero cross detection.
1
Zero cross detection operation is stopped. (Data is acquired on the falling edge of the CE signal.)
D26
0
D27
0
Operation
1
0
RCH
LCH
0
1
1
1
Left and right channels at the same time
Zero cross signal
detection block control
D28
0
D29
0
Operation
Selector
Volume
Tone
1
0
0
1
Test mode
D30
0
D31
0
Operation
These bits select the IC test modes and must be set to 0
during normal operation.
No. 7308 -9/21
LC75348, 75348M
Pin Functions
Pin No.
Pin
Function
Notes
14
13
12
11
17
18
19
20
L1
L2
L3
L4
R1
R2
R3
R4
VDD
VDD
• Audio signal inputs
SELO
Ln
Rn
Vref
10
21
LSELO
RSELO
• Input selector outputs
VDD
7
6
LBASS1
LBASS2
RBASS1
RBASS2
• Connections for the capacitors and resistors that form the
bass band filters
24
25
VDD
BASS1
VDD
BASS2
VDD
9
LIN
• Volume and equalizer inputs
IN
22
RIN
VDD
OUT
5
LOUT
ROUT
• Volume and equalizer outputs
26
VDD
8
LTRE
RTRE
• Connections for the capacitors that form the treble band
filters
TRE
23
Continued on next page.
No. 7308 -10/21
LC75348, 75348M
Continued from preceding page.
Pin No.
Pin
Function
Notes
VDD
• 1/2 VDD voltage generator used for the analog system
ground
28
Vref
A capacitor of about 10 µF must be connected between
Vref and AVSS (VSS) to minimize power supply ripple.
VSS
VDD
3
• Ground
29
• Power supply
VDD
• Time setting for the zero cross circuit no signal state time.
If no zero cross is recognized between the time the data is
stored and the time this timer completes, the data is
acquired forcibly.
27
TIM
• Chip enable
VDD
Data is written to the internal latch and the analog switches
operate when this pin goes from high to low. Data transfers
are enabled when this pin is high.
2
CE
1
DI
• Inputs for the clock and serial data signals used to control
this IC
30
CL
VDD
• Electronic volume control test pin.
This pin must be tied to the VSS level.
4
TEST
15
16
• Unused (no connection) pins. These pins must be either
NC
left open or tied to VSS
.
No. 7308 -11/21
LC75348, 75348M
Internal Equivalent Circuits
• Selector Block Equivalent Circuit
L1
L2
L3
L4
LSELO
0dB
2dB
1.234
0.980
0.779
0.618
0.491
0.390
0.310
0.246
0.196
0.155
0.123
0.098
0.078
0.062
0.049
0.190
R1
R2
50
50
50
50
4dB
R3
6dB
LVref
R4
8dB
R5
The right channel is identical.
Units (Resistors: kΩ)
10dB
12dB
14dB
16dB
18dB
20dB
22dB
24dB
26dB
28dB
30dB
R6
R7
R8
Total = 6
R9
R10
R11
R12
R13
R14
R15
R16
LVref
No. 7308 -12/21
LC75348, 75348M
• Volume Control Block Internal Equivalent Circuit
LIN
0dB
–1dB
R28 = 243
R29 = 216
R30 = 193
R31 = 172
R32 = 153
R33 = 137
R34 = 122
R35 = 108
R36 = 97
R37 = 86
R38 = 77
R39 = 68
R40 = 61
R41 = 54
R42 = 48
R43 = 86
R44 = 77
R45 = 69
R46 = 61
R47 = 55
R48 = 49
R49 = 87
R50 = 77
R51 = 69
R52 = 61
R53 = 55
R54 = 49
R55 = 87
R56 = 77
R57 = 69
R58 = 61
R59 = 55
R60 = 49
R61 = 87
R62 = 78
R63 = 69
R64 = 62
R65 = 55
R66 = 49
R67 = 87
R68 = 78
R69 = 69
R70 = 62
R71 = 55
R72 = 49
R73 = 87
R74 = 78
R75 = 69
R76 = 62
R77 = 55
R78 = 49
R79 = 44
R80 = 359
R1 = 5434
R2 = 4845
R3 = 4319
R4 = 3850
R5 = 3431
R6 = 3058
R7 = 2726
R8 = 2429
R9 = 2165
R10 = 1930
R11 = 1720
R12 = 1533
R13 = 1366
R14 = 1218
R15 = 1085
R16 = 967
R17 = 862
R18 = 768
R19 = 685
R20 = 610
R21 = 544
R22 = 485
R23 = 432
R24 = 385
R25 = 343
R26 = 306
R27 = 273
–28dB
–29dB
–30dB
–31dB
–32dB
–33dB
–34dB
–35dB
–36dB
–37dB
–38dB
–39dB
–40dB
–41dB
–42dB
–43dB
–44dB
–45dB
–46dB
–47dB
–48dB
–49dB
–50dB
–51dB
–52dB
–53dB
–54dB
–55dB
–56dB
–57dB
–58dB
–59dB
–60dB
–61dB
–62dB
–63dB
–64dB
–65dB
–66dB
–67dB
–68dB
–69dB
–70dB
–71dB
–72dB
–73dB
–74dB
–75dB
–76dB
–77dB
–78dB
–79dB
–∞
To
treble
block
–2dB
–3dB
–4dB
–5dB
–6dB
–7dB
–8dB
–9dB
–10dB
–11dB
–12dB
–13dB
–14dB
–15dB
–16dB
–17dB
–18dB
–19dB
–20dB
–21dB
–22dB
–23dB
–24dB
–25dB
–26dB
–27dB
794
R81
796
R82
798
R83
800
R84
802
R85
804
R86
The right channel is identical.
Units (Resistors: Ω)
LVref
No. 7308 -13/21
LC75348, 75348M
• Treble/Bass Band Block Internal Equivalent Circuit
From
volume
block
SW3
SW4
SW2
SW1
The right channel is identical.
Units (Resistors: kΩ)
R6 = 16.240
LTRE
Total = 51.701
SW3
SW4
LOUT
SW2
SW1
Total = 66.6
LBASS1
LBASS2
The right channel is identical.
Units (Resistors: kΩ)
For boost, switches SW1 and SW3 are on, and for cut, switches SW2 and SW4 are on.
For 0 dB, the 0dBSW, SW2, and SW3 are on.
No. 7308 -14/21
LC75348, 75348M
Bass Band Circuit
This section presents the equivalent circuit and the formulas for calculating the R and C values for a 100 Hz center
frequency.
• Bass band equivalent circuit
R1
R2
C1
C2
R3
• Sample calculation
Specifications: Center frequency: f0 = 100 Hz
Gain at maximum boost: G = 20 dB
Assume R1 = 0, R2 = 66.6 kΩ, and C1 = C2 = C.
(1) Determine R3 from the G = 20 dB condition.
R2
G+20dB = 20 × LOG10 1 +
2R3
R2
66000
2 × (10 – 1)
R3 =
=
3.7kΩ
=
2 10G+20dB/20 –1
(2) Determine C from the center frequency f0 = 100 Hz condition
1
f 0 =
2π
R3R2C1C2
1
1
C =
=
0.1µF
=
2πf 0 R3R2
2π × 100 66000 × 3700
(3) Determine Q
R3R2
Q =
1
·
2.1
=
2R3
R3R2
No. 7308 -15/21
LC75348, 75348M
Treble Band Circuit
The treble band circuit can provide shelving characteristics.
This section presents the equivalent circuit for boost operation and the calculation formulas.
R1
R2
C
• Sample calculation
Specifications: Set frequency: f = 26,000 Hz
Gain at maximum boost: G = 10 dB
+10 dB
Assume R1 = 16.240 KΩ, and R2 = 35.461 KΩ.
The constants mentioned above are calculated as follows.
R2
G = 20 × LOG10 1 +
R12 + (1 / ωC)2
1
C =
2
R2
10G/20 –1
2πf
– R12
1
=
2700(pF)
=
2
35461
2π26000
– 162402
3.16 – 1
No. 7308 -16/21
LC75348, 75348M
Usage Notes
• The internal transistor states are undefined when power is first applied. Applications must mute the output until control
data has been written to the IC.
• Operational description of the zero cross switching circuit
The LC75348 and LC75348M provide a function that can switch the zero cross comparator signal detection point,
allowing applications to select an optimal detection point for the block whose data is being updated. Basically,
switching noise can be minimized if the signal immediately following the block whose data is updated is input to the
zero cross comparator. This means that the detection point must be switched each time data is updated.
Selector
Volume
Tone controls
Switch
Zero cross
comparator
LC75348 and LC75348M Zero Cross Detection Circuit
• Zero cross switching control procedure
The zero cross switching control procedure consists of three steps. First, set the zero cross control bit to zero cross
detection mode (D25 = 0), then specify the block for detection (with bits D28 and D29), and finally transfer the data.
Since these control bits are latched first, immediately after the data is transferred, i.e. on the CE falling edge, the mode
can be set in a single data transfer operation when updating the volume control or other control block data. The figure
below presents an example of the control used when updating the volume control block data.
D25
0
D28
1
D29
0
Zero cross detection
mode setting
Volume control
block setting
No. 7308 -17/21
LC75348, 75348M
• Zero cross timer setting
If the input signal is lower than the zero cross comparator detection sensitivity, or if a low-frequency signal is input, the
state in which the circuit cannot detect a zero cross may continue and the input data will not be latched during that
period.
The zero cross timer sets a time for the data to be latched forcibly in states such as this where a zero cross cannot be
detected.
For example, to set a 25 ms time:
T = 0.69 CR
Assume C = 0.068 µF. The R will be:
25 × 10–3
R = ————————— ≈ 530 kΩ
0.69 × 0.068 × 10–6
Normally, a time in the range 10 to 50 ms is used.
• Notes on serial data transfer
(1) Cover the CL, DI, and CE signal lines with the ground pattern or use shielded lines to prevent the high-frequency
digital signals carried by these lines from entering the analog signal system.
(2) The LC75348 and LC75348M data format consists of 8 bits of address and 32 bits of data. When transmitting data
as an even multiple of 8 bits (when transferring 36 bits of data), use the data format shown below.
LC75348 and LC75348M Data Reception in Multiples of 8 Bits
X
X
X
X
D0
D1
D2
D3
D24 D25 D26 D27 D28 D29 D30 D31
Dummy data
Input switching control
Test mode control
X: don’t care
No. 7308 -18/21
LC75348, 75348M
Volume Characteristics
Input Gain Characteristics
Setting — dB
Setting — dB
Bass Characteristics
Treble Characteristics
No. 7308 -19/21
LC75348, 75348M
THD – Frequency Characteristics
THD – Input Level Characteristics
Input Level — dB
Frequency — Hz
THD – Supply Voltage Characteristics
Supply Voltage — V
No. 7308 -20/21
LC75348, 75348M
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of January, 2003. Specifications and information herein are subject
to change without notice.
PS No. 7308 -21/21
相关型号：
LC7535M
Electronic Volume/Loudness Control with Serial Data Control and High Voltage-Handling Capacity
SANYO
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