SDC4569AUTR-G1 [SDC]
Current Mode PWM Controller;型号: | SDC4569AUTR-G1 |
厂家: | Shaoxing Devechip Microelectronics Co., Ltd |
描述: | Current Mode PWM Controller |
文件: | 总11页 (文件大小:362K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Features
Datasheet
General Description
SDC4569A is a highly integrated current mode PWM
control IC optimized for high performance, low standby
power and cost effective offline flyback converter
applications in sub 60W range.
Frequency shuffling technology for improved EMC
performance
Audio noise free operation
Extended burst mode control for improved efficiency
and minimum standby power design
External programmable pwm switching
Internal synchronized slope compensation
Low VDD startup current and low operating current
Leading edge blanking on current sense input
Good protecverage with auto self-recovery
(UVLOOCP/OLP)
The internal slope compensation improves system large
signal stability and reduces the possible subharmonic
oscillation at high PWM duty cycle output. Leading-edge
blanking on current sense(CS) input removes the signal
glitch due to snubber circuit diode reverse recovery and
thus greatly reduces the external component count and
system cost in the design.
Package: P-8
SDC4569A offers complete protection coverage with
automatic self-recovery feature including cycle-by-cycle
current limiting (OCP), over load protection (OLP), VDD
over voltage clamp and under voltage lockout (UVLO). The
gate drive output is clamped to maximum 12V to protect
the power MOSFET.
Applications
Battery charger
Power adaptor
Set-top box power supplies
SOP-8
Figure 1. Package Type
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Pin Configuration
Package: SOP-8
GND
GATE
1
8
FB
VIN
RI
7
6
2
3
VDD
SENSE
NC
4
5
Figure 2. Pin Configuration
Pin No.
Pin Name
Fun
1
GND
Ground
Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and
2
3
4
FB
VIN
RI
SENSE pin input
Connected through a large value resistor to rectified line input for startup IC supply
Internal Oscillator frequency setting pin. A resistor connected between RI and GND set
the PWM frequency
5
6
7
8
NC
-
SENSE
VDD
Cursense input pin. Connected to MOSFET current sensing resistor node
Chip DC power supply pin
GATE
Totem-pole gate drive output for the power MOSFET
Table 1. Pin Description
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Functional Block Diagram
RI
Current
Reference
POR
VIN
Soft
Drive
GATE
SET
S
Q
Q
Shuffling
OSC
VDD
UVLO
VDD
CLR
R
Burst
Mode controller
Clamping
VTH_OC
Leading
Edge
Blanking
SENSE
FB
Internal
Supply
Regulator
OVP
ope
ensation
OLP
GND
Figure 3. Functional Block Diagram
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Datasheet
Ordering Information
-
X
SDC4569A X
X
E1: Pb-free
G1: Halogen-free
Circuit Type
Blank: Tube
TR: Tape Reel
Package
SOP-8: U
Part Number
Pb-free Halogefree
Marking ID
Temperature
Range
Packing
Type
Package
Pb-free
Halogen-free
4569AG
SOP-8
SDC4569AUTR-E1 SDC4569AUTR-G1
4569A
Tape Reel
-40℃~85℃
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Datasheet
Absolute Maximum Ratings (NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device.)
Parameter
VDD DC supply voltage
Symbol
VDD
Value
-0.3~30
32
Unit
V
VDD clamp voltage
VDD_CLAMP
ICLAMP
VFB
V
VDD DC clamp current
10
mA
V
VFB input voltage
-0.3~7
-0.3~7
-0.3~7
150
SENSE input voltage
VSENSE
VRI
V
VRI input voltage
V
Operating junction temperature TJ
Storage temperature TSTG
Latch-up test per JEDEC 78
ESD,HBM model per Mil-Std-883H,Method 3015
ESD,MM model per JEDEC EIA/JESD22-A115
TJ
°C
°C
mA
V
TSTG
~150
200
-
HBM
MM
2000
200
V
Table 2. Absolute Maxum Ratings
Recommended Operating Conditions
Parameter
Symbol
VDD
Min
10
Max
Unit
VDD DC supply voltage
30
85
70
V
Operating Temperature Range
Oscillation frequency
TOP
-40
60
°C
kHz
fOSC
Table 3. Recommended Operating Conditions
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Electrical Characteristics (Ta=25°C, unless otherwise specified)
Parameter Symbol Condition
Supply Voltage (VDD)
VDD =12.5V, RI=24k
Min
Typ
Max
Unit
VDD start up current
ISTARTUP
Measure Leakage
current into VDD
VDD=16V, RI=24k,
VFB=3V
-
3
20
uA
Operation current
IDD
-
14
7.5
14
-
mA
V
VDD under voltage lockout enter
VUVLO(ON)
VUVLO(OFF)
VDD_CLAMP
-
6.5
13
30
8.5
15
34
VDD under voltage lockout exit
(recovery)
-
V
VDD zener clamp voltage
IDD=10mA
32
V
Feedback Input Section(FB pin)
FB open loop voltage
VFB_OPEN
IFB_SHORT
-
-
-
4.8
0.8
-
-
V
Short FB pin to GND
and Measure Current
FB pin short circuit current
mA
Zero duty cycle FB threshold voltage zero
Power limiting FB threshold voltage
Power limiting debounce time
VTH_0D
VTH_PL
tD_PL
VDD=16V, RI=24k
-
-
-
-
0.85
V
V
-
-
3.7
35
-
-
ms
VDD=16V,RI=24k,
FB=3V,CS=0
Maximum duty cycle
DCMAX
70
80
90
%
Current Sense Input(Sense Pin)
Leading edge blanking time
tBLANKING
tD_OC
RI = 24K
-
-
300
75
-
-
ns
ns
VDD= 16V,
Over current detection and control delay
CS>VTH_OC, FB=3.3V
Ovent threshold voltage at zero duty
cycle
VTH_OC
FB=3.3V, RI=24k
0.70
0.75
0.80
V
Oscillator
Normal oscillation frequency
Frequency temperature stability
Frequency voltage stability
fOSC
RI=24k
60
-
65
5
70
-
kHz
%
VDD=16V,RI=24k,
ΔfTEMP
ΔfVDD
Ta=-20°C~ 100°C
VDD=12V~25V,RI=24k
-
5
-
%
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Parameter
RI open load voltage
Burst mode base frequency
Soft start time
Symbol
VRI_OPEN
fBM
Condition
Min
Typ
2
Max
Unit
V
-
-
-
-
-
-
-
VDD = 16V, RI =24k
-
22
7
kHz
ms
tSOFT
Gate Drive Output
Output low level
VOL
VOH
VCLAMP
tr
VDD=16V, Io=-20mA
VDD=16V, Io=20mA
-
-
10
-
-
0.8
V
V
Output high level
-
-
-
-
Output clamp voltage level
Output rising time
Output falling time
12
125
50
V
VDD=16V, CL
VDD=16V, CL=1nf
-
ns
ns
tf
-
Frequency Shufling
Shuffling frequency
fOSC
RI=24k
RI=24k
-
64
-
-
Hz
%
Modulation range/Base frequency
ΔfOSC
-3
3
Tabe 4. Electrical Characteristics
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Function Description
The SDC4569A is a highly integrated PWM controller IC
optimized for offline flyback converter applications in sub
65W power range. The extended burst mode control
greatly reduces the standby power consumption and helps
the design easily meet the international power
conservation requirements.
the loading condition. Under no load to light/medium load
condition, the FB input drops below burst mode threshold
level, device enters burst mode control. The gate drive
output switches only when VDD voltage drops below a
preset level and FB input is active to output an on state,
otherwise the gate drive remains at off state to minimize
the switching loss and reduces the standby power
consumption to the greatest extend. The frequency
control also eliminates the audio noise at any loading
conditions.
Startup Current and Start up Control
Startup current of SDC4569A is designed to be very low so
that VDD could be charged up above UVLO threshold level
and device starts up quickly. A large value startup resistor
can therefore be used to minimize the power loss yet
provides reliable startup in application.
Oscillator ation
A resistor connected between RI and GND sets the
cstant current source to charge/discharge the internal
caand thus the PWM oscillator frequency is determined.
The relationship between RI and switching frequency
follows the below equation within the specified RI in kΩ
range at nominal loading operational condition.
Operating Current
The operating current of SDC4569A is low at 1.4mA. Good
efficiency is achieved with SDC4569A low operating
current together with extended burst mode control
features.
1560
fosc =
(kHz)
Frequency shuffling for EMI improent
RI(kΩ)
The frequency shuffling/jittering (switching frequency
modulation) is implemented in SDC4569A. The oscillation
frequency is modulated with a random source so that the
tone energy is spread e spread spectrum minimizes
the conduction band EMI and therefore reduces system
design challenge.
Current Sensing and Leading Edge Blanking
Cycle-by-cycle current limiting is offered in SDC4569A
current mode PWM control. The switch current is
detected by a sense resistor into the sense pin. An internal
leading edge blanking circuit chops off the sense voltage
spike at initial MOSFET on state due to Snubber diode
reverse recovery so that the external RC filtering on sense
input is no longer required. The current limit comparator
is disabled and thus cannot turn off the external MOSFET
during the blanking period. PWM duty cycle is determined
by the current sense input voltage and the FB input
voltage.
Extended Burst Mode Operation
Undload or light load condition, meet of the power
dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of
the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of
switching events within a fixed period of time, Reducing
switching frequent leads to the reduction on power loss
and thus conserves the energy.
Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp
onto the current sense input voltage for PWM generation.
SDC4569A self adjusts the switching mode according to
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This greatly improves the close loop stability at CCM
control. The low idle loss and good EMI system design is
easier to achieve with this dedicated control scheme. An
internal 12V clamp is added for MOSFET gate protection at
higher than expected VDD input.
and prevents the sub-harmonic oscillation and thus
reduces the output ripple voltage.
Gate Drive
Protection Controls
SDC4569A Gate is connected to an external MOSFET gate
for power switch control. Too weak the gate drive strength
results in higher conduction and switch loss of MOSFET
while too strong gate drive output compromises the EMI.
A good tradeoff is achieved through the built-in totem
pole gate design with right output strength and dead time
Good power supply system reliability is achieved with its
rich protection features including cycle-by-cycle current
limiting (OCP), over load protection (OLP) and over voltage
clamp, under voltage lockout on VDD (UVLO).
Typical Application
V+
GND
GATE
VDD
FB
VIN
RI
SENSE
NC
SDC4569A
Figure 4. Typical Application
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Datasheet
Package Dimension
SOP-8
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
1.750
0.250
1.550
0.510
0.250
5.100
Min
Max
0.069
0.010
0.061
0.020
0.010
0.201
A
A1
A2
b
1.350
0.100
1.350
0.330
0.170
4.700
0.053
0.004
0.053
0.013
0.007
0.185
c
D
e
1.270(BSC)
0.050(BSC)
E
5.800
3.800
0.400
0°
6.200
4.000
1.270
8°
0.228
0.150
0.016
0°
0.244
0.157
0.050
8°
E1
L
θ
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IMPORTANT NOTICE
Information in this document is provided solely in connection with Shaoxing Devechip Microelectronics Co., Ltd. (abbr. SDC) products.
SDC reserves the right to hanges, corrections, modifications or improvements, to this document, and the products and services
described herein at anytimthout notice. SDC does not assume any responsibility for use of any its products for any particular
purpose, nor does SDC asume any liability arising out of the application or use of any its products or circuits. SDC does not convey
any license under its patent rights or other rights nor the rights of others.
© 2013 Devechip Microelectronics - All rights reserved
Contact
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Address: Tian Mu Road, No13,
Shaoxing city, Zhejiang province, China
Zip code: 312000
Shenzhen Branch
Address: 22A, Shangbu building, Nan Yuan Road, No.68,
Futian District, Shenzhen city, Guangdong province, China
Zip code: 518031
Tel: (86) 0575-8861 6750
Tel: (86) 0755-8366 1155
Fax: (86) 0575-8862 2882
Fax: (86) 0755-8301 8528
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