S1F76610M2E0 [SEIKO]
IC,DC/DC CONVERTER,-18V,CMOS,SOP,16PIN;
| 型号： | S1F76610M2E0 |
| 厂家： | 
SEIKO EPSON CORPORATION |
| 描述： | IC,DC/DC CONVERTER,-18V,CMOS,SOP,16PIN 光电二极管 |
| 文件： | 总29页 (文件大小：617K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S1F76610M2E
Technical Manual
Rev.1.1
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to
any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty
that anything made in accordance with this material will be free from any patent or copyright infringement of a
third party. This material or portions thereof may contain technology or the subject relating to strategic
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export
license from the Ministry of Economy, Trade and Industry or other approval from another government agency.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
©SEIKO EPSON CORPORATION 2008, All rights reserved.
Configuration of product number
ꢀDEVICES
S1
F
76610 M 2E0
000
Packing specifications
Specifications
Shape
(M : SOP, SSOP)
Model number
Model name
(F : Power Supply)
Product classification
(S1:Semiconductors)
Table of Contents
1. DESCRIPTION ................................................................................................................1
2. FEATURES......................................................................................................................1
3. BLOCK DIAGRAM..........................................................................................................2
4. PIN DESCRIPTION .........................................................................................................3
4.1 Pin assignment .............................................................................................................................3
4.2 Pin functions.................................................................................................................................3
5. FUNCTIONAL DESCRIPTION ........................................................................................4
6. ELECTRICAL CHARACTERISTICS...............................................................................7
6.1 Absolute maximum ratings..........................................................................................................7
6.2 Recommended operating conditions..........................................................................................8
6.3 Electrical characteristics..............................................................................................................9
6.4 Measuring circuits ......................................................................................................................10
7. CHARACTERISTIC DATA SHEETS .............................................................................12
8. APPLIED-CIRCUIT EXAMPLES...................................................................................17
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
i
1. DESCRIPTION
1. DESCRIPTION
The S1F76610 is a CMOS DC-DC converter with high efficiency and low power consumption.
It consists of two major components: a booster and a stabilizer. The booster assures double boosting output
(-3.6 to -12V) or triple boosting output (-5.4 to -18V) for input voltage (-1.8 to -6V).
The stabilizer sets any output voltage. It also provides three types of negative temperature gradients for
stabilization output, and it is appropriate for LCD power.
The S1F76610 enables you to drive an IC (liquid crystal driver, analog IC, etc.) that would usually require
another power supply in addition to the logic main power, using a single power supply. Therefore, it is suitable
for supplying micro-power to compact electrical devices such as hand-held computers with low power
consumption.
2. FEATURES
(1) CMOS DC-DC converter with high efficiency and low power consumption
(2) Easy conversion from input voltage VIN (-5V) to four types of positive/negative voltages
Output + | VIN | (+5V), +2 |VIN | (+10V), 2VIN (-10V), and 3VIN (-15V) from input VIN (-5V)
(3) Output voltage stabilizer built-in
Any output voltage settable with external resistor
(4) Output current ꢁꢁꢁꢁꢁꢁꢁꢁꢁ Max. 20 mA (VIN = -5V)
(5) Power conversion efficiency ꢁꢁꢁꢁꢁꢁꢁꢁꢁ Typ. 95%
(6) Temperature gradient selectable for LCD power
3 types: -0.05%/°C, -0.30%/°C and -0.50%/°C
(7) Power-off operation by external signal
Static current for power-off: Max. 2µA
(8) Serial connection enabled (VIN = -5V, VOUT = -20V using two ICs)
(9) Low voltage operation: Appropriate for battery drive
(10) CR oscillation circuit built-in
(11) SSOP2-16 pin
(12) This IC is not designed for strong radiation activity proof.
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
1
3. BLOCK DIAGRAM
3. BLOCK DIAGRAM
VDD
CR
OSC1
OSC2
oscillation
circuit
TC1
TC2
VIN
Voltage
converter
(1)
CAP1-
CAP1+
CAP2-
CAP2+
Voltage
converter
(2)
XPOFF
RV
VREG
VOUT
Booster
Stabilizer
Fig.3.1 Block diagram
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S1F76610M2E Technical Manual (Rev.1.1)
4. PIN DESCRIPTION
4. PIN DESCRIPTION
4.1 Pin assignment
VDD
16
CAP1+
1
2
15
14
13
OSC1
(NC)
CAP1-
(NC)
3
CAP2+
OSC2
4
5
6
7
8
12
CAP2-
XPOFF
RV
TC1
TC2
11
10
9
VREG
VOUT
VIN
Fig.4.1 SSOP2-16 pin assignment
4.2 Pin functions
Pin No.
Pin name
Function
1
CAP1+
CAP1-
CAP2+
CAP2-
Positive pin connected to pump-up capacitor for double boosting
Negative pin connected to pump-up capacitor for double boosting
Next-stage clock for serial connection
2
4
5
Positive pin connected to pump-up capacitor for triple boosting
Negative pin connected to pump-up capacitor for triple boosting
Output pin for double boosting (shorted with VOUT)
6
7
TC1
TC2
VIN
VOUT
VREG
Temperature gradient selection pin
8
Power supply pin (Negative side, system GND)
Output pin for triple boosting
9
10
Stabilizing voltage output pin
Stabilizing voltage adjustment pin
Adjusts the VREG output voltage by connecting an intermediate tap
of the external volume (3-pin resistor) connected between the VDD
and VREG pins to the RV pin.
11
RV
VREG output ON/OFF control pin
12
13
XPOFF
OSC2
Controls S1F76610 power-off (VREG output power off) by inputting
a control signal from the system to this pin.
Pin connected to oscillation resistor
Opened for external clock operation.
Pin connected to oscillation resistor
15
16
OSC1
VDD
Functions as a clock input pin for external clock operation
Power supply pin (Positive side, system VCC)
S1F76610M2E Technical Manual (Rev.1.1)
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5. FUNCTIONAL DESCRIPTION
5. FUNCTIONAL DESCRIPTION
1 CR oscillation circuit
The S1F76610 is equipped with a CR oscillation circuit as an internal oscillation circuit, connecting external
resistor ROSC for oscillation between the OSC1 and OSC2 pins. (Fig.5.1)
OSC1
OSC1
OSC2
(Note 1)
External clock
OSC
R
Open
OSC2
Fig.5.1 CR oscillation circuit
Fig.5.2 External clock operation
Note 1) The oscillation frequency varies depending on the wiring capacity, so the wire between OSC1, OSC2,
and ROSC must be short as possible.
To set the external resistor ROSC, first obtain the oscillation frequency fOSC that satisfies the maximum
efficiency in Fig.7.12 and 7.13, and then obtain ROSC corresponding to the fOSC in Fig.7.1. The relation
between ROSC and fOSC shown in Fig.7.1 is expressed with the following formula, concerning only the straight
part (500kΩ < ROSC < 2MΩ).
A = Constant :VDD = 0V, VIN = -5V
1
→ A = 2.0 × 1010 (Ω ꢁ Hz)
ROSC= A・
fOSC
Therefore, the ROSC value is obtained from the relational expression above.
(Recommended oscillation frequency: 10kHz to 30kHz (ROSC: 2MΩ to 680kΩ)
For external clock operation, as shown in Fig.5.2, open the OSC2 pin and input external clocks (duty 50%)
from the OSC1 pin.
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S1F76610M2E Technical Manual (Rev.1.1)
5. FUNCTIONAL DESCRIPTION
2 Voltage converters (I) and (II)
Voltage converters (I) and (II) perform double boosting and triple boosting for input power voltage VIN using
clocks generated in the CR oscillation circuit.
For double boosting, the double input voltage VIN is obtained from the CAP2- pin by connecting an external
pump-up capacitor between CAP1+ and CAP1- and an external smoothing capacitor between VIN, CAP2, and
CAP2-. For triple boosting, the triple input voltage VIN is obtained from the VOUT pin by connecting an
external pump-up capacitor between CAP1+ and CAP1- and between CAP2+ and CAP2-, and connecting an
external smoothing capacitor between VIN and VOUT.
Fig.4.3 and 4.4 show the relationships between input and output voltages, using VDD = 0V and VIN = -5V.
VCC
VDD=0V
VIN=-5V
VDD=0V
VIN=-5V
(+5V)
GND
CAP2-=-2VIN=-10V
System power Note 2)
VOUT=3VIN=-15V
Fig.5.3 Relationships between
double boosting voltages
Fig.5.4 Relationships between
triple boosting voltages
Note 1) In triple boosting, the double boosting output (-10V) cannot be obtained from the CAP2- pin.
Note 2) When connecting to the system power, CAP2- = -5V is obtained for double boosting output and
VOUT = -10V is obtained for triple boosting by setting VIN = system power GND; VDD = system
power VCC = +5V.
3 Reference voltage generator, voltage stabilizer
The reference voltage generator generates a reference voltage required to operate the voltage stabilizer, and
provides a temperature gradient to the reference voltage. There are three types of temperature gradients and
the appropriate one is selected by a signal sent from the temperature gradient selection circuit. The voltage
stabilizer stabilizes boosting output voltage VOUT and outputs any voltage. As shown in Fig.5.5, the VREG
output voltage can be set to any voltage between the reference voltage VRV and VOUT by connecting the
external resistor RRV and changing the voltage of the intermediate tap.
VDD
Control signal
XPOFF
RRV=100kΩ to 1MΩ
R1
RV
VREG
RRV
R1
VREG=
ꢀ VRV
Fig.5.5 Voltage stabilizer
The voltage stabilizer, which is equipped with the power-off function, enables VREG output ON/OFF control
at timings when the signal is sent from the system (microprocessor, etc.).
When XPOFF = High (VDD), the VREG output is turned ON; when XPOFF = Low (VIN), it is turned OFF.
If the VREG output ON/OFF control is not necessary, XPOFF is fixed to High (VDD).
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
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5. FUNCTIONAL DESCRIPTION
4 Temperature gradient selection circuit
As shown in Table 5.1, the S1F76610 provides three appropriate temperature gradients for LCD driving to
VREG output.
Table 5.1 Correspondence between temperature gradients and VREG output ON/OFF
Temperature
gradient CT
Note 2)
-0.30%/°C
-0.05%/°C
-0.50%/°C
-0.50%/°C
CR
oscillation
circuit
ON
XPOFF
TC2
TC1
VREG output
Remarks
Note 1)
Note 1)
Note 1)
1 (VDD)
1 (VDD)
1 (VDD)
1 (VDD)
Low (VOUT)
Low (VOUT)
High (VDD)
High (VDD)
Low (VOUT)
High (VDD)
Low (VOUT)
High (VDD)
ON
ON
ON
ON
ON
ON
OFF
Serial connection
Note 4)
0 (VIN)
0 (VIN)
0 (VIN)
0 (VIN)
Low (VOUT)
Low (VOUT)
High (VDD)
Low (VDD)
Low (VOUT)
High (VDD)
Low (VOUT)
High (VDD)
OFF(Hi-Z) Note 3)
OFF(Hi-Z) Note 3)
OFF(Hi-Z) Note 3)
OFF(Hi-Z)
OFF
OFF
OFF
ON
Boosting only
Note 5)
Note 1) The low voltage is different between the XPOFF, TC2, and TC1 pins.
Note 2) The temperature gradient CT is defined in the following formula:
| VREG(50℃)| − | VREG(0℃)|
50℃− 0℃
1
CT =
×
(%/°C)
| VREG(25℃)|
Here, | VREG | means VDD - VREG. In Table 5.1, the negative sign assigned to each temperature gradient
means that VDD - VREG = | VREG | reduces as the temperature rises.
△ꢀ| VREG |(Ta) | VREG(Ta)| − | VREG(25℃)|
=
| VREG｜
| VREG(25℃)|
△| VREG |
| VREG |
Based on this formula, Fig.7.19 shows the relationships between
and temperature Ta.
In Fig.7.19, the inclination below indicates CT.
△| VREG |(50℃) △ | VREG |(0℃)
=
(50°C - 0°C)
/
| VREG |
| VREG |
Example: When CT = -0.5%/°C is selected;
if VREG output at Ta = 25°C is VREG (25°C) = -8V,
∆ VREG / ∆T = CT ꢁ | VREG (25°C) | = -0.5 × 10-2 × 8 = -40mV/°C is obtained,
the | VREG |value reduces 40mV each time the temperature rises 1°C.
VREG (25°C) = -10V results in ∆ |VREG | / ∆T = -50mV/°C.
Note 3) When the power is off (VREG output: OFF, CR oscillation circuit: OFF), the VOUT output voltage is
set to VIN +0.5V.
Note 4) Selecting this mode for serial connection drives the next-stage IC with the first-stage clock, and
reduces the power consumption of the next-stage IC. (See item 8 - (4).)
Note 5) This mode is recommended for boosting. It minimizes the current consumption.
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S1F76610M2E Technical Manual (Rev.1.1)
6. ELECTRICAL CHARACTERISTICS
6. ELECTRICAL CHARACTERISTICS
6.1 Absolute maximum ratings
Standard value
Item
Symbol
Unit
Remarks
Min.
Max.
Input power voltage
VIN
-20/N
VDD+0.3
V
VIN
N = 2: Double boosting
N = 3: triple boosting
OSC1, XPOFF
TC1, TC2, RV
VOUT Note 3)
VREG Note 3)
CAP1+, CAP2+, OSC2
CAP1-
Input pin voltage
Output voltage
VI
VIN-0.3
VOUT-0.3
-20
VDD+0.3
VDD+0.3
VDD+0.3
VDD+0.3
VDD+0.3
VDD+0.3
VDD+0.3
210
V
V
V
V
V
V
V
VOUT
VOUT
Output pin voltage 1
Output pin voltage 2
Output pin voltage 3
Allowable dissipation
Operating temperature
Storage temperature
Soldering temperature and
time
VOC1
VOC2
VOC3
Pd
Topr
Tstg
VIN-0.3
2×VIN-0.3
3×VIN-0.3
CAP2-
mW SSOP2-16PIN
-40
-55
85
150
260ꢁ10
°C
°C
Tsol
°CꢁS Lead part
Note 1) Exceeding the absolute maximum ratings above may cause a permanent destruction of the IC.
A long-term operation with the absolute maximum ratings may cause a significant reduction of
reliability.
Note 2) All the voltage values above are based on VDD.
Note 3) The VOUT and VREG output pins output the boosted voltage and stabilized boosted-voltage. No
external voltage should therefore be applied to these pins. When being compelled to apply external
voltage to the pins for use, it must be in the allowable range of the rated voltages above.
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
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6. ELECTRICAL CHARACTERISTICS
6.2 Recommended operating conditions
Standard value
Item
Symbol
Unit
Remarks
Min.
Max.
Boosting start voltage
VSAT1
-1.8
ROSC = 1MΩ, C3 ≥ 10µF
CL / C3 ≤ 20
Ta = -40 to 85°C, Note 1)
ROSC = 1MΩ
V
VSAT2
VSTP
-2.2
Boosting stop voltage
Output load resistance
Output load current
Oscillation frequency
-1.8
V
V
ROSC = 1MΩ
RL
IOUT
RLim
Note 2)
20
30
Ω
fOSC
10
680
3.3
100
mA
kHz
µF
kΩ
External resistor for
oscillation
Boosting capacitor
ROSC
2000
C1, C2, C3
RRV
Stabilization-output
adjusting resistor
1000
All the voltages are based on VDD = 0V.
Note 1) For low-voltage (VIN = -1.8 to -2.2V) operation, the recommended circuit is as follows:
Note 2) RLmin varies depending on the input voltage.
+
-
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
C1=10µF
C2=10µF
ROSC=1MΩ
CL
+
-
RL
-
+
C3=22µF
D1 (VF (IF = 1mA)≦0.6V recommended)
Fig.6.2.1 Recommended circuit for low-voltage operation
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S1F76610M2E Technical Manual (Rev.1.1)
6. ELECTRICAL CHARACTERISTICS
6.3 Electrical characteristics
Ta = -40°C to +85°C VDD = 0V, VIN = -5V unless especially specified.
Standard value
Measuring
circuit
Item
Symbol
Unit
Conditions
Min.
Typ.
Max.
Input power voltage
Output voltage
Stabilizer output
voltage
Stabilizer operating
voltage
Booster current
consumption
Stabilized circuit
current consumption
Static current
VIN
VOUT
VREG
-6.0
-18.0
-18.0
-1.8
VRV
-7.0
60
V
V
V
RL = ∞, RRV = 1MΩ, VOUT = -18V
d
VOUT
Iopr1
Iopr2
IQ
-18.0
V
30
10
µA RL = ∞, ROSC = 1MΩ
c
d
f
20
µA RL = ∞, RRV = 1MΩ, VOUT = -15V
2
µA RL = ∞, OSC1 = VDD,
VOUT = -10V
Oscillation frequency
Output impedance
Boosting power
conversion efficiency
Note 2)
Stabilization output
Voltage variation
Stabilization output
Note 3)
Load change
Stabilization output
Note 4)
Saturated resistance
Reference voltage
fOSC
Rout
Peff
16
90
20
120
95
24
150
kHz ROSC = 1MΩ
c
c
c
Ω
IOUT = 10mA
IOUT = 5mA
%
△VREG
△VOUT・VREG
0.1
5.0
%/V -18V < VOUT < -8V, VREG = -8V
d
d
RL = ∞, Ta = 25°C
Ω
VOUT = -15V, VREG = -8V
Ta = 25°C, 0 < IOUT < 10mA,
TC2 = VDD, TC1=VOUT
RSAT = ∆ (VREG - VOUT) / ∆ IOUT
0 < IOUT < 10mA, RV = VDD, Ta =
25°C
△VREG
△IOUT
RSAT
5.0
Ω
d
VRV0
VRV1
VRV2
CT0
CT1
CT2
-4.0
-2.5
-1.3
-0.15
-0.40
-0.60
-3.0
-2.0
-1.1
-0.05
-0.30
-0.50
-2.0
-1.5
-1.0
+0.10
-0.15
-0.40
V
V
V
TC2 = VOUT, TC1 = VDD, Ta = 25°C
TC2 = TC1 = VOUT, Ta = 25°C
TC2 = VDD, TC1 = VOUT, Ta = 25°C
d
d
e
Temperature gradient
%/°C CT1,CT2,CT3=
(( |VREG(50°C)|-|VREG (0°C |)
%/°C
%/°C
/ (50°C - 0°C))
× (1/|VREG (25°C)|) × 100
Input leak current
Input voltage
ILKI
VIH
VIL
2
µA XPOFF, TC1, TC2, OSC1, RV pin
0.3VIN
V
V
VIN = -1.8 to -6.0V, XPOFF pin
VIN = -1.8 to -6.0V, XPOFF pin
0.7VIN
Note 1) All the voltages are based on VDD = 0V.
Note 2) The values above indicate the conversion efficiency of the booster. When the stabilizer is active, the
loss is (VREG - VOUT) × IOUT.
We therefore recommend a method of reducing (VREG - VOUT) as much as possible.
If (VREG - VOUT) × IOUT is high, the stabilizer characteristics vary as the IC temperature rises.
Note 3) See Fig.7.15, 7.16, and 7.17.
Note 4) RSAT indicates the inclination shown in Fig.7.18; VOUT + ∆ (VREG - VOUT) indicates the lower limit
voltage of the VREG output.
S1F76610M2E Technical Manual (Rev.1.1)
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6. ELECTRICAL CHARACTERISTICS
6.4 Measuring circuits
1 Booster characteristic measuring circuit
10µF
+
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
R
C1
-
OSC
R
=1MΩ
V
V
OUT
+
C2
A
OUT
I
-
10µF
C3 10µF
IN
V =-5V
C1, C2, C3: Tantalum electrolytic capacitor
+
-
2 Stabilizer characteristic measuring circuit
16
15
14
13
12
11
10
9
1
2
RL
R1
R2
V
3
OUT
V
RV
R
=
VIN=-5V
4
5
6
7
1MΩ
A
OUT
I
3 Input leak current characteristic measuring circuit
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
-6V
-18V
LKI
I
ꢁ Connect to -18V for measurement
of pins 6, 7, and 11.
ꢁ Connect to -6V for measurement of
pins 12 and 15.
A
10
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S1F76610M2E Technical Manual (Rev.1.1)
6. ELECTRICAL CHARACTERISTICS
4 Static-current characteristic measuring circuit
VOUT=-15V VIN=-5V
A
A
1
2
3
4
5
6
7
8
16
15
14
13
IQ
IQ
(VOUT power) (VIN power)
12
11
10
9
S1F76610M2E Technical Manual (Rev.1.1)
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7. CHARACTERISTIC DATA SHEETS
7. CHARACTERISTIC DATA SHEETS
1000
24
23
22
21
20
19
18
17
16
15
14
13
12
Ta=25
℃
IN
IN
IN
V
V
V
=-5v
=-3v
=-2v
VIN =-5.0V
VIN =-3.0V
100
10
1
VIN =-2.0V
-40
-20
0
20
40
60
80
100
10
100
1000
Rosc [kΩ]
10000
Ta [℃]
Fig.7.1 Oscillation frequency -
External resistor for oscillation
Fig.7.2 Oscillation frequency - Temperature
0
80
70
60
50
40
30
20
10
0
Ta = 25
℃
Ta=25
℃
VIN =-5.0V
fosc=40kHz
fosc=20kHz
-5
-10
-15
Double boosting
Triple boosting
fosc=10kHz
0
10
20
IOUT [mA]
30
40
-7
-6
-5
-4
V
-3
[V]
-2
-1
0
INꢀ
Fig.7.3 Booster current consumption -
Input voltage
Fig.7.4 Output voltage - Output current
12
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S1F76610M2E Technical Manual (Rev.1.1)
7. CHARACTERISTIC DATA SHEETS
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
0
Ta = 25
VIN =-2.0V
Ta = 25
VIN =-3.0V
℃
℃
-1
-2
-3
-4
-5
-6
Double boosting
Double boosting
Triple boosting
Triple boosting
0
10
20
30
0
1
2
3
4
5
6
7
8
9
10
IOUT [mA]
IOUT [mA]
Fig.7.5 Output voltage - Output current
Fig.7.6 Output voltage - Output current
Double boosting
Pef f
Double boosting
Pef f
100
90
81
72
63
54
45
36
27
18
9
100
120
108
96
84
72
60
48
36
24
12
0
90
90
80
70
60
50
40
30
20
10
0
Triple boosting
Pef f
80
70
60
50
40
30
20
10
0
Triple boosting
Pef f
Ta = 25
Ta = 25
VIN =-5.0V
℃
℃
VIN =-3.0V
Triple boosting
IIN
Triple boosting
IIN
Double boosting
IIN
Double boosting
IIN
0
0
5
10
15
20
25
30
0
10
20
30
40
IOUT [mA]
IOUT [mA]
Fig.7.7 Power conversion efficiency -
Output current
Fig.7.8 Power conversion efficiency -
Output current
Input current - Output current
Input current - Output current
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
13
7. CHARACTERISTIC DATA SHEETS
Double boosting
Pef f
400
350
300
250
200
150
100
50
100
30
27
24
21
18
15
12
9
Ta =25
℃
90
Iout=6mA
80
70
60
50
40
30
20
10
0
Triple boosting
Pef f
Ta = 25
VIN =-2.0V
℃
Triple boosting
IIN
Triple boosting
6
Double boosting
IIN
Double boosting
3
0
0
-7
-6
-5
-4
V
-3
[V]
-2
-1
0
0
1
2
3
4
5
6
7
8
9
10
IN
IOUT [mA]
Fig.7.9 Power conversion efficiency -
Output current
Fig.7.10 Output impedance - Input voltage
Input current - Output current
100
400
Iout=2mA
Ta =25
Iout=10mA
℃
350
300
250
200
150
100
50
90
Iout=5mA
80
Iout=10mA
70
Triple boosting
Iout=20mA
60
50
Iout=30mA
Ta = 25
Double boosting
℃
IN=-5.0V
V
0
-7
-6
-5
-4
V
-3
[V]
-2
-1
0
1
10
100 1000
IN
fosc [kHz]
Fig.7.11 Output impedance - Input voltage
Fig.7.12 Power conversion efficiency -
Oscillation frequency
14
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
7. CHARACTERISTIC DATA SHEETS
100
90
80
70
60
50
100000
Iout=0.5mA
Iout=1.0mA
Iout=2.0mA
Iout=4.0mA
10000
1000
100
Ta = 25℃
IN
Ta=25℃
-1.4
V =-3.0V
-2.2
-2.0
-1.8
-1.6
[V]
-1.2
1
10
100
1000
IN
V
fosc [kHz]
Fig.7.13 Power conversion efficiency -
Oscillation frequency
Fig.7.14 Minimum load resistance - Input voltage
-7.85
-5.85
Ta =25℃
Vout=-9V
Ta = 25℃
Vout=-15V
-5.90
-5.95
-6.00
-7.90
-7.95
-8.00
0.1
1.0
10.0
100.0
0.1
1.0
10.0
100.0
IOUT [mA]
IOUT [mA]
Fig.7.15 Output voltage - Output voltage
Fig.7.16 Output voltage - Output voltage
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
15
7. CHARACTERISTIC DATA SHEETS
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
-2.85
Ta = 25℃
Vout=-6V
Ta=25℃
Vout=-5V
Vout=-10V
-2.90
-2.95
-3.00
Vout=-15V
0.1
1.0
10.0
100.0
0
5
10
15
20
IOUT [mA]
IOUT [mA]
Fig.7.18 Stabilization output saturated resistance -
Output current
Fig.7.17 Output voltage - Output voltage
50
0
T0
C
T1
T2
C
C
-50
-40
-20
0
20
40
60
80
100
Ta [℃]
Fig.7.19 Output voltage - Temperature
16
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
8. APPLIED-CIRCUIT EXAMPLES
8. APPLIED-CIRCUIT EXAMPLES
(1) Double boosting and Triple boosting
Fig.8.1 shows a connection example for obtaining the triple boosting output for input voltage by running only
the booster. For double boosting, remove capacitor C2 and short between the CAP2- (No.5) and VO (No.9)
pins; double boosting (-10V) is obtained from VO (CAP2-).
DD
V
= 0V
+
-
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1
10µF
OSC
R
1MΩ
+
-
C2
10µF
IN
V
OUT
V
= -5V
= -15V
+
-
C3 10µF
Fig.8.1 Triple boosting
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
17
8. APPLIED-CIRCUIT EXAMPLES
(2) Triple boosting + Stabilizer
1) Fig.8.1 shows an applied-circuit example for stabilizing the boosting output obtained by double boosting
and triple boosting through the stabilizer and providing the temperature gradient to the VREG output through the
temperature gradient selection circuit. This applied-circuit example can indicate two outputs from VO and
VREG at the same time. Using the double boosting described in item (1) “Double Boosting and triple
Boosting” enables double boosting + stabilizer.
DD
V
= 0V
+
-
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1
10µF
Note 1)
OSC
R
RV
R
R1
R2
+
-
1MΩ
100kΩ
to 1MΩ
C4
10µF
+
-
C2
10µF
REG
V
= -8V
IN
V
OUT
= -5V
V
= -15V
+
-
C3 10µF
Fig.8.2 Triple boosting + Stabilizer operation (Temperature gradient = -0.3%/°C)
Note 1) The RV pin (No.11) has high input impedance. If the wire is long, use a shield wire to prevent a
noise.
To reduce the influence by a noise, lower the RRV value. (However, the RRV current consumption
will increase.)
Note 2) The VREG output voltage must be within | VO | - | VREG | ≤ 10V.
The set voltage is obtained from the following formula:
VREG = RRV × VRV
R1
18
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
8. APPLIED-CIRCUIT EXAMPLES
(3) Parallel connection
As shown in Fig.8.3, multi-connection reduces output impedance RO. Therefore, a configuration of n parallel
connections lowers RO to 1/n. Smoothing capacitor C3, which is a single device, is shared by those connections.
To obtain stabilization output after parallel connections, apply the connection shown in Fig.8.2 to only one of
the n parallel connections shown in Fig.8.3.
DD
V
= 0V
+
-
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1’
10µF
C1
10µF
RV
R
-
L
R
OSC
OSC
R
R
100kΩ+
R1
R2
C4
10µF
1MΩ
1MΩ
to
+
+
-
-
1MΩ
C2
C2’
10µF
-
O
10µF
I
REG
V
= -8V
IN
V
= -5V
OUT
V
= -15V
+
-
C3 10µF
Fig.8.3 Parallel connection
0
Ta = 25°C
-5
-10
-15
0
10
20
30
40
REG
I
[mA]
Fig.8.4 Output voltage - Output current
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
19
8. APPLIED-CIRCUIT EXAMPLES
(4) Serial connection
The serial connection in the S1F76610 (connecting VIN and VOUT in the pre-stage to VDD and VIN in the next
stage respectively) further increases output voltage. However, the serial connection raises output impedance.
Fig.8.5 shows a serial connection example for obtaining VOUT = -20V from VIN = -5V to stabilize output
voltage.
DD
V
I
’ = V = -5V
DD
V
= 0V
+
-
+
-
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1
10µF
C1’
10µF
RV
R
L
R
ROSC
Ω
100k
R1
R2
+
-
1MΩ
to
1MΩ
C4
10µF
+
C2’
-
O
I
10µF
VO =
-10V = V ’
REG
V
= -13V
IN
V
= -5V
OUT
V
’ = -20V
+
-
+
-
C3 10µF
C3’ 10µF
D1
Fig.8.5 Serial connection
0
Ta = 25°C
-5
-10
-15
-20
0
10
20
REG
I
[mA]
Fig.8.6 Output voltage - Output current
20
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
8. APPLIED-CIRCUIT EXAMPLES
Note 1) <Notes on load connection>
As shown in Fig.8.5, when connecting load between VDD (or other voltage above VDD’) and VREG in
serial connection, take care of the following points:
When the IC is activated or no normal output is generated at the VREG pin like VREG by the XPOFF
signal, current is supplied from VDD (or other voltage above VDD’) to the VREG pin through the load.
If the voltage exceeds the absolute maximum rating above VDD’ at the VREG pin, the IC may fail
normal operation. For serial connection, as shown in Fig.8.5, connect diode D1 between VI’ and
VREG so that the voltage above VDD’ is not applied to the VREG pin.
Note 2) In Fig.8.5, the first stage is assigned to double boosting and the next-stage to triple boosting; however,
triple boosting is available for both the first and next stages unless the input voltage VDD’ - VI’ in the
next stage exceeds the standard value (6V). For serial connection, each IC must be designed in
conformity with the standard (VDD - VI ≤ 6V, VDD - VO ≤ 18V). (See Fig.8.7.)
DD
V
V
I
DD
V
’
Max. 6V
O
V
I
V ’
REG
V
First stage Next stage
O
V ’
Fig.8.7 Power system in serial connection
Note 3) When double boosting is provided in the first stage, the first-stage CAP1- output can be used as a
next-stage clock; however, when triple boosting is provided, it cannot be used as a next-stage clock.
Therefore, to obtain a next-stage clock, mount ROSC in the external side and use an internal oscillator.
As shown in Table 5.1, the next-stage external clock operation by the pre-stage CAP1- output is
available only for temperature gradient CT = -0.5%/°C. If another temperature gradient is required,
use an internal oscillator like the above.
Note 4) In serial connection, the temperature gradient is provided to the VDD - VREG voltage (VDD’ - VREG in
Fig.8.7) of the IC in which the stabilizer is active. The VREG value changes depending on the
temperature as follows:
△| VREG |
VREG =
= CT(VDD'−VREG)(25℃ ))
△T
S1F76610M2E Technical Manual (Rev.1.1)
EPSON
21
8. APPLIED-CIRCUIT EXAMPLES
(5) Positive-voltage exchange
The S1F76610 converts input voltage to positive voltage for double boosting or triple boosting through the
circuit shown in Fig.8.8. (For double boosting, remove capacitor C2 and short both ends of D3.)
However, output voltage VO lowers by forward voltage VF of the diode. For example, as shown in Fig.8.8,
VDD = 0V; VI = -5V; and VF = 0.6V results in VO = 10V -3 × 0.6V = 8.2V (5V -2 × 0.6V = 3.8V for double
boosting).
DD
V
= 0V
D1
C1 10µF
ꢂ
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
-
D2
OSC
R
ꢂ
L
R
C2 10µF
1MΩ
+
-
D3
ꢂ
A
ꢂ: The Schottky diode with a low VF
value is recommended for D1, D2,
and D3.
C3 10µF
+
-
O
V
= 8.2V
IN
V
= -5V
Fig.8.8 Positive-voltage conversion
10
Ta = 25°C
5
0
0
10
20
30
40
O
I
[mA]
Fig.8.9 Output voltage - Output current
22
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
8. APPLIED-CIRCUIT EXAMPLES
(6) Negative-voltage conversion + Positive-voltage conversion
Combining the triple boosting (Fig.8.1) with the positive voltage conversion (Fig.8.8) generates the circuit
shown in Fig.8.9, and outputs -15V and +8.2V from -5V input.
In this case, the output impedance is higher than that for negative voltage conversion only or positive voltage
conversion only.
DD
V
= 0V
D1
C1 10µF
ꢂ
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
-
C4
-
D2
OSC
R
10µF
ꢂ
L
R
C2 10µF
1MΩ
+
+
-
C5
10µF
D3
-
ꢂ
A
O
I
C3 10µF
O1
V
= -15V
ꢂ: The Schottky diode with a low VF
value is recommended for D1, D2,
and D3.
+
-
O2
V
= +8.2V
+
-
C6 10µF
IN
V
= -5V
Fig.8.9 Negative-voltage conversion + Positive-voltage conversion
O2
V
(+8.2V)
DD
V
V
(0V)
IN
(-5V)
O1
V
(-15V)
Fig.8.10 Voltage relations at VDD = 0V and VIN = -5V
0
10
Ta = 25°C
-5
5
-10
-15
Ta
=
0
0
10
20
30
40
0
10
20
30
40
O
I 1[mA]
O
I 1 [mA]
Fig.8.11 Output voltage - Output current
S1F76610M2E Technical Manual (Rev.1.1)
Fig.8.12 Output voltage - Output current
EPSON
23
8. APPLIED-CIRCUIT EXAMPLES
(7) Example of changing the temperature gradient with an external temperature sensor (thermistor)
The S1F76610, which is equipped with the temperature gradient selection circuit in the stabilizer, enables you
to select three types of temperature gradients (-0.05%/°C, -0.3%/°C, and -0.5%/°C as VREG output. If the
other temperature gradient is required, as shown in Fig.8.13, connect a thermistor to resistor RRV (for output
voltage adjustment) in series; you can change the temperature gradient to any value.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
R1
R2
RV
T
R
P
R
R
Note 2)
VREG
Fig.8.13 Temperature gradient change example
For a connection other than pins 10, 11, and 16, follow Fig.8.2. For pins 6 and 7, select a lower temperature
gradient than the one to be changed from Table 5.1.
Thermistor used
10
[Measurement conditions]
8
VDD: 0V
VIN: -5V
6
RRV: 1MΩ (Set to VREG = -8V)
RT: 10kΩ (0°C /50°C Ratio 9.06)
4
Temperature gradient: Select -0.3%/°C.
2
Thermistor not used
0
-2
-4
-6
-8
-10
0
10
20
30
40
50
Ｔａ [℃]
Fig.8.14 Output voltage - Temperature
Note 1) The relation between RT and VREG is indicated as follows:
VDD − VREG = RRV + RT ×(VDD − VRV)
R1
Using a thermistor as RT increases the temperature gradient for VDD - VREG.
Note 2) The temperature characteristics of the thermistor indicate the nonlinearity; however, connecting
resistor RP to the thermistor in parallel changes nonlinear characteristics to linear characteristics.
24
EPSON
S1F76610M2E Technical Manual (Rev.1.1)
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First Issue January 2008
Printed in JAPAN
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