S1F77601Y0A000L [SEIKO]

Power Supply Support Circuit, Fixed, 1 Channel, PDSO6, SON-6;
S1F77601Y0A000L
型号: S1F77601Y0A000L
厂家: SEIKO EPSON CORPORATION    SEIKO EPSON CORPORATION
描述:

Power Supply Support Circuit, Fixed, 1 Channel, PDSO6, SON-6

光电二极管
文件: 总20页 (文件大小:201K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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MF1563 02  
Power Supply IC  
S1F7760x Series  
Technical Manual  
f
NOTICE  
No part of this material may be reproduced or duplicated in any form or by any means without the written  
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.  
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material  
or due to its application or use in any product or circuit and, further, there is no representation that this material  
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to  
any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty  
that anything made in accordance with this material will be free from any patent or copyright infringement of a  
third party. This material or portions thereof may contain technology or the subject relating to strategic  
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export  
license from the Ministry of International Trade and Industry or other approval from another government  
agency.  
All other product names mentioned herein are trademarks and/or registered trademarks of their respective  
companies.  
©SEIKO EPSON CORPORATION 2003, All rights reserved.  
Configuration of product number  
DEVICES  
S1  
F
77600 Y  
00A0  
00  
Packing specifications  
Specifications  
Shape  
(Y : SOT, M : SON)  
Model number  
Model name  
(F : Power Supply)  
Product classification  
(S1:Semiconductors)  
CONTENTS  
1. DESCRIPTION....................................................................................................................................1  
2. FEATURES .........................................................................................................................................1  
3. LIST OF SERIES PRODUCT NAMES ...............................................................................................1  
4. BLOCK DIAGRAM .............................................................................................................................2  
5. DESCRIPTION OF BLOCK DIAGRAM .............................................................................................3  
6. PACKAGE...........................................................................................................................................3  
6.1 SOT89-3pin (S1F7760xY0x000L)..............................................................................................3  
6.2 SON-6pin (S1F7760xM0x000L).................................................................................................4  
7. FUNCTIONAL DESCRIPTION ...........................................................................................................5  
7.1 Outline of Operation ...................................................................................................................5  
8. ABSOLUTE MAXIMUM RATINGS.....................................................................................................7  
9. ELECTRICAL CHARACTERISTICS..................................................................................................8  
9.1 Model with Detection Voltage 1.2V and Release Voltage 2.0V, Nch/Pch models.....................8  
9.2 Model with Detection Voltage 2.4V and Release Voltage 2.7V, Nch/Pch models.....................9  
10. EXTERNAL CONNECTION DIAGRAM ...........................................................................................12  
11. EXAMPLES OF CIRCUITS ..............................................................................................................13  
Rev.1.4  
EPSON  
i
S1F7760x Series Technical Manual  
1. DESCRIPTION  
S1F77600 Series comprises high-accuracy, low-consumption low-voltage detectors which work at a low voltage.  
Output is guaranteed until supply voltage reaches 0V. They are ICs used to prevent liquid leakage of a dry cell  
by detecting the voltage drop of power supply of two cells connected in series. The internal circuits of the ICs  
consist of reference voltage circuits, comparators, resistances for detecting voltage, hysteresis circuits,  
output-securing circuits (forced output Hi-Z) and output transistors.  
Detection voltage is of non-adjustment type, fixed inside the IC at high accuracy.  
Output form is selectable from P-ch open drain and N-ch open drain.  
The package is comprised of SOT89-3 pin and SON-6 pin (under development).  
These ICs are best suited to the dry-cell liquid leakage prevention/protection circuit of a portable product which  
uses power supply of two dry cells connected in series.  
2. FEATURES  
Current consumption........................................ Max.5.0µA (VDD = 3.0V, P-ch output)  
Max.5.5µA (VDD = 3.0V, N-ch output)  
Operational voltage.......................................... 0.8V to 5.5V  
Forced output Hi-Z........................................... 0.0V to 1.0V  
Detection voltage ............................................. 1 1.2V to 1.6V (0.05V step: mask option)  
2 1.7V to 2.5V (0.1V step: mask option)  
Accuracy of voltage detection.......................... 1 ±3.5% (Ta = 25°C, detection voltage 1.2V)  
2 ±2.0% (Ta = 25°C, detection voltage 2.4V)  
Detection temperature characteristics .............. -320ppm/°C  
Hysteresis width............................................... 1 0.2V to 1.0V (0.05V step: mask option)  
2 0.12V to 0.3V (0.02V step: mask option)  
Release voltage ................................................ Detection voltage + hysteresis width  
Accuracy of release voltage............................. 1 ±2.5% (Ta = 25°C, detection voltage 1.2V)  
2 ±2.0% (Ta = 25°C, detection voltage 2.4V)  
Release temperature characteristics ................. -260ppm/°C  
Operational temperature................................... -30°C to +85°C  
Output form...................................................... P-ch open drain, N-ch open drain (mask option)  
Shipment form ................................................. SOT89-3pin, SON-6 pin (under development)  
The products have no radiation-resistant or light-proof design.  
3. LIST OF SERIES PRODUCT NAMES  
Table 3.1 List of Series Product Names  
Detection voltage [V]  
Release voltage [V]  
Output  
form  
Product name  
Shipment form  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
S1F77600Y0A000L  
S1F77600M0A000L*  
S1F77601Y0A000L  
S1F77601M0A000L*  
S1F77602Y0A000L*  
S1F77602M0A000L*  
S1F77603Y0A000L*  
S1F77603M0A000L*  
* Under development  
SOT89-3  
SON-6  
Nch  
Pch  
Nch  
Pch  
1.158  
2.352  
1.200  
1.242  
2.448  
1.950  
2.646  
2.000  
2.050  
2.754  
SOT89-3  
SON-6  
SOT89-3  
SON-6  
2.400  
2.700  
SOT89-3  
SON-6  
(Note 1) A lineup of detection voltage and release voltage other than those in the above table is also available.  
Rev.1.4  
EPSON  
1
S1F7760x Series Technical Manual  
4. BLOCK DIAGRAM  
VDD  
Q1  
R1  
R2  
Q2  
Detection:1.2V  
Release: 2.0V  
OUT  
+
CMP  
-
VREF  
VREG  
Q3  
R3  
Forced Output Hi-Z if Supply  
Voltage is 1.0V  
VSS  
(Note 2) Shown is the case of a model with detection voltage 1.2Vand hysteresis width 0.8V  
(Note 3)  
P-ch open drain output  
ꢀꢀꢀꢀ  
N-ch open drain output  
(Mask option allows you to select either output form.)  
Fig.4.1 Block diagram  
2
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
5. DESCRIPTION OF BLOCK DIAGRAM  
(1) Reference voltage: VREF  
Generates reference voltage and reference current required for the inside of IC.  
(2) Comparator CMP  
Compares the divided potentials of resistances connected between power supply (VREG) with the reference  
voltage generated inside IC (VREF).  
(3) Resistances for detecting voltage: R1, R2, R3  
Divided potential resistances which determine detection and release voltages. Either voltage is selectable with  
aluminum option.  
(4) Hysteresis: Q1  
A transistor for hysteresis to prevent malfunction (output oscillation, etc.) caused by noise in power supply.  
(5) Output securing circuit  
Forces output pin to output fixed voltage Hi-Z if IC’s operational voltage drops to the lower limit or lower.  
(6) Output transistors: Q2, Q3  
Transistors to output by P-ch open drain (Q2) and N-ch open drain (Q3).  
6. PACKAGE  
6.1 SOT89-3pin (S1F7760xY0x000L)  
Pin Assignment  
1
2
3
Fig.6.1 SOT89-3 Pin Assignment  
Pin Description  
Table 6.1 List of SOT89-3 Pins  
Pin name  
OUT  
I/O  
Pin No.  
Function  
O
I
1
2
3
Detected-voltage output pin (selectable from P-ch/N-ch open drain)  
Input voltage pin (negative)  
VSS  
VDD  
I
Input voltage pin (positive)  
Rev.1.4  
EPSON  
3
S1F7760x Series Technical Manual  
6.2 SON-6pin (S1F7760xM0x000L)  
Pin Assignment  
6
5
4
Top V iew  
1
2
3
Fig.6.2 SON-6 Pin Assignment  
Pin Description  
Table 6.2 List of SON-6 Pins  
Pin name  
OUT  
VSS  
I/O  
Pin No.  
Function  
O
I
1
2
3
4
5
6
Voltage detection output pin (Pch/Nch open drain selectable)  
Input voltage pin (negative)  
VDD  
I
Input voltage pin (positive)  
NC  
NC pin (normally open)  
NC  
NC pin (normally open)  
NC  
NC pin (normally open)  
4
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
7. FUNCTIONAL DESCRIPTION  
7.1 Outline of Operation  
S1F77600 Series comprises high-accuracy, low-consumption low-voltage detectors which work at a low voltage.  
A detector detects voltage by inputting into a comparator the divided potentials of resistances, R1, R2 and R3,  
connected between power supply (VREG) and the reference voltage generated inside IC (VREF). It has  
hysteresis added to prevent malfunction caused by power supply noise because it can detect difference of  
potential between VREG and VREF even if the difference is very small.  
The detection voltage (-VDET), which is found if input voltage drops, and the release voltage (+VDET), which is  
found if input voltage rises, are defined by the following formulas:  
Detection voltage: -VDET = ((R2+R3)/R3) × VREF ......................................................(formula 7.1.1)  
Release voltage: +VDET = ((R1+R2+R3)/R3) × VREF..................................................(formula 7.1.2)  
S1F77600 Series forces output of fixed voltage Hi-Z if operational voltage drops to the lower limit or lower.  
Fig.7.1.1 and 7.1.2 show I/O characteristics of P-ch and N-ch open drain outputs, respectively.  
Release Voltage (+VDET  
)
Supply Voltage  
(VDD  
HYS Width  
)
Detection Voltage (-VDET  
)
Lower Limit of Operational  
Voltage  
Vss  
Release Voltage (+VDET  
)
Output Pch  
Open Drain  
(OUT)  
Detection Voltage (-VDET  
)
Lower Limit of Operational  
Voltage  
Hi-Z  
VSS  
Fig.7.1.1 I/O characteristics of P-ch open drain  
Rev.1.4  
EPSON  
5
S1F7760x Series Technical Manual  
Release Voltage (+VDET  
)
Supply Voltage  
HYS Width  
(VDD  
)
Detection Voltage (-VDET  
)
Lower Limit of Operational  
Voltage  
VSS  
Release Voltage (+VDET  
)
Output Nch  
Open Drain  
(OUT)  
Detection Voltage (-VDET  
)
Lower Limit of Operational  
Voltage  
Hi-Z  
VSS  
Fig.7.1.2 I/O characteristics of N-ch open drain  
(Note 4) The I/O characteristics of output P-ch or N-ch open drain shown in each figure above show examples  
where a pull-down or pull-up resistance is connected to output pin, respectively.  
6
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
8. ABSOLUTE MAXIMUM RATINGS  
Rated values  
Items  
Symbols  
Units  
Applicable pins  
Remarks  
Min.  
-0.3  
-0.3  
Max.  
7.0  
Input supply voltage  
Output voltage  
VDD  
VOUT  
IOUT  
Pd  
V
V
VDD  
OUT  
OUT  
7.0  
Output current  
10  
mA  
mW  
°C  
Tolerable loss  
200  
85  
-30 to +85°C  
Operating temperature  
Storage temperature  
Soldering temperature and  
time  
Topr  
Tstg  
Tsol  
-30  
-55  
150  
25010  
°C  
°Cs  
(Note 5) Don’t apply voltage to output pin from outside.  
(Note 6) Use of the product under a condition beyond absolute maximum ratings may cause malfunction or  
permanent failure of the IC.  
Also, it may reduce reliability of the IC greatly, even if the IC works normally just temporally under  
such condition.  
Rev.1.4  
EPSON  
7
S1F7760x Series Technical Manual  
9. ELECTRICAL CHARACTERISTICS  
9.1 Model with Detection Voltage 1.2V and Release Voltage 2.0V, Nch/Pch models  
(Ta=25°C, unless specified otherwise (Note 7))  
Standard values  
Items  
Symbols  
Conditions  
Units Notes  
Min.  
Typ.  
Max.  
Operational voltage  
Detection voltage  
Release voltage  
VDD  
-VDET  
+VDET  
VHYS  
IOP1  
Ta = -30°C to +85°C  
0.80  
5.50  
V
V
1.158 1.200 1.242  
1.950 2.000 2.050  
0.708 0.800 0.892  
V
Hysteresis width  
VHYS = (+VDET) - (-VDET)  
VDD = 3.0V  
Ta = -30°C to +85°C  
VDD = 0.7V  
V
Current consumption 1  
P-ch  
N-ch  
P-ch  
N-ch  
3.00  
3.50  
0.35  
0.40  
0.45  
0.55  
5.00  
5.50  
0.95  
1.00  
µA  
µA  
µA  
µA  
mA  
mA  
Current consumption 2  
Output current  
IOP2  
IOUT  
TPHL  
TPLH  
Ta = -30°C to +85°C  
P-ch  
N-ch  
P-ch  
N-ch  
P-ch  
N-ch  
VDD = 3.0V, OUT = 2.8V  
VDD = 3.0V, OUT = 0.2V  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
0.30  
0.40  
Transfer delay time  
1
ms  
ms  
µs  
9
10  
9
1
100  
100  
µs  
10  
8
Temperature  
-VDET  
Topr  
-560  
-470  
-320  
-260  
-200 ppm  
characteristics of  
detection voltage  
Temperature  
characteristics of release  
voltage  
/ °C  
+VDET  
Topr  
Ta = -30°C to +85°C  
0
ppm  
/ °C  
8
(Note 7) OUT pin is open unless specified otherwise.  
(Note 8) Temperature characteristics are calculated using the following formula:  
VDET/Topr = (((VDETH - VDETL)/VDETM)/115) × 106  
VDETH : Value of detection/release voltage at 85°C  
VDETL : Value of detection/release voltage at -30°C  
VDETM : Value of detection/release voltage at 25°C  
8
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
9.2 Model with Detection Voltage 2.4V and Release Voltage 2.7V, Nch/Pch models  
(Ta=25°C, unless specified otherwise (Note 7))  
Standard values  
Items  
Symbols  
Conditions  
Units Notes  
Min.  
Typ.  
Max.  
Operational voltage  
Detection voltage  
Release voltage  
VDD  
-VDET  
+VDET  
VHYS  
IOP1  
Ta = -30°C to +85°C  
0.80  
5.50  
V
V
2.352 2.400 2.448  
2.646 2.700 2.754  
0.198 0.300 0.402  
V
Hysteresis width  
VHYS = (+VDET) - (-VDET)  
VDD = 3.0V  
Ta = -30°C to +85°C  
VDD = 0.7V  
V
Current consumption 1  
P-ch  
N-ch  
P-ch  
N-ch  
3.00  
3.50  
0.35  
0.40  
0.45  
0.55  
5.00  
5.50  
0.95  
1.00  
µA  
µA  
µA  
µA  
mA  
mA  
Current consumption 2  
Output current  
IOP2  
IOUT  
TPHL  
TPLH  
Ta = -30°C to +85°C  
P-ch  
N-ch  
P-ch  
N-ch  
P-ch  
N-ch  
VDD = 3.0V, OUT = 2.8V  
VDD = 3.0V, OUT = 0.2V  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
Ta = -30°C to +85°C  
0.30  
0.40  
Transfer delay time  
1
ms  
ms  
µs  
9
10  
9
1
100  
100  
µs  
10  
8
Temperature  
-VDET  
Topr  
-560  
-470  
-320  
-260  
-200 ppm  
characteristics of  
detection voltage  
Temperature  
characteristics of release  
voltage  
/ °C  
+VDET  
Topr  
Ta = -30°C to +85°C  
0
ppm  
/ °C  
8
(Note 7) OUT pin is open unless specified otherwise.  
(Note 8) Temperature characteristics are calculated using the following formula:  
VDET/Topr = (((VDETH - VDETL)/VDETM)/115) × 106  
VDETH : Value of detection/release voltage at 85°C  
VDETL : Value of detection/release voltage at -30°C  
VDETM : Value of detection/release voltage at 25°C  
Rev.1.4  
EPSON  
9
S1F7760x Series Technical Manual  
(Note 9) Explanatory diagram of measuring transfer delay time  
3.0V  
+VDET  
VDD  
-VDET  
0.7V  
VSS  
t
VPLH  
VPHL  
3.0V  
OUT  
1.5V  
0.35V  
t
VSS  
VDD  
S1F7760x Series OUT  
VSS  
470kΩ  
This explanatory diagram covers a P-ch open drain output model.  
10  
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
(Note 10) Explanatory diagram of measuring transfer delay time  
3.0V  
+VDET  
VDD  
-VDET  
0.7V  
VSS  
t
VPLH  
VPHL  
3.0V  
OUT  
0.7V  
0.35V  
t
VSS  
VDD  
470kΩ  
S1F7760x Series OUT  
VSS  
This explanatory diagram covers an N-ch open drain output model.  
Rev.1.4  
EPSON  
11  
S1F7760x Series Technical Manual  
10. EXTERNAL CONNECTION DIAGRAM  
Input voltage (+)  
(3pin)  
VDD  
Voltage  
Detection  
Output  
(1pin)  
S1F7760x Series  
OUT  
VSS  
(2pin)  
Input voltage (-)  
Input voltage (+)  
Fig.10.1 Connection diagram of a P-ch open drain model  
(3pin)  
VDD  
Voltage  
Detection  
Output  
(1pin)  
S1F7760x Series  
OUT  
VSS  
(2pin)  
Input voltage (-)  
Fig.10.2 Connection diagram of an N-ch open drain model  
12  
EPSON  
Rev.1.4  
S1F7760x Series Technical Manual  
11. EXAMPLES OF CIRCUITS  
OUT  
470kΩ  
V
DD  
SS  
EXT  
VOUT  
OUT  
VDD  
VSS  
V
S1F7760x Series  
N-ch Open Drain  
Voltage boost DC/DC  
Fig.11.1 Example of Circuit 1  
OUT  
V
DD  
SS  
EXT  
CE  
VOUT  
OUT  
VDD  
VSS  
V
S1F7760x Series  
P-ch Open Drain  
Voltage boost DC/DC  
470kΩ  
Fig.11.2 Example of Circuit 2  
Rev.1.4  
EPSON  
13  
S1F7760x Series Technical Manual  
VDD  
V
DD  
SS  
OUT  
OUT  
V
470kΩ  
S1F7760x Series  
P-ch Open Drain  
Fig.11.3 Example of circuit 3 (CR timer circuit)  
14  
EPSON  
Rev.1.4  
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Phone: +33-(0)1-64862350  
FAX: +33-(0)1-64862355  
Phone: +81-(0)42-587-5816  
FAX: +81-(0)42-587-5624  
BARCELONA BRANCH OFFICE  
Barcelona Design Center  
Edificio Testa, Avda. Alcalde Barrils num. 64-68  
ED International Marketing Department  
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN  
Phone: +81-(0)42-587-5814  
FAX: +81-(0)42-587-5117  
E-08190 Sant Cugat del Vallès, SPAIN  
Phone: +34-93-544-2490  
FAX: +34-93-544-2491  
Scotland Design Center  
Integration House, The Alba Campus  
Livingston West Lothian, EH54 7EG, SCOTLAND  
Phone: +44-1506-605040  
FAX: +44-1506-605041  
S1F7760x Series  
Technical Manual  
SEIKO EPSON CORPORATION  
ELECTRONIC DEVICES MARKETING DIVISION  
EPSON Electronic Devices Website  
http://www.epsondevice.com/  
First issue February, 2003  
H
Printed August, 2003 in Japan  
A

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