SPG-8650B100KHZ [SEIKO]

CRYSTAL OSCILLATOR, CLOCK, 0.1 MHz, CMOS OUTPUT, DIP-16;
SPG-8650B100KHZ
型号: SPG-8650B100KHZ
厂家: SEIKO EPSON CORPORATION    SEIKO EPSON CORPORATION
描述:

CRYSTAL OSCILLATOR, CLOCK, 0.1 MHz, CMOS OUTPUT, DIP-16

机械 输出元件 振荡器
文件: 总2页 (文件大小:54K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Crystal oscillator  
SELECTABLE-OUTPUT CRYSTAL OSCILLATOR  
SPG series  
Products number  
Q3186 40xxx xxx 00  
Q3186 50xxx xxx 00  
Q3186 51xxx xxx 00  
• Capable of selecting 57 varieties of frequency output.  
• Low current consumption.  
• Easy to mount DIP 16-pin package.  
Actual size  
Specifications (characteristics)  
Item  
Specifications  
Remarks  
Symbol  
Model name  
Oscillation source frequency  
8640AN 8640BN 8640CN 8650A 8650B 8650C 8650E  
600 kHz 1 MHz 768 kHz 60 kHz 100 kHz 96 kHz 32.768 kHz 60 kHz 100 kHz 32.768 kHz  
8651A 8651B 8651E  
For output frequency, refer to  
the table in the next page  
fo  
Max. supply voltage  
Operating voltage  
VDD-GND  
Power source  
voltage  
-0.3 V to +7.0 V  
5.0 V±0.5 V  
V
DD  
STG  
OPR  
Stored as bare product after unpacking  
Storage temperature  
Operating temperature  
Frequency tolerance  
Frequency temperature characteristics  
Frequency voltage characteristics  
Aging  
T
-55 °C to +125 °C  
-30 °C to +80 °C  
Temperature  
range  
T
-10 °C to +70 °C  
-10 °C to +60 °C  
-6  
-6  
-6  
±100 x 10  
±5 x 10  
1
±50 x 10  
V
DD=5 V, Ta=+25 °C  
DD=5 V  
DD=4.5 to 5.5 V  
f/f  
0
-6  
V
+10/-120 x 10  
-6  
±10 x 10  
-6  
-6  
-6  
-6  
±5 x 10  
-6  
±3 x 10 /year Max.  
V
±20 x 10  
±10 x 10  
±20 x 10  
-6  
±5 x 10 /year Max.  
fa  
V
DD=5 V, Ta=+25 °C, first year  
Current consumption  
Shock resistance  
lop  
1.0 mA Max.  
2.0 mA Max. 1.5 mA Max.  
0.5 mA Max.  
No load condition  
Three drops on a hard  
wooden board form 750 mm  
-6  
-6  
±5 x 10 Max.  
-6  
±10 x 10 Max.  
±5 x 10 Max.(From 500 mm)  
S.R.  
1
Frequency tolerance of 8651 system shows the value guaranteed at the time of shipment.  
Electric characteristics  
Divider IC (without quartz crystal)  
(VDD=5 V±0.5 V, Ta=-10 to +70 ˚C CL 15 pF)  
Item  
Unit  
Symbol  
Typ. Max.  
0.8  
Remarks  
Symbol  
Min.  
0
Specifications  
Remarks  
Item  
L. input voltage  
V
IL  
IH  
RL  
RH  
8650 O  
Model name  
Input clock frequency  
Current consumption  
V
H. input voltage  
V
VDD  
VDD-1.0  
-30  
1 MHz Max.  
About 2 mA  
L. input current (Reset)  
H input current (Reset)  
I
-5  
Reset=GND  
Reset=VDD  
lop  
No load condition  
I
0.5  
RESET timing  
L. input current  
(input terminal except for Reset)  
µA  
V
I
IL  
-0.5  
5
tRW  
%
Duty=B/A x 100  
RESET timing  
H input current  
(input terminal except for Reset)  
IIH  
RESET  
30  
IOL=1.6 mA  
50 %  
V
OL  
OH  
OL  
OH  
0.4  
IOH= -40 µA  
L. output voltage  
V
VOL=0.4 V  
H. output voltage  
VDD-1.0  
1.6  
I
mA  
µA  
VOH=VDD-1.0 V  
L. output current  
Output waveform  
80 %VDD  
VDD  
I
-40  
60  
50  
60  
H. output current  
30  
25  
t
t
TLH  
Output rise time  
1/2VDD  
VSS  
ns  
%
THL  
20 %VDD  
Output fall time  
Except in the case  
of 1/3 and 1/5  
VOH  
Duty  
40  
VOL  
tw  
t
RW  
Min. reset pulse width  
Reset delay time  
tTHL  
tTLH  
tR  
tE  
B
1.0  
A
t
R
1.0  
µs  
2
t
W- 1  
1/2 to  
t
W
Reset release synchronous error  
External signal input frequency  
External signal input pulse width  
Oscillation start up time  
tE  
1M  
F
IN  
IN  
OSC  
Hz  
µs  
s
External dimensions  
(Unit: mm)  
8640 N only  
3
0.5  
t
0.2  
t
1
1 to=oscillation source cycle. 2 tw=1/2 cycle of preset frequency.  
3 For more than 1 ms until VDD=04.5 V. Time at 4.5 V is to be 0.  
SPG 8650  
EPSON 0103B  
B
Block diagram  
EXC. CSEL. RESET  
TEST  
CLOCK ENABLE RESET  
TEST  
12  
13  
14  
10  
12  
13  
14  
10  
20.5 Max.  
7.62  
7
7
1/1 to 1/12  
Program  
Divider  
1/1 to 1/12  
Program  
Divider  
1/1 to 1/10  
Program  
Divider  
O
S
C.  
1/1 to 1/10  
9
9
OUT  
OUT  
CSEL  
Program  
Divider  
0.25  
11  
4
3
2
4
3
2
7
6
5
7
6
5
90° to  
105°  
FOUT  
CTL1 to 3 CTL4 to 6  
CTL1 to 3 CTL4 to 6  
SPG-8650O only  
2.54  
0.5  
17.78  
8640N  
Pull-up and pull-down resistance 400 k(Typ.)  
55  
Crystal oscillator  
Terminal connection  
8650A 8651A  
CTL4  
CTL5  
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Set terminal  
No.  
1
No.  
16  
15  
14  
13  
12  
11  
10  
9
Pin terminal  
NC  
Pin terminal  
VDD  
CTL6  
CTL1 CTL2  
CTL3  
16 15 14 13 12 11 10  
9
2
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
60k 6.0k 600  
6k 600 60  
60  
6
6.0 0.6 0.06 0.006  
0.6 0.06 0.006 0.0006  
0
CTL 3  
CTL 2  
CTL 1  
CTL 6  
CTL 5  
CTL 4  
GND  
NC  
1
0
1
0
1
0
1
3
RESET  
NC (CSEL)  
NC (EXC)  
FOUT  
30k 3.0k 300  
20k 2.0k 200  
15k 1.5k 150  
12k 1.2k 120  
10k 1.0k 100  
30  
20  
15  
12  
10  
5
3.0 0.3  
2.0 0.2  
1.5 0.15 0.015 0.0015  
1.2 0.12 0.012 0.0012  
1.0 0.1  
0.5 0.05 0.005 0.0005  
0.03 0.003  
0.02 0.002  
4
5
6
7
TEST  
0.01 0.001  
1
2
3
4
5
6
7 8  
8
OUT  
5k 500  
50  
( ) shown 8640N only  
For 8650 O  
NC: Do not connect to the external terminal.  
11. NC 12. CLOCK 13. ENABLE  
Explanation of terminal  
8650B 8651B  
CTL4  
(a) CTL 1 to 6 :  
(b) OUT :  
Programs dividing ratio. (pull-down resistor incorporated.)  
Output frequency preset by CTL1 to 6.  
0
0
0
1
0
1
0
0
1
1
0
1
0
1
1
1
1
1
1
Set terminal  
0
CTL5  
(refer to the procedure for setting output frequency.)  
Constantly outputs the oscillation source frequency of builtin  
crystal unit.  
Stops output at RESET= “L”.  
(pull-up resistor incorporated.)  
Used for the input terminal for testing. When CTL4 is H,  
output will be 1000 times larger than the preset value at  
TEST= “H”. (pull-down resistor incorporated.)  
Serves as input terminal when using an external clock by  
changing to the builtin oscillator.  
Effective only when CSEL is H.  
When this terminal is made H, the external clock is selected.  
(pull-down resistor incorporated.)  
CTL6  
CTL1 CTL2  
0
1
0
0
1
CTL3  
(c) FOUT :  
(d) RESET :  
(e) TEST :  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
100k  
10k  
50k  
10k 1k  
1k 100  
5k 500  
100  
10  
50  
10  
1
1/10  
1/100  
0
1
0
1
0
1
0
1
1/10 1/100 1/1000  
5
1/2 1/20  
1/3 1/30  
1/4 1/40  
1/5 1/50  
1/6 1/60  
1/200  
1/300  
1/400  
1/500  
1/600  
33.3k 3.3k 333.3 33.3  
3.33  
2.5  
2
25k 2.5k 250  
20k 2k 200  
25  
20  
16.6k 1.6k 166.6 16.6  
1.6  
(f) EXC (8640N only) :  
(g) CSEL (8640N only) :  
8.3k 833.3 83.3  
8.3  
0.83 1/12 1/120 1/1200  
(Note)  
Treatment of empty terminals. When RESET terminal is not used, this should be connected to VDD,  
and when TEST terminal, CSEL terminal, and CTL 1 to 6 terminals are not used, to GND.  
8650E 8651E  
CTL4  
Set terminal  
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
(8650 O)  
Explanation of terminal  
CTL5  
(a) CLOCK: Clock input (Max. 1 MHz) (b) ENABLE: Be sure to connect to VDD  
CTL6  
CTL1 CTL2  
CTL3  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
32768 3276.8 327.68 32.768 3.276 0.3276 0.03276 0.00327  
3276.8 327.68 32.768 3.276 0.327 0.0327 0.00327 0.00032  
16384 1638.4 163.84 16.384 1.638 0.1638 0.01638 0.00163  
10922.6 1092.26 109.226 10.922 1.092 0.1092 0.01092 0.00109  
Setting of divider output  
Dividing  
ratio  
Dividing  
ratio  
CTL3  
CTL4  
CTL6  
CTL1  
CTL2  
CTL5  
1/1  
0
1
0
1
0
1
0
1
1/1  
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
8192  
819.2  
81.92  
8.192 0.819 0.0819 0.00819 0.00081  
1/10  
1/102  
1/103  
1/104  
1/105  
1/106  
1/107  
1/10  
1/2  
6553.6 655.36 65.536 6.553 0.655 0.0655 0.00655 0.00065  
5461.3 546.13 54.613 5.461 0.546 0.0546 0.00546 0.00054  
2730.6 273.06 27.306 2.730 0.273 0.0273 0.00273 0.00027  
Note: Lower digits are omitted.  
1/3  
1/4  
1/5  
1/6  
1/12  
0= L” 1=“H”  
Setting of output frequency  
(Unit: Hz)  
8640AN  
Baud rate generator  
CTL4  
CTL5  
1
1
0
1
0
6k  
600  
3k  
1
0
1
1
1
0
0
0
0
0
0
1
0
1
1
1
0
0
Set terminal  
8640CN  
CTL6  
CTL2  
CTL1  
1
0.06  
CTL3  
Baud rate output  
example (fo/16)  
CTL2  
CTL3  
CTL4  
CTL5  
CTL6  
CTL1  
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Output frequency  
768 kHz  
153.6  
0
0
0
0
1
1
1
1
6.0 0.6  
600k 60k  
60k 6k  
600 60  
60  
48000 bits/s  
0
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
1
0.6 0.06 0.006  
6
9600  
4800  
2400  
1200  
3.0 0.3  
2.0 0.2  
0.03  
0.02  
300k 30k  
200k 20k  
150k 15k  
120k 12k  
100k 10k  
300 30  
200 20  
150 15  
120 12  
100 10  
2k  
76.8  
1.5k  
1.2k  
1k  
1.5 0.15 0.015  
1.2 0.12 0.012  
1.0 0.1  
0.01  
0.5 0.05 0.005  
38.4  
19.2  
500  
50k  
5k  
50  
5
8640BN  
CTL4  
CTL5  
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
100  
10  
50  
1
0
1
10  
1
5
1
1
0
1
1
1
1
1/10  
Set terminal  
8650C  
Baud rate output  
example (to/16)  
CTL6  
CTL1  
CTL2  
CTL3  
CTL4  
CTL5  
CTL6  
Output frequency  
96.0 kHz  
19.2  
CTL2  
CTL1  
CTL3  
0
1
0
0
0
1
1
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
6000 bits/s  
1200  
600  
1M  
100k 10k 1k  
10k  
50k  
33.3k 3.3k  
25k 2.5k  
20k  
0
0
0
0
1
1
1
1
100k  
500k  
333.3k  
250k  
200k  
166.6k  
83.3k  
1k 100  
5k  
1/10 1/100  
1/2  
9.6  
1/20  
1/30  
1/40  
1/50  
1/60  
500  
4.8  
300  
33.3 3.33 1/3  
25  
20  
16.6 1.6 1/6  
8.3 0.83 1/12 1/120  
333.3  
250  
200  
166.6  
83.3  
200  
3.2  
2.5 1/4  
1/5  
150  
2k  
2
2.4  
100  
16.6k 1.6k  
8.3k 833.3  
1.6  
50  
0.8  
56  

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