SVM7100D [SEIKO]
TONE/MUSIC SYNTHESIZER, UUC20, DIE;
| 型号： | SVM7100D |
| 厂家： | 
SEIKO EPSON CORPORATION |
| 描述： | TONE/MUSIC SYNTHESIZER, UUC20, DIE 有原始数据的样本ROM 旋律IC 商用集成电路 |
| 文件： | 总6页 (文件大小：66K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PF671-02
SVM7100M Series
SSCM5u0l0ti-0MSeleordiyeIsC
■ DESCRIPTION
The SVM7100M series CMOS LSI can generate various melody, chime, and alarm tones according to the music
information which has been programmed in the built-in mask ROM. The ROM has the 495-word capacity to store
music information, and it can store up to 16 melodies.
As the SCM7100M series can hold the tempo for the reference signal source of different frequencies, it is expected
to use for the products that need to hold the play time even when the frequency of the reference signal source varies
on each model.
■ FEATURES
● No. of music pieces.................... Up to 16 (selectable by four terminals)
● Melody ROM capacity ................ 495 words (Any number of words can be assigned to each music.)
● Address control ROM................. 80 words (Any number of words can be assigned to each music.)
● Play output ................................. Single-sound square waves
● Selectable four play modes........ (Level Hold, One Shot A, One Shot B, and Start/Stop by one terminal) by two
terminals
● Selectable five reference ........... (32.768 kHz, 38.4 kHz, 76.8 kHz, 153.6 kHz (or 96.0 kHz), 38.4 kHz typical
signal sources by three
of built-in RC oscillator)
terminals
● Options....................................... (1) Music change during play : Possible or impossible
(2) Output current of play tone : High or low
(3) External clock frequency : 153.6 kHz or 96.0 kHz
● Low-voltage operation................ +0.9 to 3.5 V
● Package ..................................... Die form or SSOP1-20 pin (plastic)
1
SVM7100M Series
■ BLOCK DIAGRAM
CKS2 CKS1 CKS0
CKIN/
VREG
Note Length
Generation
Circuit
Tempo
Generation
Circuit
Programmable
Divider Circuit
RC Oscillation
Circuit
Tone
Generation
Circuit
Tempo ROM
Output
Circuit
OUT
Tone ROM
Melody ROM
Address
Counter
TST5
TST4
TST3
Control
Circuit for
Test
TST2
TST1
TST0
Address
Control ROM
Address
Counter
MS0
MS1
MS2
MS3
Music
Select
Control
Circuit
Start
Address
ROM
MT
PM0
PM1
Play
Control
Circuit
VDD
VSS
■ PACKAGE DIMENSIONS
■PIN CONFIGURATION
Plastic SSOP1-20pin
SSOP1-20pin
±0.1
6.5
+0.003
–0.004
(
0.256
)
V
SS
TST4 TST5 TST3 OUT TST2 TST1 TST0 PM1
PM0
11
20
11
20
INDEX
INDEX
0°
10°
1
10
1
10
0.15
0.006
(
)
VDD CKIN/ CKS0 CKS1 CKS2 MS0
MS1 MS2 MS3
MT
VREG
±0.2
0.5
0.02
±0.1
0.22
0.009
+0.007
0.65
0.026
+0.003
–0.008
(
)
–0.004
(
)
(
)
1
(
0.039)
Unit: mm
(inch)
2
SVM7100M Series
■ PIN DESCRIPTION
Built-in
pull-
down
Pin
No.
Pin
name
I/O
Function
1
2
VDD
—
—
Positive power terminal
CKIN/
VREG
I/O
None
(1) If the External Clock Input mode is selected by low (0) level input to the CKS2
terminal:
One of the following square waves must be entered as the reference signal source
to this terminal:
32.768 kHz, 38.4 kHz, 76.8 kHz, or 153.6 kHz
This selection range can be changed using the mask option as follows:
32.768 kHz, 38.4 kHz, 76.8 kHz, or 96.0 kHz
In the Standby mode (that is, when the MT terminal is low and no music is played),
all internal circuits do not operate even when an external clock is entered in this
terminal. This terminal may be opened (floating). While in the Operation mode (that
is, when a music is played or the high level signal is entered in the MT terminal), this
terminal must not be open (or not floating).
If this terminal is fixed to low (0) or high (1) level, the internal circuits change to the
Operation mode even when the low level signal is entered in the MT terminal.
However, these circuits are held and do not operate until the clock is entered.
Therefore, if the low (0) level signal is entered in the MT terminal, the system is not
returned to the Standby mode. The clock signal must be entered.
(2) If the high (1) level signal is entered in the CKS2 terminal and if the built-in RC
oscillator is used as the reference signal source:
This terminal functions as the IC test output terminal and it outputs the drive voltage
of the RC oscillator circuit. The terminal must be open, and no external voltage must
be supplied to it.
3
4
5
CKS0
CKS1
CKS2
I
None
One of the following four external clocks and the reference signal source of the following
built-in RC oscillator frequencies can be selected by the combination of signals of these
three terminals.
CKS2
CKS1
CKS0
Reference signal source
76.8 kHz external clock
0
0
0
0
1
0
0
0
1
38.4 kHz external clock
1
0
32.768 kHz external clock
1
1/0
1
1/0
153.6 kHz (or 96.0 kHz) external clock
38.4 kHz (typical) built-in RC oscillation
Do not change the input signal level during Operation mode as each terminal does not
has the chattering protect circuit.
Also, the low (0) or high (1) level signal must be entered as these three terminals do not
have the pull-down or pull-up resistor.
If the External Clock Input mode is selected, the built-in RC oscillator circuit and the
voltage regulator circuit to drive it are in the Standby mode.
The music tempo does not change when any of the above five frequencies is used.
However, the tone frequency is high for 32.768/38.4 at 32.768 kHz, and it is low for 32.0/
38.4 at 96.0 kHz.
During RC oscillation, the music tempo and tone frequency change in proportion to the
shifted oscillation frequency.
3
SVM7100M Series
Built-in
pull-
down
Pin
No.
Pin
name
I/O
I
Function
6
7
8
9
MS0
MS1
MS2
MS3
Yes
16 music pieces can be selected in the sequence of binary codes (from music 1 to music
16) as shown by the combination of input signal levels in these four terminals.
MS3 MS2 MS1 MS0 Music selected
0
0
0
:
0
0
0
:
0
0
1
:
0
1
0
:
Music 1
Music 2
Music 3
:
1
1
1
1
1
1
0
1
Music 15
Music 16
Although each terminal has the pull-down resistor, this resistor is turned off in the
Standby mode and the high-impedance input is set. When the Operation mode is
selected, this resistor is turned on and it functions as the pull-down resistor.
Although each terminal has the high-impedance input in the Standby mode, the external
low (0) or high (1) level input needs not be held. Each terminal has the input chattering
protect circuit.
(1) If the “Disabled music change during play” option (explained later) is used:
When the high (1) level signal is entered in the MT terminal and the Operation mode
is selected, the input signal level is checked at the MS0 to MS3 terminals. This
check level is internally held and the music is not changed even when the input
signal level is later changed.
(2) If the “Enabled music change during play” option is used:
The music is changed each time the input signal level is changed at the MS0 to MS3
terminals in the Operation mode.
10
MT
I
Yes
When the high (1) level signal is entered, the Operation mode is selected and the music
starts or stops to play according to the play mode specified by the PM0 and PM1
terminals.
The internal pull-down resistor is always connected.
This terminal has the chattering protect circuit. When the high (1) level signal is entered,
the Operation mode is selected and the input pulse width is checked. If the input is
insufficient to assign the noise or chattering pulse width and if the low (0) level signal
input is detected before the music starts, the system returns to the Standby mode.
11
12
PM0
PM0
I
No
One of the following four types of play modes can be selected by the combination of input
signal level to these two terminals.
PM1
PM0
Music play mode
Level hold play
Start/stop control by MT terminal
One-shot A play
0
0
1
1
0
1
0
1
One-shot C play
4
SVM7100M Series
Built-in
pull-
down
Pin
No.
Pin
name
I/O
Function
(1) Level hold play
MT
Stop
Play
Play signal
output
(2) Start/stop control by MT terminal
MT
Stop
Stop
Play signal
output
1 cycle
Play
(3) One-shot A play
MT
Stop
Stop
Play signal
output
1 cycle
1 cycle
(4) One-shot C play
MT
Stop
Stop
Play signal
output
Play
1 cycle
The low (0) or high (1) level signal must always be entered as each terminal does not
has the pull-down resistor.
Also, the input signal level must be fixed and it must not be changed during Operation
mode as each terminal does not has the input chattering protect circuit.
13
14
15
16
TST0
TST1
TST2
OUT
I
Yes
IC test input terminals. Each terminal has the pull-down resistor but it does not have the
chattering protect circuit. We recommend to always connect these terminals to the Vss
level lines. Also, do not enter the high (1) level signal during Operation mode.
0
—
The square waves of audio signals are output.
If the “No attenuation during play” option is used:
The larger current output (to allow direct drive of piezoelectric buzzer) can be selected.
To select this mode, a piezoelectric buzzer must be connected between this terminal
and Vss terminal and approximately 3Vdc power voltage is required. (The buzzer can
directly be driven even when the power voltage is low, but the sound pressure is
insufficient.)
If the large current output mode is not required, this terminal must be connected to the
base of the NPN transistor to drive the tone generator.
The Vss level signal is output during Standby mode, during no play, or during rest signal
generation.
5
SVM7100M Series
Built-in
pull-
down
Pin
No.
Pin
name
I/O
I
Function
17
19
18
20
TST3
TST4
TST5
Vss
No
Used as the LSI test input and output terminals when the Test mode is selected by the
TST0, TST1, and TST2 terminals.
The TST3 and TST4 terminals are used as floating input terminals during normal
status. They must be fixed to the VDD or VSS signal level. Also, the TST5 terminal must
be open.
0
—
—
—
Negative power terminal
■ BASIC EXTERNAL CONNECTION DIAGRAM
NC
VSS
TST4 TST5 TST3
OUT TST2 TST1 TST0 PM1 PM0
CKIN/
VDD VREG CKS0 CKS1 CKS2 MS0 MS1 MS2
MS3
MT
External
clock
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson
reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any
inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, life support products. Morever, no license to any intellectual property rights is
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products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry
of International Trade and Industry or other approval from another government agency.
IBM is registered trademark of International Business Machines Corporation, U.S.A.
©
Seiko Epson Corporation 1994 All right reserved.
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S
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First issue December, 1994
Printed in Japan
Phone: 0425-87-5812
FAX: 0425-87-5564
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