D628 [SEMTECH]
Active Delay Line, Programmable, 4-Func, Complementary Output, Bipolar, DIE;
| 型号： | D628 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Active Delay Line, Programmable, 4-Func, Complementary Output, Bipolar, DIE |
| 文件： | 总22页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Edge628
Very High-Speed Dual- and
Quad-Channel ECL Delay Lines
HIGH-PERFORMANCE PRODUCTS – ATE
Features
Description
The Edge628 is a quad delay and deskew element.
Manufactured in a high performance bipolar process, it is
designed primarily for channel deskew applications in
Memory Test Equipment.
• Pin and Functionally Compatible with the Edge624
in Modes 0 and 2
•
•
•
Independent Delay Adjustments for Positive and
Negative Transitions
Fanout Mode for One Input Distributed to All
Channels
44-pin Plastic (PLCC) Package with Internal Heat
Spreader or 44-pin MQFP Package with Internal
Heat Spreader or Die Form
The part offers a full scale delay range of 6.6 ns with
independent 1.5 ns adjustment of the falling edge.
The Edge628 has a drive mode, where one input signal
is routed to all of the outputs. This mode is particularly
useful in a fanout application.
The delay value (and resolution) is controlled via an external
voltage DAC.
Functional Block Diagram
This deskew element is designed specifically to be
monotonic and stable while delaying a very narrow pulse
over a wide delay range.
DRVMODE
S1
The Edge628 is a pin and functionally compatible upgrade
to the Edge624 with the following differences:
- modes 0 and 2 only
IN1
OUT1
IN1*
OUT1*
VDELAY1
- 6.6 ns typical delay range
- 1.5 ns trailing edge adjust
- higher performance
VWIDTH1
- lower power
IN2
OUT2
- smaller package (optional).
IN2*
OUT2*
VDELAY2
VWIDTH2
Applications
IN3
OUT3
•
•
Automatic Test Equipment
IN3*
OUT3*
Memory Tester Drive On Channel Deskew
VDELAY3
VWIDTH3
IN4
OUT4
IN4*
OUT4*
VDELAY4
VWIDTH4
COMP1 REXT1
COMP2 REXT2
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Revision 5 / May 4, 2001
1
Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
PIN Description
Pin Name
DIGITAL
PLCC Pin #
PQFP Pin #
Description
IN, IN*
38, 39
42, 43
2, 3
32, 33
36, 37
40, 41
44, 1
The input signal to be delayed. (Differential digital inputs.)
6, 7
OUT, OUT*
28, 27
25, 24
22, 21
19, 28
22, 21
19, 18
16, 15
13, 12
The corresponding delayed output signal. (Differential ECL compatible
outputs.)
DRVMODE
S1
32
30
26
24
Single-ended 10KH ECL compatible input which determines whether
the part is in fanout mode.
Single-ended 10 KH ECL compatible input which defines the operating
mode.
ANALOG
VDELAY
15, 13, 11, 9
16, 14, 12, 10
9, 7, 5, 3
Analog voltage input which controls the amount of propagation delay
for each channel.
VWIDTH
REXT1
10, 8, 6, 4
Analog voltage input which controls the amount of falling edge delay
for each channel.
35
29
Analog input current used to establish the bias current for the VDELAY
and VWIDTH inputs.
REXT2
33
36
27
30
Analog input current used to establish the bias level for the delay
cells.
COMP1
Compensation pin. A 0.1 µF ceramic capacitor must be connected
between COMP1 and VEE.
COMP2
34
28
Compensation pin. A 0.1 µF ceramic capacitor must be connected
between COMP2 and VEE.
POWER
39, 43, 14,
17, 20, 23,
31, 35
GND
1, 5, 20, 23,
26, 29, 37, 41
Device ground.
VEE
N/C
4, 8, 40, 44
17, 31
42, 2, 34, 38 Device power supply.
11, 25
No connect. There is no circuitry connected to these pins inside the
package. These pins are not wire bonded to the die.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
PIN Description (continued)
VEE1
GND2
IN2
40
41
42
43
44
1
OUT1
OUT1*
GND2
OUT2
OUT2*
GND3
OUT3
OUT3*
GND4
OUT4
OUT4*
28
27
26
25
24
23
22
21
20
19
18
E628AHJ
IN2*
VEE2
GND3
IN3
44-Pin PLCC
w/Internal Heat Spreader
2
IN3*
3
VEE3
GND4
IN4
4
5
6
VEE1
GND2
IN2
34
35
36
37
38
39
40
41
42
43
44
OUT1
OUT1*
GND2
OUT2
OUT2*
GND3
OUT3
OUT3*
GND4
OUT4
OUT4*
22
21
20
19
18
17
16
15
14
13
12
E628AHF
IN2*
VEE2
GND3
IN3
44-Pin MQFP
w/Internal Heat Spreader
10 mm x 10 mm Body Size
IN3*
VEE3
GND4
IN4
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description
Chip Overview
Operating Modes
The Edge628 is a quad delay line and deskew element
offering a 6.6 ns typical delay (Tspan), where the VDELAY
inputs adjust the overall propagation delay of the part. In
addition, the parts support a separate rising and falling
edge delay of ± 750 ps (Twidth), where the VWIDTH inputs
control the falling edge delay. There is also a drive mode,
where the channel 2 input drives all four Edge628 outputs,
with all other inputs ignored.
The Edge628 has two modes of operation (described in
Table 1. )
Mode
S1
0
TSPAN
6.6 ns
6.6 ns
TWIDTH
N/A
0
2
1
750 ps
The Edge628 is designed to be monotonic and very stable
in all modes of operation. Figures 1 shows a simplified
block diagram.
Table 1. Delay Ranges Versus Mode
Mode 0
VDELAY1
IN1, IN1*
Mode 0 is a simple delay mode (see Figures 2 and 3).
The input signal for each channel is delayed by some
programmable amount determined by the analog input
VDELAY.
∆T
∆T
∆T
∆T
OUT1, OUT1*
VWIDTH1
The rising and falling edges are delayed equally. The
VWIDTH analog input has no function in mode 0. The
propagation delay for a rising and falling edge is defined
as
VDELAY2
IN2, IN2*
IN3, IN3*
IN4, IN4*
OUT2, OUT2*
VWIDTH2
Tpd+, Tpd– = Tpd(min) + Tspan
where Tpd(min) is the raw propagation delay of the part
with minimum programmed delay, and Tspan is the
additional delay programmed via the VDELAY input.
VDELAY3
OUT3, OUT3*
VWIDTH3
VDELAY4
INPUT
TPDmin
OUT4, OUT4*
OUTPUT
(VDELAY = Minimum)
VWIDTH4
Tspan
OUTPUT
(VDELAY = Maximum)
DRVMODE
Figure 1. Edge628 Block Diagram
Figure 2. Mode 0 VDELAY Control
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
VDELAY1
The VDELAY and VWIDTH inputs require current flow. If
mode 0 is used, connect all VWIDTH inputs to ground.
Also, connect any unused VDELAY and VWIDTH inputs to
ground.
∆T
∆T
∆T
∆T
IN1, IN1*
IN2, IN2*
IN3, IN3*
IN4, IN4*
OUT1, OUT1*
The equation used to establish the VDELAY and VWIDTH
input currents is:
VDELAY2
OUT2, OUT2*
I (VWIDTH, VDELAY) = ( 1.267 / REXT1 ) * 2.283
where 1.267 equals the typical voltage at the REXT1 pin,
and 2.283 equals the typical gain factor. For example,
the VDELAY and VWIDTH input currents would be 1.0 mA
with REXT1 = 2.87 KΩ.
VDELAY3
OUT3, OUT3*
Using a different REXT1 will program a different input
current. Any voltage DAC used to drive these inputs directly
needs to be capable of sourcing a current at least equal
to the programmed current. Any current DAC used needs
to factor in this constant input current as well.
VDELAY4
OUT4, OUT4*
However, the value of this current does not affect deskew
range or performance. The ability to vary this current allows
a more flexible interface to a variety of DAC programming
techniques.
Figure 3. Mode 0 Functional Diagram
Analog Delay Inputs
Edge628 Tspan vs. VDELAY and VWIDTH
VDELAY and VWIDTH are analog voltage inputs which
control the delay of the rising and falling edge. VDELAY
and VWIDTH vary from +0.1V (minimum delay) to -1.1V
(maximum delay).
8
7
6
5
4
E628 Modes 0,2
3
2
1
0
The transfer function for Tspan vs. VDELAY is shown in
Figure 4.
These inputs are designed to sink a constant input current
over the entire operating range. The fact that the VDELAY
and VWIDTH inputs have internal current sources allows a
voltage DAC capable of generating only positive voltages
and an external resistor network to be pulled down to the
Edge628's negative input voltage compliance. These
current sources are designed to be constant over
temperature, so changes in system temperature will not
translate into a delay voltage shift.
VDELAY and VWIDTH (V)
Figure 4. Tspan Transfer Function
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
Mode 2
INPUT
Mode 2 allows independent adjustment of the rising and
falling edges (see Figures 5 and 6). The propagation delay
for a rising edge is defined as
VWIDTH = Minimum
VWIDTH = Maximum
OUTPUT
Tpd+ = Tpd(min) + Tspan
TPDmin + Tspan
TPDmin + Tspan + Twidth
where Tpd(min) is the raw propagation delay of the part
with minimum programmed delay, and Tspan is the
additional delay programmed via the VDELAY input.
Figure 5. Mode 2 VDELAY and VWIDTH Controls
The propagation delay for a falling edge is defined as
Tpd– = Tpd(min) + Tspan + Twidth
VDELAY1
where Twidth is defined as the additional delay incurred
by adjusting the VWIDTH input. Notice that Twidth can be
either positive or negative, allowing the part to either
expand or contract an input signal (see Figure 5).
∆T
∆T
∆T
∆T
IN1, IN1*
OUT1, OUT1*
VWIDTH1
Notice also that Tpd+ is a function of VDELAY only, while
Tpd– is a function of VDELAY and VWIDTH. The transfer
function for Tspan vs. VDELAY is shown for both modes in
Figure 4. The transfer function for Twidth vs. VWIDTH and
VDELAY is shown in Figure 7.
VDELAY2
OUT2, OUT2*
IN2, IN2*
VWIDTH2
Programming Sequence
VDELAY, in addition to affecting the placement of the rising
edge, also affects the falling edge. Therefore, when
calibrating a system, VDELAY should be adjusted first. As
VWIDTH affects only the falling edge, it should be adjusted
only after VDELAY is established.
VDELAY3
IN3, IN3*
OUT3, OUT3*
VWIDTH3
VDELAY4
IN4, IN4*
OUT4, OUT4*
VWIDTH4
Figure 6. Functional Model in Mode 2.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
+1.5
+1.2
+0.9
+0.6
+0.3
VWIDTH = –1.1V
0.0
–0.3
VWIDTH = –0.55V
–0.6
–0.9
VWIDTH = 0V
–1.2
–1.5
–1.1
Max Delay
–0.0
Min Delay
–0.55
VDELAY [V]
Figure 7. Mode 2 Transfer Function
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Circuit Description (continued)
Drive Mode
VDELAY1
With DRVMODE = 1, the input signal on channel 2 will be
routed to all Edge628 delay paths. In drive mode, operating
mode 0 and 2 still offer the same delay range and edge
control features. The only difference is that the input signal
now comes from channel 2, while all other inputs (In/In*)
are ignored.
∆T
∆T
∆T
∆T
OUT1, OUT1*
VWIDTH1
VDELAY2
Figures 8 and 9 show a simplified model for drive mode.
OUT2, OUT2*
VDELAY1
VWIDTH2
IN2, IN2*
∆T
∆T
∆T
∆T
OUT1, OUT1*
VDELAY3
OUT3, OUT3*
VDELAY2
VWIDTH3
OUT2, OUT2*
VDELAY4
IN2, IN2*
VDELAY3
OUT4, OUT4*
OUT3, OUT3*
VWIDTH4
Figure 9. Edge628 Drive Mode for Operating Mode 2
VDELAY4
OUT4, OUT4*
Figure 8. Edge628 Drive Mode for Operating Mode 0
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Application Information
Minimum Pulse Width
Power Up Initialization
The minimum pulse width that the part can support is a
function of the operating mode and the programmed delay
value. Figure 10 documents the maximum usable delay
as a function of pulse width.
Note: Mode 2 uses an SR flip-flop at the output stage;
modes 0 does not. Therefore, upon power up in mode 2,
or when operating modes are being changed into mode
2, the SR flip-flop is in an indeterminate state and the
output may not reflect the input condition. A rising or falling
edge that propagates through the channel will correctly
reset the part. Therefore, in mode 2, a dummy edge should
be applied before calibration or real time execution.
Notice also that in mode 0 there is NO flip-flop. The output
will therefore always reflect the status of the inputs.
E628 Output Pulse Width+ vs. Delay, Mode 0
VDELAY and VWIDTH [V]
5.5
5
4.5
4
3.5
3
2.5
2
5.006 ns PW
4.490 ns PW
3.987 ns PW
3.480 ns PW
3.016 ns PW
2.487 ns PW
1.990 ns PW
1.513 ns PW
1.017 ns PW
1.5
1
0.5
Delay [nS]
Figure 10. Minimum Pulse Width Capability
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Application Information (continued)
Edge 628 Tpd vs. Duty Cycle in Mode 0 (VDELAY=-0.5V)
100
8 0
6 0
4 0
2 0
Tpd+ Error
0
Tpd- Error
- 2 0
- 4 0
- 6 0
- 8 0
-100
0
1 0
2 0 3 0
4 0
5 0 6 0
7 0
8 0
9 0 100
Duty Cycle [%] (Period=100 ns)
Figures 11 and 12. Timing Error vs. Duty Cycle for Modes 0 and 2.
Edge 628 Tpd vs. Duty Cycle in Mode 2 (VDELAY=-0.5V)
100
8 0
6 0
4 0
2 0
Tpd+ Error
Tpd- Error
0
- 2 0
- 4 0
- 6 0
- 8 0
-100
0
1 0
2 0 3 0
4 0
5 0 6 0
7 0
8 0
9 0 100
Duty Cycle [%] (Period=100 ns)
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Application Information (continued)
Parameter
Symbol
Min
Typ
Max
Units
Thermal Resistance
PLCC w/Heat Spreader
Junction to Air
Still Air
θJA
θJA
θJA
41
33
21
˚C/W
˚C/W
˚C/W
50 LFPM of Airflow
400 LFPM of Airflow
MQFP w/Heat Spreader
Junction to Air
Still Air
θJA
θJA
θJA
˚C/W
˚C/W
˚C/W
50 LFPM of Airflow
400 LFPM of Airflow
32
Package Thermal Data
2000 Semtech Corp.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Package Information
44-Pin MQFP Package
PIN Descriptions
4
D
0.25
C
4X
A – B
D
D2
D
3
A
3
4
E
E2
e
SEE DETAIL "A"
TOP VIEW
5
7
D1
Z
D
O
E1
5
7
2
5
7
0.20
C
4X
A – B
D
Z
E
BOTTOM VIEW
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Package Information (continued)
44-Pin MQFP Package (continued)
0.40 MIN.
MIN.
0
˚
e
A2
–
0.10 S
0.13 / 0.30 R.
C
0.13
R. MIN.
GAGE PLANE
0.25
–A, B, D–
3
C
A1
0 – 7
˚
L
DETAIL "A"
1.60 REF.
DETAIL "B"
ccc
M
S
S
D
C
A – B
8
SEE DETAIL "B"
12 – 16
˚
WITH LEAD FINISH
b
1.41 REF.
A
2
H
C
12
0.13 / 0.23
0.13 / 0.17
0.076
b
12 – 16
1
˚
BASE METAL
SECTION C-C
Notes:
1. All dimensions and tolerances conform to
ANSI Y14.5-1982.
2. Datum plane -H- located at mold parting line and
Symbol
A
Min
Nom
2.15
0.15
2.00
Max
2.35
0.25
2.10
Note Comments
Height above PCB
coincident with lead, where lead exits plastic body
at bottom of parting line.
A1
A2
D
0.10
1.95
PCB Clearance
Body Thickness
3. Datums A-B and -D- to be determined where
centerline between leads exits plastic body at datum
plane -H-.
4. To be determined at seating plane -C-.
5. Dimensions D1 and E1 do not include mold
protrusion. Allowable mold protrusion is 0.254 mm
per side. Dimensions D1 and E1 do include mold
mismatch and are determined at datum plane -H-.
6. “N” is the total # of terminals.
7. Package top dimensions are smaller than bottom
dimensions by 0.20 mm, and top of package will
not overhang bottom of package.
8. Dimension b does not include dambar protrusion.
Allowable dambar protrusion shall be 0.08 mm total
in excess of the b dimension at maximum material
condition. Dambar cannot be located on the lower
radius or the foot.
13.20 BSC
10.00 BSC
8.00 REF
1.00 REF
13.20 BSC
10.00 BSC
8.00 REF
1.00 REF
0.88
4
5
D1
D2
ZD
E
Body Length
4
5
E1
E2
ZE
L
Body Width
0.73
1.03
N
44
6
8
Pin Count
Lead Pitch
e
0.80
9. All dimensions are in millimeters.
10. Maximum allowable die thickness to be assembled
in this package family is 0.635 millimeters.
11. This drawing conforms to JEDEC registered outline
MS-108.
b
0.30
0.30
0.45
0.40
b1
aaa
0.30
0.16
12. These dimensions apply to the flat section of the
lead between 0.10 mm and 0.25 mm from the lead tip.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Package Information (continued)
44-Pin PLCC Package
Pin #1
Pin #1 Ident
0.045 x 45o
[1.143]
Pin #1 Ident
0.690
[17.526]
SQ
0.654
[16.612]
SQ
0.172
[4.368]
0.045 x 45o
0.050
[1.27]
0.029
[0.736]
0.620
[15.748]
0.500
[12.70]
0.016
[0.406]
0.101
[2.565]
Notes: (unless otherwise specified)
1.
2.
3.
Dimensions are in inches [millimeters].
Tolerances are: .XXX ± 0.005 [0.127].
PLCC packages are intended for surface mounting on solder lands on 0.050 [1.27] centers.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Recommended Operating Conditions
Parameter
Symbol
GND
VEE
Min
0
Typ
0
Max
Units
V
Device Ground
0
Negative Power Supply
Ambient Operating Temperature
–4.2
0
–5.2
–5.5
+70
V
TA
˚C
Absolute Maximum Ratings
Parameter
Symbol
Min
Typ
Max
Units
VEE (relative to GND)
–6.0
+0.5
V
Voltage on any Digital Pin
Output Current
VEE
GND
50
V
–50
mA
Ambient Operating Temperature
Storage Temperature
TA
TS
TJ
–55
–65
125
150
150
˚C
˚C
˚C
Junction Temperature
Soldering Temperature
TSOL
260
˚C
(5 seconds, 1/4" from pin)
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
DC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Inputs
Digital Input High Voltage (Note 1)
IN, IN*
IN – IN*
IN* – IN
VIH
250
250
mV
mV
mV
mV
Digital Input Low Voltage (Note 1)
IN, IN*
Digital Input High Voltage (Note 1)
DRVMODE, S1
–1070
VEE
0
Digital Input Low Voltage (Note 1)
DRVMODE, S1
VIL
–1450
Input Common Mode Range
IN, IN*
–2.0
–0.5
V
Input High Current (Vin = VILmax)
IN, DRVMODE, S1
IN*
IIH
IIH
130
–15
250
µA
µA
–50
Input Low Current (Vin = VILmin)
IN, DRVMODE, S1
IN*
IIL
IIL
80
–45
150
µA
µA
–100
Outputs
Digital Output High Voltage
Digital Output Low Voltage
Output Common Mode Range
OUT – OUT*
OUT* – OUT
500
500
–1.5
mV
mV
V
OUT + OUT*
2
–1.3
–1.1
VEE Supply Current @ REXT2 = 2.94K
VEE Supply Current @ REXT2 = 2.1K
Voltage Level at REXT1 Pin
IEE
IEE
–365
–380
–1.30
2.15
–200
–230
–1.20
2.35
mA
mA
V
VEXT1
IGAIN
Current Gain, IEXT1 to IDELAY and IWIDTH
Test conditions (unless otherwise specified): “Recommended Operating Conditions” with REXT1 = 2.94 KΩ, and
REXT2 = 2.1 KΩ. All parameters specified at 0°C are guaranteed by characterization and are not production
tested. The specified limits shown can be met only after thermal equilibrium has been established. Thermal
equilibrium is established by applying power for at least 2 minutes while maintaining a transverse air flow of 400
linear feet per minute over the device mounted either in the test socket or on the printed circuit board.
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Propagation Delays
Minimum Delays (Pulse Width > 3 ns)
MODE
S1
0
1
VDELAY VWIDTH
0
2
+0.1V
+0.1V
X
TPDmin
TPDmin
1.5
1.6
2.1
2.2
2.6
2.7
ns
ns
+0.1V
Delay Range vs. Pulse Width
(VWIDTH = VDELAY in Mode 2)
Input Pulse Width > 3.0 ns (Note 1)
(–1.1V < VDELAY < +0.1V)
Tspan
Tspan
Tspan
4.5
4.2
4.0
6.6
6.6
6.5
10.0
9.0
ns
ns
ns
Input Pulse Width > 1.9 ns (Note 1)
(–0.9V < VDELAY < +0.1V)
Input Pulse Width > 1.4 ns (Note 1)
8.0
(–0.8V < VDELAY < +0.1V)
VWIDTH Range of Adjustment (Mode 2 Only)
Input Pulse Width > 3.0 ns (Note 1)
(–1.1V < VWIDTH < +0.1V)
Twidth
Twidth
Twidth
1.1
1.0
0.8
1.5
1.3
1.0
ns
ns
ns
Input Pulse Width > 1.9 ns (Note 1)
(–0.9V < VWIDTH < +0.1V)
Input Pulse Width > 1.4 ns (Note 1)
(–0.8V < VWIDTH < +0.1V)
Propagation Delay Tempco, Rising Edge (Note 1)
–0.9V <= VDELAY <= +0.1V
TEMPCO+
1
3
2.5
10
4
15
ps / ˚C
ps / ˚C
–1.1V <= VDELAY <= –0.9V
Propagation Delay Tempco, Falling Edge (Note 1)
–0.9V <= VWIDTH <= +0.1V, VDELAY => –0.9V
–1.1V <= VWIDTH <= –0.9V, VDELAY = –0.9V
TEMPCO–
1
3
2.5
5.5
4
6
ps / ˚C
ps / ˚C
Output Rise / Fall Times (20 to 80%) (Note 1)
Tr, Tf
250
375
450
ps
Test conditions (unless otherwise specified): “Recommended Operating Conditions” with TA = 25 °C with 400 LFPM
of airflow, and all outputs terminated with 50 Ω to –2.0 V. Timing reference points at the differential crossing points
for input and output signals, REXT1 = 2.94 KΩ, and REXT2 = 2.1 KΩ. All input signals are fully differential. Values
are based on nominal temperature and a supply voltage of –5.5 V.
Note 1: Based upon characterization data. Not production tested.
The specified limits shown can be met only after thermal equilibrium has been established. Thermal equilibrium is
established by applying power for at least 2 minutes while maintaining a transverse air flow of 400 linear feet per
minute over the device mounted either in the test socket or on the printed circuit board..
2000 Semtech Corp.
17
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
AC Characteristics (continued)
Parameter
Symbol
TPD+min
Tspan+
Min
3.45
3.50
Typ
Max
4.35
4.50
Units
ns
Propagation Delays
Minimum Rising Edge Delay for Guaranteed –300 ps
Falling Edge Adjustment Range;
VDELAY = –.19V, VWIDTH = +0.1V
Rising Edge Delay Range for Guaranteed +/–300 ps
Falling Edge Adjustment Range;
ns
VDELAY = –.19V, VWIDTH = +0.1V to
VDELAY = –.9V, VWIDTH = –1.2V
Rising Edge Span
–1.1V < VDELAY < .1V
Tspan+
4.5
10.0
3.70
ns
VWIDTH Range
–1.1V < VWIDTH < +0.1V
Twidth
1.0
ns
ns
Rising Edge Delay Range for Guaranteed +/–450 ps
Falling Edge Adjustment Range;
Tspan+
2.70
VDELAY = –.3V, VWIDTH = +0.1V to
VDELAY = –.9V, VWIDTH = –1.3V
Tpd– vs. Tpd+ (Note 2)
VDELAY = –.19V, VWIDTH = +0.1V
Tskew–
Tskew–
–1.00
–1.00
0.20
0.35
0
–0.20
–0.35
1.00
1.00
4
ns
ns
Tpd– vs. Tpd+ (Note 2)
VDELAY = –.3V, VWIDTH = +0.1V
Tpd– vs. Tpd+ (Note 2)
VDELAY = –.9V, VWIDTH = –1.2V
Tskew–
ns
Tpd– vs. Tpd+ (Note 2)
VDELAY = –.9V, VWIDTH = –1.3V
Tskew–
ns
Propagation Delay Tempco, Rising Edge (Note 1)
–0.84V <= VDELAY <= –0.18V
TEMPCO+
TEMPCO–
PSRR
2.5
ps / ˚C
Propagation Delay Tempco, Fallilng Edge (Note 1)
–1.15V <= VWIDTH <= +0.1V, VDELAY > –0.84V
–1.25V <= VWIDTH <= +0.1V, VDELAY > –0.84V
0
0
3.5
7.5
5
10
ps / ˚C
ps / ˚C
1 Sigma Jitter, <100 mV P-P VEE Noise,
1 Hz to 20 MHz (Note 1)
8
10
ps
Test conditions (unless otherwise specified): “Recommended Operating Conditions” with TA = 25 °C with 400 LFPM
of airflow, and all outputs terminated with 50 Ω to –2.0 V. Timing reference points at the differential crossing points
for input and output signals, REXT1 = 2.94 KΩ, and REXT2 = 2.94 KΩ. All input signals are fully differential. Values
are based on nominal temperature and a supply voltage of –5.2 V.
Note 1:
Note 2:
Based upon characterization data. Not production tested.
Guaranteed by design. Not production tested.
The specified limits shown can be met only after thermal equilibrium has been established. Thermal equilibrium is
established by applying power for at least 2 minutes while maintaining a transverse air flow of 400 linear feet per
minute over the device mounted either in the test socket or on the printed circuit board.
www.semtech.com
2000 Semtech Corp.
18
Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Ordering Infor mation
Model Number
Package
E628AHF
44 Pin MQFP
w/Internal Heat Spreader
10 mm X 10 mm Body Size
E628AHJ
D628
44 Pin PLCC
w/Internal Heat Spreader
Die
Contact Infor mation
Semtech Corporation
High-Performance Division
10021 Willow Creek Rd., San Diego, CA 92131
Phone: (858)695-1808 FAX (858)695-2633
2000 Semtech Corp.
19
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Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Revision Histor y
Current Revision Date:
Previous Revision Date:
May 4, 2001
April 25, 2001
Page #
Section Name
Previous Revision
Current Revision
2
Pin Description
Ab Max Ratings
N/C
Add: There is no circuitry to these pins
inside the package. These pins are not
wire bonded to the die.
15
VEE (relative to GND), Max: 6.0
VEE (relative to GND), Max: +0.5
Soldering Temp, Max: 260
Current Revision Date:
Previous Revision Date:
April 25, 2001
March 8, 2001
Page #
Section Name
Previous Revision
Current Revision
Remove: "Preliminary"
16
DC Characteristics
Digital Input Low Voltage, Min: –1.8V
Digital Input Low Voltage, Min: VEE
Current Revision Date:
Previous Revision Date:
March 8, 2001
January 10, 2001
Page #
Section Name
Previous Revision
Current Revision
Bottom Drawing Title:
E628AHJ
Bottom Drawing Title:
E628AHF
3
Pin Description
44-Pin PLCC
44-Pin MQFP
12-14
18
Package Information
AC Characteristics
Add: Titles to Package Drawings
Rising Edge Delay Range
VDELAY = –.9V, VWIDTH = –1.15V
Rising Edge Delay Range
VDELAY = –.9V, VWIDTH = –1.2
www.semtech.com
2000 Semtech Corp.
20
Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Revision Histor y
Current Revision Date:
Previous Revision Date:
January 10, 2001
January 8, 2001
Page #
Section Name
Previous Revision
Current Revision
16
DC Characteristics
Digital Input Low Voltage, Min: VEE
Digital Input Low Voltage, Min: – 1.8V
Output Common Mode Range,
Min: – 1.1, Max: – 1.5
Output Common Mode Range,
Min: – 1.5, Max: – 1.1
VEE Supply Current @ REXT2 = 2.94K,
Min: 270, Max: 365
VEE Supply Current @ REXT = 2.94K
Min: – 365, Max: – 200
VEE Supply Current @ REXT2 = 2.1K
Min: 335, Max: 380
VEE Supply Current @ REXT2 = 2.1K
Min: – 380, Max: – 230
Current Revision Date:
Previous Revision Date:
January 8, 2001
October 23, 2000
Page #
Section Name
Previous Revision
Current Revision
VEE (relative to GND), Max: -6.0
Voltage on any Digital Pin, Max: VEE
Output Current, Max: -50
VEE (relative to GND), Max: 6.0
Voltage on any Digital Pin, Max: GND
Output Current, Max: 50
15
Absolute Maximum Ratings
DC Characteristics
VEE Supply Current @ REXT2 = 2.94K
Min: -200, Max: -365
VEE Supply Current @ REXT2 = 2.1K
Min: -230, Max: -380
VEE Supply Current @ REXT2 = 2.94K
Min: 270, Max: 365
VEE Supply Current @ REXT2 = 2.1K
Min: 335, Max: 380
16
17
Input Pulse Width > 1.9 ns, Min: 5.0
Input Pulse Width > 1.4 ns, Min: 5.0
Width Range of Adjustment, Min: 1.0
Input Pulse Width > 1.9 ns, Min: 4.2
Input Pulse Width > 1.4 ns, Min: 4.0
Width Range of Adjustment, Min: 1.1
AC Characteristics
Current Revision Date:
Previous Revision Date:
October 23, 2000
September 20, 2000
Page #
Section Name
Previous Revision
Current Revision
VEE Supply Current @ REXT = 2.94K
Min: 270, Max: 365
VEE Supply Current @ REXT = 2.1K
Min: 335, Max: 380
VEE Supply Current @ REXT = 2.94K
Min: 200, Typ: , Max: 365
VEE Supply Current @ REXT = 2.1K
Min: 230, Max: 380
17
DC Characteristics
AC Characteristics
Add:
19
Rising Edge Span - Min: 4.5, Max 10.0 ns
VWIDTH Range - Min: 1.0 ns
2000 Semtech Corp.
21
www.semtech.com
Edge628
HIGH-PERFORMANCE PRODUCTS – ATE
Revision Histor y
Current Revision Date:
Previous Revision Date:
September 20, 2000
September 11, 2000
Page #
Section Name
Previous Revision
Current Revision
VEE Supply Current @ REXT = 2.94K
Min: 200, Typ: 265, Max: 300
VEE Supply Current @ REXT = 2.1K
Min: 230, Max: 350
VEE Supply Current @ REXT = 2.94K
Min: 270, Typ: , Max: 365
VEE Supply Current @ REXT = 2.1K
Min: 335, Max: 380
17
DC Characteristics
Voltage Level at REXT1 Pin
Min: -1.305, Typ: 1.267, Max: -1.229
Voltage Level at REXT1 Pin
Min: -1.30, Typ: , Max: -1.20
Current Gain
Current Gain
Min: 2.214, Typ: 2.283, Max: 2.351
Min: 2.15, Typ: , Max: 2.35
Delay Range vs. Pulse Width
(VWIDTH = VDELAY in Mode 2)
Min: 5.5
Delay Range vs. Pulse Width
(VWIDTH = VDELAY in Mode 2)
Min: 4.5
18
19
AC Characteristics
AC Characteristics
Propagation Delays
VDELAY = -.18V,
Propagation Delays
VDELAY = -.19V,
Min: 3.75, Typ: 4.04, Max: 4.25
Min: 3.45, Typ: , Max: 4.35
Rising Edge Delay Range for guaranteed
+- 300 ps
Rising Edge Delay Range for guaranteed
+- 300 ps
VDELAY= -0.18V, VDELAY = -0.84V
Min: 4.00, Typ: 4.50, Max: 4.80
VDELAY - 0.19V, VDELAY = 0.9V
Min: 3.50, Typ:, Max: 4.50
Rising Edge Delay Range for guaranteed
+-450 ps
Rising Edge Delay Range for guaranteed
+-450 ps
VDELAY = -0.27V, VDELAY = -0.84,
VWIDTH = -1.25V
VDELAY = -0.3V, VDELAY = -0.9V,
VWIDTH = -1.3V
Min: 3.20, Typ: 3.77, Max: 4.10
Min: 2.70, Typ: , Max: 3.70
Typ- vs. Tpd+ (Note 1)
VDELAY = -0.18V
Typ: -0.39, Max: -0.30
Typ- vs. Tpd+ (Note 2)
VDELAY = -0.19V
Typ: , Max: -0.20
Typ- vs. Tpd+ (Note 1)
VDELAY = -0.27V
Typ: -0.57, Max: -0.45
Typ- vs. Tpd+ (Note 2)
VDELAY = -0.3V
Typ: , Max: -0.35
Typ- vs. Tpd+ (Note 1)
VDELAY = -0.84V, VWIDTH = -1.15V
Min: 0.30, Typ: 0.42
Typ- vs. Tpd+ (Note 2)
VDELAY = -0.9V, VWIDTH = -1.2V
Min: 0.20, Typ:
Typ- vs. Tpd+ (Note 1)
VDELAY = -0.84V, VWIDTH = -1.25V
Min: 0.45, Typ: 0.68
Typ- vs. Tpd+ (Note 2)
VDELAY = -0.9V, VWIDTH = -1.3V
Min: 0.35, Typ:
Add: Note 1. Based upon characterization
data. Not production tested.
Current Revision Date:
Previous Revision Date:
September 11, 2000
February 8, 2000
Page #
Section Name
Previous Revision
Current Revision
Add:
19
AC Characteristics
"Note 1" to Tpd- vs. Tpd+
Current Revision Date:
Previous Revision Date:
February 8, 2000
March 26, 1999
Page #
Section Name
Previous Revision
Current Revision
Add:
13 - 15
Package Informtion
Package Information
www.semtech.com
2000 Semtech Corp.
22
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