SC1458AWLTRT [SEMTECH]
Dual Output Low Noise LDO Linear Regulator; 双路输出低噪声LDO线性稳压器
| 型号： | SC1458AWLTRT |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Dual Output Low Noise LDO Linear Regulator |
| 文件： | 总13页 (文件大小：213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC1458
Dual Output Low Noise LDO
Linear Regulator
POWER MANAGEMENT
Features
Description
Input voltage range — 2.5 to 5.5V
Output voltages — 2.8V and 1.8V (SC1458A), 2.85V
and 2.85V (SC1458B)
Maximum output current — 300mA (each LDO)
Low 200mV maximum dropout at 200mA load
Quiescent current — 100μA (both LDOs enabled)
Shutdown current — 100nA
Output noise < 50μVRMS (SC1458B)
PSRR > 65dB at 1kHz (SC1458B)
Space saving package — MLPD-W6, 3mm x 3mm
Over-temperature protection
The SC1458 is a family of dual output, ultra-low dropout
linear voltage regulators designed for use in battery
powered wireless applications. Both versions of the
SC1458 require an input voltage level between 2.5V and
5.5V. The SC1458A supplies 2.5V on OUTA and 1.8V on
OUTB, while SC1458B supplies 2.85V on both outputs.
(For other voltage options see the SC560).
TheSC1458AprovidesaPGOODoutputtoholdaprocessor
in reset when the voltage on OUTA is not in regulation.
The SC1458B provides superior low-noise performance by
using an external bypass capacitor to filter the bandgap
reference. Both versions have a single enable pin that
controls both LDO outputs. The startup sequence delays
the start of OUTB by 128ꢀs after OUTA is enabled.
Short-circuit protection
Under-voltage lockout
Reset monitor for output A (SC1458A)
Applications
Each version also provides protection circuitry such as
current limiting, under-voltage lockout, and thermal
protection to prevent device failures. Stability is
maintained by using 1ꢀF capacitors on the output pins.
The MLPD package and 0402 ceramic capacitors minimize
the required PCB area.
PDAs and cellular phones
GPS devices
Palmtop computers and handheld instruments
TFT/LCD applications
Wireless handsets
Digital cordless phones and PCS phones
Personal communicators
Two-way pagers
Wireless LAN
Typical Application Circuit
SC1458A
To μP
VIN
VIN
EN
PGOOD
OUTA
OUTA
2.5V, 300mA
From μP
OUTB
1.8V, 300mA
GND
OUTB
CIN
COUTA
COUTB
1μF
2.2μF
1μF
September 12, 2007
1
SC1458
Pin Configuration
Ordering Information
Device
Package
SC1458AWLTRT(1)(2)
SC1458BWLTRT(1)(2)
MLPD-W6 3x3
MLPD-W6 3x3
SC1458AEVB
Evaluation Board
Evaluation Board
6
1
2
3
TOP
VIEW
SC1458BEVB
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is WEEE and RoHS
compliant.
5
4
T
MLPD-W6; 3x3, 6 LEAD
JA = 50°C/W
θ
Marking Information
Voltage Options
Device
SC1458A
SC1458B
Marking ID
BROA
VLDOA
2.5V
VLDOB
1.8V
BROB
2.85V
2.85V
BROn
yyww
xxxx
BROn = See Voltage Options Table for Details
yyww = Datecode
xxxx = Semtech Lot Number
2
SC1458
Absolute Maximum Ratings
Recommended Operating Conditions
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5
VEN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
VPGOOD (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
Pin Voltage — All Other Pins (V) . . . . . . . . . -0.3 to (VIN + 0.3)
VOUTA, VOUTB, Short Circuit Duration . . . . . . . . . .Continuous
ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ambient Temperature Range (°C) . . . . . . . . -40 < TA < +85
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 < VIN < 5.5
Thermal Information
Thermal Resistance, Junction to Ambient(2) (°C/W) . . . . 50
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150
Storage Temperature Range (°C). . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114-B.
(2) Calculated from package in still air, mounted to 3”x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless otherwise noted VIN = 3.6V, CIN = 2.2μF, COUTA = COUTB = 1μF, VEN = VIN, TA = -40 to +85°C. Typical values are at TA = 25°C. All specifications
apply to both LDOs unless otherwise noted.
Parameter
Symbol
VIN
Conditions
Min
2.5
Typ
Max
5.5
3
Units
V
Input Supply Voltage Range
Output Voltage Accuracy
Maximum Output Current
Dropout Voltage(1)
ΔVOUT
IMAX
VIN = VOUT + 0.3V to 5.5V, IOUT = 0 to 300mA
-3
%
300
mA
mV
μA
VD
IOUT = 200mA, VOUT = 2.5V
TA = 25°C
100
0.1
200
1
Shutdown Current
ISD
Quiescent Current
IQ
IOUTA = IOUTB = 0mA, TA = 25°C
100
μA
Load Regulation
VLOAD
IOUT = 1mA to IMAX
IOUT = 1mA
20
mV
Line Regulation
Current Limit
VLINE
ILIM
-6
6
mV
mA
350
850
VIN = 3.7V, IOUT = 50mA , 10Hz < f < 100kHz,
50
μVRMS
μVRMS
CBYP = 22nF
Noise(2)
eN
VIN = 3.7V, IOUT = 50mA , 10Hz < f < 100kHz
300
3
SC1458
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
V
IN = 3.7V, IOUT = 50mA, f = 1kHz,
65
dB
C
BYP = 22nF
Power Supply Rejection Ratio(2)
PSRR
V
IN = 3.7V, IOUT = 50mA, f = 1kHz
40
200
87
PGOOD Delay(3)
tPGOOD
160
82
240
92
ms
%
PGOOD Threshold(3)
VTH(PGOOD)
VOUT(LDOA) falling
From OFF to 87% VOUT, IOUT = 50mA,
BYP = 22nF
Start-Up Time
tSU
1
ms
μs
C
Power Up Delay Between LDOA
and LDOB
tDELAY
Delay between 0.87VOUTA and VOUTB start-up
VIN Rising
128
Under Voltage Lockout
UVLO Hysteresis
VUVLO
2.15
2.25
100
2.35
V
VUVLO-HYS
mV
Over Temperature Protection
Threshold
TOT
Rising threshold
160
20
°C
°C
Over Temperature
Hysteresis
TOT-HYS
Digital Inputs
Logic Input High Threshold
Logic Input Low Threshold
Logic Input High Current
Logic Input Low Current
Digital Outputs
VIH
VIL
IIH
VIN = 5.5V
VIN = 2.5V
VIN = 5.5V
VIN = 5.5V
1.25
V
V
0.4
1
μA
μA
IIL
1
PGOOD Output Voltage Low
Notes:
VOL
ISINK = 500μA, VIN = 3.7V
7
20
mV
(1) Dropout voltage is defined as VIN - VOUT, when VOUT is 100 mV below the value of VOUT for VIN = VOUT +0.5V.
(2) SC1458B only
(3) SC1458A only
4
SC1458
Typical Characteristics
Load Regulation LDOA
Load Regulation LDOB
VOUTB = 2.85V, VIN = 3.6V
VOUTA = 2.5V, VIN = 3.6V
4
3.5
3
4
3.5
3
TA=85
TA=25
°
C
C
TA=85
°
°
C
C
2.5
2
2.5
2
°
TA=25
1.5
1
1.5
1
TA=-40°C
TA=-40°C
0.5
0
0.5
0
0
50
100
150
200
250
0
50
100
150
200
250
Output Current (mA)
Output Current (mA)
Line Regulation LDOA
Line Regulation LDOB
V
OUTB = 2.85V, IOUTB = 1mA
VOUTA = 2.5V, IOUTA = 1mA
1.2
1
1
0.8
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
TA=-40°C
TA=25°C
-0.2
-0.4
-0.6
TA=-40°C
-0.2
-0.4
-0.6
TA=25°C
TA=85°C
TA=85°C
-0.8
-1
-0.8
-1
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
Input Voltage (V)
Dropout Voltage LDOA
Dropout Voltage LDOB
VOUTB = 2.85V, IOUTB = 200mA
VOUTA = 2.5V, IOUTA = 200mA
300
300
250
200
150
100
50
250
200
150
100
50
T=85°C
TA=85
°
C
TA=25°C
TA=-40°C
T=25°C
T=-40°C
0
2.2
0
2.25
2.3
2.35
2.4
2.45
2.5 2.55
2.6
2.65
2.7
2.75 2.8
2.2 2.25
2.3
2.35
2.4
2.45
2.5
2.55
2.6
2.65
2.7
2.75 2.8
Input Voltage (V)
Input Voltage (V)
5
SC1458
Typical Characteristics (continued)
PSRR vs. Frequency
PSRR vs. Frequency
VOUT = 2.5V, IOUT = 50mA
0
VOUT = 2.85V, IO = 50mA, CBYP=22nF
0
-10
-20
-30
-40
-50
-60
-70
-10
-20
-30
-40
-50
-60
-70
10
100
1000
10000
10
100
1000
10000
Frequency (Hz)
Frequency (Hz)
Output Noise vs. Load Current
VOUT = 2.5V, VIN = 3.6V, no CBYP
Output Noise vs. Load Current
VOUTB = 2.85V, IO = 50mA, CBYP=22nF
90
80
70
60
50
40
30
20
10
0
400
350
300
250
200
150
100
50
T=85°C
TA=85
TA=25
TA=-40
°C
°C
T=25°C
°C
T=-40°C
0
0
50
100
150
200
250
0
50
100
150
200
250
Output Current (mA)
Output Current (mA)
Load Transient Response (Falling Edge)
VOUT = 2.5V, VIN = 3.6V
Load Transient Response (Rising Edge)
VOUT = 2.5V, VIN = 3.6V
(0.1A/div)
(0.1A/div)
(20mV/div)
(20mV/div)
Time (1ms/div)
Time (1ms/div)
6
SC1458
Pin Descriptions
Pin #
Pin Name
Pin Function
SC1458A SC1458B
1
2
3
4
5
1
2
3
4
5
OUTB
VIN
Output for LDOB
Input supply voltage terminal
Output for LDOA
OUTA
GND
EN
Analog and digital ground
Logic Input — active high enables the SC1458.
Open drain logic output — monitors output of LDOA, switches low when the output drops out
of regulation.
6
PGOOD
BYP
6
T
LDO bypass output — bypass with a 22nF capacitor.
Thermal
Pad
Pad is for heatsinking purposes — not connected internally. Connect exposed pad to ground
using multiple vias.
T
7
SC1458
Block Diagram
VIN
2
5
EN
Power On
And
Control
Logic
SC1458B
Bandgap
Reference
BYP or
PGOOD
6
3
SC1458A
ENA
LDOA
OUTA
OUTB
ENB
GND
4
LDOB
1
8
SC1458
Applications Information
General Description
Active Shutdown
The SC1458 is a dual output linear regulator intended
for applications where low dropout voltage, low supply
current, and low output noise are critical. The device
provides a very simple, low cost solution for two separate
regulated outputs using very little PCB area due to its
small package size and the need for only three external
capacitors.
The SC1458 has internal active shutdown circuitry
included for both LDOs. Shutdown behavior is controlled
by discharging the output capacitor on the LDO output
by an on-chip FET when the LDO is disabled.
Protection Circuitry
The device provides the following protection features to
ensure that no damage is incurred in the event of a fault
Both linear regulators are powered from a single input
voltage supply rail, and each provides 300mA of output
current. Output voltages are set internally, eliminating the
need for external resistors.
co•ndiUtionnd.er-Voltage Lockout
• Over-Temperature Protection
• Short-Circuit Protection
An active high enable pin (EN) controls operation of both
regulators. Pulling this pin low causes the device to enter a
very low power shutdown mode, where it typically draws
100nA from the input supply.
Under-Voltage Lockout
The Under-Voltage LockOut (UVLO) circuit protects the
device from operating in an unknown state if the input
voltage supply is too low.
The device is available in two versions: SC1458A and
SC1458B. The SC1458A version has pin 6 configured as a
power good signal (PGOOD), which monitors the output
of LDOA. The SC1458B device has pin 6 configured as an
external bypass pin (BYP). This is suitable for applications
which require low output noise and excellent PSRR
characteristics.
When the VIN drops below the UVLO threshold, the
LDOs are disabled and discharged — PGOOD is held
low (SC1458A only). When VIN is increased above the
hysteresis level, the LDOs are enabled into their previous
states (timing described in Figure 1), provided EN has
remained high. When powering-up with VIN below the
UVLO threshold, the LDOs will remain off and PGOOD
will be held low (SC1458A only).
Power-On Control
When EN transitions high, the output of LDOA is enabled.
After a delay of 128μs, the output of LDOB is enabled.
In the case of the SC1458A, when the output voltage of
LDOA reaches 87% of its regulation point, the delay timer
starts and the PGOOD signal transitions high after a delay
of 200ms. The power up/down sequence is shown in
Figure 1.
Over-Temperature Protection
An internal over-temperature (OT) protection circuit is
providedthatmonitorstheinternaljunctiontemperature.
When the temperature exceeds the OT threshold as
defined in the Electrical Characteristics section, the OT
protection disables all the LDO outputs and holds the
PGOOD signal low.When the junction temperature drops
below the hysteresis level, the LDOs are re-enabled into
their previous states and PGOOD is set high, provided EN
has remained high (SC1458A only).
EN
87%
200ms
87%
OUTA
PGOOD
OUTB
Short-Circuit Protection
Each LDO output has short-circuit protection. If the
output current exceeds the current limit, the output
voltage will drop and the output current will be limited
until the short is removed. If a short-circuit occurs on the
output of LDOA, the output of LDOB will also be disabled
128μs
Figure 1 — Timing Diagram
9
SC1458
Applications Information (continued)
until the fault is removed and the load current returns to
a specified level.
1.8
1.5
1.2
0.9
0.6
0.3
0
TJ(Max)=150°C
Component Selection
A capacitance of 1μF or larger on each output is
recommended to ensure stability. Ceramic capacitors
of type X5R or X7R should be used because of their
low ESR and stable temperature coefficients. It is also
recommended that the input be bypassed with a 2.2μF,
low ESR X5R or X7R capacitor to minimize noise and
improve transient response. Note: Tantalum and Y5V
capacitors are not recommended.
TJ(Max)=125°C
-40
-20
0
20
40
60
80
100
Ambient Temperature (oC)
A
bypass capacitor (minimum of 22nF) should be
Figure 3 — Maximum PD vs. TA
connected between the BYP and GND pins to meet all
noise-sensitive requirements. Increasing the capacitance
to 100nF will further improve PSRR and output noise
(SC1458B only).
The following procedure can be followed to determine if
thethermaldesignofthesystemisadequate.Thejunction
temperature of the SC1458 can be determined in known
operating conditions using the following equation:
Thermal Considerations
TJ = TA +(PD x θJA)
where
Although each of the two LDOs in the SC1458 can
provide 300mA of output current, the maximum power
dissipation in the device is restricted by the miniature
package size. The graphs in Figure 2 and Figure 3 can
be used as a guideline to determine whether the input
voltage, output voltages, output currents, and ambient
temperature of the system result in power dissipation
within the operating limits or if further thermal relief is
required.
TJ = Junction Temperature (°C)
TA = Ambient Temperature (°C)
PD = Power Dissipation (W)
θJA = Thermal Resistance Junction to Ambient (°C/W)
Example
An SC1458A is used to provide outputs of 2.5V, 150mA
from LDOA and 1.8V, 200mA from LDOB. The input
voltage is 4.2V, and the ambient temperature of the
system is 60°C.
0.6
0.5
0.4
0.3
0.2
0.1
PD= 0.15(4.2 – 2.5) + 0.2(4.2 – 1.8)
= 0.74W
and
TJ = 60 + (0.74 x 50) = 97°C
Figure 3 shows that the power dissipation is within limits
at TA = 60°C and calculation of TJ shows that it is within the
specified limit of 150°C.
______
TA=+25°C, PD(MAX)= 1.9W
- - - - TA=+85°C, PD(MAX)= 1.0W
0
3
3.5
4
4.5
5
5.5
6
Input Voltage (V)
Figure 2 — Safe Operating Limit
This means that operation of the SC1458 under these
conditions is within the specified limits and the device
would not require further thermal relief measures.
10
SC1458
Applications Information (continued)
• Connect all ground connections directly to the
PCB Layout Considerations
ground plane whenever possible to minimize
ground potential differences on the PCB.
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation.
• Ensure that the feedback resistors are placed as
close as possible to the feedback pins.
• Attach the part to a large copper footprint,
particularly the thermal pad on the underside
of the device, to enable better heat transfer,
particularly on PCBs where there are
internal power and ground planes.
• Place the input, output, and bypass capacitors
close to the device for optimal transient
response and device behavior.
COUTB
SC1458B
CIN
CBYP
COUTA
11
SC1458
Outline Drawing — MLPD-W6 3x3
DIMENSIONS
INCHES MILLIMETERS
A
D
B
E
DIM
A
MIN NOM MAX MIN NOM MAX
.028 .030 .031 0.70 0.75 0.80
A1 .000 .001 .002 0.00 0.02 0.05
(.008)
(0.20)
A2
b
D
E
.012 .016 .018 0.30
0.45
0.40
.114 .118 .122 2.90 3.00 3.10
.114 .118 .122 2.90 3.00 3.10
PIN 1
INDICATOR
(LASER MARK)
D1 .087 .091 .094 2.20 2.30 2.40
E1 .055 .059 .063 1.40 1.50 1.60
e
.037 BSC
0.95 BSC
L
.012 .014 .016 0.30 0.35 0.40
N
6
6
aaa
bbb
.003
.004
0.08
0.10
A
SEATING
PLANE
aaa
C
C
A1
A2
D1
2
1
LxN
E/2
E1
N
bxN
bbb
C A B
e
D/2
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
3. REFERENCE JEDEC STANDARD VARIATION WEEA-2.
12
SC1458
Land Pattern — MLPD-W6 3x3
DIMENSIONS
INCHES
H
DIM
MILLIMETERS
(.116)
.087
.094
.063
.037
.009
.018
.030
.146
(2.95)
2.20
2.40
1.60
0.95
0.225
0.45
0.75
3.70
C
G
H
K
P
R
X
Y
Z
(C)
G
Y
K
Z
X
P
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Mangement Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
13
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