SC4212LEVB [SEMTECH]
High PSRR, Very Low Input, Very Low Dropout, 1A Linear Regulator;型号: | SC4212LEVB |
厂家: | SEMTECH CORPORATION |
描述: | High PSRR, Very Low Input, Very Low Dropout, 1A Linear Regulator |
文件: | 总13页 (文件大小:838K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SC4212L
High PSRR, Very Low Input, Very
Low Dropout, 1A Linear Regulator
POWER MANAGEMENT
Features
Description
Input Voltage Range from 1.6V to 6.0V
150mV Maximum Dropout @ 1A
Adjustable Output from 0.5V with 1ꢀ Accuracy
High PSRR (76dB Typical at 1.8Vin to 0.5Vo, 1A)
Noise Bypass Pin
Programmable Soft-Start
12µA Quiescent Current in Shutdown
Enable Input
The SC4212L is a high performance linear regulator
designed for applications requiring very low dropout
voltage at load currents up to 1 Ampere. It operates with
VIN as low as 1.6V and up to 6V, making it useful for a wide
range of different applications and rails. The output
voltage is programmable down to 0.5V, set via an external
resistor divider, or to a fixed setting of 0.5V depending
upon how the FB pin is configured.
Power Good Indicator
Over Current and Over Temperature Protection
Reverse Blocking from Output to Input
Full Industrial Temperature Range
3mm x 3mm x 1mm MLPD-8 Package
Fully WEEE and RoHS Compliant
The SC4212L has an enable pin to further reduce power
dissipation while shut down. This device also offers an
active-high power good for the system to check the
output voltage. An external soft start capacitor can be
connected to the SS pin to program the profile of the
startup. Additionally, the device provides protection fea-
tures such as over current protection, over temperature
protection and reverse blocking from output to input. A
capacitor at the BYP pin can bypass the noise generated in
the internal bandgap reference in order to improve the
PSRR and the noise at the output. The SC4212L is available
in a 3mm x 3mm MLPD-8 package.
Applications
Telecom and Networking Cards
Motherboards and Peripheral Cards
Industrial Applications
Wireless Infrastructure
Medical Equipment
Typical Application Circuit
SC4212L
SC4212L
0.5(R1+R2)
R2
VO =
PG
EN
PG
EN
PG
EN
GN D
FB
VO=0.5V
VO
PG
EN
GN D
FB
VO
VO
VO
VIN
SS
VIN
SS
VIN
VIN
R1
C3
BYP
BYP
CIN
CIN
CBYP
CBYP
CSS
CSS
CO
CO
R2
R2
* C3 is a placeholder
Rev. 2.0
1
© 2015 Semtech Corporation
SC4212L
Pin Configuration
Ordering Information
Device
Package
TOP VIEW
SC4212LMLTRC(1)(2)
SC4212LEVB
3mm x 3mm x 1mm MLPD-8
Evaluation Board
8
7
6
PG
EN
1
2
3
GND
FB
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is WEEE and RoHS
compliant and halogen free.
VIN
VO
5
SS
4
BYP
3mm x 3mm x 1mm MLPD-8
θJA = 36.3°C/W
Marking Information
212L
yyww
xxxx
yyww = Datecode ( Example : 1352 )
xxxx = Semtech Lot No. ( Example : 2932 )
2
SC4212L
Absolute Maximum Ratings
Recommended Operating Conditions
VIN, VO, PG to GND (V) . . . . . . . . . . . . . . . . . . . . . . -0.3 to 6.5
EN, SS, BYP to GND (V) . . . . . . . . . . . . . . . . -0.3 to VIN + 0.3
FB to GND (V). . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VIN + 0.3
Power Dissipation. . . . . . . . . . . . . . . . . . . . . Internally Limited
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 ≤VIN ≤ 6.0
Junction Temperature Range (°C). . . . . . . . . -40≤TJ ≤+125
Output Current Range . . . . . . . . . . . . . . . . . . . 50µA ≤IO ≤1A
Thermal Information
ESD Protection Level HBM(1) (kV) . . . . . . . . . . . . . . . . . . .
ESD Protection Level CDM(2) (kV) . . . . . . . . . . . . . . . . . . .
4
1
Thermal Resistance, Junction to Ambient (3) (°C/W) . . 36.3
Thermal Resistance, Junction to Case (°C/W). . . . . . . . 3.77
Storage Temperature (°C) . . . . . . . . . . . . . . . . . . . -65to+150
Peak IR Reflow Temperature (10s to 30s). . . . . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to standard ANSI/ESDA/JEDEC JS-001-2012.
(2) Tested according to standard JESD-C101E.
(3) Calculated from package in still air, mounted to 3”x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless noted otherwise TJ = 25° C for typical, -40° C ≤ TJ ≤ 125° C for min and max. VEN = VIN, VFB = VO, VIN = 1.6V to 6.0V, CIN=10µF, COUT=10µF, CBYP
= 470nF.
Parameter
VIN
Symbol
Conditions
Min
Typ
Max
Units
VIN operating range(1)
1.6
6.0
680
2
V
VIN = 3.3V, IO = 0A
IO = 1A
325
12
µA
mA
µA
Quiescent current
IQ
VEN =0V
50
Soft-Start
Soft-start source current
tSS without external CSS
Feedback
ISS
VIN = 3.3V
2
µA
µs
250
Feedback voltage(2)
Feedback pin current
VO
VFB
IFB
IO = 10mA to 1A
VFB = VOUT
0.495
0.500
80
0.505
200
V
nA
Line regulation(2)
IO = 10mA
0.01
0.2
ꢀ/V
3
SC4212L
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
1.0
Units
Load regulation(2)
IO = 10mA to 1A
0.21
ꢀ
1.6V ≤ VIN < 2.2V
86
IO =0.5A
IO = 1A
2.2V ≤ VIN ≤ 6.0V
1.6V ≤ VIN < 2.2V
2.2V ≤ VIN ≤ 6.0V
75
Dropout voltage(3)
Current limit
VDO
mV
A
175
150
2.6
ICL
1.2
f = 100Hz
f = 1kHz
80
76
64
43
32
26
f = 10kHz
f = 100kHz
f = 500kHz
f = 1MHz
VIN = 1.8V, VO = 0.5V, IO
=1A, CBYP = 470nF
Power Supply Rejection Ratio
PSRR
dB
EN
VEN = 0V, VIN = 1.6V to 6.0V
1.5
80
10
µA
nA
Enable pin current
IEN
VEN = VIN
200
VIH
VIL
1.2
Enable pin threshold
VIN = 1.6V to 6.0V
V
0.4
Over Temperature Protection
High trip level
THI
150
10
OC
OC
Hysteresis
THYST
Power Good
Upper limit, VFB > internal 500mV reference
110
PG threshold
ꢀ
Lower limit, VFB < internal 500mV reference
90
PG pin leakage current
PG resistance
VIN=3.3V
VIN=3.3V
0.5
53
µA
Ω
Notes:
(1) Minimum VIN = VOUT + VDO or 1.6V, whichever is greater.
(2) Low duty cycle pulse testing with Kelvin connections required.
(3) VDO = VIN - VO when VFB = GND.
4
SC4212L
Pin Descriptions
Pin #
Pin Name
Pin Function
Power good output. Open drain, active high. Connect to a positive supply with a pullup resistor.
Leave this pin unconnected if not used.
1
PG
Enable input. Driving this pin high turns on the regulator. Driving this pin low shuts off the regula-
tor. If not driven from a control circuit, tie this pin directly to the VIN pin, or via a resistor up to
400kΩ.
2
EN
Input supply pin. A large bulk capacitance should be placed close to this pin to ensure that the
input supply does not sag below the minimum VIN.
3
4
VIN
SS
Soft-start pin. Connecting a ceramic capacitor from this pin to GND sets the startup time. Refer to
the EC table (page 3) for the typical tSS with the external soft-start capacitor not populated.
5
6
BYP
VO
Bypass pin. Low noise performance is optimized by connecting a capacitor from this pin to GND.
Regulator output pin. Refer to the Applications Information section for output capacitor selection.
Input of the error amplifier. This pin is used to set the output voltage (See typical Application
Circuits on page 1).
7
8
FB
GND
Ground pin.
The exposed pad enhances thermal performance and is not electrically connected inside the pack-
age. It is recommended to connect the exposed pad to the ground plane using multiple vias.
THERMAL PAD
Block Diagram
R everse Polarity
Protection C ircuitry
VIN
VO
Soft-Start
C ircuitry
SS
Over-current and
therm al shutdow n
C ircuitry
FB
Enable
C ircuitry
EN
PG
BYP
VREF
C ircuitry
EN
VREF
VFB
PG
C ircuitry
G ND
5
SC4212L
Typical Characteristics
Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805.
Dropout Voltage at Vin = 1.6V
Dropout Voltage at Vin = 2.2V
1A
1A
0.5A
0.5A
Current Limit Threshold
Dropout Voltage at Vin = 6.0V
1A
0.5A
Input Under-voltage Lockout Threshold
Shutdown Current
Vin rising threshold
Vin = 6.0V
Vin = 3.3V
Vin = 1.6V
Vin falling threshold
6
SC4212L
Typical Characteristics (Continued)
Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805.
Quiescent Current
Output Rise Time
Css = NP
Io = 0A
ENABLE Rising Threshold
Output Rise Time
Css = 10nF
Vin = 1.6V
Vin = 3.3V
Vin = 6.0V
ENABLE Falling Threshold
PG Threshold
Upper Threshold
Lower Threshold
7
SC4212L
Typical Characteristics (Continued)
Unless noted otherwise CIN=10µF/10V X7R 0805, COUT=10µF/10V X7R 0805.
Power Supply Ripple Rejection
Power Supply Ripple Rejection
Vin = 1.8V, Vo = 0.5V, Io = 25mA
Vin = 1.8V, Vo = 0.5V, Io = 1A
CBYP = NP
CBYP = 470nF
CBYP = NP
CBYP = 470nF
Output Spectral Noise Density
Output Spectral Noise Density
CBYP = 470nF, RL = 50Ω
CBYP = NP, RL = 50Ω
Vn RMS (10Hz to 100kHz):
36.4µVrms, Vo = 0.5V
83.0µVrms, Vo = 1.2V
225.6µVrms, Vo = 3.3V
Vn RMS (10Hz to 100kHz):
15.7µVrms, Vo = 0.5V
36.9µVrms, Vo = 1.2V
85.7µVrms, Vo = 3.3V
8
SC4212L
Applications Information
Introduction
Soft-Start
The SC4212L is intended for applications where high
current capability and very low dropout voltage are
required. It provides a very simple, low cost solution that
uses very little PCB area. Additional features include an
enable pin to allow for a very low power consumption in
standby mode, and a fully adjustable output.
Soft-start is achieved by using a voltage ramp as the
voltage reference for the internal error amplifier during
startup. This voltage ramp is created by an internal 2µA
current source charging an external soft-start capacitor.
When the voltage ramp reaches 500mV, the voltage refer-
ence for the internal error amplifier switches to the fixed
500mV VREF. Thus, during soft-start, the output tracks the
internal voltage ramp, which limits the input inrush
current and provides a programmed soft-start profile for a
wide range of applications. The soft-start time tSS can be
calculated with the below equation:
VO Setting: VO = VREF
By connecting the FB pin directly to the VO pin, the output
voltage will be regulated to the 0.5V internal reference. In
this configuration, R2 should be 10kΩ.
tSS = 0.25x106CSS
Power Good
VO Setting with External Resistors
The power good output is an open-drain output which
requires a pull-up resistor. The SC4212L features an active-
high power good. During startup, the power good pin will
not be pulled high until the soft-start is completed. In any
case, the power good output will be low when the FB pin
The use of 1ꢀ resistors, and designing for a current flow ≥
50µA is recommended to ensure a well regulated output
(thus R2 ≤ 10kΩ). R1 can then be calculated from
R1 = R2 (VO-VREF)/VREF
voltage is not within 10ꢀ of VREF
.
Enable
Over-Current and Thermal Shutdown
Pulling this pin below 0.4V turns the regulator off, reduc-
ing the quiescent current to a fraction of its operating
value. Driving this pin high enables the regulator. A pull
up resistor ≤ 400kΩ should be connected from this pin to
the VIN pin in applications where the Enable pin is not
driven from a control circuit.
The over-current protection and thermal shutdown func-
tions protect the regulator against damage due to exces-
sive power dissipation. The SC4212L is designed to current
limit when the output current reaches 1.6A (typical). When
the load exceeds 1.6A, the output voltage is reduced to
maintain a constant current limit.
Input Capacitor
The thermal shutdown function limits the junction tem-
perature to a maximum of 150 C (typical). Thermal shut-
A 10µF X5R or X7R ceramic capacitor, along with a 0.1µF
ceramic decoupling capacitor is recommended to be
placed directly next to the VIN pin. This allows for the
device being some distance from the input source, reduc-
ing the input droop due to load transients and improving
load transient response. Additional capacitance may be
needed if large step, fast di/dt load transients are required
or the LDO is located far away from the input source.
O
down turns off the regulator as the junction temperature
O
reaches the high trip level of 150 C. When the junction
O
temperature drops below 140 C (typical), the regulator is
turned on once again.
Thermal Considerations
The power dissipation in the SC4212L is roughly given by
the following equation:
Output Capacitor
PD = (VIN - VO)IO
A 10µF X5R or X7R ceramic capacitor, along with a 0.1µF
ceramic decoupling capacitor is recommended.
9
SC4212L
Applications Information (Continued)
The allowable power dissipation will be dependant upon
the thermal impedance achieved in the application. The
derating curve below is valid for the thermal impedance
specified in the Thermal Information section on page 3.
Figure 1. Power Derating Curve
10
SC4212L
Outline Drawing — 3mm x 3mm MLPD-8
11
SC4212L
Land Pattern — 3mm x 3mm MLPD-8
K
DIM ENSIO NS
Y
DIM
INCHES
M ILLIM ETERS
(.116)
.087
.067
.102
.026
.016
.030
.146
(2.95)
2.20
1.70
2.58
0.65
0.40
0.75
3.70
C
G
H
K
P
X
Y
Z
H
X
(C)
G
Z
P
NO TES:
CO NTRO LLING DIM ENSIO NS ARE IN M ILLIM ETERS (ANG LES IN DEG REES).
1.
2. THIS LAND PATTERN IS FO R REFERENCE PURPO SES O NLY.
CO NSULT YO UR M ANUFACTURING G RO UP TO ENSURE YO UR
CO M PANY'S M ANUFACTURING G UIDELINES ARE M ET.
3.
THERM AL VIAS IN THE LAND PATTERN O F THE EXPO SED PAD
SHALL BE CO NNECTED TO A SYSTEM G RO UND PLANE.
FAILURE TO DO SO M AY CO M PRO M ISE THE THERM AL AND/O R
FUNCTIO NAL PERFO RM ANCE O F THE DEVICE.
12
SC4212L
© Semtech 2015
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tual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation
resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress
including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the
specified range.
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Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
13
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