SC4620 [SEMTECH]
Low Input Voltage, High Efficiency, 2.5A Integrated FET Synchronous Step down DC/DC Regulator; 低输入电压,高效率, 2.5A集成FET同步降压型DC / DC稳压器型号: | SC4620 |
厂家: | SEMTECH CORPORATION |
描述: | Low Input Voltage, High Efficiency, 2.5A Integrated FET Synchronous Step down DC/DC Regulator |
文件: | 总19页 (文件大小:1306K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SC4620
Low Input Voltage, High Efficiency, 2.5A Integrated
FET Synchronous Step down DC/DC Regulator
POWER MANAGEMENT
Features
Description
VIN Range: 2.3 – 5.5V
The SC4620 is a highly integrated synchronous step-down
DC/DC regulator designed for low input voltage range of
2.3V to 5.5 Volts. It can deliver 2.5A continuous output
current with the output voltage as low as 0.5 Volts. The
internal low RDS(ON) synchronous power switches eliminate
the need for external Schottky diode while delivering
overall converter efficiency up to 95%.
2.5A Continuous Output Current
Adjustable Output Voltage 0.5V to Vin
Up to 95% Efficiency
Synchronizable and Programmable Frequency:
200kHz – 2MHz
Power Good Monitor
<1µA of Shutdown Current
Programmable Soft Start
A power good pin is available to monitor the output voltage
status. Operating frequency is adjustable from 200 kHz
to 2MHz with a single resistor and it can be synchronized
to an external clock.
Programmable Current Limit
Over Temperature protection
-40 to +85 °C Ambient Temperature Range
4X4mm MLPQ-20 packages- WEEE and RoHS
compliant
The SC4620 offers adjustable current limit, soft start and
over temperature protection to safeguard the device under
extreme operating conditions. The soft start provides a
controlled output voltage ramp up at startup. When a
logic low is applied to the Enable pin, the SC4620 enters
Applications
the shutdown mode and it consumes less than 1µA of Low Voltage Distributed DC-DC Converters
current.
Telecommunication Power Supplies
Portable Equipment
The SC4620 is available in 4x4 MLPQ-20 and it is rated xDSL
over -40°C to +85°C ambient temperature range.
Typical Application Circuit
R4
C11
Vin
L1
Vout
PVIN
PH
FB
R5
R6
R2
C8
R7
R9
SYNC/EN
PGOOD
VCC
C9
R8
C4
C3
R1
C2
C1
SC4620
L2
SS
ISET
FS
COMP
C7
C5
R3 R11
Revision: June 25, 2007
www.semtech.com
1
SC4620
POWER MANAGEMENT
Pin Configuration
Ordering Information
Device
Top Mark
Package
Top View
SC
4620
SC4620MLTRT (1) (2)
MLPQ-20
SC4620EVB-MLPQ
Evaluation Board
20
16
15
Notes:
1
PVIN
PVIN
ISET
SS
PGND
PGND
AGND
VCC
(1) Available in tape and reel only. A reel contains 3,000 devices for MLPQ-20
package.
(2) Available in lead-free package only. Device is WEEE and RoHS compliant.
T
FS
FB
5
11
10
6
20Pin MLPQ
θJA= 29°C/W; θJC= 2.5°C/W.
2007 Semtech Corp.
2
www.semtech.com
SC4620
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the
Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
-0.3 to 6
Units
V
Supply Voltage
PVIN, VCC
PVIN to VCC
+/- 0.3
V
FB, COMP, ISET, SYNC/EN, FS, SS, PGOOD to AGND
PGND to AGND
-0.3 to VCC+ 0.3
+/- 0.3
V
V
PHASE Voltage to PGND
PHASE Pulse Voltage to PGND Tpulse < 50ns
Storage Temperature Range
Junction Temperature
VPHASE
VPHASE
TSTG
TJ
-0.3 to PVIN+ 0.3
-3 to PVIN+ 2
-40 to 150
150
V
V
°C
°C
°C
IR Reflow Temperature
TP
260
Recommended Operating Conditions
The Performance is not guarantied if exceeding the specifications below.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Power Supply
Input Voltage Operating Range
Ambient Temperature Range
Junction Temperature
Max. Output Current
VIN
TA
2.3
-40
-40
0
5.5
85
V
°C
°C
A
TJ
125
2.5
IOUTMAX
Electrical Characteristics
Unless otherwise specified, VIN= VCC=SYNC/EN=3.3V, ROSC=51.1KΩ, RISET=27.4KΩ, TA = -40°C to 85°C
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Power Supply
Start Threshold Voltage, UVLO
Hysteresis Voltage, UVLO
Supply Current, Shutdown
VIUV
VIUVHY
ISD
VIN Rising
2
120
0.2
7
2.25
V
mV
µA
mA
mA
VSYNC = 0V
1
10
7
IQswitching
IQL
FB = COMP, No Load
FB = 0.6V, No Load
Supply Current, Operating
3.5
2007 Semtech Corp.
3
www.semtech.com
SC4620
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless otherwise specified, VIN= VCC=SYNC/EN=3.3V, ROSC=51.1KΩ, RISET=27.4KΩ, TA = -40°C to 85°C.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Thermal Shutdown
Thermal Shutdown Trip Point
Thermal Shutdown Hysteresis
Synchronization, Enable Input
TOTP
Temperature Rising
160
10
°C
°C
TOTP_HYS
VENL
VENH
FSYNC
Logic Low
Logic High
0.8
V
V
SYNC/EN Threshold
2.0
Frequency Range, SYNC
Oscillator
20% Higher than FOSC
200
2000
kHz
Osciilator Frequency Range
FOSC
200
415
435
2000
585
kHz
kHz
kHz
V
ROSC= 51.1KΩ
500
500
1.0
Osciilator Frequency Accuracy
ROSC=51.1KΩ, TA=TJ=25°C
565
Ramp Peak to Valley(1)
Ramp Peak Voltage(1)
Ramp Valley Voltage(1)
Soft Start, Current Limit
Soft-Start Charge Current
ISET Bias Voltage
Over Current Trip
VPV
VP
1.25
0.25
V
VV
V
ISS
VISET
IIST
6
0.55
2.55
0.3
µA
V
RISET = 27.4KΩ
RISIT = 57.6KΩ
VFB drop
0.45
1.9
0.61
3.1
A
Output UVLO
VOUV
TOCHP
V
Hiccup period(1)
131072
clks
Error Amplifier
Error Amplifier Open Loop
100
dB
Voltage Gain (1)
Error Amplifier Unity Gain Bandwidth(1)
Output Voltage Slew Rate, COMP(1)
Source Output Current, COMP
Sink Output Current, COMP
10
4
MHz
V/µs
mA
mA
V
FB = 0.4V
FB = 0.6V
20
25
2.5
Output Voltage High, COMP
FB = 0.4V, ICOMP = -1mA
2007 Semtech Corp.
4
www.semtech.com
SC4620
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless otherwise specified, VIN= VCC=SYNC/EN=3.3V, ROSC=51.1KΩ, RISET=27.4KΩ, TA = -40°C to 85°C.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Error Amplifier (Cont.)
Output Voltage Low, COMP
FB = 0.6V, ICOMP = 1mA
0.1
0.5
+1
0.25
0.5075
+2
V
V
0.4925
-2
Feedback Voltage
VFB
Vcc = 2.3V to 5.5V
%
nA
Input Bias Current(1)
Power Switches
IFB
FB=VREF
60
High-Side P-MOSFET
Low Side N-MOSFET
Power Good
RDSH(on)
RDSL(on)
VIN=VCC=5V, ISOURCE = 1A, TA=TJ=25 °C
VIN=VCC=5V, ISINK = 1A, TA=TJ=25 °C
74
47
100
85
mΩ
mΩ
PGood Voltage Low
PGood Leakage Current
PGood Delay Time(1)
VPGL
IPGOOD
TD
IPGOOD = 1mA
PGOOD = 5V
0.2
V
1
µA
Vout rising or Vout falling
1024
+10
clks
With respect to nominal output,
PGood High Window
+8
+15
%
TA=TJ=25 °C
Note:
(1) Guaranteed by design.
2007 Semtech Corp.
5
www.semtech.com
SC4620
POWER MANAGEMENT
Typical Performance Characteristics
Circuit condition: Application circuit#1, 5VIN, 1VOUT
VIN
SS
VIN
SS
2.5V/DIV
2.5V/DIV
2.5V/DIV
2.5V/DIV
VOUT
VOUT
0.5V/DIV
2.5V/DIV
PGOOD
0.5V/DIV
2.5V/DIV
PGOOD
10ms/DIV
10ms/DIV
Figure 1. Start Up by VIN@0A
Figure 2. Start Up by VIN@2.5A
2.5V/DIV
2.5V/DIV
2.5V/DIV
2.5V/DIV
VIN
VIN
SS
SS
0.5V/DIV
2.5V/DIV
0.5V/DIV
2.5V/DIV
VOUT
VOUT
PGOOD
PGOOD
5ms/DIV
1ms/DIV
Figure 4. Shutdown by VIN@2.5A
Figure 3. Shutdown by VIN@0A
VOUT
20mV/DIV
VOUT
40mV/DIV
2.0V/DIV
lOUT
VPHASE
1A/DIV
1us/DIV
20us/DIV
Figure 5. Transient Response@ 0 to 2.5A
Figure 6. Ripple and Stability@2.5A
2007 Semtech Corp.
6
www.semtech.com
SC4620
POWER MANAGEMENT
Typical Performance Characteristics (Cont.)
Circuit condition: Application circuit#1, 5VIN, 1VOUT
0.6V/DIV
VOUT
0.6V/DIV
5.0V/DIV
VOUT
5.0V/DIV
SS
SS
3V/DIV
3.0V/DIV
VPHASE
VPHASE
100ms/DIV
1s/DIV
Figure 7. Over Load Hiccup
Figure 8. Thermal Shutdown Protection@0A
External clock singal=650kHz, duty=50%
˄˃˃
ˌˈ
5Vin
Sync
ˌ˃
Signal
ˋˈ
ˋ˃
3.3Vin
2.5Vin
ˊˈ
ˊ˃
ˉˈ
ˉ˃
ˈˈ
ˈ˃
ˇˈ
ˇ˃
2.0V/DIV
VPHASE
2.0V/DIV
˃ˁ˃
˃ˁˈ
˄ˁ˃
˄ˁˈ
˅ˁ˃
˅ˁˈ
1us/DIV
Output Current(A)
Figure 10. Efficiency(VIN)
Figure 9. Synchronization
Internal PMOS RDSON @ Room Temperature
Internal NMOS RDSON @ Room Temperature
130
80
75
70
65
2.5Vin
120
3.3Vin
2.5Vin
110
3.3Vin
100
90
60
55
80
70
50
45
5Vin
5Vin
60
1
1.5
2
2.5
1
1.5
2
2.5
IOUT (A)
IOUT (A)
Figure 12. Low-Side N-MOSFET
Figure 11. High-Side P-MOSFET
2007 Semtech Corp.
7
www.semtech.com
SC4620
POWER MANAGEMENT
Typical Performance Characteristics (Cont.)
OCP Trip
Regulation During Switching to Linear Mode
ˆˁ˅
ˆˁ˃
˅ˁˋ
˅ˁˉ
˅ˁˇ
˅ˁ˅
˅ˁ˃
˄ˁˋ
˄ˁˉ
˄ˁˇ
˄ˁ˅
˄ˁ˃
2.54
2.52
2.50
3.3Vin
VOUT
5Vin
2.48
2.46
2.44
2.42
2.40
2.38
2.36
2.5Vin
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ˆˈ
ˇ˃
ˇˈ
ˈ˃
ˈˈ
ˉ˃
ˉˈ
ˊ˃
ˊˈ
ˋ˃
ˋˈ
ˌ˃
ˌˈ
˄˃˃
IOUT (A)
RISET (KΩ)
Figure 14. Over Current Setting versus RISET
Figure 13. Loading Regulation
2007 Semtech Corp.
8
www.semtech.com
SC4620
POWER MANAGEMENT
Pin Descriptions
Pin
Pin Name
MLPQ-20
Pin Functions
Power supply voltage for high side MOSFETs.
1,2
PVIN
Current limit setting pin. A resistor connected between ISET and AGND sets the over current
protection threshold. A ceramic decoupling between ISET pin to AGND have to be reserved to
prevent from noise influence.
3
ISET
4
5
SS
FS
Soft start time setting pin. A cap connected from this pin to GND sets the soft start up time.
Oscillator frequency setting pin. An external resistor connected from this pin to GND sets the
oscillator frequency.
Power good indicator. It is an open drain output. Low when the output is below the power good
threshold level.
6
PGOOD
7,12
VCC
NC
Power supply voltage for the analog section of the controller.
8,19,20
No connection.
The oscillator frequency of the SC4624A is set by FS when SYNC/EN is pulled and held above
9
SYNC/EN 2V. Its synchronous mode is activated as SYNC/EN is driven by an external clock. Its shutdown
mode is invoked if SYNC/EN is pulled and held below 0.8V.
This is the output of the error amplifier. The voltage at this point is connected to the inverting
10
11
COMP
FB
input of the PWM comparator. A compensation network is required in order to optimize the dy-
namic performance of the voltage mode control loop.
The inverting input of the error amplifier. It serves as the output voltage feedback point for the
buck controller. It senses the output voltage through an external divider.
13
AGND
PGND
PH
Analog signal ground.
Power ground.
14,15
16,17,18
Switching nodes
THERMAL Pad for heatsinking purposes only. Connect to ground plane using multiple vias. Not electrically
PAD connected internally.
2007 Semtech Corp.
9
www.semtech.com
SC4620
POWER MANAGEMENT
Block Diagram
ASYNCHRONOUS
START UP
VCC
PVIN1
PVIN
0.5V
THERMAL
SHUTDOWN
+
-
BANDGAP
BANDGAP
TOP GATE
UVLO
HIGH SIDE DRIVER
AND LOGIC
ISET
AGND
VREF
I = F(R_ISET)
ERROR
OPAMP
PH1
PH2
SOFT
START
+
OVER
CURRENT
PROTECT
-
PH3
SS
FB
PWM
BLOCK
BOTTOM
GATE
COMP
PWM
SD
LOGIC
SYNC/EN
SHOOT-
THRU
PROTECTION
LOW SIDE DRIVER
AND LOGIC
OSC
FS
CLOCK
PGND1
PGND
1.1VREF
0.9VREF
PGOOD
2007 Semtech Corp.
10
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information
Overview
During start up or restart, A typical 6µA sourcing current
charges the capacitor and then the voltage of capacitor
ramp up the error amp reference slowly. The closed
loop creates narrow width driver pulses while the output
voltage is low and allows these pulses to increase to their
steady state duty cycle as the output voltage reaches
its regulated value. The duration of the soft start in the
SC4620 is controlled by an external capacitor.
The SC4620 is a programmable high switching frequency,
integrated 2.5A MOSFET, synchronous step down regula-
tor. This reduces external component count and makes it
effective for applications which are low in cost and sized
small. A non-overlap protection is provided for the gate
drive signals to prevent shoot through of the internal
MOSFET pair.
The SC4620 is capable of producing an output voltage as
low as 0.5V and Its operation frequency is programmable
up to 2MHz by an external resistor. It features lossless
current sensing of the voltage drop across the internal
drain to source resistance of the high side MOSFET during
its conduction period.
The SC4620 starts up in asynchronous mode before SS
voltage reaches to 0.5V, and the bottom FET diode is used
for circulating current during the top FET off time. Ths SS
voltage level is clamped at VCC finally.
Oscillator
The FS pin is used to set the PWM oscillator frequency
through an external resistor that is connected from the
FS pin to the AGND. The internal ramp is a triangle at the
PWM frequency with a peak voltage of 1.25V and a valley
voltage of 0.25V. The approximate operating frequency is
determined by the value of an external resistor as shown
in Figure 15.
The quiescent supply current in shutdown mode is
typically lower than 1µA. An external soft start is provided
to prevent output voltage overshoot during start-up. Over
Temperature Protection, Power Good Indicator, External
Clock Synchronization are some of the internal added
features.
Enable
The SC4620 is enabled by applying a voltage greater than
2V (typical) to the VCC and SYNC/EN pin. The voltage on
the VCC pin determines the operation of the SC4620. As
VCC increases during start up, the UVLO block senses VCC
and keeps the high side and low side MOSFETs off and
the internal soft start voltage low until VCC reaches 2V. If
no faults are present, the SC4620 will initiate a soft start
when VCC exceeds 2V. A typical 120mV hysteresis in the
UVLO comparator provides noise immunity during its start
up. (refer to Figure 1 to 2).
Switching Frequency Setting
145
135
125
115
105
95
85
75
65
5VIN
55
45
35
25
2.5VIN
15
5
Shutdown
TheSC4620isdisabledwhenVCC fallsbelow1.88V(typical)
or shutdown mode operation is invoked by clamping the
SYNC/EN pin to a voltage below 0.8V. During the shutdown
mode, A typical 0.2µA current draw through the VCC pin,
the internal soft start voltage is held low and the internal
MOSFETs are turned off. (refer to Figure 3 to 4).
200
400
600
800
1000
1200
1400
1600
1800
2000
Fosc (kHz)
Figure 15. Switching Frequency vs. RFS
The operation frequency can be programmed up to 2MHz,
but there is a minimum on-time limitation which is around
110ns.Usersshouldtakecareofminimumlimitationonthe
operating duty cycle under high frequency application.
Soft Start
The soft start function is required for step down controllers
to prevent excess in-rush current through the DC bus
during start up. An external capacitor is necessary for
the soft start function and is connected from SS pin to
AGND.
2007 Semtech Corp.
11
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information (Cont.)
Synchronization Frequency
Synchronization operation mode is invoked by using an
external clock signal and is activated when the SYNC/EN
is pulled and held above 2V and held below 0.8V. The
range of synchronization frequency is from 200kHz to
2MHz.
attention is internal high side PMOS has minimum off time
limitation and is related to duty cycle rate. This condition
makes the working duty cycle perform at randon with the
output ripple increasing and a poor transient response.
Above phenomenon can be improved by larger output
capacitor and smaller output inductor. Users need to
verify whether above application condition has opposite
influence on entire circuit.
A jitter happens when sync pulse clock edge is less than
120ns before the phase switches. It is caused by the
ground bounce of synchronization pulse coupled to PWM
comparator. Users try to avoid this application. (refer to
Figure 9).
Over Current Protection
A over current setting is programmed by an external
resistor (RISET). It goes through internal sense resistor and
generates a voltage.
Power Good Indicator
The PGOOD pin is an open-drain and incorporated window
comparators output. It’s is necessary that a pull-up resis-
tor from the PGOOD pin to the input supply for setting the
logic high level of the PGOOD signal. When FB voltage is
within +10% setting output voltages typical, the output of
power good comparator becomes high impedance after
delay time. The PGOOD signal delay time is around 1024/
FOSC. In shutdown mode the power good output is actively
pulled low.
9ꢀ 9FF ꢀ ,u52QVHQVH
where
I : The current is generated by RISET , and it is amplified
by internal current amplifier.
RONSENSE : Internal sense resistor.
Output inductor current goes through internal high side
P-MOSFET and generate a voltage.
For example, 1MHz switching frequency applications, the
PGOOD delay time is around 1ms.
9ꢂ 9,1 ꢀ ,
/
u5'6+ꢁ21ꢀ
where
IL : Output inductor current.
RDSH(ON) : High side P-MOSFET conduction resistance.
Thermal Shutdown
When the junction temperature rises up around 160°C,
the internal soft start voltage is held low, the internal high
side and low side MOSFETs are turned off and the output
voltage will fall to zero. Once the junction temperature
goes below hysteresis temperature around 10°C, the
regulator will restart. (refer to Figure 8).
After the high side PMOS turn on around 30ns, the OCP
comparator will compare between V2 and V1. When the
converter detects an over current condition (V2 > V1) as
shown in Figure 16, the SC4620 proceeds into the cycle by
cycle protection mode (Point B to Point C), which responds
to minor over current cases and the output voltage is
monitored.
Linear Mode Operation (100% duty)
The SC4620 can allows 100% duty cycle operation. The
Vout is,
If the over current and low output voltage (set at 60% of
nominal output voltage) occur at the same time, the SS
pin is pull low by an internal switch and the comp pin is
pulled low and the devices stops switching. Assume start
from FB = 0V, FB and SS voltage rise forward 0.5V. Once
SS voltage exceeds 0.4V, the hiccup comparator becomes
enabled. The hiccup period is around 217/FOSC. (Point C to
Point D).
9
287 9,1 ꢁ ꢁ5 ꢀ 5'6+ꢀ u,287
/
where
RL : Output inductor DC resistance.
RDSH : Internal high side P-MOSFET resistance.
(refer to Figure11).
As Vin drops gradually and close to Vout, the buck regulator
will go into 100% duty cycle ratio. A matter needing
For example, with a switching frequency application of
2007 Semtech Corp.
12
www.semtech.com
SC4620
POWER MANAGEMENT
Application information (Cont.)
After the required inductor value is selected, the proper
selection of the core material is based on the peak
inductor current and efficiency requirements. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation and is given as follows:
550kHz, the hiccup period is around 238ms. (refer to
Figure 7).
A poor layout will make OCP trip point shift and is not
easily to calculate by RISET. This is because it is affected
by ground bounce, spiker voltage between Vin pin and PH
pin, and internal parameter tolerance. Users can refer to
Figure 14, it shows how to set maximum output current
,3 ꢀ 3
,3($. ,,20$; ꢁ
ꢀ
by RISET
.
The power loss for the inductor includes its core loss and
copper loss. If possible, the winding resistance should be
minimized to reduce any copper loss of the inductor, (the
core loss can be found in the manufacturer’s datasheet).
A
Vout
B
0
The inductor’s copper loss can be estimated as follows:
C
0.6 * Vout
3
&223(5 ,ꢀ/506 u5:,1',1*
Vo
D
where
ILRMS is the RMS current in the inductor.
Imax
Iout
0
This current can be calculated as follows:
Figure 16. Over Current Protection Characteristic
ꢂ
/506 ,20$; u ꢂ ꢀ u ',ꢀ
Inductor Selection
,
For a typical SC4620 application, the inductor selection
ꢁ
is mainly based on its value, saturation current and DC
resistance. The inductor should be able to handle the
peak current without saturating and its copper resistance
in the winding should be as low as possible to minimize its
resistive power loss.
Output Capacitor Selection
Basically there are two major factors to consider in select-
ing the type and quantity of the output capacitors. The
first one is the required ESR (Equivalent Series Resis-
tance) which should be low enough to reduce the voltage
deviation from its nominal one during its load changes.
The second one is the required capacitance, which should
be high enough to hold up the output voltage. Before the
SC4620 regulates the inductor current to a new value
during a load transient, the output capacitor delivers all
the additional current needed by the load.
The inductor value can be determined according to its
operating point and the switching frequency as follows:
9287 u ꢁ9,1 ꢀ 9287ꢀ
/
9
,1 u I u ',u ,20$;
6
The ESR and ESL of the output capacitor, the loop para-
sitic inductance between the output capacitor and the
load combined with inductor ripple current are all major
contributors to the output voltage ripple.
where
fs = switching frequency.
DI = ratio of the peak to peak inductor current to the
maximum output load current.
Input Capacitor Selection
The peak to peak inductor current is:
The input capacitor selection is based on its ripple cur-
rent level, required capacitance and voltage rating. This
capacitor must be able to provide the ripple current by the
,
3
ꢀ
3
',u,20$;
2007 Semtech Corp.
13
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information (Cont.)
switching actions. For the continuous conduction mode,
the RMS value of the input capacitor can be calculated
from:
5
ꢅꢄꢃ u ꢂꢁ ꢀ ꢇ ꢀ
5ꢆ
92
SC4620
9
287 u ꢁ9,1 ꢀ 9287
ꢀ
C1
,&,1ꢁ506ꢀ ,20$; u
9ꢂIN,1
R1
C2
COMP
FB
Vout
L1
This current gives the capacitor’s power loss as follows:
PH
C8
3
&,1 ,ꢂ&,1ꢁ506ꢀ u5&,1ꢁ(65ꢀ
R7
R8
C4
R
This capacitor’s RMS loss can be a significant part of the
total loss in the converter and reduces the overall convert-
er efficiency. The input ripple voltage mainly depends on
the input capacitor’s ESR and its capacitance for a given
load, input voltage and output voltage. Assuming that the
input current of the converter is constant, the required
input capacitance for a given voltage ripple can be calcu-
lated by:
R9
Figure 17. Compensation Network
Provides 3 Poles and 2 Zeros
'u ꢁꢂ ꢂ 'ꢀ
&
,1 ,20$; u
6
∆
I
u
ꢀ
'9
,
ꢂ ,20$; u5&,1ꢁ(65ꢀ
ꢁ
For voltage mode step down applications as shown in Fig-
ure 17, the power stage transfer function is:
where
D = VO/VI , duty ratio.
DVI = the given input voltage ripple.
Loop Compensation Design
For a DC/DC converter, it is usually required that the con-
verter has a loop gain of a high cross-over frequency for
fast load response, high DC and low frequency gain for low
steady state error, and enough phase margin for its oper-
ating stability. Often one can not have all these properties
at the same time. The purpose of the loop compensation
is to arrange the poles and zeros of the compensation
network to meet the requirements for a specific applica-
tion.
where
R = load resistance
RC = C4’s ESR.
The compensation network will have these characteris-
tics:
The SC4620 has an internal error amplifier and requires
the compensation network to connect among the COMP
pin and FB pin, GND, and the output as shown in Figure
17. The compensation network includes C1, C2, R1, R7,
R8 and C8. R9 is used to program the output voltage ac-
cording to:
s
wZ1
s
s
wZ2
s
1+
1+
1+
wI
s
GCOMP (s) =
⋅
⋅
⋅1+
wP1
wP2
2007 Semtech Corp.
14
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information (Cont.)
The design guidelines for the SC4620 applications are as
follows:
where
1
ωI =
1. Set the loop gain crossover corner frequency wC for
given switching corner frequency wS = 2pfs,
2. Place an integrator at the origin to increase DC and
low frequency gains.
3. Select wZ1 and wZ2 such that they are placed near wO
to damp the peaking and the loop gain has a -20dB/
dec rate to go across the 0dB line for obtaining a wide
bandwidth.
R7 ⋅(C1 + C2 )
1
ωZ1 =
R1 ⋅C2
1
ωZ2 =
(R7 + R8 )⋅C8
4. Cancel the zero from C4’s ESR by a compensator pole
wP1 (wP1 = wESR = 1/(RCC4)).
C1 + C2
ωP1 =
R1 ⋅C1 ⋅C2
5. Place a high frequency compensator pole wP2 (wP2
=
pfs) to get the maximum attenuation of the switch-
ing ripple and high frequency noise with the adequate
phase lag at wC.
1
R8 ⋅C9
ωP2 =
8
The compensated loop gain will be as given as show in
Figure 18.
After the compensation, the converter will have the
following loop gain:
T(s) = GPWM ⋅GCOMP (s)⋅GVD(s)
s
1
1+
1
s
s
wZ2
s
⋅ wI ⋅ V 1+
1+
I
VM
wZ1
s
RC ⋅C4
=
⋅
⋅
⋅
=
L1
s
1+
⋅1+
1+ s + s2L1C
wP1
wP2
R
where
GPWM = PWM gain.
VM = 1.0V, ramp peak to valley voltage of SC4620.
Figure 18. Asymptotic Diagrams
of Power Stage and Loop Gain
2007 Semtech Corp.
15
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information (Cont.)
Layout Guidelines
the big vias to the bottom layer during the re-flow
In order to achieve optimal thermal and noise immunity process.
for high frequency converters, special attention must be
paid to the PCB layout. The goal of layout optimization
is to minimize the high di/dt loops and reduce ground
bounce.
Output voltage setting, line regulation, stability , switching
frequency and OCP trip point shifted are affected by a
poor layout. The following guidelines should be used to
ensure proper functions of the converters.
1. Both Power ground (PGND) and signal ground (AGND)
are separated.
2. A ground plane is recommended to minimize noise
and copper losses, and maximize heat dissipation.
3. Start the PCB layout by placing the power components
first. Arrange the power circuit to achieve a clean
power flow route.
4. Minimize all high di/dt loops. These loops pass high
di/dt current. Make sure the trace width is wide
enough to reduce copper losses in this loop. Ground
bounce happen to magnetic flux changed and it is
proportional to a magnetic filed which goes through
high di/dt loops.
5. The input ceramic capacitor (CIN) should be close to
PVIN pins and PGND pins.
6. Both input ceramic capacitor gnd and output ceramic
capacitor gnd are at same port.
7. A RC snubber circuit between PVIN and PH pins is
helpful for stability operation. Be careful with power
derating of snubber circuit.
8. The VCC bypass capacitor should be placed next to the
VCC and AGND pins.
9. The OCP setting resistor (RISET) and filter capacitor
(CISET) should be placed next to the ISET and AGND
pins.
10. Feedback divider connects to output connector by
Kelvin connection and far away from the noise sources
such as switching node and switching components.
11. A multilayer chip beads between AGND and PGND
will reduce the ground bounce injected to the “quiet”
circuit. It’s helpful for stability operation.
12. A large copper area underneath the SC4624 IC is
necessary for heat sinking purpose. And multiple
layers of large copper area connected through vias
can be used for better thermal performance. The size
of the vias as the connection between multiple layers
should not be too large or solder may seep through
2007 Semtech Corp.
16
www.semtech.com
SC4620
POWER MANAGEMENT
Application Information (Cont.)
5VIN, 1VOUT, 2.5A, all ceramic capacitors ( application circuit #1 )
5Vin
R6
10k
R5
10k
R2
10R
U1
C6
C3
R10
0R
1nF
1uF
7
6
12
13
5
VCC
VCC
AGND
FS
PGOOD
SYNC/EN
NC
47.5k
47nF
R11
9
C7
2.2pF
C2
C1
8
4
SS
R1
10
11
16
17
18
19
20
3
COMP
FB
NC
opt
C5
R3
390pF
20k
ISET
41k
1Vout@2.5A
L1
1.8uH
1
PH
PVIN
C8
2
PH
PVIN
270pF
R7
C9
22uF
28.7k
15
14
R8
2.32k
PH
PGND
PGND
SC4620
C4
22uF
NC
R9
28.7k
(2)
R12
MLB-160808-0600R-S2
C11
R4
opt
(1)opt
VIN=5V
Vout=1V/2.5A
Switching Frequency=550kHz
L1: TOKO D104C(919AS-1R8N)
Note: (1,2) Option for stability
R12: Multilayer chip inductors; MLB-160808-0600R-S2
Input/Output Capacitors: Panasonic ECJ33YBOJ226M(22uF/6.3V)
2007 Semtech Corp.
17
www.semtech.com
SC4620
POWER MANAGEMENT
PCB Layout
Component Side (TOP)
(TOP layer)
(Bottom layer)
(IN1 layer)
(IN2 layer)
2007 Semtech Corp.
18
www.semtech.com
SC4620
POWER MANAGEMENT
Outline Drawing - MLPQ - 20
B
E
DIMENSIONS
INCHES MILLIMETERS
MIN NOM MAX MIN NOM MAX
A
D
DIM
A
.031
.039
0.90 1.00
.035
.001
0.80
A1 .000
.002 0.00 0.02 0.05
-
-
-
-
(.008)
(0.20)
0.25 0.30
A2
b
D
D1
E
.007
.010 .012 0.18
.154 .157 .161 3.90 4.00 4.10
2.70
PIN 1
INDICATOR
.100 .106 .110 2.55
.154 .157 .161 3.90 4.00 4.10
2.70 2.80
2.80
(LASER MARK)
E1 .100
.106 .110 2.55
e
.020 BSC
0.50 BSC
L
.012 .016 .020 0.30 0.40 0.50
N
20
20
aaa
.004
.004
0.10
0.10
bbb
A2
C
A
SEATING
PLANE
aaa
C
A1
D1
LxN
E/2
E1
2
1
N
bxN
bbb
C A B
e
D/2
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
2.
Land Pattern - MLPQ - 20
K
DIMENSIONS
DIM
INCHES
(.156)
.122
.106
.106
.020
.010
.033
.189
MILLIMETERS
(3.95)
3.10
C
G
H
K
P
X
Y
Z
Z
2.70
2.70
0.50
0.25
0.85
4.80
G
Y
(C)
H
X
P
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
2007 Semtech Corp.
19
www.semtech.com
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
VISHAY
©2020 ICPDF网 联系我们和版权申明