SK100LVE11E [SEMTECH]
Low Skew Clock Driver, 100LVE Series, 9 True Output(s), 0 Inverted Output(s), ECL, PQCC28, PLASTIC, LCC-28;型号: | SK100LVE11E |
厂家: | SEMTECH CORPORATION |
描述: | Low Skew Clock Driver, 100LVE Series, 9 True Output(s), 0 Inverted Output(s), ECL, PQCC28, PLASTIC, LCC-28 驱动 逻辑集成电路 |
文件: | 总6页 (文件大小:150K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
MTECH
Today's Results...Tomorrow's Vision
Preliminary Information
October 6, 1999
This document contains information on a new product. The parametric
information, although not fully characterized, is the result of testing
initial devices.
Low Voltage 1:9 Differential
ECL / PECL Clock Driver
Features
•
•
•
•
•
•
•
•
•
•
200 ps Part-to-Part Skew
50 ps Output-to-Output Skew
Differential Design
V
BB
Output
Enable Input
Voltage and Temperature Compensated Outputs
Low Voltage V
Range of –3,0 to –3.8V
28 Pin
PLCC Package
EE
75KΩ Internal Pulldown Resistors
Fully Compatible with Motorola MC100LVE111
Specified Over Industrial Temperature Range:
–40˚C to 85˚C
•
•
ESD Protection of >2000V
Available in 28-pin PLCC Package
Description
of the output(s) being used which, while not being
catastrophic to most designs, will mean a loss of
skew margin.
The SK10/1000LVE111E is a low skew 1-to-9 differential driver
designed with clock distribution in mind. The SK10/
100LVE111E’s function and performance are similar to the
SK100E111, with the added feature of low voltage operation.
It accepts one signal input which can be either differential or
The SK10/100LVE111E, as with most other ECL
devices, can be operated from a positive VCC
supply in PECL mode. This allows the LVE111E
to be used for high performance clock distribution
in +3.3V systems. Designers can take advantage
of the LVE111E’s performance to distribute low
skew clocks across the backplane or the board.
In a PECL environment, series or Thevenin line
terminations are typically used as they require no
additional power supplies. For systems
incorporating GTL, parallel termination offers the
lowest power by taking advantage of the 1.2V
supply as a terminating voltage.
single-ended if the V
output is used. The signal is fanned
BB
out to 9 identical differential outputs. An enable input is also
provided. A High disables the device by focing all Q outputs
Low and all Q* outputs High.
The device is specifically designed, modeled, and produced
with low skew as the key goal. Optimal design and layout serve
to minimize gate-to-gate skew within a device, and
characterization is used to determine process control limits that
ensure consistent tpd distributions from lot to lot. The net result
is a dependable, guaranteed low skew device.
To ensure that the tight skew specification is met, it is necessary
that both sides of the differential output are terminated into 50Ω,
even if only one side is being used. In most applications, all
nine differential pairs will be used and therefore terminated. In
the case where fewer than nine pairs are used, it is necessary
to terminate at least the output pairs on the same package
side as the pair(s) being used on that side in order to maintain
minimum skew. Failure to do this will result in small
degradations of propagation delay (on the order of 10–20ps)
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
M
TE
C
H
Today's Results...Tomorrow's Vision
Pin
Function
Q0
Q0*
IN, IN*
EN*
Differential Input Pair
Enable
Q0, Q0* − Q8, Q8* Differential Outputs
VBB VBB Output
Q1
Q1*
Q2
Q2*
Q3
Q3*
Q4
Q4*
25
24
23
22
21
20
19
IN
VEE
EN*
IN
IN*
26
27
28
18
17
16
15
14
13
12
Q3
Q5
Q5*
Q3*
Q4
EN*
Q6
Q6*
28 Lead PLCC
VCC
IN*
1
2
3
4
VCC0
Q4*
Q5
(Top View)
Q7
Q7*
VBB
N/C
Q5*
Q8
Q8*
V
BB
5
6
7
8
9
10
11
Absolute Maximum Ratings (Note 3)
Symbol
Parameter
Rating
-4.5 to 0
0 to -4.0
Unit
V
V
V
Power Supply (VCC = 0V)
Input Voltage (VCC = 0V)
EE
I
V
Output Current:
Continuous
Surge
50
100
mA
mA
I
OUT
o
T
Operating Temperature Range
Operating Range
-40 to +85
-3.8 to -3.0
-65 to +150
C
A
V
(note 4)
V
EE
o
T
Storage Temperature Range
C
store
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
MTECH
Today's Results...Tomorrow's Vision
SK10LVE111E ECL DC Electrical Characteristics
(V = V (min) to V (max); V = GND) (Notes 1 and 4)
EE
EE
EE
CC
TA = –40˚C
TA = 0˚C
TA = +25˚C
TA = +85˚C
Symbol
Characteristic
Min
Typ
Max
-890
-1650
-890
-1500
-1.30
150
Min
Typ
Max
-840
-1630
-840
-1480
-1.27
150
Min
Typ
Max
-810
-1630
-810
-1480
-1.25
150
Min
-910
Typ
Max
-720
-1595
-720
-1445
-1.19
150
Unit
mV
mV
mV
mV
V
V
V
V
V
V
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
-1135
-1950
-1230
-1950
-1.43
-1080
-1950
-1170
-1950
-1.38
-1020
-1950
-1130
-1950
-1.35
OH
OL
IH
-1950
-1060
-1950
-1.31
IL
Output Reference Voltage
Input HIGH Current
BB
I
IH
µA
I
Input LOW Current
0.5
35
0.5
35
0.5
35
0.3
35
µA
IL
I
Power Supply Current
65
65
65
65
mA
EE
SK10LVE111E PECL DC Electrical Characteristics
(V
= V
(min) to V (max); V = GND) (Notes 1 and 4)
CC EE
CC
CC
TA = –40˚C
TA = 0˚C
TA = +25˚C
TA = +85˚C
Symbol
Characteristic
Min
Typ
Max
3210
1650
2410
1800
2.00
150
Min
2220
1350
2130
1350
1.92
Typ
Max
2420
1670
2460
1820
2.03
150
Min
Typ
Max
2490
1670
2410
1820
2.05
150
Min
Typ
Max
2580
1705
2580
1855
2.11
150
Unit
mV
mV
mV
mV
V
7
V
V
V
V
V
Output HIGH Voltage
2165
1350
2070
1350
1.87
2280
1350
2170
1350
1.95
2390
1350
2240
1350
1.99
OH
OL
IH
7
Output LOW Voltage
7
Input HIGH Voltage
7
Input LOW Voltage
IL
7
Output Reference Voltage
BB
I
Input HIGH Current
µV
IH
I
I
Input LOW Current
0.5
0.5
0.5
0.3
µA
IL
Power Supply Current
66
66
66
66
mA
EE
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
MTECH
Today's Results...Tomorrow's Vision
SK100LVE111E ECL DC Electrical Characteristics
(V = V (min) to V (max); V
= GND) (Notes 2 and 4)
EE
EE
EE
CC
TA = +85˚C
TA = –40˚C
TA = 0˚C
TA = +25˚C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
-1.08
Typ
Max
Min
Typ
Max
Unit
V
V
V
V
V
V
V
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
-1.14
-1.83
-1.165
-1.810
-1.38
-3.0
-1.005 -0.880
-1.08
-0.955 -0.880
-0.955 -0.880
-1.08
-0.955 -0.880
OH
OL
IH
-1.695 -1.555 -1.810 -1.705 -1.620 -1.810 -1.705 -1.620 -1.810 -1.705 -1.620
V
-0.880 -1.165
-1.475 -1.810
-0.880 -1.165
-1.475 -1.810
-0.880 -1.165
-1.475 -1.810
-0.880
-1.475
-1.26
-3.8
V
V
IL
Output Reference Voltage
Power Supply Voltage
Input HIGH Current
-1.26
-3.8
150
66
-1.38
-3.0
-1.26
-3.8
150
66
-1.38
-3.0
-1.26
-3.8
150
66
-1.38
-3.0
V
BB
EE
V
I
IH
150
µA
mA
I
Power Supply Current
55
55
55
65
78
EE
SK100LVE111E PECL DC Electrical Characteristics
(V
CC
= V (min) to V (max); V = GND) (Notes 2 and 4)
CC CC EE
TA = –40˚C
TA = 0˚C
TA = +25˚C
TA = +85˚C
Symbol
Characteristic
Min
Typ
Max
2.420
1.750
2.420
1.825
2.04
3.8
Min
2.22
1.490
2.135
1.490
1.92
3.0
Typ
Max
2.420
1.680
2.420
1.825
2.04
3.8
Min
Typ
Max
2.420
1.680
2.420
1.825
2.04
3.8
Min
Typ
Max
2.420
1.680
2.420
1.825
2.04
3.8
Unit
V
7
V
V
V
V
V
V
Output HIGH Voltage
2.16
1.470
2.135
1.490
1.92
2.295
1.610
2.345
1.595
2.22
1.490
2.135
1.490
1.92
2.345
1.595
2.22
1.490
2.135
1.490
1.92
2.345
1.595
OH
OL
IH
7
Output LOW Voltage
V
7
Input HIGH Voltage
V
7
Input LOW Voltage
V
IL
7
Output Reference Voltage
Power Supply Voltage
Input HIGH Current
V
BB
CC
3.0
3.0
3.0
V
I
150
150
150
150
µA
mA
IH
I
Power Supply Current
55
66
55
66
55
66
65
78
EE
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
MTECH
Today's Results...Tomorrow's Vision
AC Characteristics
(V = V (min) to V (max); V = V
= GND) (Note 4)
EE
EE
EE
CC
CCO
o
o
o
o
-40 C
0 C
25 C
85 C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Cond
Propagation Delay to
Output
IN (Differential)
IN (Single-Ended)
t
t
ps
PLH
PHL
400
350
650
700
435
385
625
675
440
390
630
680
445
395
635
685
8.
9.
t
Within-Device Skew
Part-to-Part Skew (Diff)
50
250
50
250
50
250
50
250
ps
skew
10.
V
V
Minimum Input Swing
Common Mode Range
500
-1.5
500
-1.5
500
-1.5
500
-1.5
mV
V
11.
12.
PP
-0.4
600
-0.4
600
-0.4
600
-0.4
600
CMR
Rise/Fall Time
20% to 80%
t , t
r
200
200
200
200
ps
20%-80%
f
Notes:
1. 10LVE111E circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been
established.
The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
Outputs are termionated through a 50Ω resistor to –2.0V.
2. The same DC parameter values apply across the full VEE range of –3.0 to –3.8V. Outputs are terminated through a 50Ω
resistor to –2.0V. 100LVE111E circuits are designed to meet the DC specifications shown in the table where transverse airflow
greater than 500 lfpm is maintained.
3. Absolute maximum rating, beyond which device life may be impaired unless otherwise specificed on an individual data sheet.
4. Parametric values specified at:
10LVE111E Series: –3.0 to –3.8V
100 LVE111E Series: –3.0 to –3.8V; PECL Power Supply: +3.0V to +3.8V
5. Guaranteed HIGH signal for all inputs.
6. Guaranteed LOW signal for all inputs.
7. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC.
8. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing
point of the differential output signals.
9. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of theoutput
signal.
10. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
11. V (min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The
PP
V (min) is AC limited for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output.
PP
12. V
is defined as the range within which the V level may vary, with the device still meeting the propagation delay
CMR
IH
specification. The V level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to
IL
V (min).
PP
Low Voltage 1:9 Differential ECL/PECL
Clock Driver with Enable Input
SK10LVE111E
SK100LVE111E
SE
M
TE
C
H
Today's Results...Tomorrow's Vision
Package Information
S
N
S
S
M
B
0.007 (0.180)
T
L – M
Y BRK
–N–
U
M
S
N
0.007 (0.180)
+
T
L – M
D
Z
–L–
– M –
VIEW D-D
D
W
+
S
N
S
G1
H
S
T
0.010 (0.250)
L – M
X
V
28
1
S
S
M
0.007 (0.180)
T
L – M
N
S
S
S
S
M
A
R
0.007 (0.180)
0.007 (0.180)
T
T
L – M
L – M
N
N
Z
M
VIEW S
K1
C
E
0.004 (0.100)
–T– SEATING PLANE
G
K
J
G1
S
S
N
M
0.007 (0.180)
T
L – M
F
VIEW S
S
S
N
S
0.010 (0.250)
T
L – M
MILLIMETERS
INCHES
MIN
DIM
A
MAX
0.495
0.495
0.180
0.110
0.019
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
NOTES:
0.485
0.485
0.165
0.090
0.013
1. Datums -L-, -M-, and -N- determined where top of lead
shoulder exits plastic body at mold parting line.
2. DIM G1, true position to be measured at Datum -T-,
Seating Plane.
B
C
E
2.29
2.79
F
0.33
0.48
3. DIM R and U do not include mold flash. Allowable mold flash
is 0.010 (0.250) per side.
4. Dimensioning and tolerancing per ANSI Y14.5M, 1982.
5. Controlling Dimension: Inch.
G
H
0.050 BSC
1.27 BSC
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
--
0.032
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
--
0.81
--
J
--
6. The package top may be smaller than the package bottom by
up to 0.012 (0.300). Dimensions R and U are determined at
the outermost extremes of the plastic body exclusive of mold
flash, tie bar burrs, gate burrs and interlead flash, but including
any mismatch betweeen the top and bottom of the plastic body.
7. Dimension H does not include Dambar protrusion or intrusion.
The Dambar protrusion(s) shall not cause the H dimension
to be greater than 0.037 (0.940). The Dambar intrusion(s)
shall not cause the H dimension to be smaller than 0.025
(0.635).
K
--
--
R
0.456
0.456
0.048
0.048
0.056
0.020
10o
11.58
11.58
1.21
1.21
1.42
0.50
10o
U
V
W
X
Y
Z
2o
2o
G1
K1
0.410
0.040
0.430
--
10.42
1.02
10.92
--
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