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SK1925ATFT [SEMTECH]

Clock Driver, ECL, PQFP32;
SK1925ATFT
型号： SK1925ATFT
厂家： SEMTECH CORPORATION    SEMTECH CORPORATION
描述：

Clock Driver, ECL, PQFP32
文件： 总30页 (文件大小：1207K)
中文：  中文翻译
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SK19XX  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
SK19XX Family Functional Block Diagram  
OUT0  
OUT0*  
OUT1  
OUT1*  
OUT2  
OUT2*  
OUT3  
OUT3*  
D Q  
IN  
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
OUT8  
OUT8*  
Revision 4 / January 30, 2003  
1
www.semtech.com  
SK19XX Family  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
PRELIMINARY  
PRELIMINARY  
SK19XX Family Product Selection Guide  
3
GHzSynch  
/
1:9 Signal Distribution  
Logic Family  
Output Configuration  
Power  
Output  
Availability  
Supply  
Internal  
50Ω Source Current Sink  
50Ω  
Double  
Termination  
Open  
Emitter  
Product  
3.3V 5.2V  
Termination  
(Double  
Termination)  
SK1900  
SK1901  
SK1902  
SK1903  
SK1904  
l
l
l
l
l
l
l
l
ECL / PECL  
Now  
Double Swing / TTL  
ECL / PECL  
Now  
Now  
Now  
Now  
l
l
l
l
l
ECL / PECL  
l
ECL / PECL  
Logic / Translation Family  
Translation  
Output Configuration  
Availability  
Open  
Emitter  
50Ω Double 50Ω Source  
Product  
Termination  
Termination  
SK1925  
SK1926  
SK1927  
SK1928  
SK1929  
SK1930  
Anything to PECL  
Anything to ECL  
Anything to PECL  
Anything to ECL  
Anything to PECL  
Anything to ECL  
l
l
Now  
Now  
Now  
Now  
Now  
Now  
l
l
l
l
Open Collector Logic Family  
Output Configuration  
Open Collector  
l
Output Current  
Availability  
Product  
SK1999  
12mA  
Now  
Revision 4 / January 30, 2003  
www.semtech.com  
2
SK19XX Family  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
HIGH-PERFORMANCE PRODUCTS  
PRELIMINARY  
SK19XX Family Package Information  
5mm x 5mm TQFP  
3
D, E  
2
4
D1, E1  
See  
Figure 3.  
b
8
Top View  
e
A
A2  
SEATING  
PLANE  
A1  
b
10  
Side View  
Revision 4 / January 30, 2003  
3
www.semtech.com  
SK19XX Family  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
SK19XX Family Package Information (continued)  
5mm x 5mm TQFP  
WITH  
PLATING  
9
7
b
02  
e / 2  
2
R1  
ꢁ
ꢀ
01  
c 1  
c
R2  
S
GAGE PLANE  
ꢁ
03  
11  
00  
ꢀ
L
b
See Detail in  
Figure 2  
(L1)  
9
b1  
Figure 1.  
Figure 2.  
Figure 3.  
JEDEC Variation  
All Dimensions in Millimeters  
1. All dimensions and tolerancing conforms  
to ANSI Y14.5M-1982.  
2. The top package body size may be smaller  
than the bottom package body size by as  
much as 0.15 mm.  
3. To be determined at seating plane.  
4. Dimensions D1 and E1 do not include  
mold protrusion. Allowable protrusion  
is 0.25 mm per side. D1 and E1 are  
maximum plastic body size dimensions  
including mold mismatch.  
Symbol  
A
MIN  
1.00  
0.05  
0.95  
NOM  
MAX  
1.20  
0.15  
1.05  
Note Comments  
1.10  
Package Stand Off Height  
Air Gap  
A1  
A2  
D
0.10  
1.00  
7.00 BSC  
5.00 BSC  
7.00 BSC  
5.00 BSC  
32  
Package Body Thickness  
3
D1  
E
4, 2 Package Body Length  
3
E1  
N
4, 2 Package Body Width  
Lead Count  
5. Details of Pin 1 identifier optional, but  
must be located within the zone indicated.  
6. All dimensions are in millimeters.  
7. Dimension b does not include Dambar  
protrusion. Allowable Dambar protrusion  
shall not cause the lead width to exceed  
the maximum b dimension by more than  
0.08 mm. Dambar cannot be located  
on the lower radius or the foot. Minimum  
space between protrusion and an  
adjacent lead is 0.07 mm for 0.4 mm and  
0.5 mm pitch packages.  
8. Exact shape of each corner is optional.  
9. These dimensions apply to the flat  
section of the lead between 0.10 mm  
and 0.25 mm from the lead tip.  
10. A1 is defined as the distance from the  
seating plane to the lowest point of the  
package body.  
e
0.50 BSC  
0.22  
0.20  
–
Lead Pitch  
b
0.17  
0.17  
0.08  
0.08  
0o  
0.27  
0.23  
–
7
Lead Thickness  
b1  
R1  
R2  
00  
01  
02  
03  
S
–
0.20  
7o  
3.5o  
0o  
–
–
11o  
12o  
13o  
13o  
–
11o  
12o  
0.20  
0.09  
0.09  
0.45  
–
c
–
0.20  
0.16  
0.75  
c1  
L
–
0.60  
1.00 REF  
0.20  
0.20  
0.08  
0.08  
L1  
aaa  
bbb  
ccc  
ddd  
Revision 4 / January 30, 2003  
www.semtech.com  
4
SK19XX Family  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Absolute Maximum Ratings*  
Symbol  
Parameter  
Value  
Unit  
V
Power Supply (V = 0V)  
CC  
- 8.0 to 0  
V
EE  
V
V
Power Supply (V = 0V)  
EE  
+8.0 to 0  
V
V
CC  
I
Input Voltage  
VCC ≥ VI ≥ VEE  
Output Current  
Continuous  
Surge  
I
50  
mA  
mA  
OUT  
100  
o
T
Storage Temperature  
-65 to +150  
265  
C
stg  
sol  
o
o
T
Solder Temperature (<2 to 3 seconds: 245 C desired)  
C
* Maximum Ratings are those values beyond which damage to the device may occur.  
Note:  
1. Device is ESD sensitive and requires protective handling.  
Revision 4 / January 30, 2003  
5
www.semtech.com  
SK1900  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1900 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
3 GHz Fmax  
3.3V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1900 uses standard open emitter ECL outputs  
optimized for:  
Application Notes  
• General purpose ECL compatible applications  
• Multiple destination applications (daisy  
chain).  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
Open Emitter  
VCC  
OUT1  
OUT1*  
OUT2  
OUT2*  
OUT3  
OUT3*  
OUT  
OUT*  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
IN*  
VCC  
TQFP Package  
Revision 4 / January 30, 2003  
www.semtech.com  
6
SK1900  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Inputs  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
IIH  
IIL  
-5  
-6  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
| OUT - OUT* |  
(OUT + OUT*) / 2  
600  
VCC - 1.5  
700  
VCC - 1.3  
mV  
V
VCC - 1.1  
170  
Power Supply  
Power Supply Current  
IEE  
mA  
Test Conditions: Outputs terminated with 50Ω to VCC – 2V.  
AC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
t
20  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
o
ps /  
C
∆Tpd / ∆DT  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC - 2.0V  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
7
www.semtech.com  
SK1901  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1901 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
2 GHz Fmax  
4.5V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1901 uses open emitter outputs with a double  
amplitude swing suitable for the following applications:  
• TTL compatible destinations  
Application Notes  
• Double termination situations that require  
a full swing at the destination  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Long cables  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
Open Emitter  
VCC  
OUT1  
OUT1*  
OUT2  
OUT2*  
OUT3  
OUT3*  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
OUT  
OUT5  
OUT*  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
8
SK1901  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - V = 4.2V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC -0.2  
V
V
(IN - IN*, CLK - CLK*, SEL -SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
| OUT -OUT* |  
(OUT + OUT*) / 2  
1.2  
VCC -2.2  
1.4  
VCC - 1.9  
V
V
VCC - 1.7  
170  
Power Supply  
Power Supply Current  
IEE  
mA  
Test Conditions: Outputs terminated with 50Ω to VCC – 3.3V.  
AC Characteristics  
(V - V = 4.2V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
500  
400  
350  
760  
650  
625  
1020  
900  
900  
ps  
ps  
ps  
Channel to Channel Skew  
t
100  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
2.0  
PW min  
350  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
200  
<3  
475  
ps  
o
ps / C  
∆Tpd /∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC – 3.3V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
9
www.semtech.com  
SK1902  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1902 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
3 GHz Fmax  
3.3V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1902 uses 50Ω outputs with source /sink  
capability, and is optimized for applications that require:  
• Point to point, double terminated, timing  
critical lines  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
OUT1  
OUT1*  
50Ω Source / Sink  
OUT2  
OUT2*  
VCC  
OUT3  
OUT3*  
50Ω  
OUT  
50Ω  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
*
OUT  
OUT5  
OUT5*  
6 mA  
VEE  
6 mA  
CLK  
CLK*  
OUT6  
VEE  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
OUT8  
OUT8*  
Pin Description  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
10  
SK1902  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
V
V
VCC - 0.2  
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Input Low Current  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VCC - 1.4  
4.0  
700  
VCC -1.2  
6
mV  
V
VCC - 1.0  
7.5  
mA  
Ω
ROUT  
40  
50  
60  
Power Supply  
Power Supply Current  
IEE  
265  
mA  
Test Conditions: Outputs unterminated.  
AC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
t
20  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
o
ps / C  
∆Tpd /∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC -2.0V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
11  
www.semtech.com  
SK1903  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1903 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
3 GHz Fmax  
3.3V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1903 outputs are open emitter with an internal  
current source, optimized for applications that are:  
• Point to point, double terminated, timing  
critical lines  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Non-50Ω transmission lines  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
OUT1  
OUT1*  
Internal Current Sink  
OUT2  
VCC  
OUT2*  
OUT3  
OUT3*  
OUT  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
*
OUT  
6 mA  
VEE  
6 mA  
OUT5  
OUT5*  
CLK  
VEE  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
OUT8  
Pin Description  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
12  
SK1903  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VCC - 1.5  
4
700  
VCC -1.3  
6
mV  
V
mA  
VCC - 1.1  
7.5  
Power Supply  
Power Supply Current  
IEE  
265  
mA  
Test Conditions: Outputs Unterminated.  
AC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
t
20  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
o
ps / C  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC -2.0V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
13  
www.semtech.com  
SK1904  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1904 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
3 GHz Fmax  
3.3V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1904 outputs are 50Ω with source and sink  
capability, optimized for:  
Application Notes  
• Point to point, series terminated, timing  
critical lines  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
OUT1  
OUT1*  
50Ω Source / Sink  
OUT2  
OUT2*  
VGG  
OUT3  
OUT3*  
50Ω  
OUT  
50Ω  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
*
OUT  
OUT5  
10 mA  
VEE  
10 mA  
OUT5*  
CLK  
VEE  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
14  
SK1904  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VCC - 1.4  
7.5  
700  
VCC -1.2  
10  
mV  
V
mA  
Ω
VCC - 1.0  
13  
60  
ROUT  
40  
50  
Power Supply  
Power Supply Current  
IEE  
355  
mA  
Test Conditions: Outputs unterminated.  
AC Characteristics  
(V - V = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
t
20  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
o
ps / C  
∆Tpd /∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC -2.0V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
15  
www.semtech.com  
SK1925  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1925 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. It is also capable of receiving inputs of  
any technology or voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock/Data Driver  
3 GHz Fmax  
Anything to PECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1925 has open emitter PECL outputs.  
Application Notes  
Target applications:  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• High speed clock / data lines  
that require translation  
• Multiple destination (daisy chain)  
applications  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
Output Option  
OUT0  
OUT0*  
Open Emitter  
OUT1  
VCC  
OUT1*  
OUT2  
OUT2*  
OUT3  
OUT  
OUT*  
OUT3*  
IN  
D
Q
OUT4  
D* Q*  
IN*  
OUT4*  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
16  
SK1925  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V = 3.0V to 3.6V; V = -3.6V to -3.0V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC -0.2  
V
V
(IN - IN*, CLK - CLK*, SEL -SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
| OUT -OUT* |  
(OUT + OUT*) / 2  
600  
VCC -1.5  
700  
VCC -1.3  
mV  
V
VCC -1.1  
170  
Power Supply  
Power Supply Current  
IEE  
mA  
Test Conditions: Outputs terminated with 50Ω to VCC – 2V.  
AC Characteristics  
(V = 3.0V to 3.6V; V = - 3.6V to - 3.0V; T = 0oC to 70oC)  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
o
ps / C  
∆Tpd /∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VCC -2.0V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
17  
www.semtech.com  
SK1926  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1926 is an extremely fast, stable and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an upredictable  
output pulse. It is also capable of receiving inputs of  
any technology or voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock/Data Driver  
3 GHz Fmax  
Anything to ECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1926 has standard open emitter ECL outputs.  
Application Notes  
Target applications:  
• High speed clock / data lines  
that require translation  
• Multiple destination (daisy chain)  
applications  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
Output Option  
OUT0  
Open Emitter  
OUT0*  
OUT1  
OUT1*  
VGG  
OUT2  
OUT2*  
OUT3  
OUT3*  
OUT  
IN  
D
Q
OUT4  
OUT*  
D* Q*  
0
1
IN*  
OUT4*  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VGG  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
18  
SK1926  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V = - 0.1V to 2.0V; V = 2.0V to 3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC -0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
| OUT - OUT* |  
(OUT + OUT*) / 2  
600  
VGG -1.5  
700  
VGG - 1.3  
mV  
V
VGG -1.1  
Power Supply  
Power Supply Current  
IEE  
ICC  
170  
70  
mA  
mA  
Test Conditions: Outputs terminated with 50Ω to VGG – 2V.  
AC Characteristics  
(V = - 0.1V to 2.0V; V = 2.0V to3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<2  
175  
ps  
o
ps / C  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs terminated with 50Ω to VGG -2.0V.  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
19  
www.semtech.com  
SK1927  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1927 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an upredictable  
output pulse. It is also capable of receiving inputs of  
any technology or voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock/Data Driver  
3 GHz Fmax  
Anything to PECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1927 uses 50Ω outputs with source /sink  
capability, and is optimized for:  
• High speed clock / data lines  
that require translation  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Point to point, double termination  
applications  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
Output Option  
OUT0*  
OUT1  
50Ω Source / Sink  
OUT1*  
VCC  
OUT2  
OUT2*  
50Ω  
OUT  
50Ω  
OUT3  
OUT3*  
*
OUT  
IN  
D
Q
OUT4  
D* Q*  
0
1
6 mA  
6 mA  
IN*  
OUT4*  
VEE  
VEE  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
Pin Description  
OUT7*  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
20  
SK1927  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
o
(VCC = 3.0V to 3.6V; VEE = -3.6 to -3.0V; TA = 0 C to 70oC)  
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
|VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
IIH  
IIL  
-5  
-6  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VCC - 1.4  
4
700  
VCC -1.2  
6
mV  
V
VCC - 1.0  
7.5  
60  
mA  
Ω
ROUT  
40  
50  
Power Supply  
Power Supply Current  
IEE  
265  
mA  
Test Conditions: Outputs unterminated.  
AC Characteristics  
o
(VCC = 3.0V to 3.6V; VEE = -3.6 to -3.0V; TA = 0 C to 70oC)  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
490  
300  
300  
690  
500  
500  
890  
700  
700  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
100  
100  
ps  
ps  
Th  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
175  
ps  
ps / oC  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs are terminated with 50Ω to VCC-2.0V  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
21  
www.semtech.com  
SK1928  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1928 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an upredictable  
output pulse. It is also capable of receiving inputs of  
any technology and voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock/Data Driver  
3 GHz Fmax  
Anything to ECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1928 has 50Ω outputs with source /sink  
capability, and is optimized for:  
• High speed clock / data lines that  
require translation  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Point to point, double termination  
applications  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
Output Option  
OUT0  
OUT0*  
50Ω Source / Sink  
OUT1  
OUT1*  
VGG  
OUT2  
OUT2*  
50Ω  
OUT  
50Ω  
OUT3  
OUT3*  
*
OUT  
IN  
D
Q
OUT4  
6 mA  
VEE  
6 mA  
D* Q*  
0
1
IN*  
OUT4*  
VEE  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VGG  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
22  
SK1928  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V = - 0.1V to 2.0V; V = 2.0V to 3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC -0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VGG - 1.4  
4
700  
VGG -1.2  
6
mV  
V
mA  
Ω
VGG - 1.0  
7.5  
60  
ROUT  
40  
50  
Power Supply  
IEE  
ICC  
310  
70  
mA  
mA  
Power Supply Current  
Test Conditions: Outputs unterminated.  
AC Characteristics  
(V = - 0.1V to 2.0V; V = 2.0V to 3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
460  
300  
300  
780  
600  
600  
1100  
900  
900  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<2  
300  
ps  
o
ps / C  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs are terminated with 50Ω to VGG -2.0V  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
23  
www.semtech.com  
SK1929  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1929 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an upredictable  
output pulse. It is also capable of receiving inputs of  
any technology and voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock/Data Driver  
3 GHz Fmax  
Anything to PECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1929 uses 50Ω outputs with source /sink  
capability, and is optimized for:  
• High speed clock / data lines  
that require translation  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Point to point, series termination  
applications  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
Output Option  
OUT0  
OUT0*  
50Ω Source / Sink  
OUT1  
VCC  
OUT1*  
OUT2  
OUT2*  
50Ω  
OUT  
50Ω  
OUT3  
OUT3*  
*
OUT  
10 mA  
VEE  
10 mA  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
VEE  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
Pin Description  
OUT7  
OUT7*  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
24  
SK1929  
Anything to PECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V = 3.0V to 3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
CC  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Inputs  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VCC - 1.4  
7.5  
700  
VCC -1.2  
10  
mV  
V
VCC - 1.0  
13  
60  
mA  
Ω
ROUT  
40  
50  
Power Supply  
Power Supply Current  
IEE  
320  
mA  
Test Conditions: Outputs unterminated.  
AC Characteristics  
(V = 3.0V to 3.6V; VEE = -3.6V to -3.0V; T = 0oC to 70oC)  
CC  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
490  
300  
300  
690  
500  
500  
890  
700  
700  
ps  
ps  
ps  
Channel to Channel Skew  
t
35  
ps  
GHz  
ps  
SKEW  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
Fmax  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<2  
200  
ps  
o
ps / C  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs are terminated with 50Ω to VCC-2.0V  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
25  
www.semtech.com  
SK1930  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1930 is an extremely fast, stable and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an upredictable  
output pulse. It is also capable of receiving inputs of  
any technology or voltage level. The D - flip-flop is  
triggered on the falling edge of the clock.  
•
•
•
•
1:9 Clock / Data Driver  
3 GHz Fmax  
Anything to ECL Translation  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1930 uses 50Ω outputs with source /sink  
capability, and is optimized for:  
• High speed clock / data lines that  
require translation  
Application Notes  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
• Point to point, series termination  
applications  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
Functional Block Diagram  
OUT0  
OUT0*  
Output Option  
OUT1  
50Ω Source / Sink  
OUT1*  
OUT2  
VGG  
OUT2*  
OUT3  
50Ω  
OUT  
50Ω  
OUT3*  
*
OUT  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
10 mA  
VEE  
10 mA  
VEE  
OUT5  
OUT5*  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VGG  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
26  
SK1930  
Anything to ECL Translator  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V = -0.1V to 2.0V; V = 2.0V to 3.6V; V = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
EE  
A
Parameter  
Inputs  
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC - 0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Digital Output Voltage  
Output Common Mode Range  
Internal Current Source  
Output Impedance  
| OUT - OUT* |  
(OUT + OUT*) / 2  
ISINK  
600  
VGG - 1.4  
7.5  
700  
mV  
V
mA  
Ω
VGG -1.2  
10  
50  
VGG - 1.0  
13  
60  
ROUT  
40  
Power Supply  
Power Supply Current  
IEE  
ICC  
395  
70  
mA  
mA  
Test Conditions: Outputs unterminated.  
AC Characteristics  
(V = -0.1V to 2.0V; V = 2.0V to 3.6V; V = -3.6V to -3.0V; T = 0oC to 70oC)  
GG  
CC  
EE  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
460  
300  
300  
780  
600  
600  
1100  
900  
900  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<2  
300  
ps  
o
ps / C  
∆Tpd / ∆T  
AC TEST CONDITIONS: Outputs are terminated with 50Ω to VGG -2.0V  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
27  
www.semtech.com  
SK1999  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Description  
Features  
The SK1999 is an extremely fast, stable, and accurate  
low skew 1:9 clock / signal distributor featuring a  
synchronous enable, which allows the outputs to be  
turned off and on without the risk of an unpredictable  
output pulse. The D - flip-flop is triggered on the falling  
edge of the clock.  
•
1:9 Clock/Data Driver  
•
•
•
3 GHz Fmax  
3.3V / 5.2V Compatible  
Available in 32 pin, 5mm X5mm, TQFP  
Package  
The SK1999 has open collector (CML) outputs, targeted  
Application Notes  
for:  
• Ultra high speed applications  
• Adjustable common mode levels at the  
destination.  
AN1001 - EPIC Family Product Line  
AN1003 - Termination Techniques for ECL / LVECL  
PECL / LVPECL De vices  
AN1004 - Interfacing Between LVDS and ECL /  
LVECL / PECL / LVPECL  
AN1008 - Interfacing with CML  
Functional Block Diagram  
OUT0  
Output Options  
OUT0*  
OUT1  
Open Collector  
OUT1*  
OUT2  
OUT  
OUT2*  
OUT*  
OUT3  
OUT3*  
IN  
D
Q
OUT4  
D* Q*  
0
1
IN*  
OUT4*  
OUT5  
OUT5*  
12 mA  
VEE  
CLK  
CLK*  
OUT6  
OUT6*  
SEL*  
SEL  
OUT7  
OUT7*  
Pin Description  
OUT8  
OUT8*  
Package Information  
VEE  
SEL  
SEL*  
CLK  
CLK*  
IN  
VCC  
OUT3*  
OUT3  
OUT4  
OUT4*  
OUT5*  
OUT5  
VEE  
32 pin, 5 mm X 5 mm  
TQFP Package  
IN*  
VCC  
Revision 4 / January 30, 2003  
www.semtech.com  
28  
SK1999  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
(V - VEE = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
Parameter  
Inputs  
A
Symbol  
Min  
Typ  
Max  
Units  
Input High  
Input Low  
VIH  
VIL  
VEE + 2.0  
VEE  
VCC  
VCC -0.2  
V
V
(IN - IN*, CLK - CLK*, SEL - SEL*)  
Differential Input Voltage  
| VIH - VIL |  
0.2  
4.3  
V
Timing Inputs (CLK / CLK*)  
Input High Current  
Input Low Current  
-5  
-6  
IIH  
IIL  
+30  
+6  
µA  
µA  
Functional Inputs (IN / IN*, SEL / SEL*)  
Input Current  
IIH, IIL  
-500  
+500  
µA  
Outputs  
Output Current High  
Output Current Low  
IOZ  
IOL  
-500  
9
0
12  
+500  
15  
µA  
mA  
Power Supply  
Power Supply Current  
IEE  
185  
230  
mA  
Test Conditions: Outputs terminated with 50Ω to VCC.  
AC Characteristics  
(V - VEE = 3.0V to 5.5V; T = 0oC to 70oC)  
CC  
A
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
High Performance Option  
Propagation Delay  
CLK to OUT (SEL = 0)  
CLK to OUT (SEL = 1)  
SEL to OUT  
Tpd  
Tpd  
Tpd  
485  
300  
300  
630  
450  
450  
785  
600  
600  
ps  
ps  
ps  
Channel to Channel Skew  
tSKEW  
Fmax  
35  
ps  
GHz  
ps  
Maximum Operating Frequency (Note 1)  
Minimum Pulse Width (Note 1)  
3.0  
PW min  
250  
IN to CLK  
Set Up Time  
Hold Time  
Ts  
Th  
100  
100  
ps  
ps  
Output Rise and Fall Times (20% / 80%) (Note 1)  
Temperature Coefficient (Note 1)  
Tr / Tf  
125  
<1  
250  
ps  
o
ps / C  
∆Tpd /∆T  
AC TEST CONDITIONS: Outputs are terminated with 50Ω to VCC  
Note 1: Guaranteed by characterization. Not production tested.  
Revision 4 / January 30, 2003  
29  
www.semtech.com  
SK19XX Family  
1:9 Signal Distribution  
TEST AND MEASUREMENT PRODUCTS  
Ordering Information  
Ordering  
Package ID  
Code  
32-TQFP  
SK1900ATF  
5 x 5 mm  
32-TQFP  
SK1901ATF  
5 x 5 mm  
32-TQFP  
SK1902ATF  
5 x 5 mm  
32-TQFP  
SK1903ATF  
5 x 5 mm  
32-TQFP  
SK1904ATF  
5 x 5 mm  
32-TQFP  
SK1925ATF  
5 x 5 mm  
32-TQFP  
SK1926ATF  
5 x 5 mm  
32-TQFP  
SK1927ATF  
5 x 5 mm  
32-TQFP  
SK1928ATF  
5 x 5 mm  
32-TQFP  
SK1929ATF  
5 x 5 mm  
32-TQFP  
SK1930ATF  
5 x 5 mm  
32-TQFP  
SK1999ATF  
5 x 5 mm  
Notes:  
1.  
2.  
For Tape and Reel, add the letter “T” at the end of Ordering Code.  
For Tape and Reel information, see TMD Part Ordering Information Data  
Contact Information  
Semtech Corporation  
Test and Measurement Division  
10021 Willow Creek Rd., San Diego, CA 92131  
Phone: (858) 695-1808 FAX: (858) 695-2633  
Revision 4 / January 30, 2003  
www.semtech.com  
30  

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