SR05TG [SEMTECH]
RailClamp Low Capacitance TVS Diode Array; RailClamp低电容TVS二极管阵列
| 型号： | SR05TG |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | RailClamp Low Capacitance TVS Diode Array |
| 文件： | 总9页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SR05
RailClamp
Low Capacitance TVS Diode Array
PROTECTION PRODUCTS
Features
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by ESD (electrostatic
discharge), EFT (electrical fast transients), and light-
ning.
! ESD protection to IEC 61000-4-2, Level 4
! Array of surge rated diodes with internal TVS Diode
! Protects two I/O lines
! Low capacitance (<10pF) for high-speed interfaces
! Low clamping voltage
! Low operating voltage: 5.0V
! Solid-state silicon-avalanche technology
The unique design of the SR series devices incorpo-
rates four surge rated, low capacitance steering diodes
and a TVS diode in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. The internal TVS diode prevents over-voltage
on the power line, protecting any downstream compo-
nents.
Mechanical Characteristics
! JEDEC SOT-143 package
! UL 497B listed
! Molding compound flammability rating: UL 94V-0
! Marking : R05
! Packaging : Tape and Reel per EIA 481
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
Applications
! USB Power & Data Line Protection
! Ethernet 10BaseT
! I2C Bus Protection
! Video Line Protection
! T1/E1 secondary IC Side Protection
! Portable Electronics
! Microcontroller Input Protection
! WAN/LAN Equipment
! ISDN S/T Interface
Circuit Diagram
Schematic & PIN Configuration
Pin 4
4
1
Pin 2
Pin 3
2
3
Pin 1
SOT-143 (Top View)
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Revision 9/2000
1
SR05
PROTECTION PRODUCTS
Absolute Maximum Rating
Rating
Peak Pulse Power (tp = 8/20µs)
Peak Pulse Current (tp = 8/20µs)
Peak Forward Voltage (IF = 1A, tp=8/20µs)
Lead Soldering Temperature
Operating Temperature
Symbol
Ppk
Value
500
Units
Watts
A
IPP
25
VFP
1.5
V
TL
260 (10 sec.)
-55 to +125
-55 to +150
°C
TJ
°C
Storage Temperature
TSTG
°C
Electrical Characteristics
SR05
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
Symbol
Conditions
Minimum
Typical
Maximum
Units
V
VRWM
VBR
IR
5
It = 1mA
6
V
VRWM = 5V, T=25°C
IPP = 1A, tp = 8/20µs
IPP = 10A, tp = 8/20µs
IPP = 25A, tp = 8/20µs
5
µA
V
VC
9.8
12
20
10
Clamping Voltage
VC
V
Clamping Voltage
VC
V
Junction Capacitance
Cj
Between I/O pins and
Gnd
VR = 0V, f = 1MHz
6
3
pF
Between I/O pins
VR = 0V, f = 1MHz
pF
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SR05
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
10
1
110
100
90
80
70
60
50
40
30
20
10
0
0.1
0.01
0
25
50
75
100
125
150
0.1
1
10
100
1000
Ambient Temperature - TA (oC)
Pulse Duration - tp (µs)
Pulse Waveform
Clamping Voltage vs. Peak Pulse Current
110
100
90
80
70
60
50
40
30
20
10
0
10
9
8
7
6
5
4
3
2
1
0
Waveform
Parameters:
µ
tr = 8 s
µ
td = 20 s
e-t
td = IPP/2
Waveform
Parameters:
µ
tr = 8 s
µ
td = 20 s
0
5
10
15
20
25
30
0
5
10
15
20
25
30
35
40
45
50
Time (µs)
Forward Current - IF (A)
Forward Voltage vs. Forward Current
Capacitance vs. Reverse Voltage
10
0
-2
I/O to GND
f = 1MHz
9
8
7
6
5
4
3
2
1
0
-4
-6
-8
-10
-12
-14
-16
Waveform
Parameters:
µ
tr = 8 s
µ
td = 20 s
0
5
10
15
20
25
30
35
40
45
50
0
1
2
3
4
5
6
Forward Current - IF (A)
Reverse Voltage (V)
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SR05
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Two
High-Speed Data Lines
Data Line and Power Supply Protection Using Vcc as
reference
The SR05 TVS is designed to protect two data lines
from transient over-voltages by clamping them to a
fixed reference. When the voltage on the protected
line exceeds the reference voltage (plus diode VF) the
steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 2 and 3. The nega-
tive reference (REF1) is connected at pin 1. This pin
should be connected directly to a ground plane on the
board for best results. The path length is kept as short
as possible to minimize parasitic inductance.
The positive reference (REF2) is connected at pin 4.
The options for connecting the positive reference are
as follows:
Data Line Protection with Bias and Power Supply
Isolation Resistor
1. To protect data lines and the power line, connect
pin 4 directly to the positive supply rail (VCC). In this
configuration the data lines are referenced to the
supply voltage. The internal TVS diode prevents
over-voltage on the supply rail.
2. The SR05 can be isolated from the power supply by
adding a series resistor between pin 4 and VCC. A
value of 10kΩ is recommended. The internal TVS
and steering diodes remain biased, providing the
advantage of lower capacitance.
3. In applications where no positive supply reference
is available, or complete supply isolation is desired,
the internal TVS may be used as the reference. In
this case, pin 4 is not connected. The steering
diodes will begin to conduct when the voltage on
the protected line exceeds the working voltage of
the TVS (plus one diode drop).
Data Line Protection Using Internal TVS Diode as
Reference
ESD Protection With RailClamps
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout,
these devices virtually eliminate the disadvantages of
using discrete components to implement this topology.
Consider the situation shown in Figure 1 where dis-
crete diodes or diode arrays are configured for rail-to-
rail protection on a high speed line. During positive
duration ESD events, the top diode will be forward
biased when the voltage on the protected line exceeds
the reference voltage plus the VF drop of the diode.
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2000 Semtech Corp.
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SR05
PROTECTION PRODUCTS
Applications Information (continued)
For negative events, the bottom diode will be biased
when the voltage exceeds the VF of the diode. At first
approximation, the clamping voltage due to the charac-
teristics of the protection diodes is given by:
V = V + V
(for positive duration pulses)
(for negative duration pulses)
PIN Descriptions
F
VCC = -CVCF
However, for fast rise time transient events, the
effects of parasitic inductance must also be consid-
ered as shown in Figure 2. Therefore, the actual
clamping voltage seen by the protected circuit will be:
Figure 1 - “Rail-To-Rail” Protection Topology
VC = VCC + VF + LP diESD/dt (for positive duration pulses)
(First Approximation)
VC = -VF - LG diESD/dt
(for negative duration pulses)
ESD current reaches a peak amplitude of 30A in 1ns
for a level 4 ESD contact discharge per IEC 1000-4-2.
Therefore, the voltage overshoot due to 1nH of series
inductance is:
V = LP diESD/dt = 1X10-9 (30 / 1X10-9) = 30V
Example:
Consider a VCC = 5V, a typical VF of 30V (at 30A) for the
steering diode and a series trace inductance of 10nH.
The clamping voltage seen by the protected IC for a
positive 8kV (30A) ESD pulse will be:
Figure 2 - The Effects of Parasitic Inductance
When Using Discrete Components to Implement
Rail-To-Rail Protection
VC = 5V + 30V + (10nH X 30V/nH) = 335V
This does not take into account that the ESD current is
directed into the supply rail, potentially damaging any
components that are attached to that rail. Also note
that it is not uncommon for the VF of discrete diodes to
exceed the damage threshold of the protected IC. This
is due to the relatively small junction area of typical
discrete components. It is also possible that the
power dissipation capability of the discrete diode will
be exceeded, thus destroying the device.
The RailClamp is designed to overcome the inherent
disadvantages of using discrete signal diodes for ESD
suppression. The RailClamp’s integrated TVS diode
helps to mitigate the effects of parasitic inductance in
Figure 3 - Rail-To-Rail Protection Using
RailClamp TVS Arrays
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2000 Semtech Corp.
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SR05
PROTECTION PRODUCTS
Applications Information (continued)
the power supply connection. During an ESD event,
the current will be directed through the integrated TVS
diode to ground. The total clamping voltage seen by
the protected IC due to this path will be:
VC = VF(RailClamp) + VTVS
This is given in the data sheet as the rated clamping
voltage of the device. For a SR05 the typical clamping
voltage is <16V at IPP=30A. The diodes internal to the
RailClamp are low capacitance, fast switching devices
that are rated to handle transient currents and main-
tain excellent forward voltage characteristics.
Universal Serial Bus ESD Protection
The figure below illustrates how to use the SR05 to
protect one upstream USB port and the SRDA05-4 to
protect two downstream USB ports. When the voltage
on the data lines exceed the bus voltage (plus one
diode drop), the internal rectifiers are forward biased
conducting the transient current away from the pro-
tected controller chip. The TVS diode directs the surge
to ground. The TVS diode also acts to suppress ESD
strikes directly on the voltage bus. Thus, both power
and data pins are protected with a single device.
Reference Semtech application note SI96-18 for
further information.
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2000 Semtech Corp.
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SR05
PROTECTION PRODUCTS
Typical Applications
Universal Serial Bus ESD Protection
ISDN S/T Interface Protection
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2000 Semtech Corp.
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SR05
PROTECTION PRODUCTS
Outline Drawing - SOT-143
Notes:
(1) Controlling dimension: Inch (unless otherwise specified).
(2) Dimension A and B do not include mold protrusions. Mold protrusions are .006” max.
Land Pattern - SOT-143
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2000 Semtech Corp.
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SR05
PROTECTION PRODUCTS
Marking Codes
Marking
Part Number
Code
SR05
R05
Ordering Information
Part
Number
Working
Voltage
Qty per
Reel
Reel Size
SR05.TC
SR05.TG
5V
5V
3,000
7 Inch
10,000
13 Inch
Contact Information
Semtech Corporation
Protection Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
www.semtech.com
2000 Semtech Corp.
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