SRDA3.3-4_03 [SEMTECH]
Low Capacitance TVS Diode Array;
| 型号： | SRDA3.3-4_03 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Low Capacitance TVS Diode Array 电视 |
| 文件： | 总10页 (文件大小：259K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SRDA3.3-4 through SRDA12-4
RailClamp
Low Capacitance TVS Diode Array
PROTECTION PRODUCTS
Features
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SR series has
been specifically designed to protect sensitive compo-
nents which are connected to data and transmission
lines from overvoltage caused by electrostatic dis-
charge (ESD), electrical fast transients (EFT), and
lightning.
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20µs)
Array of surge rated diodes with internal TVS diode
Protects four I/O lines and power supply line
Low capacitance (<15pF) for high-speed interfaces
Low operating and clamping voltages
The unique design of the SRDA series devices incorpo-
rates surge rated, low capacitance steering diodes and
a TVS diode in a single package. During transient
conditions, the steering diodes direct the transient to
either the positive side of the power supply line or to
ground. The internal TVS diode prevents over-voltage
on the power line, protecting any downstream compo-
nents.
Solid-state technology
Mechanical Characteristics
JEDEC SO-8 package
UL 497B listed
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
The low capacitance array configuration allows the user
to protect two high-speed data or transmission lines.
The low inductance construction minimizes voltage
overshoot during high current surges.
Applications
USB Power and Data Line Protection
T1/E1 secondary IC Side Protection
T3/E3 secondary IC Side Protection
HDSL, SDSL secondary IC Side Protection
Video Line Protection
Microcontroller Input Protection
Base stations
I2C Bus Protection
Circuit Diagram
Schematic and PIN Configuration
I/O 1
REF 1
REF 1
I/O 2
1
8
REF 2
REF1
2
3
7
6
I/O 4
I/O 3
I/O 1
I/O 2
I/O 3
I/O 4
REF2
REF 2
4
5
S0-8 (Top View)
www.semtech.com
Revision 02/03/03
1
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Absolute Maximum Rating
Rating
Peak Pulse Power (tp = 8/20µs)
Peak Forward Voltage (IF = 1A, tp=8/20µs)
Lead Soldering Temperature
Operating Temperature
Symbol
Ppk
Value
500
Units
Watts
V
VFP
1.5
TL
260 (10 sec.)
-55 to +125
-55 to +150
°C
TJ
°C
Storage Temperature
TSTG
°C
Electrical Characteristics
SRDA3.3-41
Parameter
Reverse Stand-Off Voltage
Punch-Through Voltage
Snap-Back Voltage
Symbol
Conditions
Minimum
Typical
Maximum
Units
VRWM
VPT
VSB
IR
3.3
V
V
IPT = 2µA
3.5
2.8
ISB = 50mA
V
Reverse Leakage Current
Clamping Voltage
VRWM = 3.3V, T=25°C
IPP = 1A, tp = 8/20µs
IPP = 10A, tp = 8/20µs
IPP = 25A, tp = 8/20µs
tp = 8/20µs
1
µA
V
VC
5.3
10
15
25
15
Clamping Voltage
VC
V
Clamping Voltage
VC
V
Peak Pulse Current
Junction Capacitance
IPP
A
Cj
Between I/O pins and
Ground
VR = 0V, f = 1MHz
8
4
pF
Between I/O pins
VR = 0V, f = 1MHz
pF
Note:
(1) The SRDA3.3-4 is constructed using Semtech’s propri-
etary EPD process technology. See applications section for
more information.
www.semtech.com
2003 Semtech Corp.
2
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Electrical Characteristics (continued)
SRDA05-4
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
Symbol
VRWM
VBR
IR
Conditions
Minimum
Typical
Maximum
Units
5
V
V
It = 1mA
6
VRWM = 5V, T=25°C
IPP = 1A, tp = 8/20µs
IPP = 10A, tp = 8/20µs
IPP = 25A, tp = 8/20µs
tp = 8/20µs
10
9.8
12
20
25
15
µA
V
VC
Clamping Voltage
VC
V
Clamping Voltage
VC
V
Peak Pulse Current
IPP
A
Junction Capacitance
Cj
Between I/O pins and
Ground
VR = 0V, f = 1MHz
8
4
pF
Between I/O pins
VR = 0V, f = 1MHz
pF
SRDA12-4
Parameter
Symbol
VRWM
VBR
IR
Conditions
Minimum
Typical
Maximum
Units
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
12
V
V
It = 1mA
13.3
VRWM = 12V, T=25°C
IPP = 1A, tp = 8/20µs
IPP = 10A, tp = 8/20µs
IPP = 20A, tp = 8/20µs
tp = 8/20µs
1
µA
V
VC
17
20
25
20
15
Clamping Voltage
VC
V
Clamping Voltage
VC
V
Peak Pulse Current
Junction Capacitance
IPP
A
Cj
Between I/O pins and
Ground
VR = 0V, f = 1MHz
8
4
pF
Between I/O pins
VR = 0V, f = 1MHz
pF
www.semtech.com
2003 Semtech Corp.
3
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
10
1
110
100
90
80
70
60
50
40
30
20
10
0
0.1
0.01
0
25
50
75
100
125
150
0.1
1
10
100
1000
Ambient Temperature - TA (oC)
Pulse Duration - tp (µs)
Pulse Waveform
Clamping Voltage vs. Peak Pulse Current
110
100
90
80
70
60
50
40
30
20
10
0
22
W aveform
Parameters:
tr = 8µs
20
SRDA12-4
18
16
td = 20µs
SRDA05-4
e-t
14
12
10
8
SRDA3.3-4
td = IPP/2
6
Waveform
Parameters:
tr = 8µs
4
2
td = 20µs
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Tim e (µs)
Peak Pulse Current - IPP (A)
Variation of Capacitance vs. Reverse Voltage
Forward Voltage vs. Forward Current
0
-2
10
9
8
7
6
5
4
3
2
1
0
-4
-6
-8
-10
-12
-14
Waveform
Parameters:
µ
tr = 8 s
µ
td = 20 s
0
1
2
3
4
5
6
0
5
10
15
20
25
30
35
40
45
50
Reverse Voltage - VR (V)
Forward Current - IF (A)
www.semtech.com
2003 Semtech Corp.
4
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Four
High-Speed Lines
Data Line and Power Supply Protection Using Vcc as
reference
The SRDA TVS is designed to protect four data lines
from transient overvoltages by clamping them to a
fixed reference. When the voltage on the protected
line exceeds the reference voltage (plus diode VF) the
steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 1, 4, 6 and 7. The
negative reference is connected at pins 5 and 8.
These pins should be connected directly to a ground
plane on the board for best results. The path length is
kept as short as possible to minimize parasitic induc-
tance.
The positive reference is connected at pins 2 and 3.
The options for connecting the positive reference are
as follows:
Data Line Protection with Bias and Power Supply
Isolation Resistor
1. To protect data lines and the power line, connect
pins 2 & 3 directly to the positive supply rail (VCC).
In this configuration the data lines are referenced
to the supply voltage. The internal TVS diode
prevents over-voltage on the supply rail.
2. The SRDA can be isolated from the power supply by
adding a series resistor between pins 2 and 3 and
VCC. A value of 10kΩ is recommended. The
internal TVS and steering diodes remain biased,
providing the advantage of lower capacitance.
3. In applications where no positive supply reference
is available, or complete supply isolation is desired,
the internal TVS may be used as the reference. In
this case, pins 2 and 3 are not connected. The
steering diodes will begin to conduct when the
voltage on the protected line exceeds the working
voltage of the TVS (plus one diode drop).
Data Line Protection Using Internal TVS Diode as
Reference
ESD Protection With RailClamps
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout,
these devices virtually eliminate the disadvantages of
using discrete components to implement this topology.
Consider the situation shown in Figure 1 where dis-
crete diodes or diode arrays are configured for rail-to-
rail protection on a high speed line. During positive
duration ESD events, the top diode will be forward
biased when the voltage on the protected line exceeds
the reference voltage plus the V drop of the diode.
For negative events, the bottomFdiode will be biased
when the voltage exceeds the V of the diode. At first
F
www.semtech.com
2003 Semtech Corp.
5
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Applications Information (continued)
approximation, the clamping voltage due to the charac-
teristics of the protection diodes is given by:
V = V + V
F
(for positive duration pulses)
C
CC
PIN Descriptions
V = -V
(for negative duration pulses)
C
F
However, for fast rise time transient events, the
effects of parasitic inductance must also be consid-
ered as shown in Figure 2. Therefore, the actual
clamping voltage seen by the protected circuit will be:
V = V + V + L di /dt (for positive duration pulses)
Figure 1 - “Rail-To-Rail” Protection Topology
(First Approximation)
C
CC
F
P
ESD
V = -V - L di /dt
(for negative duration pulses)
C
F
G
ESD
ESD current reaches a peak amplitude of 30A in 1ns
for a level 4 ESD contact discharge per IEC 61000-4-2.
Therefore, the voltage overshoot due to 1nH of series
inductance is:
V = L di /dt = 1X10-9 (30 / 1X10-9) = 30V
P
ESD
Example:
Consider a V = 5V, a typical V of 30V (at 30A) for the
CC
F
steering diode and a series trace inductance of 10nH.
The clamping voltage seen by the protected IC for a
positive 8kV (30A) ESD pulse will be:
Figure 2 - The Effects of Parasitic Inductance When
Using Discrete Components to Implement Rail-To-Rail
Protection
V = 5V + 30V + (10nH X 30V/nH) = 335V
C
This does not take into account that the ESD current is
directed into the supply rail, potentially damaging any
components that are attached to that rail. Also note
the high V of the discrete diode. It is not uncommon
F
for the V of discrete diodes to exceed the damage
F
threshold of the protected IC. This is due to the
relatively small junction area of typical discrete compo-
nents. It is also possible that the power dissipation
capability of the discrete diode will be exceeded, thus
destroying the device.
The RailClamp is designed to overcome the inherent
disadvantages of using discrete signal diodes for ESD
suppression. The RailClamp’s integrated TVS diode
helps to mitigate the effects of parasitic inductance in
the power supply connection. During an ESD event,
Figure 3 - Rail-To-Rail Protection Using
RailClamp TVS Arrays
www.semtech.com
2003 Semtech Corp.
6
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Applications Information (continued)
technology, the SRDA3.3-4 can effectively operate at
3.3V while maintaining excellent electrical characteris-
tics.
the current will be directed through the integrated TVS
diode to ground. The total clamping voltage seen by
the protected IC due to this path will be:
The IV characteristic curve of the EPD device is shown
in Figure 4. The device represents a high impedance
to the circuit up to the working voltage (VRWM). During a
transient event, the device will begin to conduct as it is
biased in the reverse direction. When the punch-
through voltage (VPT) is exceeded, the device enters a
low impedance state, diverting the transient current
away from the protected circuit. When the device is
conducting current, it will exhibit a slight “snap-back” or
negative resistance characteristic due to its structure.
This must be considered when connecting the device
to a power supply rail. To return to a non-conducting
state, the current through the device must fall below
the snap-back current (approximately < 50mA) to allow
it to travel back through the negative resistance
region. If this is a concern, a 10kΩ current limiting
resistor can be placed between the supply rail and the
positive reference pins (2 and 3) to prevent device
latch-up.
V = V
+ V
TVS
C
F(RailClamp)
This is given in the data sheet as the rated clamping
voltage of the device. For an SRDA05-4 the typical
clamping voltage is <16V at I =30A. The diodes
internal to the RailClamp arePlPow capacitance, fast
switching devices that are rated to handle high tran-
sient currents and maintain excellent forward voltage
characteristics.
Using the RailClamp does not negate the need for good
board layout. All other inductive paths must be consid-
ered. The connection between the positive supply and
the SRDA and from the ground plane to the SRDA
must be kept as short as possible. The path between
the SRDA and the protected line must also be mini-
mized. The protected lines should be routed directly to
the SRDA. Placement of the SRDA on the PC board is
also critical for effective ESD protection. The device
should be placed as close as possible to the input
connector. The reason for this is twofold. First,
inductance resists change in current flow. If a signifi-
cant inductance exists between the connector and the
TVS, the ESD current will be directed elsewhere (lower
resistance path) in the system. Second, the effects of
radiated emissions and transient coupling can cause
upset to other areas of the board even if there is no
direct path to the connector. By placing the TVS close
to the connector it will divert the ESD current immedi-
ately and absorb the ESD energy before it can be
coupled into nearby traces.
RailClamp is a registered trademark of Semtech corporation
IPP
ISB
IPT
IR
VBRR
V
RWM
V
SB
V
PT
VC
IBRR
(Reference Semtech application note SI99-01 for
further information on board layout)
SRDA3.3-4 EPD TVS Characteristics
The internal TVS of the SRDA3.3-4 is constructed using
Semtech’s proprietary EPD technology. The structure
of the EPD TVS is vastly different from the traditional
pn-junction devices that are internal to the SRDA05-4
and SRDA12-4 devices. At voltages below 5V, high
leakage current and junction capacitance render
conventional avalanche technology impractical for
most applications. However, by utilizing the EPD
Figure 4 - EPD TVS IV Characteristic Curve
www.semtech.com
2003 Semtech Corp.
7
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Typical Applications
Universal Serial Bus ESD Protection
T1/E1 Interface Protection
www.semtech.com
2003 Semtech Corp.
8
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Outline Drawing - SO-8
Notes:
(1) Controlling dimension: Inch (unless otherwise specified).
Land Pattern - SO-8
www.semtech.com
2003 Semtech Corp.
9
SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Ordering Information
Working
Voltage
Qty per
Reel
Part Number
Reel Size
SRDA3.3-4.TB
SRDA3.3-4.TE
SRDA05-4.TB
SRDA05-4.TE
SRDA12-4.TB
SRDA12-4.TE
Note:
3.3V
3.3V
5V
500
7 Inch
13 Inch
7 Inch
2500
500
5V
2500
500
13 Inch
7 Inch
12V
12V
2500
13 Inch
(1) No suffix indicates tube pack.
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
www.semtech.com
2003 Semtech Corp.
10
相关型号：
SRDA3.3-6.TE
Trans Voltage Suppressor Diode, 500W, 3.3V V(RWM), Unidirectional, 1 Element, Silicon, SOP-8
SEMTECH
©2020 ICPDF网 联系我们和版权申明