TS13401 [SEMTECH]
Neo-Iso⢠Solid State Relay Driver with Sensing and Power Transfer;
| 型号： | TS13401 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Neo-Iso⢠Solid State Relay Driver with Sensing and Power Transfer |
| 文件： | 总19页 (文件大小：364K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS13401
Neo-Iso™ Solid State Relay Driver
with Sensing and Power Transfer
POWER MANAGEMENT
Description
Features
The TS13401 is a galvanically isolated 60V power FET
driver with bi-directional blocking. The state of the
switch and other product features are controlled by
sending commands on the CLK input.
•
Low Quiescent Operating Currents
15μA in ON state
2mA in Sensing Mode
Switch to controller scalable galvanic isolation
Single control signal for input commands
Microcontroller-compatible levels
Switch Characteristics
Bi-directional blocking in OFF state
Up to 60V FETs supported
Up to 10A current during inrush
and 5A continuous operation
Operating Modes
Zero-cross ON / OFF
Immediate ON / OFF
•
•
The TS13401 supports several sensing modes where
the switch state, load current, supply voltage and
device temperature can be sampled. The digitized
measurements can be read back from the device on
the DATA pin when requested on the CLK pin. In
addition, TS13401 supports power transfer from the
system‘s AC supply to the low-voltage controller
domain.
•
•
•
The TS13401 includes several protection features. The
switch will open in self protection if current exceeds
the over-current limit or if the device temperature limit
is exceeded. The switch will remain open until a new
turn on sequence is given through CLK.
Dithering Mode for system power sharing
Switch state polling
Sensing Modes for system data acquisition
Applications
Summary Specification
•
•
•
•
•
•
•
Power load/rail switching
Input supply multiplexing
Isolated power supplies
Solid state relays
°
°
°
Junction operating temperature -40 °C to 125 °C
Packaged in a 20 pin QFN (3mm x 3mm)
Product is lead-free, Halogen Free, RoHS / WEEE
compliant
HVAC control
Sprinkler control
Internet of Things (IoT)
Typical Application
CVDD
CVGG5
CVGG10
RWD
VDD SRC
VGG5 VGG10
CWD
Regulator
WD
CPTO
CREG
PTO
CSYS
SYSP
VAC
SW1
VCC
AD2
AD1
AD0
GATE1
TS13401
GATE2
SW2
CISO
µC
Load
GPIO1
GPIO2
CLK
CVCC
SYSM
DATA
CDATA
SUB
CSUB
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Pin Description
Pin Symbol
SUB
Pin #
Function
IC Substrate Connection
Positive System Voltage
Negative System Voltage
Bias Voltage Output
Power Transfer Output
Clock Input
Description
Connect substrate capacitor from SUB to SYSM
Power is harvested from the SW pins
Power is harvested from the SW pins
Connect VDD Capacitor to SYSM
1
2
3
4
5
6
7
SYSP
SYSM
VDD
PTO
Connect to Power Transfer Capacitor CPTO
Galvanically Isolated Clock Input
CLK
DATA
Data Output
Galvanically Isolated Data Output
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
AD2
8
Address Select 2
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
AD1
N/C
AD0
WD
SRC
9
Address Select 1
No Connect
Address Select 0
Watch Dog
10
11
12
13
For logic 0, must be tied to SRC on PCB
For logic 1, must be tied to VGG5 on PCB
Control input for latching vs non-latching switch
Bulk connection of switch, connect to VGG5, VGG10
capacitors
Source
VGG5
VGG10
SW2
14
15
Bias Voltage Output
Bias Voltage Output
Switch Output Node 2
Gate 2
Connect VGG5 Capacitor to SRC
Connect VGG10 Capacitor to SRC
16
GATE2
SRC
17
Connect to gate of switch between SRC and SW2
Connect to source of external switches
18
Source
GATE1
SW1
19
Gate 1
Connect to gate of switch between SRC and SW1
20
Switch Output Node 1
Thermal Input
SUB
PAD
Connect thermally to the FET chip
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Functional Block Diagram
Figure 1: TS13401 Block Diagram
Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted(1, 4)
Parameter
Range
-1 to 60
-1 to 60
-0.3 to 5.5
-0.3 to 5.5
-0.3 to 11
-55 to 0.3
-40 to 125
-65 to 150
2k
Unit
V
SW1, SW2 (2)
SYSP, SYSM, PTO (3)
V
CLK , DATA, VDD, AD2, AD1, AD0, WD (3)
V
VGG5 (2)
V
GATE1, GATE2, VGG10 (2)
V
SUB (2)
V
Operating Junction Temperature Range, TJ
Storage Temperature Range, TSTG
Electrostatic Discharge – Human Body Model
Electrostatic Discharge – Charged Device Model
°C
°C
V
+/-500
V
Peak IR Reflow Temperature (10 to 30 seconds)
260
°C
Notes:
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to SRC terminal.
(3) Voltage values are with respect to SYSM terminal.
(4) ESD testing is performed according to the respective JESD22 JEDEC standard.
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Thermal Characteristics
Symbol
Parameter
Thermal Resistance Junction to Case (1)
Storage Temperature Range
Value
50
Unit
°C/W
°C
θJC
TSTG
TJ MAX
TJ
-65 to 150
150
Maximum Junction Temperature
°C
Operating Junction Temperature Range
-40 to 125
°C
Notes:
(1) Case Temperature is measured in the center of the case at the bottom of the package adjacent to the circuit board.
Recommended Operating Conditions
Symbol
VSW
Parameter
Min
Typ
24
Max
Unit
AC Switch Voltage
36
VRMS
pF
pF
nF
nF
nF
nF
nF
nF
Ω
CDATA
CISO
Data Isolation Capacitor
Clock Isolation Capacitor
Power Transfer Capacitor
VDD Capacitor
100
220
10
CPTO
CVDD
CVGG5
CVGG10
CSUB
470
470
470
100
22
VGG5 Capacitor
VGG10 Capacitor
Sub Capacitor
CWD
Watch Dog Timer Capacitor
Watch Dog Timer Resistor
VSYS Capacitor
RWD
100k
1M
2
CSYS
μF
Ω
RSYSP
RSYSM
VCLK
SYSP Resistor
100
100
SYSM Resistor
Ω
Clock Drive Voltage
Clock Period
1.7
0.8
7
5.5
1.2
10
V
TCLK
1
8
μs
μs
μs
TBIT
Bit Period
TRESET
Reset Time
18
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Electrical Characteristics
Electrical Characteristics, TJ = -40°C to 125°C (unless otherwise noted)
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Supply Voltages
ISYSP
System Supply Current
System Supply Current-
Converting
Latch Mode
15
20
2
μA
ISYSP_CONV
Switch on, sensing enabled, converting
mA
VDD
VGG5
VDD Bias Output Voltage
VGG5 Bias Output Voltage
VGG10 Bias Output Voltage
With respect to SYSM
With respect to SRC
With respect to SRC
4.5
4.5
9
5.0
5.0
10
5.5
5.5
11
V
V
V
VGG10
I/O Parameters
2.5V < VDD < 5.5V; IOH = -4mA
VDATAH = VDD - VDATA
VDATAH
VDATAL
IDATAZ
DATA Output High Voltage Drop
0.7
0.1
1.3
0.2
8
V
V
2.5V < VDD < 5.5V; IOH = 4mA
VDATAL = VDATA - VSYSM
DATA Output Low Voltage
2.5V < VDD < 5.5V
0V < VDATA < VDD
DATA Output Off-State Leakage
Input Low-level Leakage Current
-1
μA
AD0, AD1, AD2 Inputs; VINPUT = VSRC
CLK Input; VINPUT = VSYSM
IIL
-1
-1
-1
1
1
μA
μA
μA
IIH
Input High-level Leakage Current AD0, AD1, AD2 Inputs; VINPUT = VGG5
CLK Input High-level Leakage
CLK Input; VINPUT = VDD
Current
IIH_CLK
15
Current Sense
|IRANGE
|
Current Sense Full-Scale Range
Current Sense Channel TC
0.25
V
mV
°C
IRANGE-TC
1.5625
|IRANGE-IR
|
Current Sense Full-Scale Range
Current Sense Channel TC
Inrush Mode
Inrush Mode
0.5
V
mV
°C
IRANGE-IR-TC
3.125
Temperature Sense
Temperature Sense Full-Scale
Range
Note: Accuracy not guaranteed above
TJ = 127°C (Not tested in production)
TRANGE
-40
155
°C
°C
(1)
TCODE
Temperature Channel Gain
1
Code
Voltage Sense
System Voltage Sense Full-Scale
Range
|VRANGE
VCODE
Data Converter
|
60
63.5
0.5
67
V
V
Voltage Sense Channel Gain
0.472
0.528
Code
NBITS
NERR
tCONV
ADC Reported Resolution
Reported Resolution via Serial Interface
Total linearity, zero and full-scale errors.
FCLK = 1MHz
8
Bits
LSB
μs
ADC Total Error
1
ADC Conversion Time
FCLK = 1MHz
10
Communication
THB Heartbeat Pulse Width
Dither
24
μs
TDOFF
TDRTY
Dither Off Period
38
μs
ms
V
Dither Retry Interval
Dither On Threshold
Dither Off Threshold
5.2
VDITHER_ON
VDITHER_OFF
VSYSP-VSYSM
VSYSP-VSYSM
18.5
19.5
V
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Symbol
Output Switch
ISWX
Parameter
Condition
Min
Typ
Max
Unit
SW1/2 Leakage
VSYS = 42V; VSWX = 0, 42V; VSYSM = 0V
-3
3
μA
Output Over Current Shutdown
SWx Threshold
IOUTOC-00
IOUTOC-01
IOUTOC-10
IOUTOC-11
IOUTIR-00
IOUTIR-01
IOUTIR-10
IOUTIR-11
TJ=25°C, OC_SET = 00, Measured as VSWX
220
350
mV
Output Over Current Shutdown
SWx Threshold
TJ=25°C, OC_SET = 01, Measured as VSWX
TJ=25°C, OC_SET = 10, Measured as VSWX
TJ=25°C, OC_SET = 11, Measured as VSWX
TJ=25°C, OC_SET = 00, Measured as VSWX
TJ=25°C, OC_SET = 01, Measured as VSWX
TJ=25°C, OC_SET = 10, Measured as VSWX
TJ=25°C, OC_SET = 11, Measured as VSWX
mV
mV
mV
mV
mV
mV
mV
Output Over Current Shutdown
SWx Threshold
460
Output Over Current Shutdown
SWx Threshold
580
Output Inrush Current Shutdown
SWx Threshold
930
Output Inrush Current Shutdown
SWx Threshold
1050
1150
1260
Output Inrush Current Shutdown
SWx Threshold
Output Inrush Current Shutdown
SWx Threshold
OCFILT
Output Over Current Deglitch
Output Inrush Current Deglitch
Inrush Duration
2.75
1
4
2
7
3
μs
μs
OCIR_FILT
NIR_CYCLES
TBLANK-OC
4
Cycles
μs
Current Limit Blanking Time
Switch Voltage for Zero Cross
Turn-Off
19
25
39
VTURN-OFF
TJ = 25⁰C
-37.5
37.5
mV
mV
V
TJ = 25⁰C; Switch will turn off if absolute
value of voltage is below this threshold
after Zero Cross Off command
Measured as VSW1-VSW2, VSW2-VSW1
ISW = 10mA
Zero Cross Turn-Off Voltage
Threshold
VOFF-TH
12.5
58
25
37.5
65
VCLAMP
Watch Dog
WDTO
VSWX Clamp Voltage
Switch shuts off if WD drops below this
voltage
Turn-Off Threshold
500
700
900
mV
V
WD recharges to this voltage when
command is received
WDRC
WD Recharge Voltage
VGG5-1.1 VGG5-0.9 VGG5-0.5
Over Temperature
(1)
(1)
(1)
TWARN
TSD
Over Temperature Warning
90
120
150
°C
°C
°C
Over Temperature Shutdown
Over Temperature Hysteresis
Temperature Difference Between
Warning and Shutdown
Thresholds
120
THYST
20
30
(1)
TDIFF
°C
Power Transfer
FPTO
Power Transfer Output Frequency VSYSP-VSYSM = 24V
50
30
80
55
110
80
kHz
Ω
Power Transfer High Side Driver
Resistance
RHS_PTO
VSYSP-VSYSM = 24V
VSYSP-VSYSM = 24V
Power Transfer Low Side Driver
Resistance
RLS_PTO
20
35
50
Ω
Notes:
(1) Not tested in production
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Detailed Description
Communication Protocol
The TS13401 device supports a proprietary single-wire interface that is compact and allows support of systems where galvanic
isolation is required with a minimum number of external components.
Bit Signaling
The MCU can generate three signals on the CLK pin: Reset, Zero, and One. The Zero and One signals are digital bits and form a
command word. Each command word is preceded by a Reset signal.
Reset Signal (R)
The Reset signal is a zero logic level that is kept low for longer than TRESET
.
Zero Signal (0)
The Zero signal is two pulses during a bit period TBIT.
One Signal (1)
The One signal is four pulses during a bit period TBIT.
TCLK
TRESET
TBIT
TBIT
TBIT
Reset (R)
One (1)
One (1)
Zero (0)
Figure 2: Communication Protocol
Address Command
Page
CLK:
Switch State:
DATA:
ANY
R
P2 P1 P0 A2 A1 A0 C3 C2 C1 C0
1
0
1
…
1
1
0
ANY
Old State
New State
High
Impedance
High Impedance
S7
…
S0
Status
Figure 3: Communication Sequence
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Page Selection
The three bits (P2 P1 P0) in Figure 3 select the page of commands to be used for the current communication sequence. There are
two possible selections; 110 for the Command Page and 111 for the Configuration Page (see Table 1). The commands available on
each page are listed in Tables 2 and 3.
Table 1: Valid Pages
P2
0
P1
0
P0
0
Page
Reserved
0
0
1
Reserved
0
1
0
Reserved
0
1
1
Reserved
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Command Page
Configuration Page
1
1
1
Device Addressing
Figure 2 shows the beginning of a command sequence. This pattern appears at the CLK input and starts with a low period for
duration of TRESET or greater, followed by the preamble (P2 P1 P0). The following three bits designate the address of the device
being selected. These three bits (A2 A1 A0) correspond to the device with AD2, AD1, and AD0 pins connected as in the Address
Configuration Table shown in Figure 8. See the Multi-channel Application Section for more information.
Switch Commands
The (C3 C2 C1 C0) field sent using the CLK pin determines the command sent to the switch. Two pages are available; one is for
issuing commands, and the other is for configuring the device. The Command page defines possible actions that control the
various functions. The Configuration page sets the parameters that affect those functions. Table 2 shows valid commands:
Table 2: Command Page--Valid Command Sequences
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Command
No Operation
OFF, Immediate
OFF, Zero Crossing
ON, Immediate
ON, Zero Crossing
ON, Immediate, with Dithering
ON, Zero Crossing, with Dithering
Heartbeat
Set Power Transfer Mode
Cancel Power Transfer Mode
Set Inrush Mode
Cancel Inrush Mode
Start a load current measurement
Start a system voltage measurement
Start a switch temperature measurement
Poll State (No Operation)
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Table 3 defines the possible configuration sequences. These sequences are intended to be used in the system primarily during
initial setup (usually on system power-up). These commands are “sticky”, that is to say, once one is written, that corresponding
configuration remains in effect until such a time as power is removed, thereby re-setting the part. Upon reset, the configuration
will return to its default state. The default configuration settings are shown in the table.
Table 3: Configuration Page--Valid Configuration Sequences
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Configuration
Reserved
Set Over-Current Shutdown Set to 00
Set Over-Current Shutdown Set to 01
Set Over-Current Shutdown Set to 10
Set Over-Current Shutdown Set to 11 (default)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Poll State (No Operation)
Each device monitors the CLK line regardless of the address; however only the device with the (AD2 AD1 AD0) pins configured to
match the (A2 A1 A0) field sent via the CLK pin will respond to the Command bits (C3 C2 C1 C0). If two or more devices on the CLK
bus have address pins wired alike, those devices will all respond to the same command. However, doing this may lead to DATA
bus conflicts when the device Status Values are reported.
The command is executed after the status values are shifted out to avoid interference on the status values caused by transients in
the system.
ON Commands
Four modes of closing the switch are available:
1. ON, Immediate: When this command sequence is sent, the switch will be closed after the status values are shifted out. The
system must comprehend the time it takes to complete the sequence in order to place the switch in the closed state at the
desired time.
2. ON, Zero Crossing: When this command sequence is sent, the switch will close on the first occurrence of a polarity change
in the voltage across the switch (VSW1-VSW2 changes sign to indicate a voltage zero-crossing) after the switch receives the
command and the status values are shifted out. This should not be used for DC applications.
3. ON, Immediate with Dithering: This command closes the switch as in ON, Immediate, above, but puts the device into
Dither mode as well. Dithering opens the switch after an interval of TDRTY for a period of time, TDOFF when the system
voltage drops below VDON. This allows the CSYS capacitor to be re-charged. See the Dither Functionality Section for more
details.
4. ON, Zero Crossing with Dithering: This command closes the switch as in ON, Zero Crossing, but enables the Dither mode
as described above.
OFF Commands
Two modes of opening the switch are available:
1. OFF, Immediate: When the OFF, Immediate sequence is sent, the switch will transition to the open state after the status
values are shifted out.
2. OFF, Zero Crossing: When the OFF, Zero-Crossing sequence is received, the switch will open on the first occurrence of the
load-current dropping within ITURN_OFF after the status values are shifted out.
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Poll Command
A Poll State command may be sent to the device when no change of operation is desired, but the state of the Status Values is
needed by the microcontroller. In non-latched operation, this command will also serve to recharge the Watchdog Timer. See the
Latching Configuration Section for details.
Sensing Modes
The device has the ability to make system parametric measurements related to the load being actuated. The parameters that can
be measured are:
1. Load Current
The load current can be measured by writing the command sequence shown in the commands table to initiate a load
current measurement. Note that the load current can only be measured when the switch is in the “ON” state. The switch
must be commanded to the “ON” state using any of the supported command sequences before sending a load current
measurement command.
Normal Measurement
For a given code value (CODE) from a load current measurement, the current through the external switch (ISW) with
total resistance equal to RFET is:
2 × ꢀ
−ꢀꢃꢄꢅꢆꢇ ꢈ+ ꢈꢉꢊꢋꢌ × ꢍ
ꢏꢐꢇꢑ
ꢃꢄꢅꢆꢇꢎ
255
ꢀꢁꢂ
=
Inrush Measurement
For a given code value (CODE) from a load current measurement with Inrush Mode enabled, the current through the
external switch (ISW) with total resistance equal to RFET is:
2 × ꢀ
−ꢀꢃꢄꢅꢆꢇꢒꢓꢃ ꢈ+ ꢈꢉꢊꢋꢌ × ꢍ
ꢏꢐꢇꢑ
ꢃꢄꢅꢆꢇꢒꢓꢃꢎ
255
ꢀꢁꢂ
=
2. System Voltage
The system voltage can be measured by writing the command sequence shown in the commands table to initiate a
system voltage measurement. This measures the voltage between one switch terminal tied to the supply and the other
tied to the load, and depends on the load being terminated to ground in order to make the measurement. It is also
important to note that this measurement can only be made when the switch is in the “OFF” state. The switch must be
placed into that state by any of the supported command sequences or by an over-current event before sending a system
voltage measurement command.
For a given code value (CODE) from a system voltage measurement, the voltage across SW1 and SW2 (VSW) is:
|
|
2 × ꢔꢃꢄꢅꢆꢇ
|
|
ꢔ
ꢁꢂ
= − ꢔꢃꢄꢅꢆꢇ ꢈ+ ꢈꢉꢊꢋꢌ × ꢕ
ꢖ
255
3. Switch Temperature
The switch temperature may be measured by writing the command sequence shown in the commands table to initiate a
switch temperature measurement. There are no constraints on the switch state to be able to make a temperature
measurement.
For a given code value (CODE) from a temperature ADC measurement, the temperature of the device (TJ) is:
ꢛ
ꢜ
ꢗ =ꢈꢗꢃꢙꢙꢚ + ꢉꢊꢋꢌ − 128 ꢈ× ꢗꢝꢙꢞꢇ
ꢘ
ꢗꢃꢙꢙꢚ = ꢈꢈ25°ꢉ
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When any of the above sensing modes are commanded, the information returned on the DATA pin will be amended with the
system measurement results. This will consist of eight bits of data following the Status Values and a “0” bit. The sequence will be
as follows:
For Continuous Sample Mode, drive 9 “1” bits
(D7-D0, 0) for each additional conversion desired
Sensing
Command
CLK:
R
Page
Addr
1
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
0
ANY
↑ Sample Param.
Conv. Complete ↑
↓ Output Data ↓
DATA:
High-Z
S7 S6 S5 S4 S3 S2 S1 S0
D7 D6 D5 D4 D3 D2 D1 D0
High-Z
Figure 4: Sensing Communication Protocol
The switch depends on the CLK to make its data conversion, so it is required that the CLK continue to be driven until the output
data is received.
The requested measurement is sampled during the “0” bit at the beginning of the status bit stream. The converted signal is
complete at the end of the “0” bit following the status bit stream, with the transfer of the converted data commencing afterward.
For temporally-accurate measurements to be made, the microcontroller must comprehend the delay between the start of the
Reset / Preamble / Address / Command sequence and the sampling period. The timing of the sample will be entirely dependent
on the CLK timing presented to the device.
Continuous Sample Mode
The device supports a continuous sample mode whereby a continuous series of samples is provided without having to send
another command. By continuing to send a series of “1” bits on the CLK pin, the microcontroller will be provided a continuous
series of converted samples of the selected type, 8 bits long, and separated by a “0” transmission. By utilizing this feature, the
microcontroller may sample waveforms and use the data for numerical analysis to gain insight into the health of the load, the
quality of the supply voltage, compute power factor, frequency, distortion, etc. Samples following the first conversion will be
taken at the end of the D3 bit transmission of the prior sampled data.
Status Values
The (S7…S0) field received using the DATA pin provides the status of the switch before the command has been executed. Each of
the status bits is generated by the switch in the following way:
•
For zero: the DATA pin is pulsed for first 2 clock pulses matching the protocol (the pulses corresponding to the Zero
signal).
•
For one: the DATA pin duplicates the signal available at the CLK pin (the pulses corresponding to the One signal).
The following status values are defined:
Table 4: Status Bits
S7 Power Transfer Mode Enabled
S6 Inrush Mode Enabled
S5 Dithering Enabled
S4 Over Temperature Warning
S3 Over-Temperature Shutdown
S2 Inrush Over-Current Shutdown
S1 Over-Current Shutdown
S0 Switch State
Data Values
The DATA (D7, D6…D0) field is used to provide the acquired value of the system parameter requested by the Command Sequence
if there is data to be returned by that command. The data will be transmitted with the MSB first.
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Latching Configuration
The device can be configured for latching or non-latching functionality via external interconnect. When the WD pin is tied to VGG5,
the switch state is latched after each command (CMD) sequence. When the WD pin is tied to an RC circuit, the device is configured
for non-latching behavior. If a CMD sequence is not transmitted before the RC decays to WDTO, the switch will be turned off. A CMD
sequence received by the device before the WD pin voltage decays to WDTO will cause the WD pin to recharge to WDRC, and the
switch will remain closed. In order to recharge, the CMD address must be for the corresponding device address configuration.
Typical waveforms for non-latching behavior are shown below.
Figure 5: Latching Functionality
The time between the last CMD sequence and the switch opening (in a non-latching configuration) can be computed by the
following equation:
ꢡꢋꢑꢙ
ꢟꢙꢐꢐ = −ꢏꢂꢞꢉꢂꢞ ln ꢠ
ꢢꢈ
ꢡꢋꢃꢝ
Where:
tOFF is the time from the last CMD sequence until the switch opens
RWD is the WD pin resistor
CWD is the WD pin capacitor
WDTO is the WD pin turn-off voltage threshold
WDRC is the WD pin re-charge voltage
It should be noted that the WD capacitor, CWD, is recommended to be 22nF. The reason for this is that charge proportional to CWD is
drawn from the CSYS capacitor in every re-charge cycle, thereby elevating the average current, and forcing the device to switch off
more frequently in order to re-charge CSYS (see Figure 8, below). CWD can be made smaller, but this will necessitate a larger value of
RWD to be used to define a given tOFF time. RWD has its practical limits due to leakage within the components attached to the WD pin
and possible leakage on the circuit board due to contamination. The system designer should consider all these issues when
selecting RWD and CWD. Device 2 in Figure 8 shows RWD and CWD being used to create a non-latching channel. Device 1 is shown in
latching mode.
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Heartbeat Functionality
When the switch is off and the heartbeat command sequence has been transmitted, the DATA pin provides a pulse synchronous
with the zero crossings of the AC waveform. A single pulse or “Heartbeat” for each crossing will be present with a pulse width of THB
as shown in the figure below. This is useful for monitoring load presence and for evaluating the phase of the AC waveform. To
cancel the heartbeat command, send any other valid command. If a heartbeat command is sent while the switch is on no data will
be sent back, the switch state will remain the same, and the heartbeat command will not be enacted.
Figure 6: Heartbeat Functionality
Power Transfer
When the set power transfer mode command is sent to the device, the PTO pin will be driven from SYSP to SYSM at frequency FPTO
.
The PTO pin will continue to drive a pulse train until the cancel power transfer mode command is sent. This feature can be used to
drive a charge pump to harvest power from the SW pins. See Figure 8 for a typical configuration.
Over Temperature
In the event of the device reaches temperatures exceeding TWARN or TSD, status bits 4 or 3 respectively will be set and visible on the
DATA pin (see Table 4). There is also hysteresis THYST built into each trip point. When TWARN is reached, functionality of the device will
remain the same and this status is just for user information. When TSD is reached, the device will drive the switch off and ignore turn
on commands until the temperature goes below TSD-THYST. Since the switch is external, it is important to thermally couple the PAD
to the switch through the PCB layout.
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Inrush Support
A system may present loads to the switch which result in high inrush currents when initially energized, but rapidly decrease to a
lower level. If the inrush level is higher than the switch over-current shutdown, it may be impossible to activate the load. This
device supports an inrush mode to allow the activation of loads with inrush currents on the order of twice their normal operating
current for a short period of time. During the inrush period, the switch over-current shutdown is elevated, allowing current to
build in the load, ensuring actuation. After the inrush event, the over-current threshold can be reduced to a lower level to allow
protection against faults. Figure 7 below illustrates the time-variant peak load current and how the inrush over-current shutdown
threshold can be used to energize a load successfully when the higher inrush current would otherwise have tripped the lower
steady-state over-current threshold. As long as the load current stays within the safe shaded area, the switch will remain closed.
Inrush Over-Current Shutdown: IOUTPK
Load Current Inrush
Over-Current Shutdown
Threshold: IOUTOC
Steady-State
Operation
-IOUTOC
TIPK
-IOUT
PK
Figure 7: Inrush Waveform
Note that TIPK is internally limited to a maximum of NIR_CYCLES = 4 cycles (8 current zero-crossings). Therefore TIPK is defined as:
8
9
≤ ꢗ
≤
ꢓꢥꢦ
2 ∗ ꢣ
2 ∗ ꢣ
ꢁꢤꢁ
ꢁꢤꢁ
If it is desired to limit this period to something less, the normal over-current shutdown threshold may be restored by writing the
command sequence to cancel inrush mode. If the device is used in a DC application, note that TIPK will be infinite, so it is critical
that the system controller adjusts this time as required so that the system is not sustained in the load current inrush state
indefinitely. It is recommended that the inrush period be only as long as is required by the load in the system.
Dither Functionality
Dithering is provided as a mode of operation for applications where a single device per system is used. It enables powering the
TS13401 from the AC waveform. The device monitors system voltage and if it is below VDITHER_ON, the switch is shut off for
approximately TDOFF. This causes energy stored in the inductor to be transferred into the CSYS capacitor. When the device is in Dither
mode, this event occurs at TDRTY intervals until the system voltage reaches VDITHER_OFF
.
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Multi-channel Application
In a multi-channel application, dithering is unnecessary when the switch for at least one channel is open and providing power to
the other channels. As long as the device address pins are wired uniquely for each channel, a single pair of GPIO pins on the
microcontroller can control each device by matching the address in the CMD sequence with the hardwired address. If all devices
must be on simultaneously, one device can be configured for dithering mode to maintain system supply.
The SYSP net should be tied to the SYSM net through the CSYS capacitor as shown in Figure 8 below. For a single transformer
system, only one is necessary. If additional transformers are used in a given system, then the SYSP and SYSM pins for those TS13401
devices will need an additional CSYS capacitor for each additional transformer.
Current limit resistors are needed for each SYSP pin and each SYSM pin as shown below (RSYSP and RSYSM respectively). These are
typically 100Ω, ¼ W.
As shown below, a pair of GPIO pins can manage the command and control for up to 8 loads as long as each part has a unique
address. The address pins are set using hard wired connections according to the Address Configuration Table shown in Figure 8.
Also note that some devices can be wired in non-latching mode and others in latching mode.
Figure 8: System Block Diagram
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Package Information
Product Marking
13401
yyww
xxxxx
Marking for the 3 x 3mm MLPQ-UT 20 Lead package:
nnnnn= Part Number (Example: 13401)
yyww = Date Code (Example: 1652)
xxxxx = Semtech Lot No. (Example: E9010)
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Package Outline Drawing
DIMENSIONS
MILLIMETERS
MIN NOM MAX
A
D
B
E
DIM
A
0.51 0.55 0.60
A1 0.00 0.02 0.05
(0.153)
A2
b
D
0.15 0.20 0.25
2.90 3.00 3.10
PIN 1
INDICATOR
(LASER MARK)
D1 1.90 2.00 2.10
2.90 3.00 3.10
E1 1.90 2.00 2.10
E
e
0.40 BSC
0.15 0.25 0.35
20
L
N
aaa
0.08
0.10
bbb
A
SEATING
PLANE
aaa C
C
LxN
E/2
A1
e
A2
D1
E1
2
1
N
R0.20
PIN 1
D/2
bxN
bbb
C A B
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
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Board Land Pattern
K
DIMENSIONS
MILLIMETERS
(2.95)
2.40
DIM
C
G
H
K
P
X
Y
Z
2.00
(C)
H
G
Y
Z
2.00
0.40
0.20
0.55
3.50
P
X
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Ordering Information
Device
Package
MLPQ-20 3.0 x 3.0
Tape & Reel (3000 parts/reel)
TS13401ULTRT
TS13401EVB
Evaluation Board
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IMPORTANT NOTICE
Information relating to this product and the application or design described herein is believed to be reliable, however
such information is provided as a guide only and Semtech assumes no liability for any errors in this document, or for the
application or design described herein. Semtech reserves the right to make changes to the product or this document at
any time without notice. Buyers should obtain the latest relevant information before placing orders and should verify
that such information is current and complete. Semtech warrants performance of its products to the specifications
applicable at the time of sale, and all sales are made in accordance with Semtech’s standard terms and conditions of
sale.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-
SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE
REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE OR SEVERE PROPERTY OR ENVIRONMENTAL
DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY
AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized
application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs damages and attorney fees which could arise.
The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and trade
names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves the right to
make changes to, or discontinue any products described in this document without further notice. Semtech makes no
warranty, representation or guarantee, express or implied, regarding the suitability of its products for any particular
purpose. All rights reserved.
© Semtech 2017
Contact Information
Semtech Corporation
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111, Fax: (805) 498-3804
www.semtech.com
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