TS30111 [SEMTECH]
High Efficiency 700mA Current-Mode Synchronous Buck DC/DC Regulator, 1MHz;
| 型号： | TS30111 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | High Efficiency 700mA Current-Mode Synchronous Buck DC/DC Regulator, 1MHz |
| 文件： | 总21页 (文件大小：1727K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS30111
High Efficiency 700mA Current-Mode
Synchronous Buck DC/DC Regulator, 1MHz
TRIUNE PRODUCTS
Features
Description
•
Fixed output voltage choices: 1.5V, 1.8V, 2.5V, 3.3V, and 5V
The TS30111 is a DC/DC synchronous switching regulator with
fully integrated power switches, internal compensation, and
full fault protection. The switching frequency of 1MHz enables
the use of small filter components resulting in minimal board
space and reduced BOM costs.
Adjustable version output voltage range: 0.8V to 5V
Wide input voltage range 4.5V to 16V (18V Abs Max)
1MHz +/- 10% fixed switching frequency
Continuous output current: 700mA
High efficiency – up to 90%
Current mode PWM control with PFM mode for improved
light load efficiency
•
•
•
•
•
The TS30111 utilizes current mode feedback in normal
regulation PWM mode. When the regulator is placed in
standby (EN is low), the device draws less than 10uA quiescent
current.
•
•
•
•
Voltage supervisor for VOUT reported at the PG pin
Input supply under voltage lockout
Soft start for controlled startup with no overshoot
Full protection for over-current, over-temperature, and
VOUT over-voltage
•
•
Less than 10uA in standby mode
Low external component count
The TS30111 integrates a wide range of protection circuitry
including input supply under-voltage lockout, output voltage
soft start, current limit, and thermal shutdown.
The TS30111 includes supervisory reporting through the
PG (Power Good) open drain output to interface other
components in the system.
Summary Specification
•
•
Junction operating temperature -40 °C to 125 °C
Packaged in a 16pin QFN (3x3)
Applications
•
•
•
On-card switching regulators
Set-top box, DVD, LCD, LED supply
Industrial power supplies
Typical Applications
Adjustable Output
Fixed Output
BST
BST
CBST
VCC
VCC
VCC
VCC
VSW
FB
VOUT
CBYPASS
VOUT
LOUT
VSW
FB
RTOP
RBOT
COUT
VOUT
VOUT
10 kohm
(optional)
EN
EN
10 kohm
(optional)
EN
EN
PG
PG
PG
PG
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Pinout
VSW
VCC
VCC
GND
VSW
VCC
BST
EN
PIN 1
`
TS30111
Figure 1: 16 Lead 3x3 QFN, Top View
Pin Description
Pin #
Pin Name
VSW
Pin Function
Switching Voltage Node
Input Voltage
Description
1
2
3
Connected to 3.3uH (typical) inductor
Input voltage
VCC
VCC
Input Voltage
Input voltage
Primary ground for the majority of the device except
the low-side power FET
4
5
GND
FB
GND
Regulator FB Voltage. Connects to VOUT for fixed mode
and the output resistor divider for adjustable mode
Feedback Input
6
7
8
9
NC
NC
PG
EN
No Connect
No Connect
Not Connected
Not Connected
Power Good Output
Enable Input
Open-drain output
Above 2.2V the device is enabled. GND the pin to put
device in standby mode. Includes internal pull-up
Bootstrap capacitor for the high-side FET gate driver.
22nF ceramic capacitor from BST pin to VSW pin
10
BST
Bootstrap Capacitor
11
12
13
14
15
16
VCC
VSW
Input Voltage
Switching Voltage Node
Switching Voltage Node
Power GND
Input Voltage
Connected to 3.3uH (typical) inductor
VSW
Connected to 3.3uH (typical) inductor
PGND
PGND
VSW
GND supply for internal low-side FET/integrated diode
GND supply for internal low-side FET/integrated diode
Connected to 3.3uH (typical) inductor
Power GND
Switching Voltage Node
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Functional Block Diagram
PG
EN
VCC
4.2V
VCC
BST
VCC
VIN
Under Voltage
Protection
MONITOR
&
CONTROL
CBYPASS
VCC
Over & Under
Voltage
Protection
FB
Bootstrap
Voltage
Oscillator
Thermal
Protection
Ramp
Generator
Over Current
Protection
VCC
S
Vref
&
Softstart
CBST
Gate
Drive
VSW
Gate Drive
Control
LOUT
VOUT
COUT
Comparator
Gate
Drive
Error Amp
PGND
Vref
Compensation
Network
RTOP
PFM Mode
Comparator
FB
RBOT
GND
Figure 2: TS30111 Block Diagram
PG
Filter
Filter
Filter
Filter
Filter
VOUT-UV
EN
ENABLE
REGULATOR
Internal
POR
VCC-UV
TSD
Filter
VOUT-OV
TRISTATE
VSW OUTPUT
OCD_Filter
IOCD
Figure 3: Monitor & Control Logic Functionality
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Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted(1, 2)
Parameter
Value
Unit
V
VCC
-0.3 to 18
-0.3 to (VCC+6)
-1 to 18
BST
V
VSW
V
EN, PG, FB
-0.3 to 6
+/-2k
V
Electrostatic Discharge – Human Body Model
Electrostatic Discharge – Charge Device Model
Lead Temperature (soldering, 10 seconds)
Notes:
V
+/-500
V
260
°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating con-
ditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
Thermal Characteristics
Symbol
Parameter
Value
Unit
θJA
Thermal Resistance Junction to Air (Note 1)
Storage Temperature Range
50
°C/W
°C
TSTG
TJ MAX
TJ
-65 to 150
150
Maximum Junction Temperature
Operating Junction Temperature Range
°C
-40 to 125
°C
Note 1: Assumes 16LD 3x3 QFN with hi-K JEDEC board and 13.5 inch2 of 1 oz Cu
Recommended Operating Conditions
Symbol
Parameter
Min
4.5
Typ
Max
16
Unit
V
VCC
Input Operating Voltage
Bootstrap Capacitor
12
22
CBST
17.6
26.4
nF
LOUT
COUT
Output Filter Inductor Typical Value (Note 1)
Output Filter Capacitor Typical Value (Note 2)
3.3
22
uH
uF
COUT-ESR
CBYPASS
Output Filter Capacitor ESR
2
8
100
mΩ
uF
Input Supply Bypass Capacitor Typical Value (Note 3)
10
Note 1: For best performance, an inductor with a saturation current rating higher than the maximum VOUT load requirement plus the inductor
current ripple.
Note 2: For best performance, a low ESR ceramic capacitor should be used.
Note 3: For best performance, a low ESR ceramic capacitor should be used. If CBYPASS is not a low ESR ceramic capacitor, a 0.1uF ceramic
capacitor should be added in parallel to CBYPASS
.
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Electrical Characteristics
Electrical characteristics, TJ = -40C to 125C, VCC = 12V (unless otherwise noted)
Symbol
VCC Supply Voltage
VCC
Parameter
Condition
Min
Typ
Max
Unit
Input Supply Voltage
4.5
16
V
Quiescent current
Normal Mode
Quiescent current
ICC-NORM
VCC = 12V, ILOAD = 0A
VCC=12V, ILOAD=0A, Non-switching
VCC = 12V, VEN = 0V
5.2
2.3
5
mA
ICC-NOSWITCH
ICC-STBY
VCC Under Voltage Lockout
mA
uA
Normal Mode – Non-switching
Quiescent current
Standby Mode
10
Input Supply Under Voltage
VCC-UV
VCC Increasing
4.3
V
Threshold
Input Supply Under Voltage
Threshold Hysteresis
VCC-UV_HYST
650
mV
OSC
fOSC
Oscillator Frequency
1
MHz
PG Open Drain Output
tPG
PG Release Timer
10
ms
uA
V
IOH-PG
VOL-PG
High-Level Output Leakage
Low-Level Output Voltage
VPG=5V
0.5
IPG = -0.3mA
0.01
0.8
EN/nLP Input Voltage Thresholds
VIH-EN
High Level Input Voltage
2.2
V
V
VIL-EN
Low Level Input Voltage
Input Hysteresis
VHYST-EN
480
3.5
mV
uA
uA
VEN=5V
VEN=0V
IIN-EN
EN Input Leakage
-1.5
Thermal Shutdown
Thermal Shutdown Junction
Temperature
TSD
Note: not tested in production
Note: not tested in production
150
170
10
°C
°C
TSDHYST
TSD Hysteresis
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Regulator Characteristics
Electrical characteristics, TJ = -40C to 125C, VCC = 12V (unless otherwise noted)
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Switch Mode Regulator: L=3.3uH and C=22uF
VOUT-PWM Output Voltage Error in PWM Mode
VOUT-PFM
ILOAD =700 mA
ILOAD = 0A
2%
VOUT + 1%
240
V
Output Voltage Tolerance in PFM Mode
High Side Switch On Resistance
Low Side Switch On Resistance
Output Current
V
IVSW = -700mA (Note 1)
mΩ
mΩ
mA
RDSON
I
VSW = 700mA (Note 1)
160
IOUT
IOCD
700
Over Current Detect
HS switch current
(Note 3)
1.2
0.8
1.5
A
V
Feedback Reference
(Adjustable Mode)
FBTH
Feedback Reference
Absolute Tolerance
FBTH-TOL
(Note 3)
%
tSS
Soft start Ramp Time
PFM Mode FB Comparator Threshold
VOUT Under Voltage Threshold
VOUT Under Voltage Hysteresis
VOUT Over Voltage Threshold
VOUT Over Voltage Hysteresis
Max Duty Cycle
4
ms
V
FBTH-PFM
VOUT-UV
VOUT-UV_HYST
VOUT-OV
VOUT + 1%
93% VOUT
1.5% VOUT
103% VOUT
1% VOUT
97%
VOUT-OV_HYST
DUTYMAX
(Note 2)
95%
99%
Note 1: RDSON is characterized at 600mA and tested at lower current in production.
Note 2: Regulator VSW pin is forced off for 240ns every 8 cycles to ensure the BST cap is replenished.
Note 3: For the adjustable version, the ratio of VCC/VOUT cannot exceed 16.
Note 4: Based on Over Current Detect testing
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the duty cycle switch to a minimum off time on every 8th cycle
to allow this capacitor to re-charge.
Functional Description
The TS30111 current-mode synchronous step-down power
supply product is ideal for use in the commercial, industrial,
and automotive market segments. It includes flexibility to be
used for a wide range of output voltages and is optimized for
high efficiency power conversion with low RDSON integrated
synchronous switches. A 1MHz internal switching frequency
facilitates low cost LC filter combinations. Additionally, the
fixed output versions enable a minimum external component
count to provide a complete regulation solution with only 4
external components: an input bypass capacitor, an inductor,
an output capacitor, and the bootstrap capacitor. The regulator
automatically transitions between PFM and PWM mode to
maximize efficiency for the load demand.
Sense feedback, FB
This is the input terminal for the output voltage feedback.
For the fixed mode versions, this should be hooked directly
to VOUT. The connection on the PCB should be kept as short
as possible, and should be made as close as possible to the
capacitor. The trace should not be shared with any other
connection. (Figure 23)
For adjustable mode versions, this should be connected to
the external resistor divider. To choose the resistors, use the
following equation:
VOUT = 0.8 (1 + RTOP/RBOT
)
The input to the FB pin is high impedance, and input current
should be less than 100nA. As a result, good layout practices
are required for the feedback resistors and feedback traces.
When using the adjustable version, the feedback trace should
be kept as short as possible and minimum width to reduce
stray capacitance and to reduce the injection of noise.
The TS30111 was designed to provide these system benefits:
•
•
Reduced board real estate
Lower system cost
Lower cost inductor
Low external parts count
•
•
Ease of design
Bill of Materials and suggested board layout provided
Power Good output
Integrated compensation network
Wide input voltage range
For the adjustable version, the ratio of VCC/VOUT cannot exceed
16.
Switching output, VSW
Robust solution
This is the switching node of the regulator. It should be
connected directly to the 3.3uH inductor with a wide, short
trace and to one end of the Bootstrap capacitor. It is switching
between VCC and PGND at the switching frequency.
Over current, over voltage and over temperature pro-
tection
Detailed Pin Description
Unregulated input, VCC
Ground, GND
This terminal is the unregulated input voltage source for the
IC. It is recommended that a 10uF bypass capacitor be placed
close to the device for best performance. Since this is the main
supply for the IC, good layout practices need to be followed for
this connection.
This ground is used for the majority of the device including the
analog reference, control loop, and other circuits.
Power Ground, PGND
This is a separate ground connection used for the low side
synchronous switch to isolate switching noise from the rest of
the device. (Figure 23)
Bootstrap control, BST
This terminal will provide the bootstrap voltage required for
the upper internal NMOS switch of the buck regulator. An
external ceramic capacitor placed between the BST input
terminal and the VSW pin will provide the necessary voltage
for the upper switch. In normal operation the capacitor is
re-charged on every low side synchronous switching action.
In the case of where the switch mode approaches 100% duty
cycle for the high side FET, the device will automatically reduce
Enable, EN
This is the input terminal to activate the regulator. The input
threshold is TTL/CMOS compatible. It also has an internal pull-
up to ensure a stable state if the pin is disconnected.
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Power Good Output, PG
This is an open drain, active low output. The switched mode
output voltage is monitored and the PG line will remain low
until the output voltage reaches the VOUT-UV threshold. Once
the internal comparator detects the output voltage is above
the desired threshold, an internal delay timer is activated and
the PG line is de-asserted to high once this delay timer expires.
In the event the output voltage decreases below VOUT-UV, the
PG line will be asserted low and remain low until the output
rises above VOUT-UV and the delay timer times out. See Figure 2
for the circuit schematic for the PG signal.
Internal Protection Details
Internal Current Limit
Reference Soft Start
The current through the high side FET is sensed on a cycle
by cycle basis and if current limit is reached, it will abbreviate
the cycle. In addition, the device senses the FB pin to identify
hard short conditions and will direct the VSW output to skip 4
cycles if current limit occurs when FB is low. This allows current
built up in the inductor during the minimum on time to decay
sufficiently. Current limit is always active when the regulator
is enabled. Soft start ensures current limit does not prevent
regulator startup.
The reference in this device is ramped at a rate of 4ms to
prevent the output from overshoot during startup. This ramp
restarts whenever there is a rising edge sensed on the Enable
pin. This occurs in both the fixed and adjustable versions.
During the soft start ramp, current limit is still active, and will
still protect the device in case of a short on the output.
Output Overvoltage
If the output of the regulator exceeds 103% of the regulation
voltage, the VSW outputs will tri-state to protect the device
from damage. This check occurs at the start of each switching
cycle. If it occurs during the middle of a cycle, the switching
for that cycle will complete, and the VSW outputs will tri-state
at the beginning of the next cycle.
Under extended over current conditions (such as a short),
the device will automatically disable. Once the over current
condition is removed, the device returns to normal operation
automatically. (Alternately the factory can configure the
device’s NVM to shutdown the regulator if an extended over
current event is detected and require a toggle of the Enable
pin to return the device to normal operation.)
VCC Under-Voltage Lockout
The device is held in the off state until VCC reaches 4.3V
(typical). There is a 300mV hysteresis on this input, which
requires the input to fall below 4V (typical) before the device
will disable.
Thermal Shutdown
If the temperature of the die exceeds 170°C (typical), the VSW
outputs will tri-state to protect the device from damage. The
PG and all other protection circuitry will stay active to inform
the system of the failure mode. Once the device cools to 160°C
(typical), the device will start up again, following the normal
soft start sequence. If the device reaches 170°C, the shutdown/
restart sequence will repeat.
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Typical Performance Characteristics
VCC = 12V, COUT = 2 x 22uF (unless otherwise noted)
Figure 4. Startup Response
Figure 5. 100mA to 1A Load Step (VCC=12V, VOUT =1.8V)
Figure 6. 100mA to 1A Load Step (VCC=12V, VOUT=3.3V)
Figure 7. Line Transient Response (VCC=12V, VOUT=3.3V)
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Typical Performance Characteristics
VCC = 12V, COUT = 2 x 22uF (unless otherwise noted)
VCC=12V
VCC=12V
VCC=6V
Figure 8. Load Regulation
Figure 9. Line Regulation (IOUT=1A)
Figure 10. Efficiency vs. Output Current (VOUT=1.8V)
Figure11. Efficiency vs. Output Current (VOUT=3.3V)
Figure 12. Efficiency vs. Output Current (VOUT= 5V)
Figure 13. Efficiency vs. Input Voltage (VOUT= 3.3V)
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Typical Performance Characteristics
VCC = 12V, COUT = 2 x 22uF (unless otherwise noted)
7.0ꢀ
6.5ꢀ
6.0ꢀ
5.5ꢀ
5.0ꢀ
4.5ꢀ
4.0ꢀ
ꢁ50ꢀ
0ꢀ
50ꢀ
100ꢀ
150ꢀ
Temperature (°C)
Figure 14. Standby Current vs. Input Voltage
Figure 15. Standby Current vs. Temperature
3.310ꢀ
1.05ꢀ
1.03ꢀ
1.01ꢀ
0.99ꢀ
0.97ꢀ
0.95ꢀ
3.305ꢀ
Iout=30mAꢀ
3.300ꢀ
3.295ꢀ
Iout=300mAꢀꢀ
3.290ꢀ
3.285ꢀ
3.280ꢀ
ꢁ50ꢀ
0ꢀ
50ꢀ
100ꢀ
150ꢀ
ꢁ50ꢀ
0ꢀ
50ꢀ
100ꢀ
150ꢀ
Temperature (°C)
Temperature (°C)
Figure 16. Output Voltage vs. Temperature
Figure 17. Oscillator Frequency vs. Temperature (IOUT=300mA)
6.00ꢀ
5.50ꢀ
5.00ꢀ
4.50ꢀ
4.00ꢀ
2ꢀ
1.98ꢀ
1.96ꢀ
1.94ꢀ
1.92ꢀ
1.9ꢀ
1.88ꢀ
1.86ꢀ
1.84ꢀ
ꢁ50ꢀ
0ꢀ
50ꢀ
100ꢀ
150ꢀ
ꢁ50ꢀ
0ꢀ
50ꢀ
100ꢀ
150ꢀ
Temperature (°C)
Temperature (°C)
Figure 18. Quiescent Current vs. Temperature (No load)
Figure 19. Input Current vs. Temperature (No load, No switching)
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Typical Application Schematic
BST
CBST
22nF
VCC
VCC
VOUT
VSW
LOUT
3.3uH
2.5V
CBYPASS
CBYPASS2
0.1uF
(optional)
10uF 35V
DCATCH
(optional)
COUT1
22uF 10V
RTOP
17.8K
VOUT
FB
EN
EN
RBOT
10K
RPUP
10K
(optional)
PG
PG
Figure 20: TS30111 Application Schematic
A minimal schematic suitable for most applications is shown on page 1. Figure 22 includes optional components that may be
considered to address specific issues as listed in the External Component Selection section.
PCB Layout
For proper operation and minimum EMI, care must be taken
during PCB layout. An improper layout can lead to issues
such as poor stability and regulation, noise sensitivity and
increased EMI radiation. (figure 23) The main guidelines are
the following:
The inductor must be placed close to the VSW pins and
connected directly to COUT in order to minimize the area
between the VSW pin, the inductor, the COUT capacitor and the
PGND pins. The trace area and length of the switching nodes
VSW and BST should be minimized.
•
•
•
provide low inductive and resistive paths for loops with
high di/dt,
provide low capacitive paths with respect to all the other
nodes for traces with high di/dt,
sensitive nodes not assigned to power transmission
should be referenced to the analog signal ground (GND)
and be always separated from the power ground (PGND).
For the adjustable output voltage version of the TS30111,
feedback resistors RBOT and RTOP are required for Vout settings
greater than 0.8V and should be placed close to the TS30111
in order to keep the traces of the sensitive node FB as short
as possible and away from switching signals. RBOT should be
connected to the analog ground pin (GND) directly and should
never be connected to the ground plane. The analog ground
trace (GND) should be connected in only one point to the
power ground (PGND). A good connection point is under the
TS30111 package to the exposed thermal pad and vias which
are connected to PGND. RTOP will be connected to the VOUT
node using a trace that ends close to the actual load.
The negative ends of CBYPASS, COUT and the Schottky diode DCATCH
(optional) should be placed close to each other and connected
using a wide trace. Vias must be used to connect the PGND
node to the ground plane. The PGND node must be placed as
close as possible to the TS30111 PGND pins to avoid additional
voltage drop in traces.
For fixed output voltage versions of the TS30111, RBOT and RTOP
are not required and the FB pin should be connected directly
The bypass capacitor CBYPASS (optionally paralleled to a 0.1µF
capacitor) must be placed close to the VCC pins of TS30111.
to the VOUT
.
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The exposed thermal pad must be soldered to the PCB for mechanical reliability and to achieve good power dissipation. Vias must
be placed under the pad to transfer the heat to the ground plane.
VOUT
COUT
COUT
LOUT
Switching
node
DCATCH
VSW
VCC
VCC
GND
VSW
VCC
BST
EN
CBYP
Vias to
ground
plane
RPLP
RTOP
CBYPASS
RBOT
Vias to
ground
plane
Analog
ground
(GND)
PGND
VCC
Figure 21: TS30111 PCB Layout, Top View
External Component Bill Of Materials
Suggested
Manufacturer
Designator
Function
Description
Manufacturer Code
Qty
CBYPASS
COUT
Input Supply Bypass Capacitor
Output Filter Capacitor
10uF 10% 35V
22uF 10% 10V
TDK
TDK
CGA5L3X5R1V106K160AB
C2012X5R1A226K125AB
1
1
TDK
Wurth
MLP2012S3R3MT
744045003
LOUT
CBST
RTOP
Output Filter Inductor
Boost Capacitor
3.3uH 900mA
22nF 10V
1
1
1
TDK
C1005X7R1C223K
Voltage Feedback Resistor
(optional)
17.8K
(Note 1)
Voltage Feedback Resistor
(optional)
10K
(Note 1)
RBOT
1
1
1
PG Pin Pull-up Resistor
(optional)
RPLP
10K
30V 2A
SOD-123FL
On
DCATCH
Catch Diode (optional)
MBR230LSFT1G
Semiconductor
Note 1: The voltage divider resistor values are calculated for an output voltage of 2.5V. For fixed output versions, the FB pin is connected
directly to VOUT.
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External Component Selection
Thermal Information
The 1MHz internal switching frequency of the TS30111
facilitates low cost LC filter combinations. Additionally, the
fixed output versions enable a minimum external component
count to provide a complete regulation solution with only 4
external components: an input bypass capacitor, an inductor,
an output capacitor, and the bootstrap capacitor. The internal
compensation is optimized for a 22uF output capacitor and a
3.3uH inductor.
TS30111 is designed for a maximum operating junction
temperature TJ of 125°C. The maximum output power is limited
by the power losses that can be dissipated over the thermal
resistance given by the package and the PCB structures. The
PCB must provide heat sinking to keep the TS30111 cool. The
exposed metal on the bottom of the QFN package must be
soldered to a ground plane. This ground should be tied to
other copper layers below with thermal vias. Adding more
copper to the top and the bottom layers and tying this copper
to the internal planes with vias can reduce thermal resistance
further. For a hi-K JEDEC board and 13.5 square inch of 1 oz
Cu, the thermal resistance from junction to ambient can be
reduced to θJA = 38°C/W. The power dissipation of other power
components (catch diode, inductor) cause additional copper
heating and can further increase what the TS30111 sees as
ambient temperature.
For best performance, a low ESR ceramic capacitor should be
used for CBYPASS. If CBYPASS is not a low ESR ceramic capacitor, a
0.1uF ceramic capacitor should be added in parallel to CBYPASS
.
The minimum allowable value for the output capacitor is
22uF. To keep the output ripple low, a low ESR (less than
35mOhm) ceramic is recommended. Multiple capacitors can
be paralleled to reduce the ESR.
The inductor range is 3.3uH +/-20%. For optimal over-current
protection, the inductor should be able to handle up to the
regulator current limit without saturation. Otherwise, an
inductor with a saturation current rating higher than the
maximum IOUT load requirement plus the inductor current
ripple should be used.
For high current modes, the optional Schottky diode will
improve the overall efficiency and reduce the heat. It is up
to the user to determine the cost/benefit of adding this
additional component in the user’s application. The diode is
typically not needed.
For the adjustable output version of the TS30111, the output
voltage can be adjusted by sizing RTOP and RBOT feedback
resistors. The equation for the output voltage is VOUT = 0.8 (1 +
RTOP/RBOT).
For the adjustable version, the ratio of VCC/VOUT cannot exceed
16.
RPUP is only required when the Power Good signal (PG) is
utilized.
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Package Mechanical Drawings (all dimensions in mm)
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Pins
Pitch
Overall Height
Standoff
Contact Thickness
Overall Length
Exposed Pad Width
Overall Width
Exposed Pad Length
Contact Width
Contact Length
Contact-to-Exposed Pad
N
e
A
A1
A3
D
E2
E
16
0.50 BSC
0.90
0.80
0.00
1.00
0.05
0.02
0.20 REF
3.00 BSC
1.70
3.00 BSC
1.70
0.25
0.30
-
1.55
1.80
D2
b
L
1.55
0.20
0.20
0.20
1.80
0.30
0.40
-
K
Notes:
Dimensions and toleraning per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information only. YYYY = Internal trace code.
XX = Internal Year and assembly code.
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Recommeded PCB Land Pattern
DIMENSIONS IN MILLIMETERS
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Contact Pitch
E
0.50 BSC
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
Contact Pad Spacing
Contact Pad Width (X8)
Contact Pad Length (X8)
Distance Between Pads
W2
T2
C1
C2
X1
Y1
G
-
-
-
-
-
-
-
-
1.70
1.70
-
3.00
3.00
-
-
-
-
0.35
0.65
-
0.15
Notes:
Dimensions and tolerances per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact values shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information only.
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Pacakging Information
Pb-Free (RoHS): The TS30111 devices are fully compliant for all materials covered by European Union Directive 2002/95/EC, and
meet all IPC-1752 Level 3 materials declaration requirements.
MSL, Peak Temp: The TS30111 family has a Moisture Sensitivity Level (MSL) 1 rating per JEDEC J-STD-020D. These devices also
have a Peak Profile Solder Temperature (Tp) of 260°C.
IR Reflow Profile
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Average ramp-up rate
(Tsmax to Tp)
3°C/second max.
3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (Tsmin to Tsmax) (ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
- Temperature (TL)
- Time (TL)
217°C
60-150 seconds
See Table 4.2
183°C
60-150 seconds
Peak Temperature (Tp)
See Table 4.1
Time within 5°C of actual Peak
Temperature (tp)2
10-30 seconds
20-40 seconds
Ramp-down Rate
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Time 25°C to Peak Temperature
Note 1: All temperatures refer to topside of the package, measured on the package body surface
Note 2: Time within 5 C of actual peak temperature (tp) specified for the reflow profiles is a “supplier” minimum and “user” maximum.
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Table 4-1 SnPb Eutectic Process - Package Peak Reflow Temperatures
Package Thickness
<2.5 mm
Volume mm3 <350
Volume mm3 ≥ 350
225 +0/-5°C
240 +0/-5 °C
≥ 2.5 mm
225 +0/-5°C
225 +0/-5°C
Table 4-2 Pb-free Process - Package Peak Reflow Temperatures
Package
Thickness
Volume mm3
< 350
Volume mm3
350 - 2000
Volume mm3
> 2000
< 1.6 mm
1.6 mm - 2.5 mm
> 2.5 mm
260 °C *
260 °C *
250 °C *
260 °C *
250 °C *
245 °C *
260 °C *
245 °C *
245 °C *
* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification
temperature at the rated MSL level
Note 1: Package volume excludes external terminals (balls, bumps, lands, leads) and/or non-integral heat sinks.
Note 2: The maximum component temperature reached during reflow depends on package thickness and volume. The use of convection
reflow processes reduces the thermal gradients between packages. However, thermal gradients due to differences in thermal mass of
SMD packages may still exist.
Note 3: Components intended for use in a “lead-free” assembly process shall be evaluated using the “lead free” peak temperature and pro-
files defined in Tables 4-1. 4.2 and 5-2 whether or not lead free.
RoHS and Reach Compliance
Ordering Information
Triune Systems is fully committed to environmental quality.
All Triune Systems materials and suppliers are fully compliant
with RoHS (European Union Directive 2011/65/EU), REACH
SVHC Chemical Restrictions (EC 1907/2006), IPC-1752 Level
3 materials declarations, and their subsequent amendments.
Triune Systems maintains certified laboratory reports for
all product materials, from all suppliers, which show full
compliance to restrictions on the following:
TS30111-MvvvQFNR
vvv
015
018
025
033
050
000
Output Voltage
1.5 V
1.8 V
2.5 V
3.3 V
5.0 V
•
•
•
•
•
•
•
•
•
•
•
•
Cadmium (Cd)
Adjustable
Chlorofluorocarbons (CFCs)
Chlorinate Hydrocarbons (CHCs)
Halons (Halogen free)
Hexavalent Chromium (CrVI)
Hydrobromofluorocarbons (HBFCs)
Hydrochlorofluorocarbons (HCFCs)
Lead (Pb)
Mercury (Hg)
Perfluorocarbons (PFCs)
Polybrominated biphenyls (PBB)
Polybrominated Diphenyl Ethers (PBDEs)
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Reel Dimensions (13 Inch)
Product Specifications
Tape Width
A (Max.)
N (Min.)
100
W1
W2
14.4
18.4
22.4
8mm
12mm
16mm
330
330
330
8.4
100
12.4
16.4
100
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Carrier Tape Specification
All DFN and QFN packages will be oriented so that the index package locations will be on the upper right corner of the sprocket
side of the carrier tape.
All carrier tape used for packing Triune System Components will be specifically formulated to provide protection from physical
and electro-static discharge (ESD)damage during shipping and storage. Embossed earner tape must be EIA Standard-481-1
compliant and meet the mechanical characteristics shown in Table 3.
Dimensions are in millimeters
Pkg
type
AO
BO
W
DO
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
8.0
+/-
0.2
1.50
+/-
0.10
1.10
+/-
0.10
1.75
+/-
0.10
3.5
+/-
0.05
0.25
+/-
0.05
2x2mm
DFN
6.25
min
0.21-
0.35
2.3
2.3
4
4
1.5
8
1.50
+/-
1.10
+/-
3.5
+/-
3x3mm
QFN
0.21-
0.35
3.3
3.3
12
12
12
8
8
8
8
8
2
1.1
1.1
1.1
1.1
4.5
5.4
0.10
0.10
0.05
1.50
+/-
0.10
1.10
+/-
0.10
3.5
+/-
0.05
4x4mm
QFN
0.21-
0.35
4.35
5.25
4.35
5.25
1.50
+/-
0.10
1.10
+/-
0.10
3.5
+/-
0.05
5x5
QFN
0.21-
0.35
8
9.2
6.3
+/-
0.10
6.3
+/-
0.10
16
+/-
0.30
1.50
+/-
0.10
1.50
+/-
0.10
1.75
+/-
0.10
7.5
+/-
0.10
0.30
+/-
0.05
6x6mm
QFN
0.21-
0.35
14.25
12
13.3
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IMPORTANT NOTICE
Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as a
guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right
to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders
and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time
of sale, and all sales are made in accordance with Semtech’s standard terms and conditions of sale.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES
OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE
OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN
SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall
indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney
fees which could arise.
The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and trade names mentioned may be marks and
names of Semtech or their respective companies. Semtech reserves the right to make changes to, or discontinue any products described in this document
without further notice. Semtech makes no warranty, representation or guarantee, express or implied, regarding the suitability of its products for any
particular purpose. All rights reserved.
© Semtech 2015
Contact Information
Semtech Corporation
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111, Fax: (805) 498-3804
www.semtech.com
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