TS33010-M008QFNR [SEMTECH]

High Efficiency Synchronous 500mA DC/DC Buck Converter, 2 . 2 5Mhz;
TS33010-M008QFNR
型号: TS33010-M008QFNR
厂家: SEMTECH CORPORATION    SEMTECH CORPORATION
描述:

High Efficiency Synchronous 500mA DC/DC Buck Converter, 2 . 2 5Mhz

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TS33010  
High Efficiency Synchronous 500mA  
DC/DC Buck Converter, 2 . 2 5Mhz  
TRIUNE PRODUCTS  
Features  
Description  
Fixed output option has automatic low power PFM  
mode for reduced quiescent current at light loads  
2.25MHz +/- 10% fixed switching frequency  
Fixed output voltages: 0.8V, 0.9V, 1.2V, 1.5V, 1.8V,  
2.5V, and 3.3V with +/- 2% output tolerance  
Input voltage range: 2.0V to 5.5V  
The TS33010 is a DC/DC synchronous switching regulator  
with fully integrated power switches, internal compensation,  
and full fault protection. The switching frequency of  
2.25MHz enables the use of extremely small filter  
components, resulting in smaller board space and reduced  
BOM costs.  
Voltage mode PWM control with input voltage feed-  
forward compensation  
Voltage supervisor for VOUT reported at the PG pin  
Input supply under voltage lockout  
Soft start for controlled startup with no overshoot  
Full protection for over-current, over-temperature,  
and VOUT overvoltage  
When the input current is greater than approximately 50mA,  
the TS33010 utilizes PWM voltage mode feedback with input  
voltage feed-forward to provide a wide input voltage range  
without the need for external compensation.  
Less than 200nA in shutdown mode  
Multiple enable pins for flexible system sequencing  
Low external component count  
Junction operating temperature -40°C to 125°C  
Packaged in a 16 pin QFN (3x3)  
Product is lead-free, Halogen Free, RoHS / WEEE  
compliant  
When the input current is less than 50mA, the device  
uses a PFM mode to provide increased efficiency at light  
loads. The cross over between PFM and PWM modes is  
automatic and has hysteresis to prevent oscillation  
between the modes. Additionally, the nLP mode pin can  
be used to force the device into PWM mode to reduce the  
output ripple, if needed.  
Applications  
The TS33010 integrates a wide range of protection circuitry;  
including input supply under-voltage lockout, output under-  
voltage, output over-voltage, soft start, high side FET and  
low side FET current limits.  
Point of load  
Systems with deep submicron ASICs/FPGAs  
Set-top box  
Communications equipment  
Portable and handheld equipment  
Typical Applications  
Fixed Output  
1.5μH  
VOUT  
VCC  
VCC  
VSW  
10μF  
VOUT  
Sense  
22μF  
FB  
VCC or VOUT  
10 kohm  
(optional)  
nLP  
EN  
nLP  
EN  
PG  
PG  
TS33010  
Final  
1 of  
Rev  
June 2, 2016  
Pinout  
(Top View)  
Pin Description  
Pin Name  
VSW  
Pin Function  
Description  
Pin  
1
#
Switching Voltage Node  
Connect to 1.5μH inductor. Short to Pins 12, 14, & 15  
Input voltage supply. Short to Pins 3 & 11  
Input voltage supply. Short to Pins 2 & 11  
2
VCC  
Input  
Input  
V
oltage  
3
VCC  
Voltage  
4
5
6
GND  
GND  
Ground for the internal circuitry of the device  
Feedback voltage for the regulator when used in adjustable mode.  
Connect to the output voltage resistor divider for adjustable mode  
and No Connection for fixed output modes  
FB  
Feedback Input  
Output Voltage Sense. Requires kelvin connection to 10μF  
output capacitor  
VOUT Sense  
Output Voltage  
nLP nput  
PG Output  
Enable nput  
Test Mode Output  
Sense  
Forcing this pin high prevents the device from going into Low  
Power PFM mode operation  
7
8
9
nLP  
PG  
EN  
I
Power Good indicator Open-drain output.  
Input high voltage enables the device. Input low disables the  
device.  
I
10  
TEST OUT  
Connect to GND. For internal testing use only.  
11  
12  
VCC  
VSW  
Input  
V
oltage  
Input voltage supply. Short to Pins 2 & 3  
Switching Voltage Node  
Connect to 1.5μH inductor. Short to Pins 1, 14, & 15  
GND supply for internal low-side FET/integrated diode. Short to  
Pin 16  
13  
PGND  
Power GND  
14  
15  
VSW  
VSW  
S
witching Voltage Node  
witching Voltage Node  
Connect to 1.5μH inductor. Short to Pins 1, 12, & 15  
Connect to 1.5μH inductor. Short to Pins 1, 12, & 14  
S
GND supply for internal low-side FET/integrated diode. Short to  
Pin 13  
16  
PGND  
Power GND  
TS33010  
Final  
2 of  
Rev  
June 2, 2016  
Functional Block Diagram  
PG  
nLP  
EN  
VCC  
MONITOR  
&
Under Voltage  
Protection  
CONTROL  
Thermal  
Protection  
Oscillator  
VCC  
Over Current  
Protection  
Ramp  
Generator  
Vref  
&
Softstart  
Gate  
Drive  
VSW  
1.5μH  
VOUT  
Gate Drive  
Control  
10μF  
Comparator  
Gate  
Drive  
Error Amp  
PGND  
RTOP  
Compensation  
Network  
(Adjustable)  
RBOT  
(Adjustable)  
Vout  
Sense  
FB  
GND  
(Adjustable)  
(Adjustable)  
Figure 1: TS33010 Block Diagram for fixed and adjustable mode devices  
TS33010  
Final  
3 of  
Rev  
June 2, 2016  
Absolute Maximum Rating  
Over operating free–air temperature range unless otherwise noted(1, 2)  
Parameter  
Value  
-0.3 to 6.0  
-1 to 6.0  
-0.3 to 6.0  
±2k  
Unit  
V
V
CC  
VSW  
V
EN, PG,FB, nLP, TEST OUT, VOUT  
S
ense  
V
Electrostatic Discharge – Human Body Model  
Electrostatic Discharge – Charge Device Model  
V
±500  
V
Lead Temperature (soldering  
,
10 seconds)  
260  
°C  
Notes:  
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings  
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating con-  
ditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to network ground terminal.  
Thermal Characteristics  
Symbol  
Parameter  
Value  
Unit  
șJA  
șJC  
Thermal Resistance Junction to Air (Note 1)  
Thermal Resistance Junction to Case (Note 1)  
50  
°C/W  
°C/W  
3.9  
Note 1: Assumes QFN16 1 in2 area of 2 oz copper and 25°C ambient temperature.  
Recommended Operating Conditions  
S
ymbol  
P
arameter  
oltage  
orage Temperature ange  
Maximum Junction emper  
Operating Junction Temperature Range  
Min  
2.0  
Typ  
Max  
5.5  
Unit  
V
3.6  
V
CC  
Input Operating V  
-65  
150  
150  
125  
°C  
TS  
St  
R
TG  
°C  
TJ  
T
ature  
MAX  
-40  
°C  
TJ  
1.5  
10  
5
μH  
μF  
Pȍ  
μF  
LOUT  
Output Filter Inductor Typical Value (Note 1,3)  
Output Filter Capacitor Typical Value (Note 2,3)  
Output Filter Capacitor ESR  
3.3  
0
13  
20  
COUT  
COUT  
-ESR  
22  
CBY  
Input Supply Bypass Capacitor Typical Value (Note 2)  
PASS  
Note 1: For best performance, an inductor with a saturation current rating higher than the maximum Vout load requirement plus the inductor  
current ripple. See the inductor current ripple calculations in inductor calculations sections.  
Note 2: For best performance, a low ESR ceramic capacitor– X7R or X5R types should be used. Y5V should be avoided.  
Note 3: Min and max listed are to account for +/-20% variation of the typical value. Typical values of 10μF and 1.5μH are recommended.  
TS33010  
4 of  
Final  
Rev  
June 2, 2016  
C
haracteristics  
Electrical characteristics, TJ = -40°C to 125°C, VCC = 3.6V (unless otherwise noted)  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Unit  
VCC Supply Voltage  
I
= 0A, EN=VCC, nLP=5V,  
LOAD  
Quiescent current Normal Mode  
ICC-NORM  
7
mA  
V
OUT=1.8V  
I
=0A, EN=VCC, nLP=0V,  
Quiescent current Low Power PFM  
Mode  
LOAD  
ICC-LPM  
25  
45  
5
μA  
μA  
V
OUT=1.8V  
EN=0V  
0.1  
ICC-SHUTDOWN  
Quiescent current Shutdown Mode  
VCC Under Voltage Lockout  
Input Supply Under Voltage  
Threshold  
VCCUV  
1.6  
50  
1.75  
2.5  
VCC Increasing  
V
Input Supply Under Voltage  
Threshold Hysteresis  
VCCUV_HYST  
mV  
OSC  
FOSC  
Oscillator Frequency  
2
2.25  
MHz  
PG Open Drain Output  
TPG  
PG Release Timer  
14  
ms  
μA  
V
IOH-PG  
VOL-PG  
VPG=5V VCC=5V  
IPG = -0.3mA  
High-Level Output Leakage  
Low-Level Output Voltage  
0.1  
0.1  
0.4  
EN / nLP Input Voltage Thresholds  
VIH-EN/nLP  
High Level Input Voltage  
VCC=2V to 5V  
VCC=2V to 5V  
1.5  
V
Low Level Input Voltage  
Input Hysteresis  
V
VIL-EN/nLP  
VHYST-EN/nLP  
VCC=2V to 5V  
VEN=5V, VCC=5V  
VEN=0V, VCC=5V  
200  
0.1  
0.1  
65  
mV  
μA  
μA  
.ȍ  
IIN-EN  
EN Input Leakage  
nLP Pulldown Resistor  
Pulldown to GND  
nLPPD  
Thermal Shutdown  
Thermal Shutdown Junction  
Temperature Voltage  
190  
15  
TSD  
°C  
°C  
TSD Hysteresis  
TSDHYST  
TS33010  
5 of  
Final  
Rev  
June 2, 2016  
Regulator Characteristics  
Electrical characteristics, TJ = -40C to 125C, VCC = 3.6V (unless otherwise noted)  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Unit  
Switch Mode Regulator: L=1.5μH and C=10μF  
Output Voltage Tolerance in PWM  
Mode  
VOUT-PWM  
VOUT – 2%  
VOUT  
VOUT + 2%  
V
IVSW = -500mA (Note 1)  
150  
95  
Pȍ  
Pȍ  
High Side Switch On Resistance  
Low Side Switch On Resistance  
RDSON  
I
VSW = 500mA (Note 1)  
IOUT  
IOUT  
IOCDHS  
IOCDLS  
VOUT-LINE  
Output Current  
VCC • 2.5V  
500  
300  
mA  
mA  
A
Output Current  
VCC < 2.5V  
0.7  
0.7  
0.9  
0.9  
Over Current Detect HS  
Over Current Detect LS  
A
VCC = 2.5V to 5V,  
VOUT = 1.8V, ILOAD = 300mA  
(Note 2)  
Output Line Regulation  
Output Load Regulation  
-15  
15  
mV  
V
ILOAD = 10mA to 300mA,  
VCC = 5V, VOUT = 1.8V  
VOUT-LOAD  
1.791  
1.8  
0.6  
1.809  
FB Switch Point (Note 3)  
V
FBTH  
FBTH-TOL  
IFB  
Feedback Reference  
-1.5  
1.5  
%
Feedback Reference Tolerance  
Feedback Input Current  
100  
1.2  
nA  
ms  
TSS  
Softstart Ramp Time  
85% VOUT  
2% VOUT  
106% VOUT  
2% VOUT  
VOUT-PG  
VOUT-PG_HYST  
VOUT-OV  
VOUT-OV_HYST  
VOUT Power Good Threshold  
VOUT Power Good Hysteresis  
VOUT Over Voltage Threshold  
VOUT Over Voltage Hysteresis  
Note 1: R  
Note 2:  
Note 3:  
is characterized at 500mA and tested at lower current in production.  
Specified Output Line Reg is relative to nominal VCC.  
FB is for adjustable part only.  
TS33010  
Final  
6 of  
Rev  
June 2, 2016  
Functional Description  
Switching output, VSW  
This voltage-mode Point of Load (POL) synchronous  
step-down power supply product can be used in the  
consumer, and industrial market segments. It includes  
flexibility to be used for a wide range of output voltages  
and is optimized for high efficiency power conversion  
with low RDSON integrated synchronous switches. A  
2.25MHz internal switching frequency facilitates low cost  
LC filter combinations and improved transient response.  
Additionally, the fixed output version, with integrated  
Power on Reset and Fault circuitry enables a minimal  
external component count to provide a complete power  
supply solution for a variety of applications.  
This is the switching node of the regulator. It should be  
connected directly to the 1.5μH inductor with a wide, short  
trace. It is switching between VCC and PGND at the  
switching frequency.  
Ground, GND  
This ground is used for the majority of the device including  
the analog reference, control loop, and other circuits.  
Power Ground, PGND  
This is a separate ground connection used for the low side  
synchronous FET to isolate switching noise from the rest of  
the device.  
Detailed Pin Description  
Unregulated input, VCC  
Enable, EN  
This terminal is the unregulated input voltage source for the  
IC. It is recommended that a 22μF bypass capacitor be  
placed close as possible to the VCC pins for best  
performance. Since this is the main supply for the IC, good  
layout practices need to be followed for this connection.  
This is an input terminal to activate the entire device. This  
will enable the internal reference, oscillator, etc, and allow  
the fault detection circuitry to work correctly. Notice that  
the EN needs to be low for the part to exhibit less than  
200nA quiescent current. The input threshold is  
TTL/CMOS compatible.  
Feedback, FB  
This is the voltage feedback input terminal for the  
adjustable version. For the fixed mode versions, this pin  
should be left floating and not connected.  
Power Good Output, PG  
This is an open drain, active high output. The switched  
mode output voltage is monitored and the PG line will  
remain  
The connection on the PCB should be kept as short as  
possible from the feedback resistors, kept away from the  
low until the output voltage reaches the VOUT-UV  
VSW  
connections or other switching/high  
threshold,  
approximately 85% of the final regulation output. Once the  
internal comparator detects the output voltage is above the  
desired threshold, an internal 14ms delay timer is activated  
and the PG line is de-asserted to high when this delay timer  
expires. In the event the output voltage decreases below  
VOUT- UV the PG line will be asserted low immediately and  
frequency nodes, and should not be shared with any other  
connection. This should minimize stray coupling, reduce  
noise injection, and minimize voltage shift cause by output  
load.  
To choose the resistors for the adjustable version,  
use the following equation:  
remain low until the output rises above VOUT-UV and the delay  
VOUT = 0.6 (1 + RTOP/RBOT  
)
timer times out again. If EN is pulled low and the VCC input  
undervoltage trips, the PG pin will immediately be pulled  
low.  
For stability, RTOP should be 270K Ohms to 330K Ohms.  
Output Voltage Sense, VOUT Sense  
nLow Power Mode Output, nLP  
This is the input terminal for the voltage output feedback  
and is needed for both adjustable and fixed voltage  
versions. This should be connected to the main output  
capacitor, and the same good layout practices should be  
followed as for the FB connection. Keep this line as short  
as possible, keep it away from the VSW and other  
switching or high frequency traces, and do not share this  
connection with any other connection  
This is an input to force the PWM mode when light  
load is on the output. The PFM low power mode has  
higher output voltage ripple, which is some  
applications may be unacceptable. If low ripple is  
needed on the output this pin can be tied to VCC  
input, or switched above 1.5V during operation to  
force the device into normal PWM mode.  
on the PCB.  
TS33010  
7 of  
Final  
Rev  
June 2, 2016  
Internal Protection Details  
Internal Current Limit  
Current limit is always active when the regulator is  
enabled. High side current limit will shorten the high side  
on time and tri-state the high side. Additionally, low side  
current limit will protect the low side FET and turn off the  
switch if current limit is sensed on the low side switch.  
Since the output is fully synchronous, the current limit is  
protected on the low side in both the positive and negative  
direction.  
Soft Start  
Soft start ensures current limit does not prevent regulator  
startup and minimize overshoot at startup. The typical  
startup time is 1.2ms. These values do not change with  
output voltage, current limit settings, or adjustable/fixed  
mode. The soft start is re-triggered with the any rising  
edge that enables the regulator, including the EN input  
pins, thermal shutdown, VCC Undervoltage, or a VCC  
Power cycle.  
Output Overvoltage  
If the output of the regulator exceeds 106% of the  
regulation voltage, the VSW outputs will tri-state to protect  
the device from damage. This check occurs at the start of  
each switching cycle. If it occurs during the middle of a  
cycle, the switching for that cycle will complete, and the  
VSW outputs will tri-state at the beginning of the next  
cycle.  
VCC Under-Voltage Lockout  
The device is held in the off state until VCC reaches 1.60V.  
There is a 50mV hysteresis on this input, which requires  
the input to fall below 1.55V before the device will disable.  
TS33010  
8 of  
Final  
Rev  
June 2, 2016  
External Component Selection  
The internal compensation is optimized for a 10μF output capacitor and a 1.5μH inductor. To keep the output ripple low, a  
low ESR (less than 20mOhm) ceramic is recommended. For optimal over-current protection, the inductor should be able to  
handle 1A without saturation.  
Application Using A Multi-Layer PCB  
To maximize the efficiency of this package for application on a single layer or multi-layer PCB, certain guidelines must be  
followed when laying out this part on the PCB.  
The following are guidelines for mounting the exposed pad IC on  
a Multi-Layer PCB with ground aplane.  
Solder Pad (Land Pattern)  
Package Thermal Pad  
Thermal Via's  
Package Outline  
Package and PCB Land Configuration  
For a Multi-Layer PCB  
JEDEC standard FR4 PCB Cross-section:  
Package Solder Pad  
(square)  
Component Traces  
1.5038 - 1.5748 mm  
Component Trace  
(2oz Cu)  
2 Plane  
1.0142 - 1.0502 mm  
Ground Plane (1oz  
Cu)  
1.5748mm  
Thermal Via  
4
Plane  
0.5246 - 0.5606 mm  
Power Plane (1oz  
Cu)  
Thermal Isolation  
Power plane only  
0.0 - 0.071 mm Board Base  
& Bottom Pad  
Package Solder Pad  
(bottom trace)  
Multi-Layer Board (Cross-sectional View)  
In a multi-layer board application, the thermal vias are the primary method of heat transfer from the package thermal pad to  
the internal ground plane. The efficiency of this method depends on several factors, including die area, number of thermal  
vias, thickness of copper, etc.  
TS33010  
9 of  
Final  
Rev  
June 2, 2016  
Mold compound  
Die  
Epoxy Die attach  
Exposed pad  
Solder  
5% - 10% Cu coverage  
Single Layer, 2oz Cu  
Thermal Vias with Cu plating  
90% Cu coverage  
Ground Layer, 1oz Cu  
Signal Layer, 1oz Cu  
Bottom Layer, 2oz Cu  
20% Cu coverage  
Note: NOT to Scale  
The above drawing is a representation of how the heat can be conducted away from the die using an exposed pad  
package. Each application will have different requirements and limitations and therefore the user should use sufficient  
copper to dissipate the power in the system. The output current rating for the linear regulators may have to be de-rated for  
ambient temperatures above 85°C. The de-rate value will depend on calculated worst case power dissipation and the  
thermal management implementation in the application.  
Application Using A Single Layer PCB  
Use as much Copper Area  
as possible for heat spread  
Package Thermal Pad  
Package Outline  
Layout recommendations for a Single Layer PCB: utilize as much Copper Area for Power Management. In a single  
layer board application the thermal pad is attached to a heat spreader (copper areas) by using low thermal impedance  
attachment method (solder paste or thermal conductive epoxy).  
In both of the methods mentioned above it is advisable to use as much copper traces as possible to dissipate the heat.  
IMPORTANT  
:
If the attachment method is NOT implemented correctly, the functionality of the product is not guaranteed. Power  
dissipation capability will be adversely affected if the device is incorrectly mounted onto the circuit board.  
TS33010  
10 of  
Final  
Rev  
June 2, 2016  
Package Mechanical Drawings (all dimensions in mm)  
Units  
Dimension Limits  
MILLIMETERS  
NOM  
MIN  
MAX  
Number of  
itch  
Overall Height  
tandoff  
ontac  
P
ins  
N
e
16  
P
0.50 BSC  
0.90  
A
0.80  
0.00  
1.00  
0.05  
S
A1  
A3  
D
0.02  
C
t
T
hickness  
0.20 REF  
3.00 BSC  
1.70  
Overall Length  
Exposed Pad Width  
Overall Width  
E2  
E
1.55  
1.80  
3.00 BSC  
1.70  
Exposed Pad Length  
D2  
b
1.55  
0.20  
0.20  
0.20  
1.80  
0.30  
0.40  
-
Contac  
Contac  
Contac  
t
t
t
Width  
0.25  
Length  
L
0.30  
-t  
o
-Exposed  
Pad  
K
-
TS33010  
11 of  
Final  
Rev  
June 2, 2016  
PCB Board Land Pattern  
DIMENSIONS IN MILLIMETERS  
Units  
MILLIMETERS  
Dimension Limits  
MIN  
NOM  
MAX  
Contac  
t
Pitch  
E
0.50 BSC  
Optional  
Optional  
C
en  
t
er Pad Width  
er Pad Length  
W2  
T2  
C1  
C2  
X1  
Y1  
G
-
-
1.70  
1.70  
-
Cen  
t
-
-
Contac  
Contac  
Contac  
Contac  
t
t
t
t
Pad Spacing  
-
3.00  
Pad Spacing  
-
3.00  
-
Pad Width(X8)  
Pad Length (X8)  
-
-
-
-
-
0.35  
0.65  
-
Distance Between  
Pads  
0.15  
Notes:  
Dimensions and tolerances per ASME Y14.5M.  
BSC: Basic Dimension. Theoretically exact values shown without tolerances.  
REF: Reference Dimension, usually without tolerance, for information only.  
TS33010  
12 of  
Final  
Rev  
June 2, 2016  
Product Ordering Information  
Part Number  
Description  
T
T
T
T
T
T
T
T
S33010-M008QFNR  
S33010-M009QFNR  
S33010-M012QFNR  
S33010-M015QFNR  
S33010-M018QFNR  
S33010-M025QFNR  
S33010-M033QFNR  
S33010-M000QFNR  
2.25MHz Sync Buck, 500mA - 0.8V  
2.25MHz Sync Buck, 500mA - 0.9V  
2.25MHz Sync Buck, 500mA - 1.2V  
2.25MHz Sync Buck, 500mA - 1.5V  
2.25MHz Sync Buck, 500mA - 1.8V  
2.25MHz Sync Buck, 500mA - 2.5V  
2.25MHz Sync Buck, 500mA - 3.3V  
2.25MHz Sync Buck, 500mA - ADJ  
TS33010  
Final  
13 of  
Rev  
June 2, 2016  
IMPORTANT NOTICE  
Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as  
a
guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right  
to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders  
and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time  
of sale, and all sales are made inaccordance with Semtech’s standard terms and conditions of sale.  
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES  
OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE  
OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN  
SOLELY AT THE CUSTOMER’S OWN RISK. Should  
a customer purchase or use Semtech products for any such unauthorized application, the customer shall  
indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney  
fees which could arise.  
The Semtech name and logo are registered trademarks of the Semtech Corporation. Triune Systems, L.L.C. is now  
a wholly-owned subsidiary of Semtech  
Corporation. The Triune Systems® name and logo, MPPT-lite™, and nanoSmart® are trademarks of Triune Systems, LLC. in the U.S.A. All other trademarks  
and trade names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves the right to make changes to, or  
discontinue any products described in this document without further notice. Semtech makes no warranty, representation or guarantee, express or  
implied, regarding the suitability of its products for any particular purpose. All rights reserved.  
© Semtech 2015  
Contact Information  
Semtech Corporation  
200 Flynn Road, Camarillo, CA 93012  
Phone: (805) 498-2111, Fax: (805) 498-3804  
www.semtech.com  
TS33010  
Final  
14 of  
Rev  
June 2, 2016  

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TS33010-M009QFNR

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TS33010-M018QFNR

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